12002-01-26 Nick Clifton <[email protected]> 2 3 * po/fr.po: Updated version. 4 52002-01-25 Nick Clifton <[email protected]> 6 7 * po/es.po: Updated version. 8 92002-01-24 Nick Clifton <[email protected]> 10 11 * po/da.po: New version. 12 132002-01-23 Nick Clifton <[email protected]> 14 15 * po/da.po: New file: Spanish translation. 16 * configure.in (ALL_LINGUAS): Add da. 17 * configure: Regenerate. 18 192002-01-22 Graydon Hoare <[email protected]> 20 21 * fr30-asm.c: Regenerate. 22 * fr30-desc.c: Likewise. 23 * fr30-desc.h: Likewise. 24 * fr30-dis.c: Likewise. 25 * fr30-ibld.c: Likewise. 26 * fr30-opc.c: Likewise. 27 * fr30-opc.h: Likewise. 28 * m32r-asm.c: Likewise. 29 * m32r-desc.c: Likewise. 30 * m32r-desc.h: Likewise. 31 * m32r-dis.c: Likewise. 32 * m32r-ibld.c: Likewise. 33 * m32r-opc.c: Likewise. 34 * m32r-opc.h: Likewise. 35 * m32r-opinst.c: Likewise. 36 * openrisc-asm.c: Likewise. 37 * openrisc-desc.c: Likewise. 38 * openrisc-desc.h: Likewise. 39 * openrisc-dis.c: Likewise. 40 * openrisc-ibld.c: Likewise. 41 * openrisc-opc.c: Likewise. 42 * openrisc-opc.h: Likewise. 43 * xstormy16-desc.c: Likewise. 44 452002-01-22 Richard Henderson <[email protected]> 46 47 * alpha-dis.c (print_insn_alpha): Also mask the base opcode for 48 comparison. 49 502002-01-22 Alan Modra <[email protected]> 51 52 * Makefile.am: Run "make dep-am". 53 * Makefile.in: Regenerate. 54 * opcodes/po/POTFILES.in: Regenerate. 55 562002-01-19 Richard Earnshaw <[email protected]> 57 58 * arm-opc.h (arm_opcodes): Use generic rule %5?hb instead of %h. 59 * arm-dis.c (print_insn_arm): Don't handle 'h' case. 60 612002-01-18 Keith Walker <[email protected]> 62 63 * arm-opc.h (arm_opcodes): Add bxj instruction. 64 652002-01-17 Nick Clifton <[email protected]> 66 67 * po/opcodes.pot: Regenerate. 68 * po/fr.po: Regenerate. 69 * po/sv.po: Regenerate. 70 * po/tr.po: Regenerate. 71 722002-01-16 Nick Clifton <[email protected]> 73 74 * po/tr.po: Import new version. 75 762002-01-15 Richard Earnshaw <[email protected]> 77 78 * arm-opc.h (arm_opcodes): Add patterns for VFP instructions. 79 * arm-dis.c (print_insn_arm): Support new disassembly qualifiers for 80 VFP bitfields. 81 822002-01-10 matthew green <[email protected]> 83 84 * xstormy16-asm.c: Regenerate. 85 * xstormy16-desc.c: Likewise. 86 * xstormy16-desc.h: Likewise. 87 * xstormy16-dis.c: Likewise. 88 * xstormy16-opc.c: Likewise. 89 * xstormy16-opc.h: Likewise. 90 912002-01-07 Nick Clifton <[email protected]> 92 93 * po/es.po: New file: Spanish translation. 94 * configure.in (ALL_LINGUAS): Add es. 95 * configure: Regenerate. 96 972001-12-31 Jeffrey A Law ([email protected]) 98 99 * hppa-dis.c (print_insn_hppa): Handle new 'c' mode completers, 100 'X', 'M', and 'A'. No longer emit a space after 'x' or 's'. 101 Always emit a space after 'H'. 102 1032001-12-18 matthew green <[email protected]> 104 105 * ppc-opc.c (PPCVEC): Include PPC_OPCODE_ANY. 106 1072001-12-17 Richard Henderson <[email protected]> 108 109 * alpha-opc.c (unop): Encode with RB as $sp. 110 1112001-12-07 Geoffrey Keating <[email protected]> 112 113 * Makefile.am: Add support for xstormy16. 114 * Makefile.in: Regenerate. 115 * configure.in: Add support for xstormy16. 116 * configure: Regenerate. 117 * disassemble.c: Add support for xstormy16. 118 * xstormy16-asm.c: New generated file. 119 * xstormy16-desc.c: New generated file. 120 * xstormy16-desc.h: New generated file. 121 * xstormy16-dis.c: New generated file. 122 * xstormy16-ibld.c: New generated file. 123 * xstormy16-opc.c: New generated file. 124 * xstormy16-opc.h: New generated file. 125 1262001-12-06 Richard Henderson <[email protected]> 127 128 * alpha-opc.c (alpha_opcodes): Add wh64en. 129 1302001-12-04 Alexandre Oliva <[email protected]> 131 132 * d10v-opc.c (d10v_predefined_registers): Remove warnings 133 introduced in Nov 29's patch. 134 135 * d10v-dis.c (print_operand): Apply REGISTER_MASK to `num' of 136 unmatched register. 137 138 * d10v-dis.c (print_operand): Disregard OPERAND_SP in register 139 predefined value. 140 141 * d10v-opc.c (RSRC_NOSP): New macro. 142 (d10v_operands): Add it. 143 (d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w". 144 1452001-11-29 Alexandre Oliva <[email protected]> 146 147 * d10v-opc.c (d10v_predefined_registers): Mark `sp' as OPERAND_SP. 148 (RSRC_SP): New macro. 149 (d10v_operands): Add it. 150 (d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP. 151 1522001-11-23 Lars Brinkhoff <[email protected]> 153 154 * pdp11-dis.c (print_insn_pdp11): Handle illegal instructions. 155 Also, break out of the loop as soon as an instruction has been 156 printed. 157 1582001-11-17 matthew green <[email protected]> 159 160 * ppc-opc.c (mfvrsave, mtvrsave): New instructions. 161 1622001-11-15 Alan Modra <[email protected]> 163 164 * po/POTFILES.in: Regenerate. 165 166 * ppc-opc.c (PPC64): Revert 2001-10-12. Do include PPC_OPCODE_PPC. 167 (insert_bat, extract_bat, insert_bba, extract_bba, 168 insert_bd, extract_bd, insert_bdm, extract_bdm, 169 insert_bdp, extract_bdp, valid_bo, 170 insert_bo, extract_bo, insert_boe, extract_boe, 171 insert_ds, extract_ds, insert_de, extract_de, 172 insert_des, extract_des, insert_li, extract_li, 173 insert_mbe, extract_mbe, insert_mb6, extract_mb6, 174 insert_nb, extract_nb, insert_nsi, extract_nsi, 175 insert_ral, insert_ram, insert_ras, 176 insert_rbs, extract_rbs, insert_sh6, extract_sh6, 177 insert_spr, extract_spr, insert_tbr, extract_tbr): Add dialect param. 178 (extract_bd, extract_bdm, extract_bdp, 179 extract_ds, extract_des, 180 extract_li, extract_nsi): Implement sign extension without conditional. 181 (insert_bdm, extract_bdm, 182 insert_bdp, extract_bdp, valid_bo): Handle 64 bit branch hints. 183 (extract_bdm, extract_bdp): Correct 32 bit validation. 184 (AT1_MASK, AT2_MASK): Define. 185 (BBOAT_MASK): Define. 186 (BBOATCB_MASK, BBOAT2CB_MASK, BBOATBI_MASK): Define. 187 (BOFM64, BOFP64, BOTM64, BOTP64): Define. 188 (BODNZM64, BODNZP64, BODZM64, BODZP64): Define. 189 (PPCCOM32, PPCCOM64): Define. 190 (powerpc_opcodes): Modify existing 32 bit insns with branch hints 191 and add new patterns to implement 64 bit branches with hints. Move 192 booke instructions so they match before ppc64. 193 194 * ppc-dis.c (powerpc_dialect): Set PPC_OPCODE_64 in dialect for 195 64 bit default targets, and parse "32" and "64" in options. 196 Formatting fixes. 197 (print_insn_powerpc): Pass dialect to operand->extract. 198 1992001-11-14 Dave Brolley <[email protected]> 200 201 * cgen-dis.c (count_decodable_bits): New function. 202 (add_insn_to_hash_chain): New function. 203 (hash_insn_array): Call add_insn_to_hash_chain. 204 (hash_insn_list): Call add_insn_to_hash_chain. 205 * m32r-dis.c: Regenerated. 206 * fr30-dis.c: Regenerated. 207 2082001-11-14 Andreas Jaeger <[email protected]> 209 210 * i386-dis.c (print_insn): Use x86-64 as option. 211 2122001-11-14 Alan Modra <[email protected]> 213 214 * disassemble.c (disassembler): Call print_insn_i386. 215 * i386-dis.c (SUFFIX_ALWAYS): Define. 216 (struct dis_private): Add orig_sizeflag. 217 (print_insn_i386): Make it a wrapper, calling.. 218 (print_insn): ..The old body of print_insn_i386. Avoid longjmp 219 warning without using volatile by moving orig_sizeflag to priv, 220 and removing inbuf. Parse disassembler_options. 221 (print_insn_i386_att, print_insn_i386_intel): Move initialisation 222 code to print_insn. 223 (putop): Remove #ifdef SUFFIX_ALWAYS. 224 2252001-11-11 Timothy Wall <[email protected]> 226 227 * tic54x-dis.c: Use revised opcode structure. Export opcode 228 template lookup. 229 (has_lkaddr): Don't forget about Lmem insns. 230 * tic54x-opc.c: Add emulation trap. Parallel table now uses 231 standard opcode templates. 232 2332001-11-13 Zack Weinberg <[email protected]> 234 235 * i386-dis.c (grps): Change "sldt", "str", and "smsw" entries 236 to "sldtQ", "strQ", "smswQ" respectively; all with Ev operand 237 category instead of Ew. 238 2392001-11-12 Niraj Gupta <[email protected]> 240 241 * m68k-opc.c: Fix definitions of wddata[bwl]. 242 2432001-11-09 Richard Sandiford <[email protected]> 244 245 * cgen-asm.c (cgen_parse_keyword): If the keyword is too big to 246 fit in the buffer, try to match the empty keyword. 247 2482001-11-09 Nick Clifton <[email protected]> 249 250 * cgen-ibld.in (extract_1): Fix badly placed #if 0. 251 * fr30-ibld.c: Regenerate. 252 * m32r-ibld.c: Regenerate. 253 * openrisc-ibld.c: Regenerate. 254 2552001-11-04 Chris Demetriou <[email protected]> 256 257 * mips-dis.c (print_insn_mips): Remove spaces at end of line. 258 2592001-11-02 Nick Clifton <[email protected]> 260 261 * configure.in (ALL_LINGUAS): Add "fr", "sv" and "tr". 262 * configure: Regernate. 263 * po/fr.po: New file. 264 * po/sv.po: New file. 265 * po/tr.po: New file. 266 2672001-11-01 Stephane Carrez <[email protected]> 268 269 * m68hc11-dis.c (print_insn): Fix disassembly of movb with a 270 constant as source. 271 2722001-10-30 Hans-Peter Nilsson <[email protected]> 273 274 * Makefile.am (CFILES): Add mmix-dis.c and mmix-opc.c. Regenerate 275 dependencies. 276 * Makefile.in: Regenerate. 277 * mmix-dis.c, mmix-opc.c: New files. 278 2792001-10-29 Kazu Hirata <[email protected]> 280 281 * d30v-dis.c: Fix a comment typo. 282 2832001-10-23 Chris Demetriou <[email protected]> 284 285 * mips-opc.c (mips_builtin_opcodes): Mark "bgezall" and 286 "bltzall" as writing GPR 31 (since they do). 287 288 * mips-dis.c (print_insn_arg): Calculate info->target 289 where appropriate. 290 (print_insn_mips): Fill in instruction info. 291 (print_mips16_insn_arg): Remove unneded variable 'val'. 292 Removed duplicated instruction target calculations, 293 calculate once and print that result. Use same idiom for 294 masking the jump segment bits as is used in print_insn_arg. 295 2962001-10-20 Alan Modra <[email protected]> 297 298 * ppc-opc.c (CT): Make it an optional operand. 299 3002001-10-17 Chris Demetriou <[email protected]> 301 302 * mips-dis.c (mips_isa_type): Make the ISA used to disassemble 303 SB-1 binaries include instructions specific to the SB-1. 304 * mips-opc.c (SB1): New definition. 305 (mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps", 306 "recip.ps", "rsqrt.ps", and "sqrt.ps". 307 3082001-10-17 matthew green <[email protected]> 309 310 * ppc-opc.c (STRM): New AltiVec operand. 311 (XDSS): New AltiVec instruction form. 312 (mtvscr): Correct operand list. 313 (dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions. 314 3152001-10-17 Alan Modra <[email protected]> 316 317 * po/POTFILES.in: Regenerate. 318 3192001-10-13 matthew green <[email protected]> 320 321 * ppc-opc.c (MO): New macro for MO field of mbar instruction. 322 (powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr, 323 mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions. 324 3252001-10-13 Nick Clifton <[email protected]> 326 327 * cgen-ibld.in: Include safe-ctype.h in preference to 328 ctype.h. 329 * cgen-asm.in: Include safe-ctype.h in preference to 330 ctype.h. Fix formatting. Use ISSPACE instead of isspace and 331 TOLOWER instead of tolower. 332 (@arch@_cgen_build_insn_regex): Remove duplication of syntax 333 string elements in constructed regular expression. 334 * fr30-asm.c: Regenerate. 335 * fr30-desc.c: Regenerate. 336 * fr30-ibld.c: Regenerate. 337 * m32r-asm.c: Regenerate. 338 * m32r-desc.c: Regenerate. 339 * m32r-ibld.c: Regenerate. 340 * openrisc-asm.c: Regenerate. 341 * openrisc-desc.c: Regenerate. 342 * openrisc-ibld.c: Regenerate. 343 * po/opcodes.pot: Regenerate. 344 3452001-10-12 matthew green <[email protected]> 346 347 * ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New 348 instruction field instruction/extraction functions for new BookE 349 DE form instructions. 350 (CT): New macro for CT field in an X form instruction. 351 (DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form 352 instructions. 353 (PPC64): Don't include PPC_OPCODE_PPC. 354 (403): New opcode macro for PPC403 processors. 355 (BOOKE): New opcode macro for BookE processors. 356 (bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions. 357 (bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise. 358 (dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise. 359 (stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise. 360 (mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise. 361 (subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise. 362 (subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise. 363 (addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise. 364 (lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise. 365 (stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise. 366 (tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise. 367 (lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise. 368 (stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise. 369 (lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise. 370 371 * ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look 372 for a disassembler option of `booke', `booke32' or `booke64' to enable 373 BookE support in the disassembler. 374 3752001-10-12 John Healy <[email protected]> 376 377 * cgen-dis.in (print_insn): Use min (cd->base_insn_bitsize, buflen*8) 378 for the length when extracting the base part of the insn. 379 3802001-10-09 Bruno Haible <[email protected]> 381 382 * cgen-asm.in (*_cgen_build_insn_regex): Generate a case sensitive 383 regular expression. Fix some formatting problems. 384 * fr30-asm.c: Regenerate. 385 * openrisc-asm.c: Regenerate. 386 * m32r-asm.c: Regenerate. 387 3882001-10-09 Christian Groessler <[email protected]> 389 390 * z8k-dis.c (unparse_instr): Fixed formatting. Change disassembly 391 of indirect register memory accesses to be same format the 392 assembler accepts. 393 3942001-10-09 Nick Clifton <[email protected]> 395 396 * sh-opc.h: Fix encoding of least significant nibble of the 397 DSP single data transfer instructions. 398 399 * sh-dis.c (print_insn_shx): Fix decoding of As opcode in DSP 400 instructions. 401 4022001-10-08 Nick Clifton <[email protected]> 403 404 * cgen-asm.in: Fix compile time warning messages in generated 405 C files. 406 * cgen-dis.in: The same. 407 * cgen-ibld.in: The same. 408 * fr30-asm.c: Regenerate. 409 * fr30-desc.c: Regenerate. 410 * fr30-dis.c: Regenerate. 411 * fr30-ibld.c: Regenerate. 412 * fr30-opc.c: Regenerate. 413 * m32r-asm.c: Regenerate. 414 * m32r-desc.c: Regenerate. 415 * m32r-dis.c: Regenerate. 416 * m32r-ibld.c: Regenerate. 417 * m32r-opc.c: Regenerate. 418 * m32r-opinst.c Regenerate. 419 * openrisc-asm.c: Regenerate. 420 * openrisc-desc.c: Regenerate. 421 * openrisc-dis.c: Regenerate. 422 * openrisc-ibld.c: Regenerate. 423 * openrisc-opc.c: Regenerate. 424 * openrisc-opc.h: Regenerate. 425 * Makefile.in: Regenerate. 426 * po/POTFILES.in: Regenerate. 427 * po/opcodes.pot: Regenerate. 428 4292001-10-08 Aldy Hernandez <[email protected]> 430 431 * arm-opc.h (arm_opcodes): Add cirrus insns. 432 433 * arm-dis.c (print_insn_arm): Add 'I' case. 434 4352001-10-03 Alan Modra <[email protected]> 436 437 * po/POTFILES.in: Regenerate. 438 * configure: Regenerate. 439 4402001-10-02 Alan Modra <[email protected]> 441 442 * Makefile.am (Makefile): Depend on bfd/configure.in. 443 Run "make dep-am". 444 * Makefile.in: Regenerate. 445 4462001-09-30 John Healy <[email protected]> 447 448 * cgen-ibld.in (insert_1): Switched bfd_get_bits and bfd_set_bits 449 calls to cgen_get_insn_value and cgen_put_insn_value calls. 450 (extract_1): Switched bfd_get_bits call to cgen_get_insn_value call. 451 4522001-09-30 Hans-Peter Nilsson <[email protected]> 453 454 * Makefile.am: Update dependencies with "make dep-am". 455 * Makefile.in: Regenerate. 456 4572001-09-26 Alan Modra <[email protected]> 458 459 * arc-dis.c: Formatting fixes. 460 (my_sprintf): Define using VPARAMS, VA_OPEN, VA_FIXEDARG, VA_CLOSE. 461 4622001-09-21 Bruno Haible <[email protected]> 463 464 * arc-dis.c: Don't include <ctype.h>. 465 * openrisc-desc.c: Likewise. 466 * openrisc-ibld.c: Likewise. 467 4682001-09-20 Nick Clifton <[email protected]> 469 470 * fr30-opc.c: Fix compile time warning messages. 471 * i370-opc.c: Fix compile time warning messages. 472 * i960-dis.c: Fix compile time warning messages. 473 * m32r-asm.c: Fix compile time warning messages. 474 * m32r-desc.c: Fix compile time warning messages. 475 * m32r-dis.c: Fix compile time warning messages. 476 * m32r-ibld.c: Fix compile time warning messages. 477 * m32r-opc.c: Fix compile time warning messages. 478 * m32r-opinst.c: Fix compile time warning messages. 479 * ns32k-dis.c: Fix compile time warning messages. 480 * openrisc-asm.c: Fix compile time warning messages. 481 * openrisc-desc.c: Fix compile time warning messages. 482 * openrisc-dis.c: Fix compile time warning messages. 483 * openrisc-ibld.c: Fix compile time warning messages. 484 * openrisc-opc.c: Fix compile time warning messages. 485 * pdp11-dis.c: Fix compile time warning messages. 486 * tic54x-dis.c: Fix compile time warning messages. 487 * v850-opc.c: Fix compile time warning messages. 488 * vax-dis.c: Fix compile time warning messages. 489 * w65-opc.h: Fix compile time warning messages. 490 * z8k-opc.h: Fix compile time warning messages. 491 * z8kgen.c: Fix compile time warning messages. 492 4932001-09-19 Nick Clifton <[email protected]> 494 495 * arm-dis.c: Fix compile time warning messages. 496 * cgen-asm.c: Fix compile time warning messages. 497 * cgen-dis.c: Fix compile time warning messages. 498 * cris-dis.c: Fix compile time warning messages. 499 * d10v-dis.c: Fix compile time warning messages. 500 * fr30-asm.c: Fix compile time warning messages. 501 * fr30-desc.c: Fix compile time warning messages. 502 * fr30-dis.c: Fix compile time warning messages. 503 * fr30-ibld.c: Fix compile time warning messages. 504 5052001-09-18 Bruno Haible <[email protected]> 506 507 * cgen-asm.c: Include "safe-ctype.h" instead of <ctype.h>. 508 (cgen_parse_keyword): Use ISALNUM instead of isalnum. 509 * cgen-opc.c: Include "safe-ctype.h" instead of <ctype.h>. 510 (cgen_keyword_lookup_name): Use ISALPHA/TOLOWER instead of 511 isalpha/tolower. 512 (cgen_keyword_add): Use ISALNUM instead of isalnum. 513 (hash_keyword_name): Use TOLOWER instead of tolower. 514 * fr30-asm.c: Include "safe-ctype.h" instead of <ctype.h>. 515 (parse_insn_normal): Use TOLOWER/ISSPACE instead of 516 tolower/isspace. 517 (fr30_cgen_assemble_insn): Use ISSPACE instead of isspace. 518 * fr30-desc.c: Don't include <ctype.h>. 519 * fr30-ibld.c: Likewise. 520 * ia64-gen.c: Include "safe-ctype.h" instead of <ctype.h>. 521 (load_insn_classes, parse_resource_users, load_depfile): Use 522 ISSPACE instead of isspace. 523 * m32r-asm.c: Include "safe-ctype.h" instead of <ctype.h>. 524 (parse_insn_normal): Use TOLOWER/ISSPACE instead of 525 tolower/isspace. 526 (m32r_cgen_assemble_insn): Use ISSPACE instead of isspace. 527 * m32r-desc.c: Don't include <ctype.h>. 528 * m32r-ibld.c: Likewise. 529 * openrisc-asm.c: Include "safe-ctype.h" instead of <ctype.h>. 530 (parse_insn_normal): Use TOLOWER/ISSPACE instead of 531 tolower/isspace. 532 (openrisc_cgen_assemble_insn): Use ISSPACE instead of isspace. 533 5342001-09-18 Martin Schwidefsky <[email protected]> 535 536 * Makefile.am: Add rules and dependencies to create the s/390 opcode 537 table out of s390-opc.txt automatically. 538 * configure.in: Add BFD_CC_FOR_BUILD to allow CC_FOR_BUILD to be used. 539 * s390-mkopc.c (dumpTable): Change output to create a complete file. 540 * s390-opc.c: New improved opcode format macros and remove the 541 pregenerated opcode table. 542 * s390-opc.txt: Adapt to new improved opcode format macros. 543 5442001-09-14 David Schleef <[email protected]> 545 546 * ppc-opc.c (VXA, VXA_MASK): Fix mask bits. 547 5482001-09-04 Alan Modra <[email protected]> 549 550 * i386-dis.c (grps): Don't print the implicit al/ax/eax register 551 for opcode 0xf6 or 0xf7 forms of mul, imul, div, idiv insns. 552 5532001-08-31 Eric Christopher <[email protected]> 554 Jason Eckhardt <[email protected]> 555 556 * mips-dis.c: Add support for bfd_mach_mipsisa32 and 557 bfd_mach_mipsisa64. Remove bfd_mach_mips32, bfd_mach_mips32_4k, 558 bfd_mach_mips64. 559 5602001-08-31 Andreas Jaeger <[email protected]> 561 562 * tic54x-opc.c: Add default initializers to avoid warnings. 563 564 * arc-opc.c: Include "sysdep.h" to get stdio.h as include file. 565 * arc-ext.c: Likewise. 566 5672001-08-28 matthew gren <[email protected]> 568 569 * ppc-opc.c (icbt): Order correctly. 570 5712001-08-27 David Edelsohn <[email protected]> 572 Torbjorn Granlund <[email protected]> 573 574 * ppc-opc.c (DS): Add PPC_OPERAND_DS flag. 575 (LS): Define. 576 (insert_ds): Complain if not a multiple of 4. 577 (XSYNC): Define. 578 (XSYNC_MASK): Define. 579 (powerpc_opcodes): Add "slbmte", "lwsync", "ptesync", "slbmfev", 580 "slbmfee". Modify "sync" to use XSYNC_MASK and LS. 581 5822001-08-26 Andreas Jaeger <[email protected]> 583 584 * h8500-opc.h: Add default initializers to h8500_table to shut up 585 GCC warnings. 586 5872001-08-25 Andreas Jaeger <[email protected]> 588 589 * tic54x-dis.c: Add unused attributes where needed. 590 591 * z8k-dis.c (output_instr): Add unused attribute. 592 593 * h8300-dis.c: Add missing prototypes. 594 (bfd_h8_disassemble): Make static. 595 596 * cris-dis.c: Add missing prototype. 597 * h8500-dis.c: Likewise. 598 * m68hc11-dis.c: Likewise. 599 * pj-dis.c: Likewise. 600 * tic54x-dis.c: Likewise. 601 * v850-dis.c: Likewise. 602 * vax-dis.c: Likewise. 603 * w65-dis.c: Likewise. 604 * z8k-dis.c: Likewise. 605 606 * d10v-dis.c: Add missing prototype. 607 (dis_long): Remove unused variable. 608 (dis_2_short): Likewise. 609 610 * sh-dis.c: Add missing prototypes. 611 * v850-opc.c: Likewise. 612 Add unused attributes where needed. 613 614 * ns32k-dis.c: Add missing prototypes. 615 (bit_extract_simple): Remove unused variable. 616 6172001-08-23 Martin Schwidefsky <[email protected]> 618 619 * opcodes/s390-opc.c: Add "low or high" and "not low or high" 620 branch instructions for gcc 3.0. 621 * opcodes/s390-opc.txt: Likewise. 622 6232001-08-21 Andreas Jaeger <[email protected]> 624 625 * i960-dis.c: Add parameters for prototypes 626 (ctrl): Add unused attributes. 627 (cobr): Likewise. 628 (put_abs): Likewise. 629 630 * mips-dis.c: Add missing prototypes. 631 * a29k-dis.c: Likewise. 632 * arc-dis.c: Likewise. 633 * ia64-opc.c: Likewise. 634 635 * s390-dis.c: Add missing prototypes. 636 (init_disasm): Remove unused attribute since the parameter is 637 used. 638 6392001-08-16 Thiemo Seufer <[email protected]> 640 641 * mips-opc.c (M1): Define. Reformatted Code. 642 (mips_builtin_opcodes): Added performance counter opcodes mfpc, mfps, 643 mtps, mtps. Typo. 644 6452001-08-16 Jonathan Larmour <[email protected]> 646 647 * mips-opc.c: R3900s can support all branch likely INSN_MACROs where 648 the corresponding non-likely insn is in MIPS I. 649 6502001-08-13 Kazu Hirata <[email protected]> 651 652 * mcore-dis.c: Fix formatting. 653 * mips-dis.c: Likewise. 654 * pj-dis.c: Likewise. 655 * z8k-dis.c: Likewise. 656 6572001-08-12 Richard Henderson <[email protected]> 658 659 * cgen-ibld.in (extract_normal): Match type of VALUE and MASK 660 to *VALUEP. Regenerate all cgen files. 661 6622001-08-10 Richard Sandiford <[email protected]> 663 664 * mips-dis.c (print_insn_mips): Remove OPCODE_IS_MEMBER's gp32 665 argument. 666 * mips-opc.c (G6): Undefine. 667 (mips_builtin_opcodes): Remove gp32 entry for "move". Add macro 668 as the first "move" alternative. 669 6702001-08-10 Andreas Jaeger <[email protected]> 671 672 * configure.in: Add -Wstrict-prototypes and -Wmissing-prototypes 673 to build warnings. 674 * configure: Regenerate. 675 6762001-08-10 Alan Modra <[email protected]> 677 678 * ppc-opc.c: Revert 2001-08-08. 679 6802001-08-09 Alan Modra <[email protected]> 681 682 * dis-buf.c (generic_strcat_address): Add missing prototype. 683 #if 0 the functions as it is unused. 684 6852001-08-08 Alan Modra <[email protected]> 686 687 1999-10-25 Torbjorn Granlund <[email protected]> 688 * ppc-opc.c: Include "bfd.h". 689 (powerpc_operands): Add new field for reloc type. 690 6912001-07-21 Thiemo Seufer <[email protected]> 692 693 * mips-dis.c (print_insn_arg): Don't use software integer registers 694 for coprocessor registers. 695 (get_mips_isa): Removed. 696 (is_newabi): New function, checks if NewABI is used. 697 (_print_insn_mips): Get distinction between old ABI and new ABI right. 698 6992001-08-01 Christian Groessler <[email protected]> 700 701 * z8kgen.c: Fixed indentation of opt[] array. Include stdio.h to 702 get stderr definition. 703 (internal, gas): Removed warnings. 704 (gas): Create a correct final entry for created array. 705 * z8k-opc.h: Recreated with new z8kgen. 706 7072001-07-28 Kazu Hirata <[email protected]> 708 709 * i386-dis.c: Fix formatting. 710 7112001-07-28 Matthias Kramm <[email protected]> 712 713 * i386-dis.c: Change formatting conventions for architecture 714 i386:intel to better match the format of various intel i386 715 assemblers, like nasm, tasm or masm. 716 7172001-07-24 Alan Modra <[email protected]> 718 719 * Makefile.am: Update dependencies with "make dep-am". 720 * Makefile.in: Regenerate 721 7222001-07-24 Kazu Hirata <[email protected]> 723 724 * alpha-dis.c: Fix formatting. 725 * cris-dis.c: Likewise. 726 * d10v-dis.c: Likewise. 727 * d30v-dis.c: Likewise. 728 * m10300-dis.c: Likewise. 729 * tic54x-dis.c: Likewise. 730 7312001-07-23 Kazu Hirata <[email protected]> 732 733 * m68k-dis.c: Fix formatting. 734 * pj-dis.c: Likewise. 735 * s390-dis.c: Likewise. 736 * z8k-dis.c: Likewise. 737 7382001-07-21 Chris Demetriou <[email protected]> 739 740 * mips-opc.c (mips_builtin_opcodes): Sort c.le.s and c.lt.s 741 into the rest of the surrounding definitions. 742 7432001-07-18 Alan Modra <[email protected]> 744 745 * i386-dis.c (grps): Print l or w suffix, and require mem modrm 746 for lgdt, lidt, sgdt, sidt. 747 7482001-07-13 Philip Blundell <[email protected]> 749 750 * arm-dis.c (print_insn_arm): Use decimal for offsets in LDR/STR. 751 7522001-07-12 Jeff Johnston <[email protected]> 753 754 * cgen-asm.in: Include "xregex.h" always to enable the libiberty 755 regex support. 756 (@arch@_cgen_build_insn_regex): New routine from Graydon. 757 (@arch@_cgen_assemble_insn): Add Graydon's code to use regex 758 to verify if it is worth parsing the insn as insn "x". Also update 759 error message when insn is not a recognized format of the insn vs 760 when the insn is completely unrecognized. 761 7622001-07-11 Frank Ch. Eigler <[email protected]> 763 764 * cgen-dis.in (print_insn): Use cgen_get_insn_value instead of 765 bfd_get_bits. 766 * cgen-opc.c (cgen_get_insn_value, cgen_put_insn_value): Respect 767 non-zero CGEN_CPU_DESC->insn_chunk_bitsize. 768 7692001-07-09 Andreas Jaeger <[email protected]>, Karsten Keil <[email protected]> 770 771 * i386-dis.c (set_op): Handle 64 bit and 32 bit mode. 772 (OP_J): Use bfd_vma for mask to work properly with 64 bits. 773 (op_address,op_riprel): Use bfd_vma to handle 64 bits. 774 7752001-07-05 Ben Elliston <[email protected]> 776 777 * Makefile.am (CPUDIR): Define. 778 (stamp-m32r): Update dependencies. 779 (stamp-fr30): Ditto. 780 (stamp-openrisc): Ditto. 781 * Makefile.in: Regenerate. 782 7832001-07-03 Zoltan Hidvegi <[email protected]> 784 785 * ppc-opc.c: Fix encoding of 'clf' instruction. 786 7872001-06-30 Geoffrey Keating <[email protected]> 788 789 * cgen-ibld.in (insert_normal): Support CGEN_IFLD_SIGN_OPT. 790 7912001-06-28 Geoffrey Keating <[email protected]> 792 793 * cgen-asm.c (cgen_parse_keyword): Allow any first character. 794 * cgen-opc.c (cgen_keyword_add): Ignore special first 795 character when building nonalpha_chars field. 796 7972001-06-24 Ben Elliston <[email protected]> 798 799 * m88k-dis.c: Format to conform to GNU coding standards. 800 8012001-06-23 Andreas Jaeger <[email protected]> 802 803 * disassemble.c (disassembler_usage): Add unused attribute. 804 8052001-06-22 Eric Christopher <[email protected]> 806 807 * mips-opc.c: Move prefx to start of the table. 808 8092001-06-22 Stacey Sheldon <[email protected]> 810 811 * arc-opc.c (insert_st_syntax): Fix over-optimisation of ST 812 instruction. 813 8142001-06-22 Pauli <[email protected]> 815 816 * m68k-opc.c: Add wdebug instruction. 817 8182001-06-15 Aldy Hernandez <[email protected]> 819 820 * m10300-opc.c (mn10300_opcodes): Change opcode for AM33 subc. 821 8222001-06-14 Geoffrey Keating <[email protected]> 823 824 * cgen-asm.c (cgen_parse_keyword): When looking for the 825 boundaries of a keyword, allow any special characters 826 that are actually in one of the allowed keyword. 827 * cgen-opc.c (cgen_keyword_add): Add any special characters 828 to the nonalpha_chars field. 829 8302001-06-12 Martin Schwidefsky <[email protected]> 831 832 * s390-opc.c: Add lgh instruction. 833 * s390-opc.txt: Likewise. 834 8352001-06-11 Alan Modra <[email protected]> 836 837 * i386-dis.c: Group function prototypes in one place. 838 (FLOATCODE): Redefine as 1. 839 (USE_GROUPS): Redefine as 2. 840 (USE_PREFIX_USER_TABLE): Redefine as 3. 841 (X86_64_SPECIAL): Define as 4. 842 (GRP1b..GRPAMD): Move USE_GROUPS to bytecode1, index to bytecode2. 843 (PREGRP0..PREGRP26): Similarly with USE_PREFIX_USER_TABLE. 844 (dis386_att, dis386_intel, disx86_64_att, disx86_64_intel): Delete. 845 (dis386): New table combining above four tables. 846 (dis386_twobyte_att, dis386_twobyte_intel): Delete. 847 (dis386_twobyte): New table combining above two tables. 848 (x86_64_table): New table to handle x86_64. 849 (X86_64_0): Define. 850 (float_mem_att, float_mem_intel): Delet. 851 (float_mem): New table combining above two tables. 852 (print_insn_i386): Modify for above. 853 (dofloat): Likewise. 854 (putop): Handle '{', '|' and '}' to select alternative mnemonics. 855 Return 0 on success, 1 if no valid alternative. 856 (putop <case 'F'>, <case 'H'>): Print nothing for intel_syntax. 857 (putop <case 'T'>): Move to case 'U', and share case 'Q' code. 858 (putop <case 'I'>): Move to case 'T', and share case 'P' code. 859 (OP_REG <case rAX_reg .. rDI_reg>): Handle as for eAX_reg .. eDI_reg 860 if not 64-bit mode. 861 (OP_I <case q_mode>): Handle as for v_mode if not 64-bit mode. 862 (OP_I64): If not 64-bit mode, call OP_I. 863 OP_OFF64): If not 64-bit mode, call OP_OFF. 864 (OP_ST, OP_STi, OP_SEG, OP_DIR, OP_OFF, OP_OFF64, OP_MMX): Rename 865 'ignore'/'ignored' to 'bytemode'. 866 8672001-06-10 Alan Modra <[email protected]> 868 869 * configure.in: Sort 'ta' case statement. 870 * configure: Regenerate. 871 872 * i386-dis.c (dis386_att): Add 'H' to conditional branch and 873 loop,jcxz insns. 874 (disx86_64_att): Likewise. 875 (dis386_twobyte_att): Likewise. 876 (print_insn_i386): Don't print branch hints as a prefix. 877 (putop): 'H' macro prints branch hints. 878 (get64): Kill compile warnings. 879 8802001-06-09 Alexandre Oliva <[email protected]> 881 882 * sh-opc.h (sh_table): Don't use empty initializers. 883 8842001-06-06 Christian Groessler <[email protected]> 885 886 * z8k-dis.c: Fix formatting. 887 (unpack_instr): Remove unused cases in switch statement. Add 888 safety abort() in default case. 889 (unparse_instr): Add safety abort() in default case. 890 8912001-06-06 Peter Jakubek <[email protected]> 892 893 * m68k-dis.c (print_insn_m68k): Fix typo. 894 * m68k-opc.c (m68k_opcodes): Correct allowed operands for 895 mcf (ColdFire) div, rem and moveb instructions. 896 8972001-06-06 Alan Modra <[email protected]> 898 899 * i386-dis.c (cond_jump_flag, loop_jcxz_flag): Define. 900 (cond_jump_mode, loop_jcxz_mode): Define. 901 (dis386_att): Add cond_jump_flag and loop_jcxz_flag as 902 appropriate, and 'F' suffix to loop insns. 903 (disx86_64_att): Likewise. 904 (dis386_twobyte_att): Likewise. 905 (print_insn_i386): Don't output addr prefix for loop, jcxz insns. 906 Output data size prefix for long conditional jumps. Output cs and 907 ds branch hints. 908 (putop): Handle 'F', and mark PREFIX_ADDR used for case 'E'. 909 (OP_J): Don't make PREFIX_DATA used. 910 9112001-06-04 Alexandre Oliva <[email protected]> 912 913 * sh-opc.h (sh_table): Complete last element entry to avoid 914 compiler warning. 915 9162001-05-16 Thiemo Seufer <[email protected]> 917 918 * mips-dis.c (mips_isa_type): Add MIPS r12k support. 919 9202001-05-23 Alan Modra <[email protected]> 921 922 * arc-opc.c: Whitespace changes. 923 9242001-05-18 Hans-Peter Nilsson <[email protected]> 925 926 * cris-opc.c (cris_spec_regs): Add missing initializer field for 927 last element. 928 9292001-05-15 Frank Ch. Eigler <[email protected]> 930 931 * cgen-dis.in (extract_normal): Complete support for min<base case. 932 9332001-05-15 Thiemo Seufer <[email protected]> 934 935 * mips-dis.c (INSNLEN): Rename MAXLEN. 936 (std_reg_names): Replace by mips32_reg_names and mips64_reg_names. 937 (print_insn_arg): Remove $ prefix of register names. 938 (set_mips_isa_type): Remove. 939 (mips_isa_type): New function. 940 (get_mips_isa): New Function. 941 (print_insn_mips): Rename _print_insn_mips. 942 (_print_insn_mips): New function, contains code which was 943 duplicated in print_insn_big_mips and print_insn_little_mips. 944 (print_insn_big_mips): Moved code to _print_insn_mips. 945 (print_insn_little_mips): Likewise. 946 (print_mips16_insn_arg): Remove $ prefix of register names. 947 Print error message before abort. 948 9492001-05-14 J.T. Conklin <[email protected]> 950 951 * ppc-opc.c (powerpc_opcodes): Fixed extended opcode field of 952 simplified mnemonics used for setting PPC750-specific special 953 purpose registers. 954 9552001-05-12 H.J. Lu <[email protected]> 956 957 * i386-dis.c (print_insn_i386): Always set `mod', `reg' and 958 `rm'. 959 9602001-05-12 Peter Targett <[email protected]> 961 962 * arc-opc.c (arc_reg_names): Correct attribute for lp_count 963 register to r/w. Formatting fixes throughout file. 964 9652001-05-12 Alan Modra <[email protected]> 966 967 * i386-dis.c (prefix_user_table): Correct movq2dq, movdq2q, and 968 movq operands. 969 (twobyte_has_modrm): Update table. 970 (need_modrm): Give it file scope. 971 (MODRM_CHECK): Define. 972 (dofloat): Use MODRM_CHECK. 973 (OP_E): Likewise. 974 (OP_EM): Likewise. 975 (OP_EX): Likewise. 976 9772001-05-07 Frank Ch. Eigler <[email protected]> 978 979 * cgen-dis.in (default_print_insn): Tolerate min<base instructions 980 even at end of a section. 981 * cgen-ibld.in (extract_normal): Tolerate min!=base!=max instructions 982 by ignoring precariously-unpacked insn_value in favor of raw buffer. 983 9842001-05-03 Thiemo Seufer <[email protected]> 985 986 * disassemble.c (disassembler_usage): Remove unused attribute. 987 9882001-05-04 Frank Ch. Eigler <[email protected]> 989 990 * m32r-dis.c, -asm.c, -ibld.c: Regenerated with disassembler fixes. 991 9922001-05-04 Frank Ch. Eigler <[email protected]> 993 994 * cgen-dis.in (print_insn): Remove call to read_insn. Instead, 995 assume incoming buffer already has the base insn loaded. Handle 996 smaller-than-base instructions for variable-length case. 997 9982001-05-04 Alan Modra <[email protected]> 999 1000 * i386-dis.c (Ev, Ed): Remove duplicate define. 1001 (Gd): Define. 1002 (XS): Define. 1003 (OP_XS): New function. 1004 (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and 1005 movmskp operands. 1006 (dis386_twobyte_intel): Likewise. 1007 (prefix_user_table): Use MS for maskmovq operand. 1008 10092001-04-27 Johan Rydberg <[email protected]> 1010 1011 * Makefile.am: Add OpenRISC target. 1012 * Makefile.in: Regenerated. 1013 1014 * disassemble.c (disassembler): Recognize the OpenRISC disassembly. 1015 1016 * configure.in (bfd_openrisc_arch): Add target. 1017 * configure: Regenerated. 1018 1019 * openrisc-asm.c: New file. 1020 * openrisc-desc.c: Likewise. 1021 * openrisc-desc.h: Likewise. 1022 * openrisc-dis.c: Likewise. 1023 * openrisc-ibld.c: Likewise. 1024 * openrisc-opc.c: Likewise. 1025 * openrisc-opc.h: Likewise. 1026 10272001-04-24 Christian Groessler <[email protected]> 1028 1029 * z8k-dis.c: add names of control registers (ctrl_names); 1030 (seg_length): provides instruction length fixup for segmented 1031 mode; (unpack_instr): correctly handle ARG_DISP16, ARG_DISP12, 1032 CLASS_0DISP7, CLASS_1DISP7, CLASS_DISP8 and CLASS_PR cases; 1033 (unparse_intr): handle CLASS_PR, print addresses without '#' 1034 * z8k-opc.h: re-created with new z8kgen 1035 * z8kgen.c: merged in fixes which were in existing z8k-opc.h; new 1036 entries for ldctl/ldctlb instruction 1037 10382001-04-06 Andreas Jaeger <[email protected]> 1039 1040 * i386-dis.c: Add ffreep instruction. 1041 10422001-03-30 Alexandre Oliva <[email protected]> 1043 1044 * ppc-opc.c (insert_mbe): Shift mask initializer as long. 1045 10462001-03-24 Alan Modra <[email protected]> 1047 1048 * i386-dis.c (PREGRP25): Define. 1049 (dis386_twobyte_att): Use here in place of "movntq" entry. 1050 (dis386_twobyte_intel): Likewise. 1051 (prefix_user_table): Add PREGRP25 entry for "movntq" and "movntdq". 1052 (PREGRP26): Define. 1053 (dis386_twobyte_att): Use here. 1054 (dis386_twobyte_intel): Likewise. 1055 (prefix_user_table): Add PREGRP26 entry for "punpcklqdq". 1056 (prefix_user_table <maskmovdqu>): XM operand, not MX. 1057 (prefix_user_table): Cosmetic changes to "bad" entries. 1058 10592001-03-23 Nick Clifton <[email protected]> 1060 1061 * mips-opc.c: Remove extraneous whitespace. 1062 * mips-dis.c: Remove extraneous whitespace. 1063 10642001-03-22 Ben Elliston <[email protected]> 1065 1066 * cgen-asm.in (@arch@_cgen_assemble_insn): Move tmp_errmsg 1067 declaration inside CGEN_VERBOSE_ASSEMBLER_ERRORS conditional. 1068 * cgen-ibld.in (put_insn_int_value): Mark cd parameter as unused 1069 to allay a compiler warning. 1070 10712001-03-22 Alan Modra <[email protected]> 1072 1073 * i386-dis.c (dis386_twobyte_att): Add entries for paddq, psubq. 1074 (dis386_twobyte_intel): Likewise. 1075 (twobyte_has_modrm): Set entry for paddq, psubq. 1076 10772001-03-20 Patrick Macdonald <[email protected]> 1078 1079 * cgen-dis.in (print_insn_@arch@): Add support for target machine 1080 determination via CGEN_COMPUTE_MACH. 1081 * fr30-desc.c: Regenerate. 1082 * fr30-dis.c: Regenerate. 1083 * fr30-opc.h: Regenerate. 1084 * m32r-desc.c: Regenerate. 1085 * m32r-dis.c: Regenerate. 1086 * m32r-opc.h: Regenerate. 1087 * m32r-opinst.c: Regenerate. 1088 10892001-03-20 H.J. Lu <[email protected]> 1090 1091 * configure.in: Remove the redundent AC_ARG_PROGRAM. 1092 * configure: Rebuild. 1093 10942001-03-19 Jim Wilson <[email protected]> 1095 1096 * ia64-gen.c (fetch_insn_class): If xsect, then ignore comment and 1097 notestr if larger than xsect. 1098 (in_class): Handle format M5. 1099 * ia64-asmtab.c: Regnerate. 1100 11012001-03-19 John David Anglin <[email protected]> 1102 1103 * vax-dis.c (print_insn_vax): Only fetch two bytes if the info buffer 1104 has more than one byte left to read. 1105 11062001-03-16 Martin Schwidefsky <[email protected]> 1107 1108 * s390-opc.c: Add new opcodes. Smooth out formatting. 1109 * s390-opc.txt: Add new opcodes. 1110 11112001-03-06 Nick Clifton <[email protected]> 1112 1113 * arm-dis.c (print_insn_thumb): Compute destination address 1114 of BLX(1) instruction by taking bit 1 from PC and not from bit 1115 0 of the offset. 1116 11172001-03-06 Igor Shevlyakov <[email protected]> 1118 1119 * m68k-dis.c (print_insn_m68k): Recognize Coldfire CPUs 1120 so command line switches will work. 1121 11222001-03-05 Dave Brolley <[email protected]> 1123 1124 * fr30-asm.c: Regenerate. 1125 * fr30-desc.c: Regenerate. 1126 * fr30-desc.h: Regenerate. 1127 * fr30-dis.c: Regenerate. 1128 * fr30-ibld.c: Regenerate. 1129 * fr30-opc.c: Regenerate. 1130 * fr30-opc.h: Regenerate. 1131 * m32r-asm.c: Regenerate. 1132 * m32r-desc.c: Regenerate. 1133 * m32r-desc.h: Regenerate. 1134 * m32r-dis.c: Regenerate. 1135 * m32r-ibld.c: Regenerate. 1136 * m32r-opc.c: Regenerate. 1137 * m32r-opc.h: Regenerate. 1138 * m32r-opinst.c: Regenerate. 1139 11402001-02-28 Igor Shevlyakov <[email protected]> 1141 1142 * m68k-opc.c: fix cpushl according to Motorola. Enable 1143 bunch of instructions for Coldfire 5407 and add all new. 1144 11452001-02-27 Alan Modra <[email protected]> 1146 1147 * configure.in (BFD_VERSION): Do without grep. 1148 * configure: Regenerate. 1149 * Makefile.am: Run "make dep-am". 1150 * Makefile.in: Regenerate. 1151 11522001-02-23 David Mosberger <[email protected]> 1153 1154 * ia64-opc-a.c: Add missing pseudo-ops for "cmp" and "cmp4". 1155 * ia64-asmtab.c: Regenerate. 1156 11572001-02-21 David Mosberger <[email protected]> 1158 1159 * ia64-opc-d.c (ia64_opcodes_d): Break the "add" pattern into two 1160 separate variants: one for IMM22 and the other for IMM14. 1161 * ia64-asmtab.c: Regenerate. 1162 11632001-02-21 Greg McGary <[email protected]> 1164 1165 * cgen-opc.c (cgen_get_insn_value): Add missing `return'. 1166 11672001-02-20 H.J. Lu <[email protected]> 1168 1169 * Makefile.am (ia64-ic.tbl): Remove the target. 1170 (ia64-raw.tbl): Likewise. 1171 (ia64-waw.tbl): Likewise. 1172 (ia64-war.tbl): Likewise. 1173 (ia64-asmtab.c): Generate it in the source directory. 1174 * Makefile.in: Regenerated. 1175 11762001-02-18 lars brinkhoff <[email protected]> 1177 1178 * Makefile.am: Add PDP-11 target. 1179 * configure.in: Likewise. 1180 * disassemble.c: Likewise. 1181 * pdp11-dis.c: New file. 1182 * pdp11-opc.c: New file. 1183 11842001-02-14 Jim Wilson <[email protected]> 1185 1186 * ia64-ic.tbl: Update from Intel. Add setf to fr-writers. 1187 * ia64-asmtab.c: Regenerate. 1188 1189Mon Feb 12 17:41:26 CET 2001 Jan Hubicka <[email protected]> 1190 1191 * i386-dis.c (prefix_user_t): Add 'Y' to SSE ineger converison 1192 instructions. 1193 (putop): Handle 'Y' 1194 11952001-02-11 Maciej W. Rozycki <[email protected]> 1196 1197 * mips-dis.c (print_insn_arg): Use top four bits of the address of 1198 the following instruction not of the jump itself for the jump 1199 target. 1200 (print_mips16_insn_arg): Likewise. 1201 12022001-02-11 Michael Sokolov <[email protected]> 1203 1204 * Makefile.am (stamp-lib): ranlib the libopcodes.a in the build 1205 directory. 1206 * Makefile.in: Regenerate. 1207 12082001-02-09 Schwidefsky <[email protected]> 1209 1210 * Makefile.am: Add linux target for S/390. 1211 * Makefile.in: Likewise. 1212 * configure.in: Likewise. 1213 * disassemble.c: Likewise. 1214 * s390-dis.c: New file. 1215 * s390-mkopc.c: New file. 1216 * s390-opc.c: New file. 1217 * s390-opc.txt: New file. 1218 12192001-02-05 Jim Wilson <[email protected]> 1220 1221 * ia64-asmtab.c: Revert 2000-12-16 change. 1222 12232001-02-02 Patrick Macdonald <[email protected]> 1224 1225 * fr30-desc.h: Regenerate with CGEN_MAX_SYNTAX_ELEMENTS. 1226 * m32r-desc.h: Regenerate. 1227 1228Thu Feb 1 16:29:06 MET 2001 Jan Hubicka <[email protected]> 1229 1230 * i386-dis.c (dis386_att, grps): Use 'T' for push/pop 1231 (putop): Handle 'T', alphabetize order, fix 'I' handling in Intel syntax 1232 12332001-01-14 Alan Modra <[email protected]> 1234 1235 * hppa-dis.c (print_insn_hppa): Handle '>' and '<' arg types. 1236 12372001-01-13 Nick Clifton <[email protected]> 1238 1239 * disassemble.c: Remove spurious white space. 1240 1241Sat Jan 13 01:48:24 MET 2001 Jan Hubicka <[email protected]> 1242 1243 * i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret 1244 templates. 1245 12462001-01-11 Peter Targett <[email protected]> 1247 1248 * configure.in: Add arc-ext.lo for bfd_arc_arch selection. 1249 * Makefile.am (C_FILES): Add arc-ext.c. 1250 (ALL_MACHINES) Add arc-ext.lo. 1251 (INCLUDES) Add opcode directory to list. 1252 New dependency entry for arc-ext.lo. 1253 * disassemble.c (disassembler): Correct call to 1254 arc_get_disassembler. 1255 * arc-opc.c: New update for ARC, including full base 1256 instructions for ARC variants. 1257 * arc-dis.h, arc-dis.c: New update for ARC, including 1258 extensibility functionality. 1259 * arc-ext.h, arc-ext.c: New files for handling extensibility. 1260 12612001-01-10 Jan Hubicka <[email protected]> 1262 1263 * i386-dis.c (PREGRP15 - PREGRP24): New. 1264 (dis386_twobyt): Add SSE2 instructions. 1265 (twobyte_uses_SSE_prefix: Rename from ... ; add new SSE instructions. 1266 (twobyte_uses_f3_prefix): ... this one. 1267 (grps): Add SSE instructions. 1268 (prefix_user_table): Add two new slots; add SSE2 instructions. 1269 (print_insn_i386): Rename uses_f3_prefix to uses_SSE_prefix; 1270 Handle the REPNZ and Data16 prefixes as well; do proper lookup 1271 to prefix_user_table. 1272 (OP_E): Accept mfence and lfence as well. 1273 (OP_MMX): Data16 prefix turns MMX to SSE; support REX extensions. 1274 (OP_XMM): Support REX extensions. 1275 (OP_EM): Likewise. 1276 (OP_EX): Likewise. 1277 12782001-01-09 Nick Clifton <[email protected]> 1279 1280 * arm-dis.c (print_insn): Set pc to zero for instructions with 1281 a reloc associated with them. 1282 12832001-01-09 Jeff Johnston <[email protected]> 1284 1285 * cgen-asm.in (parse_insn_normal): Changed syn to be 1286 CGEN_SYNTAX_CHAR_TYPE. Changed all references to *syn 1287 as character to use CGEN_SYNTAX_CHAR macro and all comparisons 1288 to '\0' to use 0 instead. 1289 * cgen-dis.in (print_insn_normal): Ditto. 1290 * cgen-ibld.in (insert_insn_normal, extract_insn_normal): Ditto. 1291 12922001-01-05 Jan Hubicka <[email protected]> 1293 1294 * i386-dis.c: Add x86_64 support. 1295 (rex): New static variable. 1296 (REX_MODE64, REX_EXTX, REX_EXTY, REX_EXTZ): New constants. 1297 (USED_REX): New macro. 1298 (Ev, Ed, Rm, Iq, Iv64, Cm, Dm, Rm*, Ob64, Ov64): New macros. 1299 (OP_I64, OP_OFF64, OP_IMREG): New functions. 1300 (OP_REG, OP_OFF): Declare. 1301 (get64, get32, get32s): New functions. 1302 (r??_reg): New constants. 1303 (dis386_att): Change templates of instruction implicitly promoted 1304 to 64bit; change e?? to RMe?? for unwind RM byte instructions. 1305 (grps): Likewise. 1306 (dis386_intel): Likewise. 1307 (dixx86_64_att): New table based on dis386_att. 1308 (dixx86_64_intel): New table based on dis386_intel. 1309 (names64, names8rex): New global variable. 1310 (names32, names16): Add extended registers. 1311 (prefix_user_t): Recognize rex prefixes. 1312 (prefix_name): Print REX prefixes nicely. 1313 (op_riprel): New global variable. 1314 (start_pc): Set type to bfd_vma. 1315 (print_insn_i386): Detect the 64bit mode and use proper table; 1316 move ckprefix after initializing the buffer; output unused rex prefixes; 1317 output information about target of RIP relative addresses. 1318 (putop): Support 'O' and 'I'. Update handling of "P', 'Q', 'R' and 'S'; 1319 (print_operand_value): New function. 1320 (OP_E, OP_G, OP_REG, OP_I, OP_J, OP_DIR, OP_OFF, OP_D): Add support for 1321 REX prefix and new modes. 1322 (get64, get32s): New. 1323 (get32): Return bfd_signed_vma type. 1324 (set_op): Initialize the op_riprel. 1325 * disassemble.c (disassembler): Recognize the x86-64 disassembly. 1326 13272001-01-03 Richard Sandiford <[email protected]> 1328 1329 cgen-dis.in (read_insn): Use bfd_get_bits() 1330 13312001-01-02 Richard Sandiford <[email protected]> 1332 1333 * cgen-dis.c (hash_insn_array): Use bfd_put_bits(). 1334 (hash_insn_list): Likewise 1335 * cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits(). 1336 (extract_1): Use bfd_get_bits(). 1337 (extract_normal): Apply sign extension to both extraction 1338 methods. 1339 * cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits() 1340 (cgen_put_insn_value): Use bfd_put_bits() 1341 13422000-12-28 Frank Ch. Eigler <[email protected]> 1343 1344 * cgen-asm.in (parse_insn_normal): Print better error message for 1345 instructions with missing operands. 1346 13472000-12-21 Santeri Paavolainen <[email protected]> 1348 1349 * cgen-opc.c: Include alloca.h if HAVE_ALLOCA_H is defined. 1350 13512000-12-16 Nick Clifton <[email protected]> 1352 1353 * Makefile.in: Regenerate. 1354 * aclocal.m4: Regenerate. 1355 * config.in: Regenerate. 1356 * configure.in: Add spacing. 1357 * configure: Regenerate. 1358 * ia64-asmtab.c: Regenerate. 1359 * po/opcodes.pot: Regenerate. 1360 13612000-12-12 Frank Ch. Eigler <[email protected]> 1362 1363 * cgen-asm.in (@arch@_cgen_assemble_insn): Prefer printing insert-time 1364 error messages over later parse-time ones. 1365 13662000-12-12 Jim Wilson <[email protected]> 1367 1368 * ia64-dis.c (print_insn_ia64): Cast away const on ia64_free_opcode 1369 argument. 1370 * ia64-gen.c (insert_deplist): Cast sizeof result to int. 1371 (print_dependency_table): Print NULL if semantics field not set. 1372 (insert_opcode_dependencies): Mark cmp parameter as unused. 1373 (print_main_table): Use fprintf_vma to print long long fields. 1374 (main): Mark argv paramter as unused. Convert to old style definition. 1375 * ia64-opc.c (ia64_find_dependency): Cast sizeof result to int. 1376 * ia64-asmtab.c: Regnerate. 1377 13782000-12-09 Nick Clifton <[email protected]> 1379 1380 * m32r-dis.c (print_insn): Prevent re-read of instruction from 1381 wrong address. 1382 1383 * fr30-dis.c: Regenerate. 1384 13852000-12-08 Peter Targett <[email protected]> 1386 1387 * configure.in: Add arc-ext.lo for bfd_arc_arch selection. 1388 * Makefile.am (C_FILES): Add arc-ext.c. 1389 (ALL_MACHINES) Add arc-ext.lo. 1390 (INCLUDES) Add opcode directory to list. 1391 New dependency entry for arc-ext.lo. 1392 * disassemble.c (disassembler): Correct call to 1393 arc_get_disassembler. 1394 * arc-opc.c: New update for ARC, including full base 1395 instructions for ARC variants. 1396 * arc-dis.h, arc-dis.c: New update for ARC, including 1397 extensibility functionality. 1398 * arc-ext.h, arc-ext.c: New files for handling extensibility. 1399 14002000-12-03 Chris Demetriou [email protected] 1401 1402 * mips-opc.c (mips_builtin_opcodes): Use the WR_HILO, RD_HILO, 1403 MOD_HILO, and MOD_LO macros. 1404 1405 * mips-opc.c (M1, M2): Delete. 1406 (mips_builtin_opcodes): Remove all uses of M1. 1407 1408 * mips-opc.c (mips_builtin_opcodes): Make the dmfc2 and dmtc2 1409 instructions take "G" format second operands and use the 1410 correct flags. 1411 There are mfc3 and mtc3 opcodes, so add dmfc3 and dmtc3 opcodes to 1412 match. 1413 Delete "sel" code operands from mfc1 and mtc1. 1414 Add MIPS64 opcode changes (dclo, dclz), and "sel" code variants 1415 for dm[ft]c[023]. 1416 14172000-12-03 Ed Satterthwaite [email protected] and 1418 Chris Demetriou [email protected] 1419 1420 * mips-opc.c (mips_builtin_opcodes): Finish additions 1421 for MIPS32 support, and clean up existing entries for 1422 aesthetics, consistency with the MIPS32 ISA, and 1423 with consistency the rest of the table. 1424 14252000-12-01 Nick Clifton <[email protected]> 1426 1427 * mips16-opc.c (mips16_opcodes): Add initialiser for membership 1428 field. 1429 14302000-12-01 Chris Demetriou <[email protected]> 1431 1432 mips-dis.c (print_insn_arg): Handle new 'U' and 'J' argument 1433 specifiers. Update 'B' for new constant names, and remove 1434 'm'. 1435 mips-opc.c (mips_builtin_opcodes): Place "pref" and "ssnop" 1436 near the top of the array, so they are disassembled properly. 1437 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit 1438 code for MIPS32. Update "clo" and "clz" to use 'U' operand 1439 specifier. Add 'H' format specifier variants for "mfc1," 1440 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update 1441 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32 1442 "wait" variant which uses 'J' operand specifier. 1443 1444 * mips-dis.c (set_mips_isa_type): Update to use 1445 CPU_UNKNOWN and ISA_* constants. Add bfd_mach_mips32 case. 1446 Replace bfd_mach_mips4K with bfd_mach_mips32_4k case. 1447 * mips-opc.c (I32): New constant for instructions added in 1448 MIPS32. 1449 (P4): Delete. 1450 (mips_builtin_opcodes) Replace all uses of P4 with I32. 1451 1452 * mips-dis.c (set_mips_isa_type): Add cases for 1453 bfd_mach_mips5 and bfd_mach_mips64. 1454 * mips-opc.c (I64): New definitions. 1455 1456 * mips-dis.c (set_mips_isa_type): Add case for 1457 bfd_mach_mips_sb1. 1458 14592000-11-28 Hans-Peter Nilsson <[email protected]> 1460 1461 * sh-dis.c (print_insn_ddt): Make insn_x, insn_y unsigned. 1462 (print_insn_ppi): Make nib1, nib2, nib3 unsigned. 1463 Initialize variable dc to NULL. 1464 (print_insn_shx): Remove unused label d_reg_n. 1465 14662000-11-24 Nick Clifton <[email protected]> 1467 1468 * arm-opc.h: Add new opcode formatting parameter 'B'. 1469 (arm_opcodes): Add XScale, v5, and v5te instructions. 1470 (thumb_opcodes): Add v5t instructions. 1471 1472 * arm-dis.c (print_insn_arm): Handle new 'B' format 1473 parameter. 1474 (print_insn_thumb): Decode BLX(1) instruction. 1475 14762000-11-21 Chris Demetriou <[email protected]> 1477 1478 * mips-opc.c: Fix file header comment. 1479 14802000-11-14 Hans-Peter Nilsson <[email protected]> 1481 1482 * cris-dis.c (cris_get_disassembler): If abfd is NULL, return 1483 print_insn_cris_with_register_prefix. 1484 14852000-11-11 Alexandre Oliva <[email protected]> 1486 1487 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0. 1488 14892000-11-07 Matthew Green <[email protected]> 1490 1491 * cgen-dis.in (print_insn): All insns which can fit into insn_value 1492 must be loaded there in their entirety. 1493 14942000-10-20 Jakub Jelinek <[email protected]> 1495 1496 * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs. 1497 (compute_arch_mask): Add v8plusb and v9b machines. 1498 (print_insn_sparc): siam mode decoding, accept ASRs up to 25. 1499 * sparc-opc.c: Support for Cheetah instruction set. 1500 (prefetch_table): Add #invalidate. 1501 15022000-10-16 Nick Clifton <[email protected]> 1503 1504 * mcore-dis.c (imsk): Change mask for OC to 0xFE00. 1505 15062000-10-06 Dave Brolley <[email protected]> 1507 1508 * fr30-desc.h: Regenerate. 1509 * m32r-desc.h: Regenerate. 1510 * m32r-ibld.c: Regenerate. 1511 15122000-10-05 Jim Wilson <[email protected]> 1513 1514 * ia64-ic.tbl: Update from Intel. 1515 * ia64-asmtab.c: Regenerate. 1516 15172000-10-04 Kazu Hirata <[email protected]> 1518 1519 * ia64-gen.c: Convert C++-style comments to C-style comments. 1520 * tic54x-dis.c: Likewise. 1521 15222000-09-29 Hans-Peter Nilsson <[email protected]> 1523 1524 Changes to add dollar prefix to registers for files where user symbols 1525 don't have a leading underscore. Fix formatting. 1526 * cris-dis.c (REGISTER_PREFIX_CHAR): New. 1527 (format_reg): Add parameter with_reg_prefix. All callers changed. 1528 (print_with_operands): Ditto. 1529 (print_insn_cris_generic): Renamed from print_insn_cris, add 1530 parameter with_reg_prefix. 1531 (print_insn_cris_with_register_prefix, 1532 print_insn_cris_without_register_prefix, cris_get_disassembler): 1533 New. 1534 * disassemble.c (disassembler) [ARCH_cris]: Call cris_get_disassembler. 1535 15362000-09-22 Jim Wilson <[email protected]> 1537 1538 * ia64-opc-f.c (ia64_opcodes_f): Add fpcmp pseudo-ops for 1539 gt, ge, ngt, and nge. 1540 * ia64-asmtab.c: Regenerate. 1541 1542 * ia64-dis.c (print_insn_ia64): Revert Aug 7 byte skip count change. 1543 * ia64-gen.c (parse_semantics): Handle IA64_DVS_STOP. 1544 (lookup_specifier): Handle "PR%, 1 to 15" and "PR%, 16 to 62". 1545 * ia64-ic.tbl, ia64-raw.tbl, ia64-war.tbl, ia64-waw.tbl: Update. 1546 * ia64-asmtab.c: Regnerate. 1547 15482000-09-13 Anders Norlander <[email protected]> 1549 1550 * mips-opc.c (mips_builtin_opcodes): Support cache instruction on 4K cores. 1551 Add mfc0 and mtc0 with sub-selection values. 1552 Add clo and clz opcodes. 1553 Add msub and msubu instructions for MIPS32. 1554 Add madd/maddu aliases for mad/madu for MIPS32. 1555 Support wait, deret, eret, movn, pref for MIPS32. 1556 Support tlbp, tlbr, tlbwi, tlbwr. 1557 (P4): New define. 1558 1559 * mips-dis.c (print_insn_arg): Print sdbbp 'm' args. 1560 (print_insn_arg): Handle 'H' args. 1561 (set_mips_isa_type): Recognize 4K. 1562 Use CPU_* defines instead of hardcoded numbers. 1563 15642000-09-11 Catherine Moore <[email protected]> 1565 1566 * d30v-opc.c (d30v_operand_t): New operand type Rb2. 1567 (d30v_format_tab): Use Rb2 for modinc and moddec. 1568 15692000-09-07 Catherine Moore <[email protected]> 1570 1571 * d30v-opc.c (d30v_format_tab): Use format Ra for 1572 modinc and moddec. 1573 15742000-09-06 Alexandre Oliva <[email protected]> 1575 1576 * configure: Rebuilt with new libtool.m4. 1577 15782000-09-05 Nick Clifton <[email protected]> 1579 1580 * configure: Regenerate. 1581 * po/opcodes.pot: Regenerate. 1582 15832000-08-31 Alexandre Oliva <[email protected]> 1584 1585 * acinclude.m4: Include libtool and gettext macros from the 1586 top level. 1587 * aclocal.m4, configure: Rebuilt. 1588 15892000-08-30 Kazu Hirata <[email protected]> 1590 1591 * tic80-dis.c: Fix formatting. 1592 15932000-08-29 Kazu Hirata <[email protected]> 1594 1595 * w65-dis.c: Fix formatting. 1596 15972000-08-28 Mark Hatle <[email protected]> 1598 1599 * ppc-opc.c: Add XTLB macro for a few PPC 4xx extended mnemonics. 1600 (powerpc_opcodes): Add table entries for PPC 405 instructions. 1601 Changed rfci, icbt, mfdcr, dccci, mtdcr, iccci from PPC to PPC403 1602 instructions. Added extended mnemonic mftbl as defined in the 1603 405GP manual for all PPCs. 1604 16052000-08-28 Jim Wilson <[email protected]> 1606 1607 * ia64-dis.c (print_insn_ia64): Add failed label after ia64_free_opcode 1608 call. Change last goto to use failed instead of done. 1609 16102000-08-28 Dave Brolley <[email protected]> 1611 1612 * cgen-ibld.in (cgen_put_insn_int_value): New function. 1613 (insert_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P. 1614 (insert_insn_normal): Use cgen_put_insn_int_value with CGEN_INT_INSN_P. 1615 (extract_normal): Allow for non-zero word_offset with CGEN_INT_INSN_P. 1616 * cgen-dis.in (read_insn): New static function. 1617 (print_insn): Use read_insn to read the insn into the buffer and set 1618 up for disassembly. 1619 (print_insn): in CGEN_INT_INSN_P, make sure that the entire insn is 1620 in the buffer. 1621 * fr30-asm.c: Regenerated. 1622 * fr30-desc.c: Regenerated. 1623 * fr30-desc.h: Regenerated. 1624 * fr30-dis.c: Regenerated. 1625 * fr30-ibld.c: Regenerated. 1626 * fr30-opc.c: Regenerated. 1627 * fr30-opc.h: Regenerated. 1628 * m32r-asm.c: Regenerated. 1629 * m32r-desc.c: Regenerated. 1630 * m32r-desc.h: Regenerated. 1631 * m32r-dis.c: Regenerated. 1632 * m32r-ibld.c: Regenerated. 1633 * m32r-opc.c: Regenerated. 1634 16352000-08-28 Kazu Hirata <[email protected]> 1636 1637 * tic30-dis.c: Fix formatting. 1638 16392000-08-27 Kazu Hirata <[email protected]> 1640 1641 * sh-dis.c: Fix formatting. 1642 16432000-08-24 David Edelsohn <[email protected]> 1644 1645 * ppc-opc.c (powerpc_opcodes): Add rfid, mtsrd, mtsrdin, mtmsrd. 1646 16472000-08-24 Kazu Hirata <[email protected]> 1648 1649 * z8k-dis.c: Fix formatting. 1650 16512000-08-16 Jim Wilson <[email protected]> 1652 1653 * ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete 1654 break, mov-immediate, nop. 1655 * ia64-opc-f.c: Delete fpsub instructions. 1656 * ia64-opc-m.c: Add POSTINC to all instructions with postincrement 1657 address operand. Rewrite using macros to avoid long lines. 1658 * ia64-opc.h (POSTINC): Define. 1659 * ia64-asmtab.c: Regenerate. 1660 16612000-08-15 Jim Wilson <[email protected]> 1662 1663 * ia64-ic.tbl: Add missing entries. 1664 16652000-08-08 Jason Eckhardt <[email protected]> 1666 1667 * i860-dis.c (print_br_address): Change third argument from int 1668 to long. 1669 16702000-08-07 Richard Henderson <[email protected]> 1671 1672 * ia64-dis.c (print_insn_ia64): Get byte skip count correct 1673 for MLI templates. Handle IA64_OPND_TGT64. 1674 16752000-08-04 Ben Elliston <[email protected]> 1676 1677 * cgen-dis.in, cgen-asm.in, cgen-ibld.in: New files. 1678 * cgen.sh: Likewise. 1679 16802000-08-02 Jim Wilson <[email protected]> 1681 1682 * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end. 1683 16842000-07-29 Marek Michalkiewicz <[email protected]> 1685 1686 * avr-dis.c (avr_operand): Use PARAMS macro in declaration. 1687 Change return type from void to int. Check the combination 1688 of operands, return 1 if valid. Fix to avoid BUF overflow. 1689 Report undefined combinations of operands in COMMENT. 1690 Report internal errors to stderr. Output the adiw/sbiw 1691 constant operand in both decimal and hex. 1692 (print_insn_avr): Disassemble ldd/std with displacement of 0 1693 as ld/st. Check avr_operand () return value, handle invalid 1694 combinations of operands like unknown opcodes. 1695 16962000-07-28 Ben Elliston <[email protected]> 1697 1698 * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New. 1699 (run-cgen, stamp-m32r, stamp-fr30): New targets. 1700 * Makefile.in: Regenerate. 1701 * configure.in: Add --enable-cgen-maint option. 1702 * configure: Regenerate. 1703 17042000-07-26 Dave Brolley <[email protected]> 1705 1706 * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned. 1707 (cgen_hw_lookup_by_num): Ditto. 1708 (cgen_operand_lookup_by_name): Ditto. 1709 (print_address): Ditto. 1710 (print_keyword): Ditto. 1711 * cgen-dis.c (hash_insn_array): Mark unused parameters with 1712 ATTRIBUTE_UNUSED. 1713 * cgen-asm.c (hash_insn_array): Mark unused parameters with 1714 ATTRIBUTE_UNUSED. 1715 (cgen_parse_keyword): Ditto. 1716 17172000-07-22 Jason Eckhardt <[email protected]> 1718 1719 * i860-dis.c: New file. 1720 (print_insn_i860): New function. 1721 (print_br_address): New function. 1722 (sign_extend): New function. 1723 (BITWISE_OP): New macro. 1724 (I860_REG_PREFIX): New macro. 1725 (grnames, frnames, crnames): New structures. 1726 1727 * disassemble.c (ARCH_i860): Define. 1728 (disassembler): Add check for bfd_arch_i860 to set disassemble 1729 function to print_insn_i860. 1730 1731 * Makefile.in (CFILES): Added i860-dis.c. 1732 (ALL_MACHINES): Added i860-dis.lo. 1733 (i860-dis.lo): New dependences. 1734 1735 * configure.in: New bits for bfd_i860_arch. 1736 1737 * configure: Regenerated. 1738 17392000-07-20 Hans-Peter Nilsson <[email protected]> 1740 1741 * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c. 1742 (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo. 1743 (cris-dis.lo, cris-opc.lo): New rules. 1744 * Makefile.in: Rebuild. 1745 * configure.in (bfd_cris_arch): New target. 1746 * configure: Rebuild. 1747 * disassemble.c (ARCH_cris): Define. 1748 (disassembler): Support ARCH_cris. 1749 * cris-dis.c, cris-opc.c: New files. 1750 * po/POTFILES.in, po/opcodes.pot: Regenerate. 1751 17522000-07-11 Jakub Jelinek <[email protected]> 1753 1754 * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2. 1755 Reported by Bill Clarke <[email protected]>. 1756 17572000-07-09 Geoffrey Keating <[email protected]> 1758 1759 * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw. 1760 Patch by Randall J Fisher <[email protected]>. 1761 17622000-07-09 Alan Modra <[email protected]> 1763 1764 * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg, 1765 fput_const, extract_3, extract_5_load, extract_5_store, 1766 extract_5r_store, extract_5R_store, extract_10U_store, 1767 extract_5Q_store, extract_11, extract_14, extract_16, extract_21, 1768 extract_12, extract_17, extract_22): Prototype. 1769 (print_insn_hppa): Rename inner block opcode -> opc to avoid 1770 shadowing outer block. 1771 (GET_BIT): Define. 1772 17732000-07-05 DJ Delorie <[email protected]> 1774 1775 * MAINTAINERS: new 1776 17772000-07-04 Alexandre Oliva <[email protected]> 1778 1779 * arm-dis.c (print_insn_arm): Output combinations of PSR flags. 1780 17812000-07-03 Marek Michalkiewicz <[email protected]> 1782 1783 * avr-dis.c (avr_operand): Change _ () to _() around all strings 1784 marked for translation (exception from the usual coding style). 1785 (print_insn_avr): Initialize insn2 to avoid warnings. 1786 17872000-07-03 Kazu Hirata <[email protected]> 1788 1789 * h8300-dis.c (bfd_h8_disassemble): Improve readability. 1790 * h8500-dis.c: Fix formatting. 1791 17922000-07-01 Alan Modra <[email protected]> 1793 1794 * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed 1795 (CLEANFILES): Add DEPA. 1796 * Makefile.in: Regenerate. 1797 17982000-06-26 Scott Bambrough <[email protected]> 1799 1800 * arm-dis.c (regnames): Add an additional register set to match 1801 the set used by GCC. Make it the default. 1802 18032000-06-22 Alan Modra <[email protected]> 1804 1805 * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we 1806 find one. 1807 * Makefile.in: Regenerate. 1808 18092000-06-20 H.J. Lu <[email protected]> 1810 1811 * Makefile.am: Rebuild dependency. 1812 * Makefile.in: Rebuild. 1813 18142000-06-18 Stephane Carrez <[email protected]> 1815 1816 * Makefile.in, configure: regenerate 1817 * disassemble.c (disassembler): Recognize ARCH_m68hc12, 1818 ARCH_m68hc11. 1819 * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12): 1820 New functions. 1821 * configure.in: Recognize m68hc12 and m68hc11. 1822 * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x 1823 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly 1824 and opcode generation for m68hc11 and m68hc12. 1825 18262000-06-16 Nick Duffek <[email protected]> 1827 1828 * disassemble.c (disassembler): Refer to the PowerPC 620 using 1829 bfd_mach_ppc_620 instead of 620. 1830 18312000-06-12 Kazu Hirata <[email protected]> 1832 1833 * h8300-dis.c: Fix formatting. 1834 (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl] 1835 correctly. 1836 18372000-06-09 Denis Chertykov <[email protected]> 1838 1839 * avr-dis.c (avr_operand): Bugfix for jmp/call address. 1840 18412000-06-07 Denis Chertykov <[email protected]> 1842 1843 * avr-dis.c: completely rewritten. 1844 18452000-06-02 Kazu Hirata <[email protected]> 1846 1847 * h8300-dis.c: Follow the GNU coding style. 1848 (bfd_h8_disassemble) Fix a typo. 1849 18502000-06-01 Kazu Hirata <[email protected]> 1851 1852 * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo. 1853 (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl] 1854 correctly. Fix a typo. 1855 18562000-05-31 Nick Clifton <[email protected]> 1857 1858 * opintl.h (_(String)): Explain why dgettext is used instead of 1859 gettext. 1860 18612000-05-30 Nick Clifton <[email protected]> 1862 1863 * opintl.h (gettext, dgettext, dcgettext, textdomain, 1864 bindtextdomain): Replace defines with those from intl/libgettext.h 1865 to quieten gcc warnings. 1866 18672000-05-26 Alan Modra <[email protected]> 1868 1869 * Makefile.am: Update dependencies with "make dep-am" 1870 * Makefile.in: Regenerate. 1871 18722000-05-25 Alexandre Oliva <[email protected]> 1873 1874 * m10300-dis.c (disassemble): Don't assume 32-bit longs when 1875 sign-extending operands. 1876 18772000-05-15 Donald Lindsay <[email protected]> 1878 1879 * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches 1880 except brf's. 1881 18822000-05-21 Nick Clifton <[email protected]> 1883 1884 * Makefile.am (LIBIBERTY): Define. 1885 18862000-05-19 Diego Novillo <[email protected]> 1887 1888 * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES. 1889 (STD_REGISTER_NAMES): New name for REGISTER_NAMES. 1890 (reg_names): Rename to std_reg_names. Change it to a char ** 1891 static variable. 1892 (std_reg_names): New name for reg_names. 1893 (set_mips_isa_type): Set reg_names to point to std_reg_names by 1894 default. 1895 18962000-05-16 Frank Ch. Eigler <[email protected]> 1897 1898 * fr30-desc.h: Partially regenerated to account for changed 1899 CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros. 1900 * m32r-desc.h: Ditto. 1901 19022000-05-15 Nick Clifton <[email protected]> 1903 1904 * arm-opc.h: Use upper case for flasg in MSR and MRS 1905 instructions. Allow any bit to be set in the field_mask of 1906 the MSR instruction. 1907 1908 * arm-dis.c (print_insn_arm): Decode _x and _s bits of the 1909 field_mask of an MSR instruction. 1910 19112000-05-11 Thomas de Lellis <[email protected]> 1912 1913 * arm-opc.h: Disassembly of thumb ldsb/ldsh 1914 instructions changed to ldrsb/ldrsh. 1915 19162000-05-11 Ulf Carlsson <[email protected]> 1917 1918 * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit 1919 target addresses for 'jal' and 'j'. 1920 19212000-05-10 Geoff Keating <[email protected]> 1922 1923 * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes 1924 also available in common mode when powerpc syntax is being used. 1925 19262000-05-08 Alan Modra <[email protected]> 1927 1928 * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args. 1929 (dummy_print_address): Ditto. 1930 19312000-05-04 Timothy Wall <[email protected]> 1932 1933 * tic54x-opc.c: New. 1934 * tic54x-dis.c: New. 1935 * disassemble.c (disassembler): Add ARCH_tic54x. 1936 * configure.in: Added tic54x target. 1937 * configure: Ditto. 1938 * Makefile.am: Add tic54x dependencies. 1939 * Makefile.in: Ditto. 1940 19412000-05-03 J.T. Conklin <[email protected]> 1942 1943 * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for 1944 vector unit operands. 1945 (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector 1946 unit instruction formats. 1947 (PPCVEC): New macro, mask for vector instructions. 1948 (powerpc_operands): Add table entries for above operand types. 1949 (powerpc_opcodes): Add table entries for vector instructions. 1950 1951 * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask. 1952 (print_insn_little_powerpc): Likewise. 1953 (print_insn_powerpc): Prepend 'v' when printing vector registers. 1954 19552000-04-24 Clinton Popetz <[email protected]> 1956 1957 * configure.in: Add bfd_powerpc_64_arch. 1958 * disassemble.c (disassembler): Use print_insn_big_powerpc for 1959 64 bit code. 1960 19612000-04-24 Nick Clifton <[email protected]> 1962 1963 * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow 1964 field. 1965 19662000-04-23 Denis Chertykov <[email protected]> 1967 1968 * avr-dis.c (reg_fmul_d): New. Extract destination register from 1969 FMUL instruction. 1970 (reg_fmul_r): New. Extract source register from FMUL instruction. 1971 (reg_muls_d): New. Extract destination register from MULS instruction. 1972 (reg_muls_r): New. Extract source register from MULS instruction. 1973 (reg_movw_d): New. Extract destination register from MOVW instruction. 1974 (reg_movw_r): New. Extract source register from MOVW instruction. 1975 (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU, 1976 EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions. 1977 19782000-04-22 Timothy Wall <[email protected]> 1979 1980 * ia64-gen.c (general): Add an ordered table of primary 1981 opcode names, as well as priority fields to disassembly data 1982 structures to enforce a preferred disassembly format based on the 1983 ordering of the opcode tables. 1984 (load_insn_classes): Show a useful message if IC tables are missing. 1985 (load_depfile): Ditto. 1986 * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to 1987 distinguish preferred disassembly. 1988 * ia64-opc-f.c: Reorder some insn for preferred disassembly 1989 format. Fix incorrect flag on fma.s/fma.s.s0. 1990 * ia64-opc.c: Scan *all* disassembly matches and use the one with 1991 the highest priority. 1992 * ia64-opc-b.c: Use more abbreviations. 1993 * ia64-asmtab.c: Regenerate. 1994 19952000-04-21 Jason Eckhardt <[email protected]> 1996 1997 * hppa-dis.c (extract_16): New function. 1998 (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of 1999 new operand types l,y,&,fe,fE,fx. 2000 20012000-04-21 Richard Henderson <[email protected]> 2002 David Mosberger <[email protected]> 2003 Timothy Wall <[email protected]> 2004 Bob Manson <[email protected]> 2005 Jim Wilson <[email protected]> 2006 2007 * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h. 2008 (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c, 2009 ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c, 2010 ia64-asmtab.c. 2011 (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo. 2012 (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen, 2013 ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules. 2014 * Makefile.in: Rebuild. 2015 * configure Rebuild. 2016 * configure.in (bfd_ia64_arch): New target. 2017 * disassemble.c (ARCH_ia64): Define. 2018 (disassembler): Support ARCH_ia64. 2019 * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl, 2020 ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c, 2021 ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl, 2022 ia64-war.tbl, ia64-waw.tbl: New files. 2023 20242000-04-20 Alexandre Oliva <[email protected]> 2025 2026 * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define. 2027 (disassemble): Use them. 2028 20292000-04-14 Alan Modra <[email protected]> 2030 2031 * sysdep.h: Include "ansidecl.h" not <ansidecl.h> 2032 * Makefile.am: Update dependencies. 2033 * Makefile.in: Regenerate. 2034 20352000-04-14 Michael Sokolov <[email protected]> 2036 2037 * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c, 2038 avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c, 2039 disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c, 2040 i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c, 2041 m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c, 2042 mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c, 2043 ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c, 2044 tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c, 2045 w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove 2046 ansidecl.h as sysdep.h includes it. 2047 20482000-04-7 Andrew Cagney <[email protected]> 2049 2050 * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add 2051 --enable-build-warnings option. 2052 * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions. 2053 * Makefile.in, configure: Re-generate. 2054 20552000-04-05 J"orn Rennecke <[email protected]> 2056 2057 * sh-opc.h (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs. 2058 stc GBR,@-<REG_N> is available for arch_sh1_up. 2059 Group parallel processing insn with identical mnemonics together. 2060 Make three-operand psha / pshl come first. 2061 20622000-04-05 J"orn Rennecke <[email protected]> 2063 2064 * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4. 2065 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. 2066 (sh_arg_type): Add A_PC. 2067 (sh_table): Update entries using immediates. Add repeat. 2068 * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4. 2069 Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT. 2070 20712000-04-04 Alan Modra <[email protected]> 2072 2073 * po/opcodes.pot: Regenerate. 2074 2075 * Makefile.am (MKDEP): Use gcc -MM rather than mkdep. 2076 (DEP): Quote when passing vars to sub-make. Add warning message 2077 to end. 2078 (DEP1): Rewrite for "gcc -MM". 2079 (CLEANFILES): Add DEP2. 2080 Update dependencies. 2081 * Makefile.in: Regenerate. 2082 20832000-04-03 Denis Chertykov <[email protected]> 2084 2085 * avr-dis.c: Syntax cleanup. 2086 (add0fff): Print the pc relative address as a signed number. 2087 (add03f8): Likewise. 2088 20892000-04-01 Ian Lance Taylor <[email protected]> 2090 2091 * disassemble.c (disassembler_usage): Don't use a prototype. Mark 2092 the parameter ATTRIBUTE_UNUSED. 2093 * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed. 2094 20952000-04-01 Alexandre Oliva <[email protected]> 2096 2097 * m10300-opc.c: SP-based offsets are always unsigned. 2098 20992000-03-29 Thomas de Lellis <[email protected]> 2100 2101 * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal" 2102 [branch always] instead of "undefined". 2103 21042000-03-27 Nick Clifton <[email protected]> 2105 2106 * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of 2107 short instructions, from end of list of long instructions. 2108 21092000-03-27 Ian Lance Taylor <[email protected]> 2110 2111 * Makefile.am (CFILES): Add avr-dis.c. 2112 (ALL_MACHINES): Add avr-dis.lo. 2113 21142000-03-27 Alan Modra <[email protected]> 2115 2116 * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to 2117 truncate integers. 2118 (print_insn_avr): Call function via pointer in K&R compatible way. 2119 (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204, 2120 add0fff, add03f8): Convert to old style function declaration and 2121 add prototype. 2122 (avrdis_opcode): Add prototype. 2123 21242000-03-27 Denis Chertykov <[email protected]> 2125 2126 * avr-dis.c: New file. AVR disassembler. 2127 * configure.in (bfd_avr_arch): New architecture support. 2128 * disassemble.c: Likewise. 2129 * configure: Regenerate. 2130 21312000-03-06 J"oern Rennecke <[email protected]> 2132 2133 * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement. 2134 21352000-03-02 J"orn Rennecke <[email protected]> 2136 2137 * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand 2138 flag to determine if operand is pc-relative. 2139 * d30v-opc.c: 2140 (d30v_format_table): 2141 (REL6S3): Renamed from IMM6S3. 2142 Added flag OPERAND_PCREL. 2143 (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with 2144 added flag OPERAND_PCREL. 2145 (IMM12S3U): Replaced with REL12S3. 2146 (SHORT_D2, LONG_D): Delay target is pc-relative. 2147 (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r): 2148 Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r, 2149 using the REL* operands. 2150 (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D. 2151 (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B, 2152 LONG_Db, using REL* operands. 2153 (SHORT_U, SHORT_A5S): Removed stray alternatives. 2154 (d30v_opcode_table): Use new *r formats. 2155 21562000-02-28 Nick Clifton <[email protected]> 2157 2158 * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with 2159 'signed_overflow_ok_p'. 2160 21612000-02-27 Eli Zaretskii <[email protected]> 2162 2163 * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the 2164 name of the libtool directory. 2165 * Makefile.in: Rebuild. 2166 21672000-02-24 Nick Clifton <[email protected]> 2168 2169 * cgen-opc.c (cgen_set_signed_overflow_ok): New function. 2170 (cgen_clear_signed_overflow_ok): New function. 2171 (cgen_signed_overflow_ok_p): New function. 2172 21732000-02-23 Andrew Haley <[email protected]> 2174 2175 * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c, 2176 m32r-ibld.c, m32r-opc.h: Rebuild. 2177 21782000-02-23 Linas Vepstas <[email protected]> 2179 2180 * i370-dis.c, i370-opc.c: New. 2181 2182 * disassemble.c (ARCH_i370): Define. 2183 (disassembler): Handle it. 2184 2185 * Makefile.am: Add support for Linux/IBM 370. 2186 * configure.in: Likewise. 2187 2188 * Makefile.in: Regenerate. 2189 * configure: Likewise. 2190 21912000-02-22 Chandra Chavva <[email protected]> 2192 2193 * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to 2194 ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel 2195 procedure. 2196 21972000-02-22 Andrew Haley <[email protected]> 2198 2199 * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER: 2200 force gp32 to zero. 2201 * mips-opc.c (G6): New define. 2202 (mips_builtin_op): Add "move" definition for -gp32. 2203 22042000-02-22 Ian Lance Taylor <[email protected]> 2205 2206 From Grant Erickson <[email protected]>: 2207 * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2. 2208 22092000-02-21 Alan Modra <[email protected]> 2210 2211 * dis-buf.c (buffer_read_memory): Change `length' param and all int 2212 vars to unsigned. 2213 22142000-02-17 J"orn Rennecke <[email protected]> 2215 2216 * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. 2217 (print_insn_ppi): Likewise. 2218 (print_insn_shx): Use info->mach to select appropriate insn set. 2219 Add support for sh-dsp. Remove FD_REG_N support. 2220 * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. 2221 (sh_arg_type): Likewise. Remove FD_REG_N. 2222 (sh_dsp_reg_nums): New enum. 2223 (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. 2224 (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. 2225 (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. 2226 (arch_sh3_dsp_up): Likewise. 2227 (sh_opcode_info): New field: arch. 2228 (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and 2229 D_REG_N. Fill in arch field. Add sh-dsp insns. 2230 22312000-02-14 Fernando Nasser <[email protected]> 2232 2233 * arm-dis.c: Change flavor name from atpcs-special to 2234 special-atpcs to prevent name conflict in gdb. 2235 (get_arm_regname_num_options, set_arm_regname_option, 2236 get_arm_regnames): New functions. API to access the several 2237 flavor of register names. Note: Used by gdb. 2238 (print_insn_thumb): Use the register name entry from the currently 2239 selected flavor for LR and PC. 2240 22412000-02-10 Nick Clifton <[email protected]> 2242 2243 * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR 2244 classes. 2245 (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and 2246 "mulsh.h" instructions. 2247 * mcore-dis.c (imsk array): Add masks for MULSH and OPSR 2248 classes. 2249 (print_insn_mcore): Add support for little endian targets. 2250 Add support for MULSH and OPSR classes. 2251 22522000-02-07 Nick Clifton <[email protected]> 2253 2254 * arm-dis.c (parse_arm_diassembler_option): Rename again. 2255 Previous delat did not take. 2256 22572000-02-03 Timothy Wall <[email protected]> 2258 2259 * dis-buf.c (buffer_read_memory): Use octets_per_byte field 2260 to adjust target address bounds checking and calculate the 2261 appropriate octet offset into data. 2262 22632000-01-27 Nick Clifton <[email protected]> 2264 2265 * arm-dis.c: (parse_disassembler_option): Rename to 2266 parse_arm_disassembler_option and allow to be exported. 2267 2268 * disassemble.c (disassembler_usage): New function: Print out any 2269 target specific disassembler options. 2270 Call arm_disassembler_options() if the ARM architecture is being 2271 supported. 2272 2273 * arm-dis.c (NUM_ELEM): Define this macro if not already 2274 defined. 2275 (arm_regname): New struct type for ARM register names. 2276 (arm_toggle_regnames): Delete. 2277 (parse_disassembler_option): Use register name structure. 2278 (print_insn): New function: Combines duplicate code found in 2279 print_insn_big_arm and print_insn_little_arm. 2280 (print_insn_big_arm): Call print_insn. 2281 (print_insn_little_arm): Call print_insn. 2282 (print_arm_disassembler_options): Display list of supported, 2283 ARM specific disassembler options. 2284 22852000-01-27 Thomas de Lellis <[email protected]> 2286 2287 * arm-dis.c (printf_insn_big_arm): Treat ELF symbols with the 2288 ARM_STT_16BIT flag as Thumb code symbols. 2289 2290 * arm-dis.c (printf_insn_little_arm): Ditto. 2291 22922000-01-25 Thomas de Lellis <[email protected]> 2293 2294 * arm-dis.c (printf_insn_thumb): Prevent double dumping 2295 of raw thumb instructions. 2296 22972000-01-20 Nick Clifton <[email protected]> 2298 2299 * mcore-opc.h (mcore_table): Add "add" as an alias for "addu". 2300 23012000-01-03 Nick Clifton <[email protected]> 2302 2303 * arm-dis.c (streq): New macro. 2304 (strneq): New macro. 2305 (force_thumb): ew local variable. 2306 (parse_disassembler_option): New function: Parse a single, ARM 2307 specific disassembler command line switch. 2308 (parse_disassembler_option): Call parse_disassembler_option to 2309 parse individual command line switches. 2310 (print_insn_big_arm): Check force_thumb. 2311 (print_insn_little_arm): Check force_thumb. 2312 2313For older changes see ChangeLog-9899 2314 2315Local Variables: 2316mode: change-log 2317left-margin: 8 2318fill-column: 74 2319version-control: never 2320End: 2321