xref: /f-stack/freebsd/mips/include/ucontext.h (revision 22ce4aff)
1a9643ea8Slogwang /*
2*22ce4affSfengbojiang  * SPDX-License-Identifier: BSD-3-Clause
3*22ce4affSfengbojiang  *
4a9643ea8Slogwang  * Copyright (c) 1992, 1993
5a9643ea8Slogwang  *	The Regents of the University of California.  All rights reserved.
6a9643ea8Slogwang  *
7a9643ea8Slogwang  * This code is derived from software contributed to Berkeley by
8a9643ea8Slogwang  * Ralph Campbell.
9a9643ea8Slogwang  *
10a9643ea8Slogwang  * Redistribution and use in source and binary forms, with or without
11a9643ea8Slogwang  * modification, are permitted provided that the following conditions
12a9643ea8Slogwang  * are met:
13a9643ea8Slogwang  * 1. Redistributions of source code must retain the above copyright
14a9643ea8Slogwang  *    notice, this list of conditions and the following disclaimer.
15a9643ea8Slogwang  * 2. Redistributions in binary form must reproduce the above copyright
16a9643ea8Slogwang  *    notice, this list of conditions and the following disclaimer in the
17a9643ea8Slogwang  *    documentation and/or other materials provided with the distribution.
18*22ce4affSfengbojiang  * 3. Neither the name of the University nor the names of its contributors
19a9643ea8Slogwang  *    may be used to endorse or promote products derived from this software
20a9643ea8Slogwang  *    without specific prior written permission.
21a9643ea8Slogwang  *
22a9643ea8Slogwang  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23a9643ea8Slogwang  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24a9643ea8Slogwang  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25a9643ea8Slogwang  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26a9643ea8Slogwang  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27a9643ea8Slogwang  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28a9643ea8Slogwang  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29a9643ea8Slogwang  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30a9643ea8Slogwang  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31a9643ea8Slogwang  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32a9643ea8Slogwang  * SUCH DAMAGE.
33a9643ea8Slogwang  *
34a9643ea8Slogwang  *	@(#)ucontext.h	8.1 (Berkeley) 6/10/93
35a9643ea8Slogwang  *	JNPR: ucontext.h,v 1.2 2007/08/09 11:23:32 katta
36a9643ea8Slogwang  * $FreeBSD$
37a9643ea8Slogwang  */
38a9643ea8Slogwang 
39a9643ea8Slogwang #ifndef _MACHINE_UCONTEXT_H_
40a9643ea8Slogwang #define	_MACHINE_UCONTEXT_H_
41a9643ea8Slogwang 
42a9643ea8Slogwang #ifndef _LOCORE
43a9643ea8Slogwang 
44a9643ea8Slogwang typedef struct	__mcontext {
45a9643ea8Slogwang 	/*
46a9643ea8Slogwang 	 * These fields must match the corresponding fields in struct
47a9643ea8Slogwang 	 * sigcontext which follow 'sc_mask'. That way we can support
48a9643ea8Slogwang 	 * struct sigcontext and ucontext_t at the same time.
49a9643ea8Slogwang 	 */
50a9643ea8Slogwang 	int		mc_onstack;	/* sigstack state to restore */
51a9643ea8Slogwang 	__register_t	mc_pc;		/* pc at time of signal */
52a9643ea8Slogwang 	__register_t	mc_regs[32];	/* processor regs 0 to 31 */
53a9643ea8Slogwang 	__register_t	sr;		/* status register */
54a9643ea8Slogwang 	__register_t	mullo, mulhi;	/* mullo and mulhi registers... */
55a9643ea8Slogwang 	int		mc_fpused;	/* fp has been used */
56a9643ea8Slogwang 	f_register_t	mc_fpregs[33];	/* fp regs 0 to 31 and csr */
57a9643ea8Slogwang 	__register_t	mc_fpc_eir;	/* fp exception instruction reg */
58a9643ea8Slogwang 	void		*mc_tls;	/* pointer to TLS area */
59a9643ea8Slogwang 	int		__spare__[8];	/* XXX reserved */
60a9643ea8Slogwang } mcontext_t;
61a9643ea8Slogwang 
62a9643ea8Slogwang #if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
63a9643ea8Slogwang #include <compat/freebsd32/freebsd32_signal.h>
64a9643ea8Slogwang 
65a9643ea8Slogwang typedef struct __mcontext32 {
66a9643ea8Slogwang 	int		mc_onstack;
67a9643ea8Slogwang 	int32_t		mc_pc;
68a9643ea8Slogwang 	int32_t		mc_regs[32];
69a9643ea8Slogwang 	int32_t		sr;
70a9643ea8Slogwang 	int32_t		mullo, mulhi;
71a9643ea8Slogwang 	int		mc_fpused;
72a9643ea8Slogwang 	int32_t		mc_fpregs[33];
73a9643ea8Slogwang 	int32_t		mc_fpc_eir;
74a9643ea8Slogwang 	int32_t		mc_tls;
75a9643ea8Slogwang 	int		__spare__[8];
76a9643ea8Slogwang } mcontext32_t;
77a9643ea8Slogwang 
78a9643ea8Slogwang typedef struct __ucontext32 {
79a9643ea8Slogwang 	sigset_t		uc_sigmask;
80a9643ea8Slogwang 	mcontext32_t		uc_mcontext;
81a9643ea8Slogwang 	uint32_t		uc_link;
82a9643ea8Slogwang 	struct sigaltstack32    uc_stack;
83a9643ea8Slogwang 	uint32_t		uc_flags;
84a9643ea8Slogwang 	uint32_t		__spare__[4];
85a9643ea8Slogwang } ucontext32_t;
86a9643ea8Slogwang #endif
87a9643ea8Slogwang #endif
88a9643ea8Slogwang 
89a9643ea8Slogwang #ifndef SZREG
90a9643ea8Slogwang #if defined(__mips_o32)
91a9643ea8Slogwang #define	SZREG	4
92a9643ea8Slogwang #else
93a9643ea8Slogwang #define	SZREG	8
94a9643ea8Slogwang #endif
95a9643ea8Slogwang #endif
96a9643ea8Slogwang 
97a9643ea8Slogwang /* offsets into mcontext_t */
98a9643ea8Slogwang #define	UCTX_REG(x)	(4 + SZREG + (x)*SZREG)
99a9643ea8Slogwang 
100a9643ea8Slogwang #define	UCR_ZERO	UCTX_REG(0)
101a9643ea8Slogwang #define	UCR_AT		UCTX_REG(1)
102a9643ea8Slogwang #define	UCR_V0		UCTX_REG(2)
103a9643ea8Slogwang #define	UCR_V1		UCTX_REG(3)
104a9643ea8Slogwang #define	UCR_A0		UCTX_REG(4)
105a9643ea8Slogwang #define	UCR_A1		UCTX_REG(5)
106a9643ea8Slogwang #define	UCR_A2		UCTX_REG(6)
107a9643ea8Slogwang #define	UCR_A3		UCTX_REG(7)
108a9643ea8Slogwang #define	UCR_T0		UCTX_REG(8)
109a9643ea8Slogwang #define	UCR_T1		UCTX_REG(9)
110a9643ea8Slogwang #define	UCR_T2		UCTX_REG(10)
111a9643ea8Slogwang #define	UCR_T3		UCTX_REG(11)
112a9643ea8Slogwang #define	UCR_T4		UCTX_REG(12)
113a9643ea8Slogwang #define	UCR_T5		UCTX_REG(13)
114a9643ea8Slogwang #define	UCR_T6		UCTX_REG(14)
115a9643ea8Slogwang #define	UCR_T7		UCTX_REG(15)
116a9643ea8Slogwang #define	UCR_S0		UCTX_REG(16)
117a9643ea8Slogwang #define	UCR_S1		UCTX_REG(17)
118a9643ea8Slogwang #define	UCR_S2		UCTX_REG(18)
119a9643ea8Slogwang #define	UCR_S3		UCTX_REG(19)
120a9643ea8Slogwang #define	UCR_S4		UCTX_REG(20)
121a9643ea8Slogwang #define	UCR_S5		UCTX_REG(21)
122a9643ea8Slogwang #define	UCR_S6		UCTX_REG(22)
123a9643ea8Slogwang #define	UCR_S7		UCTX_REG(23)
124a9643ea8Slogwang #define	UCR_T8		UCTX_REG(24)
125a9643ea8Slogwang #define	UCR_T9		UCTX_REG(25)
126a9643ea8Slogwang #define	UCR_K0		UCTX_REG(26)
127a9643ea8Slogwang #define	UCR_K1		UCTX_REG(27)
128a9643ea8Slogwang #define	UCR_GP		UCTX_REG(28)
129a9643ea8Slogwang #define	UCR_SP		UCTX_REG(29)
130a9643ea8Slogwang #define	UCR_S8		UCTX_REG(30)
131a9643ea8Slogwang #define	UCR_RA		UCTX_REG(31)
132a9643ea8Slogwang #define	UCR_SR		UCTX_REG(32)
133a9643ea8Slogwang #define	UCR_MDLO	UCTX_REG(33)
134a9643ea8Slogwang #define	UCR_MDHI	UCTX_REG(34)
135a9643ea8Slogwang 
136a9643ea8Slogwang #endif	/* !_MACHINE_UCONTEXT_H_ */
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