1a9643ea8Slogwang /*- 2*22ce4affSfengbojiang * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3*22ce4affSfengbojiang * 4a9643ea8Slogwang * Copyright (c) 1999 Luoqi Chen <[email protected]> 5a9643ea8Slogwang * Copyright (c) Peter Wemm <[email protected]> 6a9643ea8Slogwang * All rights reserved. 7a9643ea8Slogwang * 8a9643ea8Slogwang * Redistribution and use in source and binary forms, with or without 9a9643ea8Slogwang * modification, are permitted provided that the following conditions 10a9643ea8Slogwang * are met: 11a9643ea8Slogwang * 1. Redistributions of source code must retain the above copyright 12a9643ea8Slogwang * notice, this list of conditions and the following disclaimer. 13a9643ea8Slogwang * 2. Redistributions in binary form must reproduce the above copyright 14a9643ea8Slogwang * notice, this list of conditions and the following disclaimer in the 15a9643ea8Slogwang * documentation and/or other materials provided with the distribution. 16a9643ea8Slogwang * 17a9643ea8Slogwang * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18a9643ea8Slogwang * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19a9643ea8Slogwang * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20a9643ea8Slogwang * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21a9643ea8Slogwang * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22a9643ea8Slogwang * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23a9643ea8Slogwang * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24a9643ea8Slogwang * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25a9643ea8Slogwang * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26a9643ea8Slogwang * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27a9643ea8Slogwang * SUCH DAMAGE. 28a9643ea8Slogwang * 29a9643ea8Slogwang * from: src/sys/alpha/include/pcpu.h,v 1.15 2004/11/05 19:16:44 jhb 30a9643ea8Slogwang * $FreeBSD$ 31a9643ea8Slogwang */ 32a9643ea8Slogwang 33a9643ea8Slogwang #ifndef _MACHINE_PCPU_H_ 34a9643ea8Slogwang #define _MACHINE_PCPU_H_ 35a9643ea8Slogwang 36a9643ea8Slogwang #include <machine/cpufunc.h> 37a9643ea8Slogwang #include <machine/pte.h> 38a9643ea8Slogwang 39a9643ea8Slogwang #define PCPU_MD_COMMON_FIELDS \ 40a9643ea8Slogwang pd_entry_t *pc_segbase; /* curthread segbase */ \ 41a9643ea8Slogwang struct pmap *pc_curpmap; /* pmap of curthread */ \ 42a9643ea8Slogwang u_int32_t pc_next_asid; /* next ASID to alloc */ \ 43a9643ea8Slogwang u_int32_t pc_asid_generation; /* current ASID generation */ \ 44*22ce4affSfengbojiang u_int pc_pending_ipis; /* IPIs pending to this CPU */ \ 45*22ce4affSfengbojiang struct pcpu *pc_self; /* globally-uniqe self pointer */ 46a9643ea8Slogwang 47a9643ea8Slogwang #ifdef __mips_n64 48a9643ea8Slogwang #define PCPU_MD_MIPS64_FIELDS \ 49a9643ea8Slogwang PCPU_MD_COMMON_FIELDS \ 50*22ce4affSfengbojiang char __pad[245] 51a9643ea8Slogwang #else 52a9643ea8Slogwang #define PCPU_MD_MIPS32_FIELDS \ 53a9643ea8Slogwang PCPU_MD_COMMON_FIELDS \ 54*22ce4affSfengbojiang pt_entry_t *pc_cmap1_ptep; /* PTE for copy window 1 KVA */ \ 55*22ce4affSfengbojiang pt_entry_t *pc_cmap2_ptep; /* PTE for copy window 2 KVA */ \ 56*22ce4affSfengbojiang vm_offset_t pc_cmap1_addr; /* KVA page for copy window 1 */ \ 57*22ce4affSfengbojiang vm_offset_t pc_cmap2_addr; /* KVA page for copy window 2 */ \ 58*22ce4affSfengbojiang vm_offset_t pc_qmap_addr; /* KVA page for temporary mappings */ \ 59*22ce4affSfengbojiang pt_entry_t *pc_qmap_ptep; /* PTE for temporary mapping KVA */ \ 60*22ce4affSfengbojiang char __pad[97] 61a9643ea8Slogwang #endif 62a9643ea8Slogwang 63a9643ea8Slogwang #ifdef __mips_n64 64a9643ea8Slogwang #define PCPU_MD_FIELDS PCPU_MD_MIPS64_FIELDS 65a9643ea8Slogwang #else 66a9643ea8Slogwang #define PCPU_MD_FIELDS PCPU_MD_MIPS32_FIELDS 67a9643ea8Slogwang #endif 68a9643ea8Slogwang 69a9643ea8Slogwang #ifdef _KERNEL 70a9643ea8Slogwang 71a9643ea8Slogwang extern char pcpu_space[MAXCPU][PAGE_SIZE * 2]; 72a9643ea8Slogwang #define PCPU_ADDR(cpu) (struct pcpu *)(pcpu_space[(cpu)]) 73a9643ea8Slogwang 74a9643ea8Slogwang extern struct pcpu *pcpup; 75a9643ea8Slogwang #define PCPUP pcpup 76a9643ea8Slogwang 77*22ce4affSfengbojiang /* 78*22ce4affSfengbojiang * Since we use a wired TLB entry to map the same VA to a different 79*22ce4affSfengbojiang * physical page for each CPU, get_pcpu() must use the pc_self 80*22ce4affSfengbojiang * field to obtain a globally-unique pointer. 81*22ce4affSfengbojiang */ 82*22ce4affSfengbojiang #define get_pcpu() (PCPUP->pc_self) 83*22ce4affSfengbojiang 84a9643ea8Slogwang #define PCPU_ADD(member, value) (PCPUP->pc_ ## member += (value)) 85a9643ea8Slogwang #define PCPU_GET(member) (PCPUP->pc_ ## member) 86a9643ea8Slogwang #define PCPU_INC(member) PCPU_ADD(member, 1) 87a9643ea8Slogwang #define PCPU_PTR(member) (&PCPUP->pc_ ## member) 88a9643ea8Slogwang #define PCPU_SET(member,value) (PCPUP->pc_ ## member = (value)) 89a9643ea8Slogwang #define PCPU_LAZY_INC(member) (++PCPUP->pc_ ## member) 90a9643ea8Slogwang 91a9643ea8Slogwang #ifdef SMP 92a9643ea8Slogwang /* 93a9643ea8Slogwang * Instantiate the wired TLB entry at PCPU_TLB_ENTRY to map 'pcpu' at 'pcpup'. 94a9643ea8Slogwang */ 95a9643ea8Slogwang void mips_pcpu_tlb_init(struct pcpu *pcpu); 96a9643ea8Slogwang #endif 97a9643ea8Slogwang 98a9643ea8Slogwang #endif /* _KERNEL */ 99a9643ea8Slogwang 100a9643ea8Slogwang #endif /* !_MACHINE_PCPU_H_ */ 101