xref: /f-stack/freebsd/mips/include/pcb.h (revision 22ce4aff)
1a9643ea8Slogwang /*	$OpenBSD: pcb.h,v 1.3 1998/09/15 10:50:12 pefo Exp $	*/
2a9643ea8Slogwang 
3a9643ea8Slogwang /*-
4*22ce4affSfengbojiang  * SPDX-License-Identifier: BSD-3-Clause
5*22ce4affSfengbojiang  *
6a9643ea8Slogwang  * Copyright (c) 1988 University of Utah.
7a9643ea8Slogwang  * Copyright (c) 1992, 1993
8a9643ea8Slogwang  *	The Regents of the University of California.  All rights reserved.
9a9643ea8Slogwang  *
10a9643ea8Slogwang  * This code is derived from software contributed to Berkeley by
11a9643ea8Slogwang  * the Systems Programming Group of the University of Utah Computer
12a9643ea8Slogwang  * Science Department and Ralph Campbell.
13a9643ea8Slogwang  *
14a9643ea8Slogwang  * Redistribution and use in source and binary forms, with or without
15a9643ea8Slogwang  * modification, are permitted provided that the following conditions
16a9643ea8Slogwang  * are met:
17a9643ea8Slogwang  * 1. Redistributions of source code must retain the above copyright
18a9643ea8Slogwang  *    notice, this list of conditions and the following disclaimer.
19a9643ea8Slogwang  * 2. Redistributions in binary form must reproduce the above copyright
20a9643ea8Slogwang  *    notice, this list of conditions and the following disclaimer in the
21a9643ea8Slogwang  *    documentation and/or other materials provided with the distribution.
22*22ce4affSfengbojiang  * 3. Neither the name of the University nor the names of its contributors
23a9643ea8Slogwang  *    may be used to endorse or promote products derived from this software
24a9643ea8Slogwang  *    without specific prior written permission.
25a9643ea8Slogwang  *
26a9643ea8Slogwang  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27a9643ea8Slogwang  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28a9643ea8Slogwang  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29a9643ea8Slogwang  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30a9643ea8Slogwang  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31a9643ea8Slogwang  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32a9643ea8Slogwang  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33a9643ea8Slogwang  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34a9643ea8Slogwang  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35a9643ea8Slogwang  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36a9643ea8Slogwang  * SUCH DAMAGE.
37a9643ea8Slogwang  *
38a9643ea8Slogwang  *	from: Utah Hdr: pcb.h 1.13 89/04/23
39a9643ea8Slogwang  *	from: @(#)pcb.h 8.1 (Berkeley) 6/10/93
40a9643ea8Slogwang  *	JNPR: pcb.h,v 1.2 2006/08/07 11:51:17 katta
41a9643ea8Slogwang  * $FreeBSD$
42a9643ea8Slogwang  */
43a9643ea8Slogwang 
44a9643ea8Slogwang #ifndef _MACHINE_PCB_H_
45a9643ea8Slogwang #define	_MACHINE_PCB_H_
46a9643ea8Slogwang 
47a9643ea8Slogwang /*
48a9643ea8Slogwang  * used by switch.S
49a9643ea8Slogwang  */
50a9643ea8Slogwang #define	PCB_REG_S0	0
51a9643ea8Slogwang #define	PCB_REG_S1	1
52a9643ea8Slogwang #define	PCB_REG_S2	2
53a9643ea8Slogwang #define	PCB_REG_S3	3
54a9643ea8Slogwang #define	PCB_REG_S4	4
55a9643ea8Slogwang #define	PCB_REG_S5	5
56a9643ea8Slogwang #define	PCB_REG_S6	6
57a9643ea8Slogwang #define	PCB_REG_S7	7
58a9643ea8Slogwang #define	PCB_REG_SP	8
59a9643ea8Slogwang #define	PCB_REG_S8	9
60a9643ea8Slogwang #define	PCB_REG_RA	10
61a9643ea8Slogwang #define	PCB_REG_SR	11
62a9643ea8Slogwang #define	PCB_REG_GP	12
63a9643ea8Slogwang #define	PCB_REG_PC	13
64a9643ea8Slogwang 
65a9643ea8Slogwang /*
66a9643ea8Slogwang  * Call ast if required
67a9643ea8Slogwang  *
68a9643ea8Slogwang  * XXX Do we really need to disable interrupts?
69a9643ea8Slogwang  */
70a9643ea8Slogwang #define DO_AST				             \
71a9643ea8Slogwang 44:				                     \
72a9643ea8Slogwang 	mfc0	t0, MIPS_COP_0_STATUS               ;\
73a9643ea8Slogwang 	and	a0, t0, MIPS_SR_INT_IE              ;\
74a9643ea8Slogwang 	xor	t0, a0, t0                          ;\
75a9643ea8Slogwang 	mtc0	t0, MIPS_COP_0_STATUS               ;\
76a9643ea8Slogwang 	COP0_SYNC                                   ;\
77a9643ea8Slogwang 	GET_CPU_PCPU(s1)                            ;\
78a9643ea8Slogwang 	PTR_L	s3, PC_CURPCB(s1)                   ;\
79a9643ea8Slogwang 	PTR_L	s1, PC_CURTHREAD(s1)                ;\
80a9643ea8Slogwang 	lw	s2, TD_FLAGS(s1)                    ;\
81a9643ea8Slogwang 	li	s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
82a9643ea8Slogwang 	and	s2, s0                              ;\
83a9643ea8Slogwang 	mfc0	t0, MIPS_COP_0_STATUS               ;\
84a9643ea8Slogwang 	or	t0, a0, t0                          ;\
85a9643ea8Slogwang 	mtc0	t0, MIPS_COP_0_STATUS               ;\
86a9643ea8Slogwang 	COP0_SYNC                                   ;\
87a9643ea8Slogwang 	beq	s2, zero, 4f                        ;\
88a9643ea8Slogwang 	nop                                         ;\
89a9643ea8Slogwang 	PTR_LA	s0, _C_LABEL(ast)                   ;\
90a9643ea8Slogwang 	jalr	s0                                  ;\
91a9643ea8Slogwang 	PTR_ADDU a0, s3, U_PCB_REGS                 ;\
92a9643ea8Slogwang 	j	44b		                    ;\
93a9643ea8Slogwang         nop                                         ;\
94a9643ea8Slogwang 4:
95a9643ea8Slogwang 
96a9643ea8Slogwang #define	SAVE_U_PCB_REG(reg, offs, base) \
97a9643ea8Slogwang 	REG_S	reg, U_PCB_REGS + (SZREG * offs) (base)
98a9643ea8Slogwang 
99a9643ea8Slogwang #define	RESTORE_U_PCB_REG(reg, offs, base) \
100a9643ea8Slogwang 	REG_L	reg, U_PCB_REGS + (SZREG * offs) (base)
101a9643ea8Slogwang 
102a9643ea8Slogwang #define	SAVE_U_PCB_FPREG(reg, offs, base) \
103a9643ea8Slogwang 	FP_S	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
104a9643ea8Slogwang 
105a9643ea8Slogwang #define	RESTORE_U_PCB_FPREG(reg, offs, base) \
106a9643ea8Slogwang 	FP_L	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
107a9643ea8Slogwang 
108a9643ea8Slogwang #define	SAVE_U_PCB_FPSR(reg, offs, base) \
109a9643ea8Slogwang 	REG_S	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
110a9643ea8Slogwang 
111a9643ea8Slogwang #define	RESTORE_U_PCB_FPSR(reg, offs, base) \
112a9643ea8Slogwang 	REG_L	reg, U_PCB_FPREGS + (SZFPREG * offs) (base)
113a9643ea8Slogwang 
114a9643ea8Slogwang #define	SAVE_U_PCB_CONTEXT(reg, offs, base) \
115a9643ea8Slogwang 	REG_S	reg, U_PCB_CONTEXT + (SZREG * offs) (base)
116a9643ea8Slogwang 
117a9643ea8Slogwang #define	RESTORE_U_PCB_CONTEXT(reg, offs, base) \
118a9643ea8Slogwang 	REG_L	reg, U_PCB_CONTEXT + (SZREG * offs) (base)
119a9643ea8Slogwang 
120a9643ea8Slogwang #ifndef LOCORE
121a9643ea8Slogwang #include <machine/frame.h>
122a9643ea8Slogwang 
123a9643ea8Slogwang /*
124a9643ea8Slogwang  * MIPS process control block
125a9643ea8Slogwang  */
126a9643ea8Slogwang struct pcb
127a9643ea8Slogwang {
128a9643ea8Slogwang 	struct trapframe pcb_regs;	/* saved CPU and registers */
129a9643ea8Slogwang 	__register_t pcb_context[14];	/* kernel context for resume */
130a9643ea8Slogwang 	void *pcb_onfault;		/* for copyin/copyout faults */
131a9643ea8Slogwang 	register_t pcb_tpc;
132a9643ea8Slogwang };
133a9643ea8Slogwang 
134a9643ea8Slogwang #ifdef _KERNEL
135a9643ea8Slogwang extern struct pcb *curpcb;		/* the current running pcb */
136a9643ea8Slogwang 
137a9643ea8Slogwang void makectx(struct trapframe *, struct pcb *);
138a9643ea8Slogwang int savectx(struct pcb *) __returns_twice;
139a9643ea8Slogwang 
140a9643ea8Slogwang #endif
141a9643ea8Slogwang #endif
142a9643ea8Slogwang 
143a9643ea8Slogwang #endif	/* !_MACHINE_PCB_H_ */
144