1a9643ea8Slogwang /* $NetBSD: cpu.h,v 1.70 2003/01/17 23:36:08 thorpej Exp $ */ 2a9643ea8Slogwang 3a9643ea8Slogwang /*- 4*22ce4affSfengbojiang * SPDX-License-Identifier: BSD-4-Clause 5*22ce4affSfengbojiang * 6a9643ea8Slogwang * Copyright (c) 1992, 1993 7a9643ea8Slogwang * The Regents of the University of California. All rights reserved. 8a9643ea8Slogwang * 9a9643ea8Slogwang * This code is derived from software contributed to Berkeley by 10a9643ea8Slogwang * Ralph Campbell and Rick Macklem. 11a9643ea8Slogwang * 12a9643ea8Slogwang * Redistribution and use in source and binary forms, with or without 13a9643ea8Slogwang * modification, are permitted provided that the following conditions 14a9643ea8Slogwang * are met: 15a9643ea8Slogwang * 1. Redistributions of source code must retain the above copyright 16a9643ea8Slogwang * notice, this list of conditions and the following disclaimer. 17a9643ea8Slogwang * 2. Redistributions in binary form must reproduce the above copyright 18a9643ea8Slogwang * notice, this list of conditions and the following disclaimer in the 19a9643ea8Slogwang * documentation and/or other materials provided with the distribution. 20a9643ea8Slogwang * 3. All advertising materials mentioning features or use of this software 21a9643ea8Slogwang * must display the following acknowledgement: 22a9643ea8Slogwang * This product includes software developed by the University of 23a9643ea8Slogwang * California, Berkeley and its contributors. 24a9643ea8Slogwang * 4. Neither the name of the University nor the names of its contributors 25a9643ea8Slogwang * may be used to endorse or promote products derived from this software 26a9643ea8Slogwang * without specific prior written permission. 27a9643ea8Slogwang * 28a9643ea8Slogwang * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29a9643ea8Slogwang * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30a9643ea8Slogwang * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31a9643ea8Slogwang * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32a9643ea8Slogwang * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33a9643ea8Slogwang * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34a9643ea8Slogwang * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35a9643ea8Slogwang * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36a9643ea8Slogwang * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37a9643ea8Slogwang * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38a9643ea8Slogwang * SUCH DAMAGE. 39a9643ea8Slogwang * 40a9643ea8Slogwang * $FreeBSD$ 41a9643ea8Slogwang * @(#)cpu.h 8.4 (Berkeley) 1/4/94 42a9643ea8Slogwang */ 43a9643ea8Slogwang 44a9643ea8Slogwang #ifndef _CPUINFO_H_ 45a9643ea8Slogwang #define _CPUINFO_H_ 46a9643ea8Slogwang 47a9643ea8Slogwang /* 48a9643ea8Slogwang * Exported definitions unique to NetBSD/mips cpu support. 49a9643ea8Slogwang */ 50a9643ea8Slogwang 51a9643ea8Slogwang #ifdef _KERNEL 52a9643ea8Slogwang #ifndef LOCORE 53a9643ea8Slogwang 54a9643ea8Slogwang struct mips_cpuinfo { 55a9643ea8Slogwang u_int8_t cpu_vendor; 56a9643ea8Slogwang u_int8_t cpu_rev; 57a9643ea8Slogwang u_int8_t cpu_impl; 58a9643ea8Slogwang u_int8_t tlb_type; 59a9643ea8Slogwang u_int32_t tlb_pgmask; 60a9643ea8Slogwang u_int16_t tlb_nentries; 61a9643ea8Slogwang u_int8_t icache_virtual; 62a9643ea8Slogwang boolean_t cache_coherent_dma; 63*22ce4affSfengbojiang boolean_t userlocal_reg; 64a9643ea8Slogwang struct { 65a9643ea8Slogwang u_int32_t ic_size; 66a9643ea8Slogwang u_int8_t ic_linesize; 67a9643ea8Slogwang u_int8_t ic_nways; 68a9643ea8Slogwang u_int16_t ic_nsets; 69a9643ea8Slogwang u_int32_t dc_size; 70a9643ea8Slogwang u_int8_t dc_linesize; 71a9643ea8Slogwang u_int8_t dc_nways; 72a9643ea8Slogwang u_int16_t dc_nsets; 73a9643ea8Slogwang } l1; 74a9643ea8Slogwang struct { 75a9643ea8Slogwang u_int32_t dc_size; 76a9643ea8Slogwang u_int8_t dc_linesize; 77a9643ea8Slogwang u_int8_t dc_nways; 78a9643ea8Slogwang u_int16_t dc_nsets; 79a9643ea8Slogwang } l2; 80*22ce4affSfengbojiang u_int32_t fpu_id; 81a9643ea8Slogwang }; 82a9643ea8Slogwang 83a9643ea8Slogwang extern struct mips_cpuinfo cpuinfo; 84a9643ea8Slogwang 85a9643ea8Slogwang #endif /* !LOCORE */ 86a9643ea8Slogwang #endif /* _KERNEL */ 87a9643ea8Slogwang #endif /* _CPUINFO_H_ */ 88