xref: /f-stack/freebsd/mips/include/cache_mipsNN.h (revision 22ce4aff)
1a9643ea8Slogwang /*	$NetBSD: cache_mipsNN.h,v 1.4 2003/02/17 11:35:02 simonb Exp $	*/
2a9643ea8Slogwang 
3*22ce4affSfengbojiang /*-
4*22ce4affSfengbojiang  * SPDX-License-Identifier: BSD-4-Clause
5*22ce4affSfengbojiang  *
6a9643ea8Slogwang  * Copyright 2002 Wasabi Systems, Inc.
7a9643ea8Slogwang  * All rights reserved.
8a9643ea8Slogwang  *
9a9643ea8Slogwang  * Written by Simon Burge for Wasabi Systems, Inc.
10a9643ea8Slogwang  *
11a9643ea8Slogwang  * Redistribution and use in source and binary forms, with or without
12a9643ea8Slogwang  * modification, are permitted provided that the following conditions
13a9643ea8Slogwang  * are met:
14a9643ea8Slogwang  * 1. Redistributions of source code must retain the above copyright
15a9643ea8Slogwang  *    notice, this list of conditions and the following disclaimer.
16a9643ea8Slogwang  * 2. Redistributions in binary form must reproduce the above copyright
17a9643ea8Slogwang  *    notice, this list of conditions and the following disclaimer in the
18a9643ea8Slogwang  *    documentation and/or other materials provided with the distribution.
19a9643ea8Slogwang  * 3. All advertising materials mentioning features or use of this software
20a9643ea8Slogwang  *    must display the following acknowledgement:
21a9643ea8Slogwang  *	This product includes software developed for the NetBSD Project by
22a9643ea8Slogwang  *	Wasabi Systems, Inc.
23a9643ea8Slogwang  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
24a9643ea8Slogwang  *    or promote products derived from this software without specific prior
25a9643ea8Slogwang  *    written permission.
26a9643ea8Slogwang  *
27a9643ea8Slogwang  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
28a9643ea8Slogwang  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29a9643ea8Slogwang  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30a9643ea8Slogwang  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
31a9643ea8Slogwang  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32a9643ea8Slogwang  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33a9643ea8Slogwang  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34a9643ea8Slogwang  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35a9643ea8Slogwang  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36a9643ea8Slogwang  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37a9643ea8Slogwang  * POSSIBILITY OF SUCH DAMAGE.
38a9643ea8Slogwang  *
39a9643ea8Slogwang  * $FreeBSD$
40a9643ea8Slogwang  */
41a9643ea8Slogwang #ifndef	_MACHINE_CACHE_MIPSNN_H_
42a9643ea8Slogwang #define	_MACHINE_CACHE_MIPSNN_H_
43a9643ea8Slogwang 
44a9643ea8Slogwang void	mipsNN_cache_init(struct mips_cpuinfo *);
45a9643ea8Slogwang 
46a9643ea8Slogwang void	mipsNN_icache_sync_all_16(void);
47a9643ea8Slogwang void	mipsNN_icache_sync_all_32(void);
48a9643ea8Slogwang void	mipsNN_icache_sync_all_64(void);
49a9643ea8Slogwang void	mipsNN_icache_sync_all_128(void);
50a9643ea8Slogwang void	mipsNN_icache_sync_range_16(vm_offset_t, vm_size_t);
51a9643ea8Slogwang void	mipsNN_icache_sync_range_32(vm_offset_t, vm_size_t);
52a9643ea8Slogwang void	mipsNN_icache_sync_range_64(vm_offset_t, vm_size_t);
53a9643ea8Slogwang void	mipsNN_icache_sync_range_128(vm_offset_t, vm_size_t);
54a9643ea8Slogwang void	mipsNN_icache_sync_range_index_16(vm_offset_t, vm_size_t);
55a9643ea8Slogwang void	mipsNN_icache_sync_range_index_32(vm_offset_t, vm_size_t);
56a9643ea8Slogwang void	mipsNN_icache_sync_range_index_64(vm_offset_t, vm_size_t);
57a9643ea8Slogwang void	mipsNN_icache_sync_range_index_128(vm_offset_t, vm_size_t);
58a9643ea8Slogwang void	mipsNN_pdcache_wbinv_all_16(void);
59a9643ea8Slogwang void	mipsNN_pdcache_wbinv_all_32(void);
60a9643ea8Slogwang void	mipsNN_pdcache_wbinv_all_64(void);
61a9643ea8Slogwang void	mipsNN_pdcache_wbinv_all_128(void);
62a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_16(vm_offset_t, vm_size_t);
63a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_32(vm_offset_t, vm_size_t);
64a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_64(vm_offset_t, vm_size_t);
65a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_128(vm_offset_t, vm_size_t);
66a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_index_16(vm_offset_t, vm_size_t);
67a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
68a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_index_64(vm_offset_t, vm_size_t);
69a9643ea8Slogwang void	mipsNN_pdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
70a9643ea8Slogwang void	mipsNN_pdcache_inv_range_16(vm_offset_t, vm_size_t);
71a9643ea8Slogwang void	mipsNN_pdcache_inv_range_32(vm_offset_t, vm_size_t);
72a9643ea8Slogwang void	mipsNN_pdcache_inv_range_64(vm_offset_t, vm_size_t);
73a9643ea8Slogwang void	mipsNN_pdcache_inv_range_128(vm_offset_t, vm_size_t);
74a9643ea8Slogwang void	mipsNN_pdcache_wb_range_16(vm_offset_t, vm_size_t);
75a9643ea8Slogwang void	mipsNN_pdcache_wb_range_32(vm_offset_t, vm_size_t);
76a9643ea8Slogwang void	mipsNN_pdcache_wb_range_64(vm_offset_t, vm_size_t);
77a9643ea8Slogwang void	mipsNN_pdcache_wb_range_128(vm_offset_t, vm_size_t);
78a9643ea8Slogwang void	mipsNN_sdcache_wbinv_all_32(void);
79a9643ea8Slogwang void	mipsNN_sdcache_wbinv_all_64(void);
80a9643ea8Slogwang void	mipsNN_sdcache_wbinv_all_128(void);
81a9643ea8Slogwang void	mipsNN_sdcache_wbinv_range_32(vm_offset_t, vm_size_t);
82a9643ea8Slogwang void	mipsNN_sdcache_wbinv_range_64(vm_offset_t, vm_size_t);
83a9643ea8Slogwang void	mipsNN_sdcache_wbinv_range_128(vm_offset_t, vm_size_t);
84a9643ea8Slogwang void	mipsNN_sdcache_wbinv_range_index_32(vm_offset_t, vm_size_t);
85a9643ea8Slogwang void	mipsNN_sdcache_wbinv_range_index_64(vm_offset_t, vm_size_t);
86a9643ea8Slogwang void	mipsNN_sdcache_wbinv_range_index_128(vm_offset_t, vm_size_t);
87a9643ea8Slogwang void	mipsNN_sdcache_inv_range_32(vm_offset_t, vm_size_t);
88a9643ea8Slogwang void	mipsNN_sdcache_inv_range_64(vm_offset_t, vm_size_t);
89a9643ea8Slogwang void	mipsNN_sdcache_inv_range_128(vm_offset_t, vm_size_t);
90a9643ea8Slogwang void	mipsNN_sdcache_wb_range_32(vm_offset_t, vm_size_t);
91a9643ea8Slogwang void	mipsNN_sdcache_wb_range_64(vm_offset_t, vm_size_t);
92a9643ea8Slogwang void	mipsNN_sdcache_wb_range_128(vm_offset_t, vm_size_t);
93a9643ea8Slogwang 
94a9643ea8Slogwang #endif	/* _MACHINE_CACHE_MIPSNN_H_ */
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