1a9643ea8Slogwang# 2a9643ea8Slogwang# BERI_NETFPGA_MDROOT -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible 3a9643ea8Slogwang# RISC Implementation) FPGA soft core, as configured in its NetFPGA reference 4a9643ea8Slogwang# configuration. 5a9643ea8Slogwang# 6a9643ea8Slogwang# $FreeBSD$ 7a9643ea8Slogwang# 8a9643ea8Slogwang 9*22ce4affSfengbojianginclude "std.BERI" 10a9643ea8Slogwang 11a9643ea8Slogwangident BERI_NETFPGA_MDROOT 12a9643ea8Slogwang 13a9643ea8Slogwangoptions HZ=100 14a9643ea8Slogwang 15a9643ea8Slogwangoptions FDT 16a9643ea8Slogwangoptions FDT_DTB_STATIC 17a9643ea8Slogwangmakeoptions FDT_DTS_FILE=beri-netfpga.dts 18a9643ea8Slogwang 19a9643ea8Slogwang#device uart 20a9643ea8Slogwangdevice altera_jtag_uart 21a9643ea8Slogwang 22a9643ea8Slogwangdevice bpf 23a9643ea8Slogwang 24a9643ea8Slogwangoptions DEVICE_POLLING 25a9643ea8Slogwangdevice netfpga10g_nf10bmac 26a9643ea8Slogwangoptions NF10BMAC_64BIT 27a9643ea8Slogwang 28a9643ea8Slogwang# 29a9643ea8Slogwang# This kernel configuration uses an embedded memory root file system. 30a9643ea8Slogwang# Adjust the following path and size based on local requirements. 31a9643ea8Slogwang# 32a9643ea8Slogwangoptions MD_ROOT # MD is a potential root device 33a9643ea8Slogwangoptions MD_ROOT_SIZE=26112 # 25.5MB 34a9643ea8Slogwangoptions ROOTDEVNAME=\"ufs:md0\" 35a9643ea8Slogwang#makeoptions MFS_IMAGE=/foo/baz/baz/mdroot.img 36a9643ea8Slogwang 37a9643ea8Slogwang# end 38