1a9643ea8Slogwang /* $NetBSD: cpu.h,v 1.2 2001/02/23 21:23:52 reinoud Exp $ */ 2a9643ea8Slogwang /* $FreeBSD$ */ 3a9643ea8Slogwang 4a9643ea8Slogwang #ifndef MACHINE_CPU_H 5a9643ea8Slogwang #define MACHINE_CPU_H 6a9643ea8Slogwang 7a9643ea8Slogwang #include <machine/armreg.h> 8a9643ea8Slogwang #include <machine/frame.h> 9a9643ea8Slogwang 10a9643ea8Slogwang void cpu_halt(void); 11a9643ea8Slogwang void swi_vm(void *); 12a9643ea8Slogwang 13a9643ea8Slogwang #ifdef _KERNEL 14a9643ea8Slogwang #include <machine/cpu-v6.h> 15a9643ea8Slogwang 16a9643ea8Slogwang static __inline uint64_t get_cyclecount(void)17a9643ea8Slogwangget_cyclecount(void) 18a9643ea8Slogwang { 19*22ce4affSfengbojiang #if __ARM_ARCH > 6 || (__ARM_ARCH == 6 && defined(CPU_ARM1176)) 20a9643ea8Slogwang #if (__ARM_ARCH > 6) && defined(DEV_PMU) 21a9643ea8Slogwang if (pmu_attched) { 22a9643ea8Slogwang u_int cpu; 23a9643ea8Slogwang uint64_t h, h2; 24a9643ea8Slogwang uint32_t l, r; 25a9643ea8Slogwang 26a9643ea8Slogwang cpu = PCPU_GET(cpuid); 27a9643ea8Slogwang h = (uint64_t)atomic_load_acq_32(&ccnt_hi[cpu]); 28a9643ea8Slogwang l = cp15_pmccntr_get(); 29a9643ea8Slogwang /* In case interrupts are disabled we need to check for overflow. */ 30a9643ea8Slogwang r = cp15_pmovsr_get(); 31a9643ea8Slogwang if (r & PMU_OVSR_C) { 32a9643ea8Slogwang atomic_add_32(&ccnt_hi[cpu], 1); 33a9643ea8Slogwang /* Clear the event. */ 34a9643ea8Slogwang cp15_pmovsr_set(PMU_OVSR_C); 35a9643ea8Slogwang } 36a9643ea8Slogwang /* Make sure there was no wrap-around while we read the lo half. */ 37a9643ea8Slogwang h2 = (uint64_t)atomic_load_acq_32(&ccnt_hi[cpu]); 38a9643ea8Slogwang if (h != h2) 39a9643ea8Slogwang l = cp15_pmccntr_get(); 40a9643ea8Slogwang return (h2 << 32 | l); 41a9643ea8Slogwang } else 42a9643ea8Slogwang #endif 43a9643ea8Slogwang return cp15_pmccntr_get(); 44a9643ea8Slogwang #else /* No performance counters, so use binuptime(9). This is slooooow */ 45a9643ea8Slogwang struct bintime bt; 46a9643ea8Slogwang 47a9643ea8Slogwang binuptime(&bt); 48a9643ea8Slogwang return ((uint64_t)bt.sec << 56 | bt.frac >> 8); 49a9643ea8Slogwang #endif 50a9643ea8Slogwang } 51a9643ea8Slogwang #endif 52a9643ea8Slogwang 53a9643ea8Slogwang #define TRAPF_USERMODE(frame) ((frame->tf_spsr & PSR_MODE) == PSR_USR32_MODE) 54a9643ea8Slogwang 55a9643ea8Slogwang #define TRAPF_PC(tfp) ((tfp)->tf_pc) 56a9643ea8Slogwang 57a9643ea8Slogwang #define cpu_getstack(td) ((td)->td_frame->tf_usr_sp) 58a9643ea8Slogwang #define cpu_setstack(td, sp) ((td)->td_frame->tf_usr_sp = (sp)) 59a9643ea8Slogwang #define cpu_spinwait() /* nothing */ 60*22ce4affSfengbojiang #define cpu_lock_delay() DELAY(1) 61a9643ea8Slogwang 62a9643ea8Slogwang #define ARM_NVEC 8 63a9643ea8Slogwang #define ARM_VEC_ALL 0xffffffff 64a9643ea8Slogwang 65a9643ea8Slogwang extern vm_offset_t vector_page; 66a9643ea8Slogwang 67a9643ea8Slogwang /* 68a9643ea8Slogwang * Params passed into initarm. If you change the size of this you will 69a9643ea8Slogwang * need to update locore.S to allocate more memory on the stack before 70a9643ea8Slogwang * it calls initarm. 71a9643ea8Slogwang */ 72a9643ea8Slogwang struct arm_boot_params { 73a9643ea8Slogwang register_t abp_size; /* Size of this structure */ 74a9643ea8Slogwang register_t abp_r0; /* r0 from the boot loader */ 75a9643ea8Slogwang register_t abp_r1; /* r1 from the boot loader */ 76a9643ea8Slogwang register_t abp_r2; /* r2 from the boot loader */ 77a9643ea8Slogwang register_t abp_r3; /* r3 from the boot loader */ 78a9643ea8Slogwang vm_offset_t abp_physaddr; /* The kernel physical address */ 79a9643ea8Slogwang vm_offset_t abp_pagetable; /* The early page table */ 80a9643ea8Slogwang }; 81a9643ea8Slogwang 82a9643ea8Slogwang void arm_vector_init(vm_offset_t, int); 83a9643ea8Slogwang void fork_trampoline(void); 84a9643ea8Slogwang void identify_arm_cpu(void); 85a9643ea8Slogwang void *initarm(struct arm_boot_params *); 86a9643ea8Slogwang 87a9643ea8Slogwang extern char btext[]; 88a9643ea8Slogwang extern char etext[]; 89a9643ea8Slogwang int badaddr_read(void *, size_t, void *); 90a9643ea8Slogwang #endif /* !MACHINE_CPU_H */ 91