1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause 2d30ea906Sjfb8856606 * Copyright(c) 2017 Intel Corporation 3d30ea906Sjfb8856606 */ 4d30ea906Sjfb8856606 5d30ea906Sjfb8856606 #ifndef _RTE_ETHDEV_CORE_H_ 6d30ea906Sjfb8856606 #define _RTE_ETHDEV_CORE_H_ 7d30ea906Sjfb8856606 8*2d9fd380Sjfb8856606 #include <pthread.h> 9*2d9fd380Sjfb8856606 #include <sys/types.h> 10*2d9fd380Sjfb8856606 11d30ea906Sjfb8856606 /** 12d30ea906Sjfb8856606 * @file 13d30ea906Sjfb8856606 * 14d30ea906Sjfb8856606 * RTE Ethernet Device internal header. 15d30ea906Sjfb8856606 * 16d30ea906Sjfb8856606 * This header contains internal data types. But they are still part of the 17d30ea906Sjfb8856606 * public API because they are used by inline functions in the published API. 18d30ea906Sjfb8856606 * 19d30ea906Sjfb8856606 * Applications should not use these directly. 20d30ea906Sjfb8856606 * 21d30ea906Sjfb8856606 */ 22d30ea906Sjfb8856606 23d30ea906Sjfb8856606 struct rte_eth_dev_callback; 24d30ea906Sjfb8856606 /** @internal Structure to keep track of registered callbacks */ 25d30ea906Sjfb8856606 TAILQ_HEAD(rte_eth_dev_cb_list, rte_eth_dev_callback); 26d30ea906Sjfb8856606 27d30ea906Sjfb8856606 struct rte_eth_dev; 28d30ea906Sjfb8856606 29d30ea906Sjfb8856606 typedef uint16_t (*eth_rx_burst_t)(void *rxq, 30d30ea906Sjfb8856606 struct rte_mbuf **rx_pkts, 31d30ea906Sjfb8856606 uint16_t nb_pkts); 32d30ea906Sjfb8856606 /**< @internal Retrieve input packets from a receive queue of an Ethernet device. */ 33d30ea906Sjfb8856606 34d30ea906Sjfb8856606 typedef uint16_t (*eth_tx_burst_t)(void *txq, 35d30ea906Sjfb8856606 struct rte_mbuf **tx_pkts, 36d30ea906Sjfb8856606 uint16_t nb_pkts); 37d30ea906Sjfb8856606 /**< @internal Send output packets on a transmit queue of an Ethernet device. */ 38d30ea906Sjfb8856606 39d30ea906Sjfb8856606 typedef uint16_t (*eth_tx_prep_t)(void *txq, 40d30ea906Sjfb8856606 struct rte_mbuf **tx_pkts, 41d30ea906Sjfb8856606 uint16_t nb_pkts); 42d30ea906Sjfb8856606 /**< @internal Prepare output packets on a transmit queue of an Ethernet device. */ 43d30ea906Sjfb8856606 44d30ea906Sjfb8856606 45*2d9fd380Sjfb8856606 typedef uint32_t (*eth_rx_queue_count_t)(struct rte_eth_dev *dev, 46*2d9fd380Sjfb8856606 uint16_t rx_queue_id); 47*2d9fd380Sjfb8856606 /**< @internal Get number of used descriptors on a receive queue. */ 48d30ea906Sjfb8856606 49*2d9fd380Sjfb8856606 typedef int (*eth_rx_descriptor_done_t)(void *rxq, uint16_t offset); 50*2d9fd380Sjfb8856606 /**< @internal Check DD bit of specific RX descriptor */ 51d30ea906Sjfb8856606 52*2d9fd380Sjfb8856606 typedef int (*eth_rx_descriptor_status_t)(void *rxq, uint16_t offset); 53*2d9fd380Sjfb8856606 /**< @internal Check the status of a Rx descriptor */ 54d30ea906Sjfb8856606 55*2d9fd380Sjfb8856606 typedef int (*eth_tx_descriptor_status_t)(void *txq, uint16_t offset); 56*2d9fd380Sjfb8856606 /**< @internal Check the status of a Tx descriptor */ 574418919fSjohnjiang 58d30ea906Sjfb8856606 59d30ea906Sjfb8856606 /** 60d30ea906Sjfb8856606 * @internal 61d30ea906Sjfb8856606 * Structure used to hold information about the callbacks to be called for a 62d30ea906Sjfb8856606 * queue on RX and TX. 63d30ea906Sjfb8856606 */ 64d30ea906Sjfb8856606 struct rte_eth_rxtx_callback { 65d30ea906Sjfb8856606 struct rte_eth_rxtx_callback *next; 66d30ea906Sjfb8856606 union{ 67d30ea906Sjfb8856606 rte_rx_callback_fn rx; 68d30ea906Sjfb8856606 rte_tx_callback_fn tx; 69d30ea906Sjfb8856606 } fn; 70d30ea906Sjfb8856606 void *param; 71d30ea906Sjfb8856606 }; 72d30ea906Sjfb8856606 73d30ea906Sjfb8856606 /** 74d30ea906Sjfb8856606 * @internal 75d30ea906Sjfb8856606 * The generic data structure associated with each ethernet device. 76d30ea906Sjfb8856606 * 77d30ea906Sjfb8856606 * Pointers to burst-oriented packet receive and transmit functions are 78d30ea906Sjfb8856606 * located at the beginning of the structure, along with the pointer to 79d30ea906Sjfb8856606 * where all the data elements for the particular device are stored in shared 80d30ea906Sjfb8856606 * memory. This split allows the function pointer and driver data to be per- 81d30ea906Sjfb8856606 * process, while the actual configuration data for the device is shared. 82d30ea906Sjfb8856606 */ 83d30ea906Sjfb8856606 struct rte_eth_dev { 84d30ea906Sjfb8856606 eth_rx_burst_t rx_pkt_burst; /**< Pointer to PMD receive function. */ 85d30ea906Sjfb8856606 eth_tx_burst_t tx_pkt_burst; /**< Pointer to PMD transmit function. */ 86d30ea906Sjfb8856606 eth_tx_prep_t tx_pkt_prepare; /**< Pointer to PMD transmit prepare function. */ 87*2d9fd380Sjfb8856606 88*2d9fd380Sjfb8856606 eth_rx_queue_count_t rx_queue_count; /**< Get the number of used RX descriptors. */ 89*2d9fd380Sjfb8856606 eth_rx_descriptor_done_t rx_descriptor_done; /**< Check rxd DD bit. */ 90*2d9fd380Sjfb8856606 eth_rx_descriptor_status_t rx_descriptor_status; /**< Check the status of a Rx descriptor. */ 91*2d9fd380Sjfb8856606 eth_tx_descriptor_status_t tx_descriptor_status; /**< Check the status of a Tx descriptor. */ 92*2d9fd380Sjfb8856606 93d30ea906Sjfb8856606 /** 94d30ea906Sjfb8856606 * Next two fields are per-device data but *data is shared between 95d30ea906Sjfb8856606 * primary and secondary processes and *process_private is per-process 96d30ea906Sjfb8856606 * private. The second one is managed by PMDs if necessary. 97d30ea906Sjfb8856606 */ 98d30ea906Sjfb8856606 struct rte_eth_dev_data *data; /**< Pointer to device data. */ 99d30ea906Sjfb8856606 void *process_private; /**< Pointer to per-process device data. */ 100d30ea906Sjfb8856606 const struct eth_dev_ops *dev_ops; /**< Functions exported by PMD */ 101d30ea906Sjfb8856606 struct rte_device *device; /**< Backing device */ 102d30ea906Sjfb8856606 struct rte_intr_handle *intr_handle; /**< Device interrupt handle */ 103d30ea906Sjfb8856606 /** User application callbacks for NIC interrupts */ 104d30ea906Sjfb8856606 struct rte_eth_dev_cb_list link_intr_cbs; 105d30ea906Sjfb8856606 /** 106d30ea906Sjfb8856606 * User-supplied functions called from rx_burst to post-process 107d30ea906Sjfb8856606 * received packets before passing them to the user 108d30ea906Sjfb8856606 */ 109d30ea906Sjfb8856606 struct rte_eth_rxtx_callback *post_rx_burst_cbs[RTE_MAX_QUEUES_PER_PORT]; 110d30ea906Sjfb8856606 /** 111d30ea906Sjfb8856606 * User-supplied functions called from tx_burst to pre-process 112d30ea906Sjfb8856606 * received packets before passing them to the driver for transmission. 113d30ea906Sjfb8856606 */ 114d30ea906Sjfb8856606 struct rte_eth_rxtx_callback *pre_tx_burst_cbs[RTE_MAX_QUEUES_PER_PORT]; 115d30ea906Sjfb8856606 enum rte_eth_dev_state state; /**< Flag indicating the port state */ 116d30ea906Sjfb8856606 void *security_ctx; /**< Context for security ops */ 1174418919fSjohnjiang 1184418919fSjohnjiang uint64_t reserved_64s[4]; /**< Reserved for future fields */ 1194418919fSjohnjiang void *reserved_ptrs[4]; /**< Reserved for future fields */ 120d30ea906Sjfb8856606 } __rte_cache_aligned; 121d30ea906Sjfb8856606 122d30ea906Sjfb8856606 struct rte_eth_dev_sriov; 123d30ea906Sjfb8856606 struct rte_eth_dev_owner; 124d30ea906Sjfb8856606 125d30ea906Sjfb8856606 /** 126d30ea906Sjfb8856606 * @internal 127d30ea906Sjfb8856606 * The data part, with no function pointers, associated with each ethernet device. 128d30ea906Sjfb8856606 * 129d30ea906Sjfb8856606 * This structure is safe to place in shared memory to be common among different 130d30ea906Sjfb8856606 * processes in a multi-process configuration. 131d30ea906Sjfb8856606 */ 132d30ea906Sjfb8856606 struct rte_eth_dev_data { 133d30ea906Sjfb8856606 char name[RTE_ETH_NAME_MAX_LEN]; /**< Unique identifier name */ 134d30ea906Sjfb8856606 135d30ea906Sjfb8856606 void **rx_queues; /**< Array of pointers to RX queues. */ 136d30ea906Sjfb8856606 void **tx_queues; /**< Array of pointers to TX queues. */ 137d30ea906Sjfb8856606 uint16_t nb_rx_queues; /**< Number of RX queues. */ 138d30ea906Sjfb8856606 uint16_t nb_tx_queues; /**< Number of TX queues. */ 139d30ea906Sjfb8856606 140d30ea906Sjfb8856606 struct rte_eth_dev_sriov sriov; /**< SRIOV data */ 141d30ea906Sjfb8856606 142d30ea906Sjfb8856606 void *dev_private; 143d30ea906Sjfb8856606 /**< PMD-specific private data. 144d30ea906Sjfb8856606 * @see rte_eth_dev_release_port() 145d30ea906Sjfb8856606 */ 146d30ea906Sjfb8856606 147d30ea906Sjfb8856606 struct rte_eth_link dev_link; /**< Link-level information & status. */ 148d30ea906Sjfb8856606 struct rte_eth_conf dev_conf; /**< Configuration applied to device. */ 149d30ea906Sjfb8856606 uint16_t mtu; /**< Maximum Transmission Unit. */ 150d30ea906Sjfb8856606 uint32_t min_rx_buf_size; 151d30ea906Sjfb8856606 /**< Common RX buffer size handled by all queues. */ 152d30ea906Sjfb8856606 153d30ea906Sjfb8856606 uint64_t rx_mbuf_alloc_failed; /**< RX ring mbuf allocation failures. */ 1544418919fSjohnjiang struct rte_ether_addr *mac_addrs; 155d30ea906Sjfb8856606 /**< Device Ethernet link address. 156d30ea906Sjfb8856606 * @see rte_eth_dev_release_port() 157d30ea906Sjfb8856606 */ 158d30ea906Sjfb8856606 uint64_t mac_pool_sel[ETH_NUM_RECEIVE_MAC_ADDR]; 159d30ea906Sjfb8856606 /**< Bitmap associating MAC addresses to pools. */ 1604418919fSjohnjiang struct rte_ether_addr *hash_mac_addrs; 161d30ea906Sjfb8856606 /**< Device Ethernet MAC addresses of hash filtering. 162d30ea906Sjfb8856606 * @see rte_eth_dev_release_port() 163d30ea906Sjfb8856606 */ 164d30ea906Sjfb8856606 uint16_t port_id; /**< Device [external] port identifier. */ 165d30ea906Sjfb8856606 166d30ea906Sjfb8856606 __extension__ 167d30ea906Sjfb8856606 uint8_t promiscuous : 1, /**< RX promiscuous mode ON(1) / OFF(0). */ 168d30ea906Sjfb8856606 scattered_rx : 1, /**< RX of scattered packets is ON(1) / OFF(0) */ 169d30ea906Sjfb8856606 all_multicast : 1, /**< RX all multicast mode ON(1) / OFF(0). */ 170d30ea906Sjfb8856606 dev_started : 1, /**< Device state: STARTED(1) / STOPPED(0). */ 171d30ea906Sjfb8856606 lro : 1; /**< RX LRO is ON(1) / OFF(0) */ 172d30ea906Sjfb8856606 uint8_t rx_queue_state[RTE_MAX_QUEUES_PER_PORT]; 1734418919fSjohnjiang /**< Queues state: HAIRPIN(2) / STARTED(1) / STOPPED(0). */ 174d30ea906Sjfb8856606 uint8_t tx_queue_state[RTE_MAX_QUEUES_PER_PORT]; 1754418919fSjohnjiang /**< Queues state: HAIRPIN(2) / STARTED(1) / STOPPED(0). */ 176d30ea906Sjfb8856606 uint32_t dev_flags; /**< Capabilities. */ 177d30ea906Sjfb8856606 int numa_node; /**< NUMA node connection. */ 178d30ea906Sjfb8856606 struct rte_vlan_filter_conf vlan_filter_conf; 179d30ea906Sjfb8856606 /**< VLAN filter configuration. */ 180d30ea906Sjfb8856606 struct rte_eth_dev_owner owner; /**< The port owner. */ 181d30ea906Sjfb8856606 uint16_t representor_id; 182d30ea906Sjfb8856606 /**< Switch-specific identifier. 183d30ea906Sjfb8856606 * Valid if RTE_ETH_DEV_REPRESENTOR in dev_flags. 184d30ea906Sjfb8856606 */ 1854418919fSjohnjiang 186*2d9fd380Sjfb8856606 pthread_mutex_t flow_ops_mutex; /**< rte_flow ops mutex. */ 1874418919fSjohnjiang uint64_t reserved_64s[4]; /**< Reserved for future fields */ 1884418919fSjohnjiang void *reserved_ptrs[4]; /**< Reserved for future fields */ 189d30ea906Sjfb8856606 } __rte_cache_aligned; 190d30ea906Sjfb8856606 191d30ea906Sjfb8856606 /** 192d30ea906Sjfb8856606 * @internal 193d30ea906Sjfb8856606 * The pool of *rte_eth_dev* structures. The size of the pool 194d30ea906Sjfb8856606 * is configured at compile-time in the <rte_ethdev.c> file. 195d30ea906Sjfb8856606 */ 196d30ea906Sjfb8856606 extern struct rte_eth_dev rte_eth_devices[]; 197d30ea906Sjfb8856606 198d30ea906Sjfb8856606 #endif /* _RTE_ETHDEV_CORE_H_ */ 199