1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2015 Intel Corporation 3 */ 4 5 #ifndef _RTE_ETH_CTRL_H_ 6 #define _RTE_ETH_CTRL_H_ 7 8 #include <stdint.h> 9 #include <rte_common.h> 10 #include <rte_ether.h> 11 #include "rte_flow.h" 12 13 /** 14 * @deprecated Please use rte_flow API instead of this legacy one. 15 * @file 16 * 17 * Ethernet device features and related data structures used 18 * by control APIs should be defined in this file. 19 */ 20 21 #ifdef __cplusplus 22 extern "C" { 23 #endif 24 25 /** 26 * Feature filter types 27 */ 28 enum rte_filter_type { 29 RTE_ETH_FILTER_NONE = 0, 30 RTE_ETH_FILTER_MACVLAN, 31 RTE_ETH_FILTER_ETHERTYPE, 32 RTE_ETH_FILTER_FLEXIBLE, 33 RTE_ETH_FILTER_SYN, 34 RTE_ETH_FILTER_NTUPLE, 35 RTE_ETH_FILTER_TUNNEL, 36 RTE_ETH_FILTER_FDIR, 37 RTE_ETH_FILTER_HASH, 38 RTE_ETH_FILTER_L2_TUNNEL, 39 RTE_ETH_FILTER_GENERIC, 40 RTE_ETH_FILTER_MAX 41 }; 42 43 /** 44 * Generic operations on filters 45 */ 46 enum rte_filter_op { 47 /** used to check whether the type filter is supported */ 48 RTE_ETH_FILTER_NOP = 0, 49 RTE_ETH_FILTER_ADD, /**< add filter entry */ 50 RTE_ETH_FILTER_UPDATE, /**< update filter entry */ 51 RTE_ETH_FILTER_DELETE, /**< delete filter entry */ 52 RTE_ETH_FILTER_FLUSH, /**< flush all entries */ 53 RTE_ETH_FILTER_GET, /**< get filter entry */ 54 RTE_ETH_FILTER_SET, /**< configurations */ 55 RTE_ETH_FILTER_INFO, /**< retrieve information */ 56 RTE_ETH_FILTER_STATS, /**< retrieve statistics */ 57 RTE_ETH_FILTER_OP_MAX 58 }; 59 60 /** 61 * MAC filter type 62 */ 63 enum rte_mac_filter_type { 64 RTE_MAC_PERFECT_MATCH = 1, /**< exact match of MAC addr. */ 65 RTE_MACVLAN_PERFECT_MATCH, /**< exact match of MAC addr and VLAN ID. */ 66 RTE_MAC_HASH_MATCH, /**< hash match of MAC addr. */ 67 /** hash match of MAC addr and exact match of VLAN ID. */ 68 RTE_MACVLAN_HASH_MATCH, 69 }; 70 71 /** 72 * MAC filter info 73 */ 74 struct rte_eth_mac_filter { 75 uint8_t is_vf; /**< 1 for VF, 0 for port dev */ 76 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/ 77 enum rte_mac_filter_type filter_type; /**< MAC filter type */ 78 struct rte_ether_addr mac_addr; 79 }; 80 81 /** 82 * Define all structures for Ethertype Filter type. 83 */ 84 85 #define RTE_ETHTYPE_FLAGS_MAC 0x0001 /**< If set, compare mac */ 86 #define RTE_ETHTYPE_FLAGS_DROP 0x0002 /**< If set, drop packet when match */ 87 88 /** 89 * A structure used to define the ethertype filter entry 90 * to support RTE_ETH_FILTER_ETHERTYPE with RTE_ETH_FILTER_ADD, 91 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations. 92 */ 93 struct rte_eth_ethertype_filter { 94 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 95 uint16_t ether_type; /**< Ether type to match */ 96 uint16_t flags; /**< Flags from RTE_ETHTYPE_FLAGS_* */ 97 uint16_t queue; /**< Queue assigned to when match*/ 98 }; 99 100 #define RTE_FLEX_FILTER_MAXLEN 128 /**< bytes to use in flex filter. */ 101 #define RTE_FLEX_FILTER_MASK_SIZE \ 102 (RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT) 103 /**< mask bytes in flex filter. */ 104 105 /** 106 * A structure used to define the flex filter entry 107 * to support RTE_ETH_FILTER_FLEXIBLE with RTE_ETH_FILTER_ADD, 108 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations. 109 */ 110 struct rte_eth_flex_filter { 111 uint16_t len; 112 uint8_t bytes[RTE_FLEX_FILTER_MAXLEN]; /**< flex bytes in big endian.*/ 113 uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE]; /**< if mask bit is 1b, do 114 not compare corresponding byte. */ 115 uint8_t priority; 116 uint16_t queue; /**< Queue assigned to when match. */ 117 }; 118 119 /** 120 * A structure used to define the TCP syn filter entry 121 * to support RTE_ETH_FILTER_SYN with RTE_ETH_FILTER_ADD, 122 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations. 123 */ 124 struct rte_eth_syn_filter { 125 uint8_t hig_pri; /**< 1 - higher priority than other filters, 126 0 - lower priority. */ 127 uint16_t queue; /**< Queue assigned to when match */ 128 }; 129 130 /** 131 * Define all structures for ntuple Filter type. 132 */ 133 134 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001 /**< If set, dst_ip is part of ntuple */ 135 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002 /**< If set, src_ip is part of ntuple */ 136 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004 /**< If set, dst_port is part of ntuple */ 137 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008 /**< If set, src_port is part of ntuple */ 138 #define RTE_NTUPLE_FLAGS_PROTO 0x0010 /**< If set, protocol is part of ntuple */ 139 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020 /**< If set, tcp flag is involved */ 140 141 #define RTE_5TUPLE_FLAGS ( \ 142 RTE_NTUPLE_FLAGS_DST_IP | \ 143 RTE_NTUPLE_FLAGS_SRC_IP | \ 144 RTE_NTUPLE_FLAGS_DST_PORT | \ 145 RTE_NTUPLE_FLAGS_SRC_PORT | \ 146 RTE_NTUPLE_FLAGS_PROTO) 147 148 #define RTE_2TUPLE_FLAGS ( \ 149 RTE_NTUPLE_FLAGS_DST_PORT | \ 150 RTE_NTUPLE_FLAGS_PROTO) 151 152 #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F /**< TCP flags filter can match. */ 153 154 /** 155 * A structure used to define the ntuple filter entry 156 * to support RTE_ETH_FILTER_NTUPLE with RTE_ETH_FILTER_ADD, 157 * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations. 158 */ 159 struct rte_eth_ntuple_filter { 160 uint16_t flags; /**< Flags from RTE_NTUPLE_FLAGS_* */ 161 uint32_t dst_ip; /**< Destination IP address in big endian. */ 162 uint32_t dst_ip_mask; /**< Mask of destination IP address. */ 163 uint32_t src_ip; /**< Source IP address in big endian. */ 164 uint32_t src_ip_mask; /**< Mask of destination IP address. */ 165 uint16_t dst_port; /**< Destination port in big endian. */ 166 uint16_t dst_port_mask; /**< Mask of destination port. */ 167 uint16_t src_port; /**< Source Port in big endian. */ 168 uint16_t src_port_mask; /**< Mask of source port. */ 169 uint8_t proto; /**< L4 protocol. */ 170 uint8_t proto_mask; /**< Mask of L4 protocol. */ 171 /** tcp_flags only meaningful when the proto is TCP. 172 The packet matched above ntuple fields and contain 173 any set bit in tcp_flags will hit this filter. */ 174 uint8_t tcp_flags; 175 uint16_t priority; /**< seven levels (001b-111b), 111b is highest, 176 used when more than one filter matches. */ 177 uint16_t queue; /**< Queue assigned to when match*/ 178 }; 179 180 /** 181 * filter type of tunneling packet 182 */ 183 #define ETH_TUNNEL_FILTER_OMAC 0x01 /**< filter by outer MAC addr */ 184 #define ETH_TUNNEL_FILTER_OIP 0x02 /**< filter by outer IP Addr */ 185 #define ETH_TUNNEL_FILTER_TENID 0x04 /**< filter by tenant ID */ 186 #define ETH_TUNNEL_FILTER_IMAC 0x08 /**< filter by inner MAC addr */ 187 #define ETH_TUNNEL_FILTER_IVLAN 0x10 /**< filter by inner VLAN ID */ 188 #define ETH_TUNNEL_FILTER_IIP 0x20 /**< filter by inner IP addr */ 189 190 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \ 191 ETH_TUNNEL_FILTER_IVLAN) 192 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \ 193 ETH_TUNNEL_FILTER_IVLAN | \ 194 ETH_TUNNEL_FILTER_TENID) 195 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \ 196 ETH_TUNNEL_FILTER_TENID) 197 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \ 198 ETH_TUNNEL_FILTER_TENID | \ 199 ETH_TUNNEL_FILTER_IMAC) 200 201 /** 202 * Select IPv4 or IPv6 for tunnel filters. 203 */ 204 enum rte_tunnel_iptype { 205 RTE_TUNNEL_IPTYPE_IPV4 = 0, /**< IPv4. */ 206 RTE_TUNNEL_IPTYPE_IPV6, /**< IPv6. */ 207 }; 208 209 /** 210 * Tunneling Packet filter configuration. 211 */ 212 struct rte_eth_tunnel_filter_conf { 213 struct rte_ether_addr outer_mac; /**< Outer MAC address to match. */ 214 struct rte_ether_addr inner_mac; /**< Inner MAC address to match. */ 215 uint16_t inner_vlan; /**< Inner VLAN to match. */ 216 enum rte_tunnel_iptype ip_type; /**< IP address type. */ 217 /** Outer destination IP address to match if ETH_TUNNEL_FILTER_OIP 218 is set in filter_type, or inner destination IP address to match 219 if ETH_TUNNEL_FILTER_IIP is set in filter_type . */ 220 union { 221 uint32_t ipv4_addr; /**< IPv4 address in big endian. */ 222 uint32_t ipv6_addr[4]; /**< IPv6 address in big endian. */ 223 } ip_addr; 224 /** Flags from ETH_TUNNEL_FILTER_XX - see above. */ 225 uint16_t filter_type; 226 enum rte_eth_tunnel_type tunnel_type; /**< Tunnel Type. */ 227 uint32_t tenant_id; /**< Tenant ID to match. VNI, GRE key... */ 228 uint16_t queue_id; /**< Queue assigned to if match. */ 229 }; 230 231 /** 232 * Global eth device configuration type. 233 */ 234 enum rte_eth_global_cfg_type { 235 RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0, 236 RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN, 237 RTE_ETH_GLOBAL_CFG_TYPE_MAX, 238 }; 239 240 /** 241 * Global eth device configuration. 242 */ 243 struct rte_eth_global_cfg { 244 enum rte_eth_global_cfg_type cfg_type; /**< Global config type. */ 245 union { 246 uint8_t gre_key_len; /**< Valid GRE key length in byte. */ 247 uint64_t reserved; /**< Reserve space for future use. */ 248 } cfg; 249 }; 250 251 #define RTE_ETH_FDIR_MAX_FLEXLEN 16 /**< Max length of flexbytes. */ 252 #define RTE_ETH_INSET_SIZE_MAX 128 /**< Max length of input set. */ 253 254 /** 255 * Input set fields for Flow Director and Hash filters 256 */ 257 enum rte_eth_input_set_field { 258 RTE_ETH_INPUT_SET_UNKNOWN = 0, 259 260 /* L2 */ 261 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1, 262 RTE_ETH_INPUT_SET_L2_DST_MAC, 263 RTE_ETH_INPUT_SET_L2_OUTER_VLAN, 264 RTE_ETH_INPUT_SET_L2_INNER_VLAN, 265 RTE_ETH_INPUT_SET_L2_ETHERTYPE, 266 267 /* L3 */ 268 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129, 269 RTE_ETH_INPUT_SET_L3_DST_IP4, 270 RTE_ETH_INPUT_SET_L3_SRC_IP6, 271 RTE_ETH_INPUT_SET_L3_DST_IP6, 272 RTE_ETH_INPUT_SET_L3_IP4_TOS, 273 RTE_ETH_INPUT_SET_L3_IP4_PROTO, 274 RTE_ETH_INPUT_SET_L3_IP6_TC, 275 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER, 276 RTE_ETH_INPUT_SET_L3_IP4_TTL, 277 RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS, 278 279 /* L4 */ 280 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257, 281 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT, 282 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT, 283 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT, 284 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT, 285 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT, 286 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG, 287 288 /* Tunnel */ 289 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385, 290 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC, 291 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN, 292 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY, 293 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY, 294 295 /* Flexible Payload */ 296 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641, 297 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD, 298 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD, 299 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD, 300 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD, 301 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD, 302 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD, 303 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD, 304 305 RTE_ETH_INPUT_SET_DEFAULT = 65533, 306 RTE_ETH_INPUT_SET_NONE = 65534, 307 RTE_ETH_INPUT_SET_MAX = 65535, 308 }; 309 310 /** 311 * Filters input set operations 312 */ 313 enum rte_filter_input_set_op { 314 RTE_ETH_INPUT_SET_OP_UNKNOWN, 315 RTE_ETH_INPUT_SET_SELECT, /**< select input set */ 316 RTE_ETH_INPUT_SET_ADD, /**< add input set entry */ 317 RTE_ETH_INPUT_SET_OP_MAX 318 }; 319 320 321 /** 322 * A structure used to define the input set configuration for 323 * flow director and hash filters 324 */ 325 struct rte_eth_input_set_conf { 326 uint16_t flow_type; 327 uint16_t inset_size; 328 enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX]; 329 enum rte_filter_input_set_op op; 330 }; 331 332 /** 333 * A structure used to define the input for L2 flow 334 */ 335 struct rte_eth_l2_flow { 336 uint16_t ether_type; /**< Ether type in big endian */ 337 }; 338 339 /** 340 * A structure used to define the input for IPV4 flow 341 */ 342 struct rte_eth_ipv4_flow { 343 uint32_t src_ip; /**< IPv4 source address in big endian. */ 344 uint32_t dst_ip; /**< IPv4 destination address in big endian. */ 345 uint8_t tos; /**< Type of service to match. */ 346 uint8_t ttl; /**< Time to live to match. */ 347 uint8_t proto; /**< Protocol, next header in big endian. */ 348 }; 349 350 /** 351 * A structure used to define the input for IPV4 UDP flow 352 */ 353 struct rte_eth_udpv4_flow { 354 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 355 uint16_t src_port; /**< UDP source port in big endian. */ 356 uint16_t dst_port; /**< UDP destination port in big endian. */ 357 }; 358 359 /** 360 * A structure used to define the input for IPV4 TCP flow 361 */ 362 struct rte_eth_tcpv4_flow { 363 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 364 uint16_t src_port; /**< TCP source port in big endian. */ 365 uint16_t dst_port; /**< TCP destination port in big endian. */ 366 }; 367 368 /** 369 * A structure used to define the input for IPV4 SCTP flow 370 */ 371 struct rte_eth_sctpv4_flow { 372 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */ 373 uint16_t src_port; /**< SCTP source port in big endian. */ 374 uint16_t dst_port; /**< SCTP destination port in big endian. */ 375 uint32_t verify_tag; /**< Verify tag in big endian */ 376 }; 377 378 /** 379 * A structure used to define the input for IPV6 flow 380 */ 381 struct rte_eth_ipv6_flow { 382 uint32_t src_ip[4]; /**< IPv6 source address in big endian. */ 383 uint32_t dst_ip[4]; /**< IPv6 destination address in big endian. */ 384 uint8_t tc; /**< Traffic class to match. */ 385 uint8_t proto; /**< Protocol, next header to match. */ 386 uint8_t hop_limits; /**< Hop limits to match. */ 387 }; 388 389 /** 390 * A structure used to define the input for IPV6 UDP flow 391 */ 392 struct rte_eth_udpv6_flow { 393 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 394 uint16_t src_port; /**< UDP source port in big endian. */ 395 uint16_t dst_port; /**< UDP destination port in big endian. */ 396 }; 397 398 /** 399 * A structure used to define the input for IPV6 TCP flow 400 */ 401 struct rte_eth_tcpv6_flow { 402 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 403 uint16_t src_port; /**< TCP source port to in big endian. */ 404 uint16_t dst_port; /**< TCP destination port in big endian. */ 405 }; 406 407 /** 408 * A structure used to define the input for IPV6 SCTP flow 409 */ 410 struct rte_eth_sctpv6_flow { 411 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */ 412 uint16_t src_port; /**< SCTP source port in big endian. */ 413 uint16_t dst_port; /**< SCTP destination port in big endian. */ 414 uint32_t verify_tag; /**< Verify tag in big endian. */ 415 }; 416 417 /** 418 * A structure used to define the input for MAC VLAN flow 419 */ 420 struct rte_eth_mac_vlan_flow { 421 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 422 }; 423 424 /** 425 * Tunnel type for flow director. 426 */ 427 enum rte_eth_fdir_tunnel_type { 428 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0, 429 RTE_FDIR_TUNNEL_TYPE_NVGRE, 430 RTE_FDIR_TUNNEL_TYPE_VXLAN, 431 }; 432 433 /** 434 * A structure used to define the input for tunnel flow, now it's VxLAN or 435 * NVGRE 436 */ 437 struct rte_eth_tunnel_flow { 438 enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */ 439 /** Tunnel ID to match. TNI, VNI... in big endian. */ 440 uint32_t tunnel_id; 441 struct rte_ether_addr mac_addr; /**< Mac address to match. */ 442 }; 443 444 /** 445 * An union contains the inputs for all types of flow 446 * Items in flows need to be in big endian 447 */ 448 union rte_eth_fdir_flow { 449 struct rte_eth_l2_flow l2_flow; 450 struct rte_eth_udpv4_flow udp4_flow; 451 struct rte_eth_tcpv4_flow tcp4_flow; 452 struct rte_eth_sctpv4_flow sctp4_flow; 453 struct rte_eth_ipv4_flow ip4_flow; 454 struct rte_eth_udpv6_flow udp6_flow; 455 struct rte_eth_tcpv6_flow tcp6_flow; 456 struct rte_eth_sctpv6_flow sctp6_flow; 457 struct rte_eth_ipv6_flow ipv6_flow; 458 struct rte_eth_mac_vlan_flow mac_vlan_flow; 459 struct rte_eth_tunnel_flow tunnel_flow; 460 }; 461 462 /** 463 * A structure used to contain extend input of flow 464 */ 465 struct rte_eth_fdir_flow_ext { 466 uint16_t vlan_tci; 467 uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN]; 468 /**< It is filled by the flexible payload to match. */ 469 uint8_t is_vf; /**< 1 for VF, 0 for port dev */ 470 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/ 471 }; 472 473 /** 474 * A structure used to define the input for a flow director filter entry 475 */ 476 struct rte_eth_fdir_input { 477 uint16_t flow_type; 478 union rte_eth_fdir_flow flow; 479 /**< Flow fields to match, dependent on flow_type */ 480 struct rte_eth_fdir_flow_ext flow_ext; 481 /**< Additional fields to match */ 482 }; 483 484 /** 485 * Behavior will be taken if FDIR match 486 */ 487 enum rte_eth_fdir_behavior { 488 RTE_ETH_FDIR_ACCEPT = 0, 489 RTE_ETH_FDIR_REJECT, 490 RTE_ETH_FDIR_PASSTHRU, 491 }; 492 493 /** 494 * Flow director report status 495 * It defines what will be reported if FDIR entry is matched. 496 */ 497 enum rte_eth_fdir_status { 498 RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */ 499 RTE_ETH_FDIR_REPORT_ID, /**< Only report FD ID. */ 500 RTE_ETH_FDIR_REPORT_ID_FLEX_4, /**< Report FD ID and 4 flex bytes. */ 501 RTE_ETH_FDIR_REPORT_FLEX_8, /**< Report 8 flex bytes. */ 502 }; 503 504 /** 505 * A structure used to define an action when match FDIR packet filter. 506 */ 507 struct rte_eth_fdir_action { 508 uint16_t rx_queue; /**< Queue assigned to if FDIR match. */ 509 enum rte_eth_fdir_behavior behavior; /**< Behavior will be taken */ 510 enum rte_eth_fdir_status report_status; /**< Status report option */ 511 uint8_t flex_off; 512 /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or 513 RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported 514 flex bytes start from in flexible payload. */ 515 }; 516 517 /** 518 * A structure used to define the flow director filter entry by filter_ctrl API 519 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and 520 * RTE_ETH_FILTER_DELETE operations. 521 */ 522 struct rte_eth_fdir_filter { 523 uint32_t soft_id; 524 /**< ID, an unique value is required when deal with FDIR entry */ 525 struct rte_eth_fdir_input input; /**< Input set */ 526 struct rte_eth_fdir_action action; /**< Action taken when match */ 527 }; 528 529 /** 530 * A structure used to configure FDIR masks that are used by the device 531 * to match the various fields of RX packet headers. 532 */ 533 struct rte_eth_fdir_masks { 534 uint16_t vlan_tci_mask; /**< Bit mask for vlan_tci in big endian */ 535 /** Bit mask for ipv4 flow in big endian. */ 536 struct rte_eth_ipv4_flow ipv4_mask; 537 /** Bit mask for ipv6 flow in big endian. */ 538 struct rte_eth_ipv6_flow ipv6_mask; 539 /** Bit mask for L4 source port in big endian. */ 540 uint16_t src_port_mask; 541 /** Bit mask for L4 destination port in big endian. */ 542 uint16_t dst_port_mask; 543 /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the 544 first byte on the wire */ 545 uint8_t mac_addr_byte_mask; 546 /** Bit mask for tunnel ID in big endian. */ 547 uint32_t tunnel_id_mask; 548 uint8_t tunnel_type_mask; /**< 1 - Match tunnel type, 549 0 - Ignore tunnel type. */ 550 }; 551 552 /** 553 * Payload type 554 */ 555 enum rte_eth_payload_type { 556 RTE_ETH_PAYLOAD_UNKNOWN = 0, 557 RTE_ETH_RAW_PAYLOAD, 558 RTE_ETH_L2_PAYLOAD, 559 RTE_ETH_L3_PAYLOAD, 560 RTE_ETH_L4_PAYLOAD, 561 RTE_ETH_PAYLOAD_MAX = 8, 562 }; 563 564 /** 565 * A structure used to select bytes extracted from the protocol layers to 566 * flexible payload for filter 567 */ 568 struct rte_eth_flex_payload_cfg { 569 enum rte_eth_payload_type type; /**< Payload type */ 570 uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN]; 571 /**< Offset in bytes from the beginning of packet's payload 572 src_offset[i] indicates the flexbyte i's offset in original 573 packet payload. This value should be less than 574 flex_payload_limit in struct rte_eth_fdir_info.*/ 575 }; 576 577 /** 578 * A structure used to define FDIR masks for flexible payload 579 * for each flow type 580 */ 581 struct rte_eth_fdir_flex_mask { 582 uint16_t flow_type; 583 uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN]; 584 /**< Mask for the whole flexible payload */ 585 }; 586 587 /** 588 * A structure used to define all flexible payload related setting 589 * include flex payload and flex mask 590 */ 591 struct rte_eth_fdir_flex_conf { 592 uint16_t nb_payloads; /**< The number of following payload cfg */ 593 uint16_t nb_flexmasks; /**< The number of following mask */ 594 struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX]; 595 /**< Flex payload configuration for each payload type */ 596 struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX]; 597 /**< Flex mask configuration for each flow type */ 598 }; 599 600 /** 601 * Flow Director setting modes: none, signature or perfect. 602 */ 603 enum rte_fdir_mode { 604 RTE_FDIR_MODE_NONE = 0, /**< Disable FDIR support. */ 605 RTE_FDIR_MODE_SIGNATURE, /**< Enable FDIR signature filter mode. */ 606 RTE_FDIR_MODE_PERFECT, /**< Enable FDIR perfect filter mode. */ 607 RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */ 608 RTE_FDIR_MODE_PERFECT_TUNNEL, /**< Enable FDIR filter mode - tunnel. */ 609 }; 610 611 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t)) 612 #define RTE_FLOW_MASK_ARRAY_SIZE \ 613 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) 614 615 /** 616 * A structure used to get the information of flow director filter. 617 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation. 618 * It includes the mode, flexible payload configuration information, 619 * capabilities and supported flow types, flexible payload characters. 620 * It can be gotten to help taking specific configurations per device. 621 */ 622 struct rte_eth_fdir_info { 623 enum rte_fdir_mode mode; /**< Flow director mode */ 624 struct rte_eth_fdir_masks mask; 625 /** Flex payload configuration information */ 626 struct rte_eth_fdir_flex_conf flex_conf; 627 uint32_t guarant_spc; /**< Guaranteed spaces.*/ 628 uint32_t best_spc; /**< Best effort spaces.*/ 629 /** Bit mask for every supported flow type. */ 630 uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]; 631 uint32_t max_flexpayload; /**< Total flex payload in bytes. */ 632 /** Flexible payload unit in bytes. Size and alignments of all flex 633 payload segments should be multiplies of this value. */ 634 uint32_t flex_payload_unit; 635 /** Max number of flexible payload continuous segments. 636 Each segment should be a multiple of flex_payload_unit.*/ 637 uint32_t max_flex_payload_segment_num; 638 /** Maximum src_offset in bytes allowed. It indicates that 639 src_offset[i] in struct rte_eth_flex_payload_cfg should be less 640 than this value. */ 641 uint16_t flex_payload_limit; 642 /** Flex bitmask unit in bytes. Size of flex bitmasks should be a 643 multiply of this value. */ 644 uint32_t flex_bitmask_unit; 645 /** Max supported size of flex bitmasks in flex_bitmask_unit */ 646 uint32_t max_flex_bitmask_num; 647 }; 648 649 /** 650 * A structure used to define the statistics of flow director. 651 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation. 652 */ 653 struct rte_eth_fdir_stats { 654 uint32_t collision; /**< Number of filters with collision. */ 655 uint32_t free; /**< Number of free filters. */ 656 uint32_t maxhash; 657 /**< The lookup hash value of the added filter that updated the value 658 of the MAXLEN field */ 659 uint32_t maxlen; /**< Longest linked list of filters. */ 660 uint64_t add; /**< Number of added filters. */ 661 uint64_t remove; /**< Number of removed filters. */ 662 uint64_t f_add; /**< Number of failed added filters. */ 663 uint64_t f_remove; /**< Number of failed removed filters. */ 664 uint32_t guarant_cnt; /**< Number of filters in guaranteed spaces. */ 665 uint32_t best_cnt; /**< Number of filters in best effort spaces. */ 666 }; 667 668 /** 669 * Flow Director filter information types. 670 */ 671 enum rte_eth_fdir_filter_info_type { 672 RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0, 673 /** Flow Director filter input set configuration */ 674 RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT, 675 RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX, 676 }; 677 678 /** 679 * A structure used to set FDIR filter information, to support filter type 680 * of 'RTE_ETH_FILTER_FDIR' RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT operation. 681 */ 682 struct rte_eth_fdir_filter_info { 683 enum rte_eth_fdir_filter_info_type info_type; /**< Information type */ 684 /** Details of fdir filter information */ 685 union { 686 /** Flow Director input set configuration per port */ 687 struct rte_eth_input_set_conf input_set_conf; 688 } info; 689 }; 690 691 /** 692 * Hash filter information types. 693 * - RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT is for getting/setting the 694 * information/configuration of 'symmetric hash enable' per port. 695 * - RTE_ETH_HASH_FILTER_GLOBAL_CONFIG is for getting/setting the global 696 * configurations of hash filters. Those global configurations are valid 697 * for all ports of the same NIC. 698 * - RTE_ETH_HASH_FILTER_INPUT_SET_SELECT is for setting the global 699 * hash input set fields 700 */ 701 enum rte_eth_hash_filter_info_type { 702 RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0, 703 /** Symmetric hash enable per port */ 704 RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT, 705 /** Configure globally for hash filter */ 706 RTE_ETH_HASH_FILTER_GLOBAL_CONFIG, 707 /** Global Hash filter input set configuration */ 708 RTE_ETH_HASH_FILTER_INPUT_SET_SELECT, 709 RTE_ETH_HASH_FILTER_INFO_TYPE_MAX, 710 }; 711 712 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \ 713 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) 714 /** 715 * A structure used to set or get global hash function configurations which 716 * include symmetric hash enable per flow type and hash function type. 717 * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of the 718 * corresponding flow type is enabled or not. 719 * Each bit in valid_bit_mask[] indicates if the corresponding bit in 720 * sym_hash_enable_mask[] is valid or not. For the configurations gotten, it 721 * also means if the flow type is supported by hardware or not. 722 */ 723 struct rte_eth_hash_global_conf { 724 enum rte_eth_hash_function hash_func; /**< Hash function type */ 725 /** Bit mask for symmetric hash enable per flow type */ 726 uint64_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; 727 /** Bit mask indicates if the corresponding bit is valid */ 728 uint64_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; 729 }; 730 731 /** 732 * A structure used to set or get hash filter information, to support filter 733 * type of 'RTE_ETH_FILTER_HASH' and its operations. 734 */ 735 struct rte_eth_hash_filter_info { 736 enum rte_eth_hash_filter_info_type info_type; /**< Information type */ 737 /** Details of hash filter information */ 738 union { 739 /** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */ 740 uint8_t enable; 741 /** Global configurations of hash filter */ 742 struct rte_eth_hash_global_conf global_conf; 743 /** Global configurations of hash filter input set */ 744 struct rte_eth_input_set_conf input_set_conf; 745 } info; 746 }; 747 748 /** 749 * l2 tunnel configuration. 750 */ 751 struct rte_eth_l2_tunnel_conf { 752 enum rte_eth_tunnel_type l2_tunnel_type; 753 uint16_t ether_type; /* ether type in l2 header */ 754 uint32_t tunnel_id; /* port tag id for e-tag */ 755 uint16_t vf_id; /* VF id for tag insertion */ 756 uint32_t pool; /* destination pool for tag based forwarding */ 757 }; 758 759 #ifdef __cplusplus 760 } 761 #endif 762 763 #endif /* _RTE_ETH_CTRL_H_ */ 764