1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2015 Intel Corporation
3  */
4 
5 #ifndef _RTE_ETH_CTRL_H_
6 #define _RTE_ETH_CTRL_H_
7 
8 #include <stdint.h>
9 #include <rte_common.h>
10 #include "rte_ether.h"
11 
12 /**
13  * @file
14  *
15  * Ethernet device features and related data structures used
16  * by control APIs should be defined in this file.
17  *
18  */
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
24 /*
25  * A packet can be identified by hardware as different flow types. Different
26  * NIC hardwares may support different flow types.
27  * Basically, the NIC hardware identifies the flow type as deep protocol as
28  * possible, and exclusively. For example, if a packet is identified as
29  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
30  * though it is an actual IPV4 packet.
31  * Note that the flow types are used to define RSS offload types in
32  * rte_ethdev.h.
33  */
34 #define RTE_ETH_FLOW_UNKNOWN             0
35 #define RTE_ETH_FLOW_RAW                 1
36 #define RTE_ETH_FLOW_IPV4                2
37 #define RTE_ETH_FLOW_FRAG_IPV4           3
38 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP    4
39 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP    5
40 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP   6
41 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER  7
42 #define RTE_ETH_FLOW_IPV6                8
43 #define RTE_ETH_FLOW_FRAG_IPV6           9
44 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP   10
45 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP   11
46 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP  12
47 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
48 #define RTE_ETH_FLOW_L2_PAYLOAD         14
49 #define RTE_ETH_FLOW_IPV6_EX            15
50 #define RTE_ETH_FLOW_IPV6_TCP_EX        16
51 #define RTE_ETH_FLOW_IPV6_UDP_EX        17
52 #define RTE_ETH_FLOW_PORT               18
53 	/**< Consider device port number as a flow differentiator */
54 #define RTE_ETH_FLOW_VXLAN              19 /**< VXLAN protocol based flow */
55 #define RTE_ETH_FLOW_GENEVE             20 /**< GENEVE protocol based flow */
56 #define RTE_ETH_FLOW_NVGRE              21 /**< NVGRE protocol based flow */
57 #define RTE_ETH_FLOW_VXLAN_GPE          22 /**< VXLAN-GPE protocol based flow */
58 #define RTE_ETH_FLOW_MAX                23
59 
60 /**
61  * Feature filter types
62  */
63 enum rte_filter_type {
64 	RTE_ETH_FILTER_NONE = 0,
65 	RTE_ETH_FILTER_MACVLAN,
66 	RTE_ETH_FILTER_ETHERTYPE,
67 	RTE_ETH_FILTER_FLEXIBLE,
68 	RTE_ETH_FILTER_SYN,
69 	RTE_ETH_FILTER_NTUPLE,
70 	RTE_ETH_FILTER_TUNNEL,
71 	RTE_ETH_FILTER_FDIR,
72 	RTE_ETH_FILTER_HASH,
73 	RTE_ETH_FILTER_L2_TUNNEL,
74 	RTE_ETH_FILTER_GENERIC,
75 	RTE_ETH_FILTER_MAX
76 };
77 
78 /**
79  * Generic operations on filters
80  */
81 enum rte_filter_op {
82 	/** used to check whether the type filter is supported */
83 	RTE_ETH_FILTER_NOP = 0,
84 	RTE_ETH_FILTER_ADD,      /**< add filter entry */
85 	RTE_ETH_FILTER_UPDATE,   /**< update filter entry */
86 	RTE_ETH_FILTER_DELETE,   /**< delete filter entry */
87 	RTE_ETH_FILTER_FLUSH,    /**< flush all entries */
88 	RTE_ETH_FILTER_GET,      /**< get filter entry */
89 	RTE_ETH_FILTER_SET,      /**< configurations */
90 	RTE_ETH_FILTER_INFO,     /**< retrieve information */
91 	RTE_ETH_FILTER_STATS,    /**< retrieve statistics */
92 	RTE_ETH_FILTER_OP_MAX
93 };
94 
95 /**
96  * MAC filter type
97  */
98 enum rte_mac_filter_type {
99 	RTE_MAC_PERFECT_MATCH = 1, /**< exact match of MAC addr. */
100 	RTE_MACVLAN_PERFECT_MATCH, /**< exact match of MAC addr and VLAN ID. */
101 	RTE_MAC_HASH_MATCH, /**< hash match of MAC addr. */
102 	/** hash match of MAC addr and exact match of VLAN ID. */
103 	RTE_MACVLAN_HASH_MATCH,
104 };
105 
106 /**
107  * MAC filter info
108  */
109 struct rte_eth_mac_filter {
110 	uint8_t is_vf; /**< 1 for VF, 0 for port dev */
111 	uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
112 	enum rte_mac_filter_type filter_type; /**< MAC filter type */
113 	struct ether_addr mac_addr;
114 };
115 
116 /**
117  * Define all structures for Ethertype Filter type.
118  */
119 
120 #define RTE_ETHTYPE_FLAGS_MAC    0x0001 /**< If set, compare mac */
121 #define RTE_ETHTYPE_FLAGS_DROP   0x0002 /**< If set, drop packet when match */
122 
123 /**
124  * A structure used to define the ethertype filter entry
125  * to support RTE_ETH_FILTER_ETHERTYPE with RTE_ETH_FILTER_ADD,
126  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
127  */
128 struct rte_eth_ethertype_filter {
129 	struct ether_addr mac_addr;   /**< Mac address to match. */
130 	uint16_t ether_type;          /**< Ether type to match */
131 	uint16_t flags;               /**< Flags from RTE_ETHTYPE_FLAGS_* */
132 	uint16_t queue;               /**< Queue assigned to when match*/
133 };
134 
135 #define RTE_FLEX_FILTER_MAXLEN	128	/**< bytes to use in flex filter. */
136 #define RTE_FLEX_FILTER_MASK_SIZE	\
137 	(RTE_ALIGN(RTE_FLEX_FILTER_MAXLEN, CHAR_BIT) / CHAR_BIT)
138 					/**< mask bytes in flex filter. */
139 
140 /**
141  *  A structure used to define the flex filter entry
142  *  to support RTE_ETH_FILTER_FLEXIBLE with RTE_ETH_FILTER_ADD,
143  *  RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
144  */
145 struct rte_eth_flex_filter {
146 	uint16_t len;
147 	uint8_t bytes[RTE_FLEX_FILTER_MAXLEN];  /**< flex bytes in big endian.*/
148 	uint8_t mask[RTE_FLEX_FILTER_MASK_SIZE];    /**< if mask bit is 1b, do
149 					not compare corresponding byte. */
150 	uint8_t priority;
151 	uint16_t queue;       /**< Queue assigned to when match. */
152 };
153 
154 /**
155  * A structure used to define the TCP syn filter entry
156  * to support RTE_ETH_FILTER_SYN with RTE_ETH_FILTER_ADD,
157  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
158  */
159 struct rte_eth_syn_filter {
160 	uint8_t hig_pri;     /**< 1 - higher priority than other filters,
161 				  0 - lower priority. */
162 	uint16_t queue;      /**< Queue assigned to when match */
163 };
164 
165 /**
166  * Define all structures for ntuple Filter type.
167  */
168 
169 #define RTE_NTUPLE_FLAGS_DST_IP    0x0001 /**< If set, dst_ip is part of ntuple */
170 #define RTE_NTUPLE_FLAGS_SRC_IP    0x0002 /**< If set, src_ip is part of ntuple */
171 #define RTE_NTUPLE_FLAGS_DST_PORT  0x0004 /**< If set, dst_port is part of ntuple */
172 #define RTE_NTUPLE_FLAGS_SRC_PORT  0x0008 /**< If set, src_port is part of ntuple */
173 #define RTE_NTUPLE_FLAGS_PROTO     0x0010 /**< If set, protocol is part of ntuple */
174 #define RTE_NTUPLE_FLAGS_TCP_FLAG  0x0020 /**< If set, tcp flag is involved */
175 
176 #define RTE_5TUPLE_FLAGS ( \
177 		RTE_NTUPLE_FLAGS_DST_IP | \
178 		RTE_NTUPLE_FLAGS_SRC_IP | \
179 		RTE_NTUPLE_FLAGS_DST_PORT | \
180 		RTE_NTUPLE_FLAGS_SRC_PORT | \
181 		RTE_NTUPLE_FLAGS_PROTO)
182 
183 #define RTE_2TUPLE_FLAGS ( \
184 		RTE_NTUPLE_FLAGS_DST_PORT | \
185 		RTE_NTUPLE_FLAGS_PROTO)
186 
187 #define TCP_URG_FLAG 0x20
188 #define TCP_ACK_FLAG 0x10
189 #define TCP_PSH_FLAG 0x08
190 #define TCP_RST_FLAG 0x04
191 #define TCP_SYN_FLAG 0x02
192 #define TCP_FIN_FLAG 0x01
193 #define TCP_FLAG_ALL 0x3F
194 
195 /**
196  * A structure used to define the ntuple filter entry
197  * to support RTE_ETH_FILTER_NTUPLE with RTE_ETH_FILTER_ADD,
198  * RTE_ETH_FILTER_DELETE and RTE_ETH_FILTER_GET operations.
199  */
200 struct rte_eth_ntuple_filter {
201 	uint16_t flags;          /**< Flags from RTE_NTUPLE_FLAGS_* */
202 	uint32_t dst_ip;         /**< Destination IP address in big endian. */
203 	uint32_t dst_ip_mask;    /**< Mask of destination IP address. */
204 	uint32_t src_ip;         /**< Source IP address in big endian. */
205 	uint32_t src_ip_mask;    /**< Mask of destination IP address. */
206 	uint16_t dst_port;       /**< Destination port in big endian. */
207 	uint16_t dst_port_mask;  /**< Mask of destination port. */
208 	uint16_t src_port;       /**< Source Port in big endian. */
209 	uint16_t src_port_mask;  /**< Mask of source port. */
210 	uint8_t proto;           /**< L4 protocol. */
211 	uint8_t proto_mask;      /**< Mask of L4 protocol. */
212 	/** tcp_flags only meaningful when the proto is TCP.
213 	    The packet matched above ntuple fields and contain
214 	    any set bit in tcp_flags will hit this filter. */
215 	uint8_t tcp_flags;
216 	uint16_t priority;       /**< seven levels (001b-111b), 111b is highest,
217 				      used when more than one filter matches. */
218 	uint16_t queue;          /**< Queue assigned to when match*/
219 };
220 
221 /**
222  * Tunneled type.
223  */
224 enum rte_eth_tunnel_type {
225 	RTE_TUNNEL_TYPE_NONE = 0,
226 	RTE_TUNNEL_TYPE_VXLAN,
227 	RTE_TUNNEL_TYPE_GENEVE,
228 	RTE_TUNNEL_TYPE_TEREDO,
229 	RTE_TUNNEL_TYPE_NVGRE,
230 	RTE_TUNNEL_TYPE_IP_IN_GRE,
231 	RTE_L2_TUNNEL_TYPE_E_TAG,
232 	RTE_TUNNEL_TYPE_MAX,
233 };
234 
235 /**
236  * filter type of tunneling packet
237  */
238 #define ETH_TUNNEL_FILTER_OMAC  0x01 /**< filter by outer MAC addr */
239 #define ETH_TUNNEL_FILTER_OIP   0x02 /**< filter by outer IP Addr */
240 #define ETH_TUNNEL_FILTER_TENID 0x04 /**< filter by tenant ID */
241 #define ETH_TUNNEL_FILTER_IMAC  0x08 /**< filter by inner MAC addr */
242 #define ETH_TUNNEL_FILTER_IVLAN 0x10 /**< filter by inner VLAN ID */
243 #define ETH_TUNNEL_FILTER_IIP   0x20 /**< filter by inner IP addr */
244 
245 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
246 					ETH_TUNNEL_FILTER_IVLAN)
247 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
248 					ETH_TUNNEL_FILTER_IVLAN | \
249 					ETH_TUNNEL_FILTER_TENID)
250 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
251 					ETH_TUNNEL_FILTER_TENID)
252 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
253 					ETH_TUNNEL_FILTER_TENID | \
254 					ETH_TUNNEL_FILTER_IMAC)
255 
256 /**
257  *  Select IPv4 or IPv6 for tunnel filters.
258  */
259 enum rte_tunnel_iptype {
260 	RTE_TUNNEL_IPTYPE_IPV4 = 0, /**< IPv4. */
261 	RTE_TUNNEL_IPTYPE_IPV6,     /**< IPv6. */
262 };
263 
264 /**
265  * Tunneling Packet filter configuration.
266  */
267 struct rte_eth_tunnel_filter_conf {
268 	struct ether_addr outer_mac;    /**< Outer MAC address to match. */
269 	struct ether_addr inner_mac;    /**< Inner MAC address to match. */
270 	uint16_t inner_vlan;            /**< Inner VLAN to match. */
271 	enum rte_tunnel_iptype ip_type; /**< IP address type. */
272 	/** Outer destination IP address to match if ETH_TUNNEL_FILTER_OIP
273 	    is set in filter_type, or inner destination IP address to match
274 	    if ETH_TUNNEL_FILTER_IIP is set in filter_type . */
275 	union {
276 		uint32_t ipv4_addr;     /**< IPv4 address in big endian. */
277 		uint32_t ipv6_addr[4];  /**< IPv6 address in big endian. */
278 	} ip_addr;
279 	/** Flags from ETH_TUNNEL_FILTER_XX - see above. */
280 	uint16_t filter_type;
281 	enum rte_eth_tunnel_type tunnel_type; /**< Tunnel Type. */
282 	uint32_t tenant_id;     /**< Tenant ID to match. VNI, GRE key... */
283 	uint16_t queue_id;      /**< Queue assigned to if match. */
284 };
285 
286 /**
287  * Global eth device configuration type.
288  */
289 enum rte_eth_global_cfg_type {
290 	RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
291 	RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
292 	RTE_ETH_GLOBAL_CFG_TYPE_MAX,
293 };
294 
295 /**
296  * Global eth device configuration.
297  */
298 struct rte_eth_global_cfg {
299 	enum rte_eth_global_cfg_type cfg_type; /**< Global config type. */
300 	union {
301 		uint8_t gre_key_len; /**< Valid GRE key length in byte. */
302 		uint64_t reserved; /**< Reserve space for future use. */
303 	} cfg;
304 };
305 
306 #define RTE_ETH_FDIR_MAX_FLEXLEN 16  /**< Max length of flexbytes. */
307 #define RTE_ETH_INSET_SIZE_MAX   128 /**< Max length of input set. */
308 
309 /**
310  * Input set fields for Flow Director and Hash filters
311  */
312 enum rte_eth_input_set_field {
313 	RTE_ETH_INPUT_SET_UNKNOWN = 0,
314 
315 	/* L2 */
316 	RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
317 	RTE_ETH_INPUT_SET_L2_DST_MAC,
318 	RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
319 	RTE_ETH_INPUT_SET_L2_INNER_VLAN,
320 	RTE_ETH_INPUT_SET_L2_ETHERTYPE,
321 
322 	/* L3 */
323 	RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
324 	RTE_ETH_INPUT_SET_L3_DST_IP4,
325 	RTE_ETH_INPUT_SET_L3_SRC_IP6,
326 	RTE_ETH_INPUT_SET_L3_DST_IP6,
327 	RTE_ETH_INPUT_SET_L3_IP4_TOS,
328 	RTE_ETH_INPUT_SET_L3_IP4_PROTO,
329 	RTE_ETH_INPUT_SET_L3_IP6_TC,
330 	RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
331 	RTE_ETH_INPUT_SET_L3_IP4_TTL,
332 	RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
333 
334 	/* L4 */
335 	RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
336 	RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
337 	RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
338 	RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
339 	RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
340 	RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
341 	RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
342 
343 	/* Tunnel */
344 	RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
345 	RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
346 	RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
347 	RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
348 	RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
349 
350 	/* Flexible Payload */
351 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
352 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
353 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
354 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
355 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
356 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
357 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
358 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
359 
360 	RTE_ETH_INPUT_SET_DEFAULT = 65533,
361 	RTE_ETH_INPUT_SET_NONE = 65534,
362 	RTE_ETH_INPUT_SET_MAX = 65535,
363 };
364 
365 /**
366  * Filters input set operations
367  */
368 enum rte_filter_input_set_op {
369 	RTE_ETH_INPUT_SET_OP_UNKNOWN,
370 	RTE_ETH_INPUT_SET_SELECT, /**< select input set */
371 	RTE_ETH_INPUT_SET_ADD,    /**< add input set entry */
372 	RTE_ETH_INPUT_SET_OP_MAX
373 };
374 
375 
376 /**
377  * A structure used to define the input set configuration for
378  * flow director and hash filters
379  */
380 struct rte_eth_input_set_conf {
381 	uint16_t flow_type;
382 	uint16_t inset_size;
383 	enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
384 	enum rte_filter_input_set_op op;
385 };
386 
387 /**
388  * A structure used to define the input for L2 flow
389  */
390 struct rte_eth_l2_flow {
391 	uint16_t ether_type;          /**< Ether type in big endian */
392 };
393 
394 /**
395  * A structure used to define the input for IPV4 flow
396  */
397 struct rte_eth_ipv4_flow {
398 	uint32_t src_ip;      /**< IPv4 source address in big endian. */
399 	uint32_t dst_ip;      /**< IPv4 destination address in big endian. */
400 	uint8_t  tos;         /**< Type of service to match. */
401 	uint8_t  ttl;         /**< Time to live to match. */
402 	uint8_t  proto;       /**< Protocol, next header in big endian. */
403 };
404 
405 /**
406  * A structure used to define the input for IPV4 UDP flow
407  */
408 struct rte_eth_udpv4_flow {
409 	struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
410 	uint16_t src_port;           /**< UDP source port in big endian. */
411 	uint16_t dst_port;           /**< UDP destination port in big endian. */
412 };
413 
414 /**
415  * A structure used to define the input for IPV4 TCP flow
416  */
417 struct rte_eth_tcpv4_flow {
418 	struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
419 	uint16_t src_port;           /**< TCP source port in big endian. */
420 	uint16_t dst_port;           /**< TCP destination port in big endian. */
421 };
422 
423 /**
424  * A structure used to define the input for IPV4 SCTP flow
425  */
426 struct rte_eth_sctpv4_flow {
427 	struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
428 	uint16_t src_port;           /**< SCTP source port in big endian. */
429 	uint16_t dst_port;           /**< SCTP destination port in big endian. */
430 	uint32_t verify_tag;         /**< Verify tag in big endian */
431 };
432 
433 /**
434  * A structure used to define the input for IPV6 flow
435  */
436 struct rte_eth_ipv6_flow {
437 	uint32_t src_ip[4];      /**< IPv6 source address in big endian. */
438 	uint32_t dst_ip[4];      /**< IPv6 destination address in big endian. */
439 	uint8_t  tc;             /**< Traffic class to match. */
440 	uint8_t  proto;          /**< Protocol, next header to match. */
441 	uint8_t  hop_limits;     /**< Hop limits to match. */
442 };
443 
444 /**
445  * A structure used to define the input for IPV6 UDP flow
446  */
447 struct rte_eth_udpv6_flow {
448 	struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
449 	uint16_t src_port;           /**< UDP source port in big endian. */
450 	uint16_t dst_port;           /**< UDP destination port in big endian. */
451 };
452 
453 /**
454  * A structure used to define the input for IPV6 TCP flow
455  */
456 struct rte_eth_tcpv6_flow {
457 	struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
458 	uint16_t src_port;           /**< TCP source port to in big endian. */
459 	uint16_t dst_port;           /**< TCP destination port in big endian. */
460 };
461 
462 /**
463  * A structure used to define the input for IPV6 SCTP flow
464  */
465 struct rte_eth_sctpv6_flow {
466 	struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
467 	uint16_t src_port;           /**< SCTP source port in big endian. */
468 	uint16_t dst_port;           /**< SCTP destination port in big endian. */
469 	uint32_t verify_tag;         /**< Verify tag in big endian. */
470 };
471 
472 /**
473  * A structure used to define the input for MAC VLAN flow
474  */
475 struct rte_eth_mac_vlan_flow {
476 	struct ether_addr mac_addr;  /**< Mac address to match. */
477 };
478 
479 /**
480  * Tunnel type for flow director.
481  */
482 enum rte_eth_fdir_tunnel_type {
483 	RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
484 	RTE_FDIR_TUNNEL_TYPE_NVGRE,
485 	RTE_FDIR_TUNNEL_TYPE_VXLAN,
486 };
487 
488 /**
489  * A structure used to define the input for tunnel flow, now it's VxLAN or
490  * NVGRE
491  */
492 struct rte_eth_tunnel_flow {
493 	enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */
494 	/** Tunnel ID to match. TNI, VNI... in big endian. */
495 	uint32_t tunnel_id;
496 	struct ether_addr mac_addr;                /**< Mac address to match. */
497 };
498 
499 /**
500  * An union contains the inputs for all types of flow
501  * Items in flows need to be in big endian
502  */
503 union rte_eth_fdir_flow {
504 	struct rte_eth_l2_flow     l2_flow;
505 	struct rte_eth_udpv4_flow  udp4_flow;
506 	struct rte_eth_tcpv4_flow  tcp4_flow;
507 	struct rte_eth_sctpv4_flow sctp4_flow;
508 	struct rte_eth_ipv4_flow   ip4_flow;
509 	struct rte_eth_udpv6_flow  udp6_flow;
510 	struct rte_eth_tcpv6_flow  tcp6_flow;
511 	struct rte_eth_sctpv6_flow sctp6_flow;
512 	struct rte_eth_ipv6_flow   ipv6_flow;
513 	struct rte_eth_mac_vlan_flow mac_vlan_flow;
514 	struct rte_eth_tunnel_flow   tunnel_flow;
515 };
516 
517 /**
518  * A structure used to contain extend input of flow
519  */
520 struct rte_eth_fdir_flow_ext {
521 	uint16_t vlan_tci;
522 	uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
523 	/**< It is filled by the flexible payload to match. */
524 	uint8_t is_vf;   /**< 1 for VF, 0 for port dev */
525 	uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
526 };
527 
528 /**
529  * A structure used to define the input for a flow director filter entry
530  */
531 struct rte_eth_fdir_input {
532 	uint16_t flow_type;
533 	union rte_eth_fdir_flow flow;
534 	/**< Flow fields to match, dependent on flow_type */
535 	struct rte_eth_fdir_flow_ext flow_ext;
536 	/**< Additional fields to match */
537 };
538 
539 /**
540  * Behavior will be taken if FDIR match
541  */
542 enum rte_eth_fdir_behavior {
543 	RTE_ETH_FDIR_ACCEPT = 0,
544 	RTE_ETH_FDIR_REJECT,
545 	RTE_ETH_FDIR_PASSTHRU,
546 };
547 
548 /**
549  * Flow director report status
550  * It defines what will be reported if FDIR entry is matched.
551  */
552 enum rte_eth_fdir_status {
553 	RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */
554 	RTE_ETH_FDIR_REPORT_ID,            /**< Only report FD ID. */
555 	RTE_ETH_FDIR_REPORT_ID_FLEX_4,     /**< Report FD ID and 4 flex bytes. */
556 	RTE_ETH_FDIR_REPORT_FLEX_8,        /**< Report 8 flex bytes. */
557 };
558 
559 /**
560  * A structure used to define an action when match FDIR packet filter.
561  */
562 struct rte_eth_fdir_action {
563 	uint16_t rx_queue;        /**< Queue assigned to if FDIR match. */
564 	enum rte_eth_fdir_behavior behavior;     /**< Behavior will be taken */
565 	enum rte_eth_fdir_status report_status;  /**< Status report option */
566 	uint8_t flex_off;
567 	/**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or
568 	     RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported
569 	     flex bytes start from in flexible payload. */
570 };
571 
572 /**
573  * A structure used to define the flow director filter entry by filter_ctrl API
574  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and
575  * RTE_ETH_FILTER_DELETE operations.
576  */
577 struct rte_eth_fdir_filter {
578 	uint32_t soft_id;
579 	/**< ID, an unique value is required when deal with FDIR entry */
580 	struct rte_eth_fdir_input input;    /**< Input set */
581 	struct rte_eth_fdir_action action;  /**< Action taken when match */
582 };
583 
584 /**
585  *  A structure used to configure FDIR masks that are used by the device
586  *  to match the various fields of RX packet headers.
587  */
588 struct rte_eth_fdir_masks {
589 	uint16_t vlan_tci_mask;   /**< Bit mask for vlan_tci in big endian */
590 	/** Bit mask for ipv4 flow in big endian. */
591 	struct rte_eth_ipv4_flow   ipv4_mask;
592 	/** Bit mask for ipv6 flow in big endian. */
593 	struct rte_eth_ipv6_flow   ipv6_mask;
594 	/** Bit mask for L4 source port in big endian. */
595 	uint16_t src_port_mask;
596 	/** Bit mask for L4 destination port in big endian. */
597 	uint16_t dst_port_mask;
598 	/** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the
599 	    first byte on the wire */
600 	uint8_t mac_addr_byte_mask;
601 	/** Bit mask for tunnel ID in big endian. */
602 	uint32_t tunnel_id_mask;
603 	uint8_t tunnel_type_mask; /**< 1 - Match tunnel type,
604 				       0 - Ignore tunnel type. */
605 };
606 
607 /**
608  * Payload type
609  */
610 enum rte_eth_payload_type {
611 	RTE_ETH_PAYLOAD_UNKNOWN = 0,
612 	RTE_ETH_RAW_PAYLOAD,
613 	RTE_ETH_L2_PAYLOAD,
614 	RTE_ETH_L3_PAYLOAD,
615 	RTE_ETH_L4_PAYLOAD,
616 	RTE_ETH_PAYLOAD_MAX = 8,
617 };
618 
619 /**
620  * A structure used to select bytes extracted from the protocol layers to
621  * flexible payload for filter
622  */
623 struct rte_eth_flex_payload_cfg {
624 	enum rte_eth_payload_type type;  /**< Payload type */
625 	uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
626 	/**< Offset in bytes from the beginning of packet's payload
627 	     src_offset[i] indicates the flexbyte i's offset in original
628 	     packet payload. This value should be less than
629 	     flex_payload_limit in struct rte_eth_fdir_info.*/
630 };
631 
632 /**
633  * A structure used to define FDIR masks for flexible payload
634  * for each flow type
635  */
636 struct rte_eth_fdir_flex_mask {
637 	uint16_t flow_type;
638 	uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
639 	/**< Mask for the whole flexible payload */
640 };
641 
642 /**
643  * A structure used to define all flexible payload related setting
644  * include flex payload and flex mask
645  */
646 struct rte_eth_fdir_flex_conf {
647 	uint16_t nb_payloads;  /**< The number of following payload cfg */
648 	uint16_t nb_flexmasks; /**< The number of following mask */
649 	struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
650 	/**< Flex payload configuration for each payload type */
651 	struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
652 	/**< Flex mask configuration for each flow type */
653 };
654 
655 /**
656  *  Flow Director setting modes: none, signature or perfect.
657  */
658 enum rte_fdir_mode {
659 	RTE_FDIR_MODE_NONE      = 0, /**< Disable FDIR support. */
660 	RTE_FDIR_MODE_SIGNATURE,     /**< Enable FDIR signature filter mode. */
661 	RTE_FDIR_MODE_PERFECT,       /**< Enable FDIR perfect filter mode. */
662 	RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */
663 	RTE_FDIR_MODE_PERFECT_TUNNEL,   /**< Enable FDIR filter mode - tunnel. */
664 };
665 
666 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t))
667 #define RTE_FLOW_MASK_ARRAY_SIZE \
668 	(RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
669 
670 /**
671  * A structure used to get the information of flow director filter.
672  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation.
673  * It includes the mode, flexible payload configuration information,
674  * capabilities and supported flow types, flexible payload characters.
675  * It can be gotten to help taking specific configurations per device.
676  */
677 struct rte_eth_fdir_info {
678 	enum rte_fdir_mode mode; /**< Flow director mode */
679 	struct rte_eth_fdir_masks mask;
680 	/** Flex payload configuration information */
681 	struct rte_eth_fdir_flex_conf flex_conf;
682 	uint32_t guarant_spc; /**< Guaranteed spaces.*/
683 	uint32_t best_spc; /**< Best effort spaces.*/
684 	/** Bit mask for every supported flow type. */
685 	uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
686 	uint32_t max_flexpayload; /**< Total flex payload in bytes. */
687 	/** Flexible payload unit in bytes. Size and alignments of all flex
688 	    payload segments should be multiplies of this value. */
689 	uint32_t flex_payload_unit;
690 	/** Max number of flexible payload continuous segments.
691 	    Each segment should be a multiple of flex_payload_unit.*/
692 	uint32_t max_flex_payload_segment_num;
693 	/** Maximum src_offset in bytes allowed. It indicates that
694 	    src_offset[i] in struct rte_eth_flex_payload_cfg should be less
695 	    than this value. */
696 	uint16_t flex_payload_limit;
697 	/** Flex bitmask unit in bytes. Size of flex bitmasks should be a
698 	    multiply of this value. */
699 	uint32_t flex_bitmask_unit;
700 	/** Max supported size of flex bitmasks in flex_bitmask_unit */
701 	uint32_t max_flex_bitmask_num;
702 };
703 
704 /**
705  * A structure used to define the statistics of flow director.
706  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation.
707  */
708 struct rte_eth_fdir_stats {
709 	uint32_t collision;    /**< Number of filters with collision. */
710 	uint32_t free;         /**< Number of free filters. */
711 	uint32_t maxhash;
712 	/**< The lookup hash value of the added filter that updated the value
713 	   of the MAXLEN field */
714 	uint32_t maxlen;       /**< Longest linked list of filters. */
715 	uint64_t add;          /**< Number of added filters. */
716 	uint64_t remove;       /**< Number of removed filters. */
717 	uint64_t f_add;        /**< Number of failed added filters. */
718 	uint64_t f_remove;     /**< Number of failed removed filters. */
719 	uint32_t guarant_cnt;  /**< Number of filters in guaranteed spaces. */
720 	uint32_t best_cnt;     /**< Number of filters in best effort spaces. */
721 };
722 
723 /**
724  * Flow Director filter information types.
725  */
726 enum rte_eth_fdir_filter_info_type {
727 	RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
728 	/** Flow Director filter input set configuration */
729 	RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT,
730 	RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
731 };
732 
733 /**
734  * A structure used to set FDIR filter information, to support filter type
735  * of 'RTE_ETH_FILTER_FDIR' RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT operation.
736  */
737 struct rte_eth_fdir_filter_info {
738 	enum rte_eth_fdir_filter_info_type info_type; /**< Information type */
739 	/** Details of fdir filter information */
740 	union {
741 		/** Flow Director input set configuration per port */
742 		struct rte_eth_input_set_conf input_set_conf;
743 	} info;
744 };
745 
746 /**
747  * Hash filter information types.
748  * - RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT is for getting/setting the
749  *   information/configuration of 'symmetric hash enable' per port.
750  * - RTE_ETH_HASH_FILTER_GLOBAL_CONFIG is for getting/setting the global
751  *   configurations of hash filters. Those global configurations are valid
752  *   for all ports of the same NIC.
753  * - RTE_ETH_HASH_FILTER_INPUT_SET_SELECT is for setting the global
754  *   hash input set fields
755  */
756 enum rte_eth_hash_filter_info_type {
757 	RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
758 	/** Symmetric hash enable per port */
759 	RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT,
760 	/** Configure globally for hash filter */
761 	RTE_ETH_HASH_FILTER_GLOBAL_CONFIG,
762 	/** Global Hash filter input set configuration */
763 	RTE_ETH_HASH_FILTER_INPUT_SET_SELECT,
764 	RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
765 };
766 
767 /**
768  * Hash function types.
769  */
770 enum rte_eth_hash_function {
771 	RTE_ETH_HASH_FUNCTION_DEFAULT = 0,
772 	RTE_ETH_HASH_FUNCTION_TOEPLITZ, /**< Toeplitz */
773 	RTE_ETH_HASH_FUNCTION_SIMPLE_XOR, /**< Simple XOR */
774 	RTE_ETH_HASH_FUNCTION_MAX,
775 };
776 
777 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
778 	(RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
779 /**
780  * A structure used to set or get global hash function configurations which
781  * include symmetric hash enable per flow type and hash function type.
782  * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of the
783  * corresponding flow type is enabled or not.
784  * Each bit in valid_bit_mask[] indicates if the corresponding bit in
785  * sym_hash_enable_mask[] is valid or not. For the configurations gotten, it
786  * also means if the flow type is supported by hardware or not.
787  */
788 struct rte_eth_hash_global_conf {
789 	enum rte_eth_hash_function hash_func; /**< Hash function type */
790 	/** Bit mask for symmetric hash enable per flow type */
791 	uint64_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
792 	/** Bit mask indicates if the corresponding bit is valid */
793 	uint64_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
794 };
795 
796 /**
797  * A structure used to set or get hash filter information, to support filter
798  * type of 'RTE_ETH_FILTER_HASH' and its operations.
799  */
800 struct rte_eth_hash_filter_info {
801 	enum rte_eth_hash_filter_info_type info_type; /**< Information type */
802 	/** Details of hash filter information */
803 	union {
804 		/** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */
805 		uint8_t enable;
806 		/** Global configurations of hash filter */
807 		struct rte_eth_hash_global_conf global_conf;
808 		/** Global configurations of hash filter input set */
809 		struct rte_eth_input_set_conf input_set_conf;
810 	} info;
811 };
812 
813 /**
814  * l2 tunnel configuration.
815  */
816 struct rte_eth_l2_tunnel_conf {
817 	enum rte_eth_tunnel_type l2_tunnel_type;
818 	uint16_t ether_type; /* ether type in l2 header */
819 	uint32_t tunnel_id; /* port tag id for e-tag */
820 	uint16_t vf_id; /* VF id for tag insertion */
821 	uint32_t pool; /* destination pool for tag based forwarding */
822 };
823 
824 #ifdef __cplusplus
825 }
826 #endif
827 
828 #endif /* _RTE_ETH_CTRL_H_ */
829