1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause
2d30ea906Sjfb8856606  * Copyright(c) 2010-2015 Intel Corporation
3d30ea906Sjfb8856606  */
4d30ea906Sjfb8856606 
5d30ea906Sjfb8856606 #ifndef _RTE_ETH_CTRL_H_
6d30ea906Sjfb8856606 #define _RTE_ETH_CTRL_H_
7d30ea906Sjfb8856606 
8d30ea906Sjfb8856606 #include <stdint.h>
9d30ea906Sjfb8856606 #include <rte_common.h>
104418919fSjohnjiang #include <rte_ether.h>
114418919fSjohnjiang #include "rte_flow.h"
12d30ea906Sjfb8856606 
13d30ea906Sjfb8856606 /**
144418919fSjohnjiang  * @deprecated Please use rte_flow API instead of this legacy one.
15d30ea906Sjfb8856606  * @file
16d30ea906Sjfb8856606  *
17d30ea906Sjfb8856606  * Ethernet device features and related data structures used
18d30ea906Sjfb8856606  * by control APIs should be defined in this file.
19d30ea906Sjfb8856606  */
20d30ea906Sjfb8856606 
21d30ea906Sjfb8856606 #ifdef __cplusplus
22d30ea906Sjfb8856606 extern "C" {
23d30ea906Sjfb8856606 #endif
24d30ea906Sjfb8856606 
25d30ea906Sjfb8856606 /**
26d30ea906Sjfb8856606  * Define all structures for ntuple Filter type.
27d30ea906Sjfb8856606  */
28d30ea906Sjfb8856606 
29d30ea906Sjfb8856606 #define RTE_NTUPLE_FLAGS_DST_IP    0x0001 /**< If set, dst_ip is part of ntuple */
30d30ea906Sjfb8856606 #define RTE_NTUPLE_FLAGS_SRC_IP    0x0002 /**< If set, src_ip is part of ntuple */
31d30ea906Sjfb8856606 #define RTE_NTUPLE_FLAGS_DST_PORT  0x0004 /**< If set, dst_port is part of ntuple */
32d30ea906Sjfb8856606 #define RTE_NTUPLE_FLAGS_SRC_PORT  0x0008 /**< If set, src_port is part of ntuple */
33d30ea906Sjfb8856606 #define RTE_NTUPLE_FLAGS_PROTO     0x0010 /**< If set, protocol is part of ntuple */
34d30ea906Sjfb8856606 #define RTE_NTUPLE_FLAGS_TCP_FLAG  0x0020 /**< If set, tcp flag is involved */
35d30ea906Sjfb8856606 
36d30ea906Sjfb8856606 #define RTE_5TUPLE_FLAGS ( \
37d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_DST_IP | \
38d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_SRC_IP | \
39d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_DST_PORT | \
40d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_SRC_PORT | \
41d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_PROTO)
42d30ea906Sjfb8856606 
43d30ea906Sjfb8856606 #define RTE_2TUPLE_FLAGS ( \
44d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_DST_PORT | \
45d30ea906Sjfb8856606 		RTE_NTUPLE_FLAGS_PROTO)
46d30ea906Sjfb8856606 
474418919fSjohnjiang #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F /**< TCP flags filter can match. */
48d30ea906Sjfb8856606 
49d30ea906Sjfb8856606 /**
50d30ea906Sjfb8856606  * A structure used to define the ntuple filter entry
51*2d9fd380Sjfb8856606  * to support RTE_ETH_FILTER_NTUPLE data representation.
52d30ea906Sjfb8856606  */
53d30ea906Sjfb8856606 struct rte_eth_ntuple_filter {
54d30ea906Sjfb8856606 	uint16_t flags;          /**< Flags from RTE_NTUPLE_FLAGS_* */
55d30ea906Sjfb8856606 	uint32_t dst_ip;         /**< Destination IP address in big endian. */
56d30ea906Sjfb8856606 	uint32_t dst_ip_mask;    /**< Mask of destination IP address. */
57d30ea906Sjfb8856606 	uint32_t src_ip;         /**< Source IP address in big endian. */
58d30ea906Sjfb8856606 	uint32_t src_ip_mask;    /**< Mask of destination IP address. */
59d30ea906Sjfb8856606 	uint16_t dst_port;       /**< Destination port in big endian. */
60d30ea906Sjfb8856606 	uint16_t dst_port_mask;  /**< Mask of destination port. */
61d30ea906Sjfb8856606 	uint16_t src_port;       /**< Source Port in big endian. */
62d30ea906Sjfb8856606 	uint16_t src_port_mask;  /**< Mask of source port. */
63d30ea906Sjfb8856606 	uint8_t proto;           /**< L4 protocol. */
64d30ea906Sjfb8856606 	uint8_t proto_mask;      /**< Mask of L4 protocol. */
65d30ea906Sjfb8856606 	/** tcp_flags only meaningful when the proto is TCP.
66d30ea906Sjfb8856606 	    The packet matched above ntuple fields and contain
67d30ea906Sjfb8856606 	    any set bit in tcp_flags will hit this filter. */
68d30ea906Sjfb8856606 	uint8_t tcp_flags;
69d30ea906Sjfb8856606 	uint16_t priority;       /**< seven levels (001b-111b), 111b is highest,
70d30ea906Sjfb8856606 				      used when more than one filter matches. */
71d30ea906Sjfb8856606 	uint16_t queue;          /**< Queue assigned to when match*/
72d30ea906Sjfb8856606 };
73d30ea906Sjfb8856606 
74d30ea906Sjfb8856606 #define RTE_ETH_FDIR_MAX_FLEXLEN 16  /**< Max length of flexbytes. */
75d30ea906Sjfb8856606 #define RTE_ETH_INSET_SIZE_MAX   128 /**< Max length of input set. */
76d30ea906Sjfb8856606 
77d30ea906Sjfb8856606 /**
78d30ea906Sjfb8856606  * Input set fields for Flow Director and Hash filters
79d30ea906Sjfb8856606  */
80d30ea906Sjfb8856606 enum rte_eth_input_set_field {
81d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_UNKNOWN = 0,
82d30ea906Sjfb8856606 
83d30ea906Sjfb8856606 	/* L2 */
84d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
85d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L2_DST_MAC,
86d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
87d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L2_INNER_VLAN,
88d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L2_ETHERTYPE,
89d30ea906Sjfb8856606 
90d30ea906Sjfb8856606 	/* L3 */
91d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
92d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_DST_IP4,
93d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_SRC_IP6,
94d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_DST_IP6,
95d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_IP4_TOS,
96d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_IP4_PROTO,
97d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_IP6_TC,
98d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
99d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_IP4_TTL,
100d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
101d30ea906Sjfb8856606 
102d30ea906Sjfb8856606 	/* L4 */
103d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
104d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
105d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
106d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
107d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
108d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
109d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
110d30ea906Sjfb8856606 
111d30ea906Sjfb8856606 	/* Tunnel */
112d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
113d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
114d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
115d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
116d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
117d30ea906Sjfb8856606 
118d30ea906Sjfb8856606 	/* Flexible Payload */
119d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
120d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
121d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
122d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
123d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
124d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
125d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
126d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
127d30ea906Sjfb8856606 
128d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_DEFAULT = 65533,
129d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_NONE = 65534,
130d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_MAX = 65535,
131d30ea906Sjfb8856606 };
132d30ea906Sjfb8856606 
133d30ea906Sjfb8856606 /**
134d30ea906Sjfb8856606  * Filters input set operations
135d30ea906Sjfb8856606  */
136d30ea906Sjfb8856606 enum rte_filter_input_set_op {
137d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_OP_UNKNOWN,
138d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_SELECT, /**< select input set */
139d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_ADD,    /**< add input set entry */
140d30ea906Sjfb8856606 	RTE_ETH_INPUT_SET_OP_MAX
141d30ea906Sjfb8856606 };
142d30ea906Sjfb8856606 
143d30ea906Sjfb8856606 
144d30ea906Sjfb8856606 /**
145d30ea906Sjfb8856606  * A structure used to define the input set configuration for
146d30ea906Sjfb8856606  * flow director and hash filters
147d30ea906Sjfb8856606  */
148d30ea906Sjfb8856606 struct rte_eth_input_set_conf {
149d30ea906Sjfb8856606 	uint16_t flow_type;
150d30ea906Sjfb8856606 	uint16_t inset_size;
151d30ea906Sjfb8856606 	enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
152d30ea906Sjfb8856606 	enum rte_filter_input_set_op op;
153d30ea906Sjfb8856606 };
154d30ea906Sjfb8856606 
155d30ea906Sjfb8856606 /**
156d30ea906Sjfb8856606  * A structure used to define the input for L2 flow
157d30ea906Sjfb8856606  */
158d30ea906Sjfb8856606 struct rte_eth_l2_flow {
159d30ea906Sjfb8856606 	uint16_t ether_type;          /**< Ether type in big endian */
160d30ea906Sjfb8856606 };
161d30ea906Sjfb8856606 
162d30ea906Sjfb8856606 /**
163d30ea906Sjfb8856606  * A structure used to define the input for IPV4 flow
164d30ea906Sjfb8856606  */
165d30ea906Sjfb8856606 struct rte_eth_ipv4_flow {
166d30ea906Sjfb8856606 	uint32_t src_ip;      /**< IPv4 source address in big endian. */
167d30ea906Sjfb8856606 	uint32_t dst_ip;      /**< IPv4 destination address in big endian. */
168d30ea906Sjfb8856606 	uint8_t  tos;         /**< Type of service to match. */
169d30ea906Sjfb8856606 	uint8_t  ttl;         /**< Time to live to match. */
170d30ea906Sjfb8856606 	uint8_t  proto;       /**< Protocol, next header in big endian. */
171d30ea906Sjfb8856606 };
172d30ea906Sjfb8856606 
173d30ea906Sjfb8856606 /**
174d30ea906Sjfb8856606  * A structure used to define the input for IPV4 UDP flow
175d30ea906Sjfb8856606  */
176d30ea906Sjfb8856606 struct rte_eth_udpv4_flow {
177d30ea906Sjfb8856606 	struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
178d30ea906Sjfb8856606 	uint16_t src_port;           /**< UDP source port in big endian. */
179d30ea906Sjfb8856606 	uint16_t dst_port;           /**< UDP destination port in big endian. */
180d30ea906Sjfb8856606 };
181d30ea906Sjfb8856606 
182d30ea906Sjfb8856606 /**
183d30ea906Sjfb8856606  * A structure used to define the input for IPV4 TCP flow
184d30ea906Sjfb8856606  */
185d30ea906Sjfb8856606 struct rte_eth_tcpv4_flow {
186d30ea906Sjfb8856606 	struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
187d30ea906Sjfb8856606 	uint16_t src_port;           /**< TCP source port in big endian. */
188d30ea906Sjfb8856606 	uint16_t dst_port;           /**< TCP destination port in big endian. */
189d30ea906Sjfb8856606 };
190d30ea906Sjfb8856606 
191d30ea906Sjfb8856606 /**
192d30ea906Sjfb8856606  * A structure used to define the input for IPV4 SCTP flow
193d30ea906Sjfb8856606  */
194d30ea906Sjfb8856606 struct rte_eth_sctpv4_flow {
195d30ea906Sjfb8856606 	struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
196d30ea906Sjfb8856606 	uint16_t src_port;           /**< SCTP source port in big endian. */
197d30ea906Sjfb8856606 	uint16_t dst_port;           /**< SCTP destination port in big endian. */
198d30ea906Sjfb8856606 	uint32_t verify_tag;         /**< Verify tag in big endian */
199d30ea906Sjfb8856606 };
200d30ea906Sjfb8856606 
201d30ea906Sjfb8856606 /**
202d30ea906Sjfb8856606  * A structure used to define the input for IPV6 flow
203d30ea906Sjfb8856606  */
204d30ea906Sjfb8856606 struct rte_eth_ipv6_flow {
205d30ea906Sjfb8856606 	uint32_t src_ip[4];      /**< IPv6 source address in big endian. */
206d30ea906Sjfb8856606 	uint32_t dst_ip[4];      /**< IPv6 destination address in big endian. */
207d30ea906Sjfb8856606 	uint8_t  tc;             /**< Traffic class to match. */
208d30ea906Sjfb8856606 	uint8_t  proto;          /**< Protocol, next header to match. */
209d30ea906Sjfb8856606 	uint8_t  hop_limits;     /**< Hop limits to match. */
210d30ea906Sjfb8856606 };
211d30ea906Sjfb8856606 
212d30ea906Sjfb8856606 /**
213d30ea906Sjfb8856606  * A structure used to define the input for IPV6 UDP flow
214d30ea906Sjfb8856606  */
215d30ea906Sjfb8856606 struct rte_eth_udpv6_flow {
216d30ea906Sjfb8856606 	struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
217d30ea906Sjfb8856606 	uint16_t src_port;           /**< UDP source port in big endian. */
218d30ea906Sjfb8856606 	uint16_t dst_port;           /**< UDP destination port in big endian. */
219d30ea906Sjfb8856606 };
220d30ea906Sjfb8856606 
221d30ea906Sjfb8856606 /**
222d30ea906Sjfb8856606  * A structure used to define the input for IPV6 TCP flow
223d30ea906Sjfb8856606  */
224d30ea906Sjfb8856606 struct rte_eth_tcpv6_flow {
225d30ea906Sjfb8856606 	struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
226d30ea906Sjfb8856606 	uint16_t src_port;           /**< TCP source port to in big endian. */
227d30ea906Sjfb8856606 	uint16_t dst_port;           /**< TCP destination port in big endian. */
228d30ea906Sjfb8856606 };
229d30ea906Sjfb8856606 
230d30ea906Sjfb8856606 /**
231d30ea906Sjfb8856606  * A structure used to define the input for IPV6 SCTP flow
232d30ea906Sjfb8856606  */
233d30ea906Sjfb8856606 struct rte_eth_sctpv6_flow {
234d30ea906Sjfb8856606 	struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
235d30ea906Sjfb8856606 	uint16_t src_port;           /**< SCTP source port in big endian. */
236d30ea906Sjfb8856606 	uint16_t dst_port;           /**< SCTP destination port in big endian. */
237d30ea906Sjfb8856606 	uint32_t verify_tag;         /**< Verify tag in big endian. */
238d30ea906Sjfb8856606 };
239d30ea906Sjfb8856606 
240d30ea906Sjfb8856606 /**
241d30ea906Sjfb8856606  * A structure used to define the input for MAC VLAN flow
242d30ea906Sjfb8856606  */
243d30ea906Sjfb8856606 struct rte_eth_mac_vlan_flow {
2444418919fSjohnjiang 	struct rte_ether_addr mac_addr;  /**< Mac address to match. */
245d30ea906Sjfb8856606 };
246d30ea906Sjfb8856606 
247d30ea906Sjfb8856606 /**
248d30ea906Sjfb8856606  * Tunnel type for flow director.
249d30ea906Sjfb8856606  */
250d30ea906Sjfb8856606 enum rte_eth_fdir_tunnel_type {
251d30ea906Sjfb8856606 	RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
252d30ea906Sjfb8856606 	RTE_FDIR_TUNNEL_TYPE_NVGRE,
253d30ea906Sjfb8856606 	RTE_FDIR_TUNNEL_TYPE_VXLAN,
254d30ea906Sjfb8856606 };
255d30ea906Sjfb8856606 
256d30ea906Sjfb8856606 /**
257d30ea906Sjfb8856606  * A structure used to define the input for tunnel flow, now it's VxLAN or
258d30ea906Sjfb8856606  * NVGRE
259d30ea906Sjfb8856606  */
260d30ea906Sjfb8856606 struct rte_eth_tunnel_flow {
261d30ea906Sjfb8856606 	enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */
262d30ea906Sjfb8856606 	/** Tunnel ID to match. TNI, VNI... in big endian. */
263d30ea906Sjfb8856606 	uint32_t tunnel_id;
2644418919fSjohnjiang 	struct rte_ether_addr mac_addr;            /**< Mac address to match. */
265d30ea906Sjfb8856606 };
266d30ea906Sjfb8856606 
267d30ea906Sjfb8856606 /**
268d30ea906Sjfb8856606  * An union contains the inputs for all types of flow
269d30ea906Sjfb8856606  * Items in flows need to be in big endian
270d30ea906Sjfb8856606  */
271d30ea906Sjfb8856606 union rte_eth_fdir_flow {
272d30ea906Sjfb8856606 	struct rte_eth_l2_flow     l2_flow;
273d30ea906Sjfb8856606 	struct rte_eth_udpv4_flow  udp4_flow;
274d30ea906Sjfb8856606 	struct rte_eth_tcpv4_flow  tcp4_flow;
275d30ea906Sjfb8856606 	struct rte_eth_sctpv4_flow sctp4_flow;
276d30ea906Sjfb8856606 	struct rte_eth_ipv4_flow   ip4_flow;
277d30ea906Sjfb8856606 	struct rte_eth_udpv6_flow  udp6_flow;
278d30ea906Sjfb8856606 	struct rte_eth_tcpv6_flow  tcp6_flow;
279d30ea906Sjfb8856606 	struct rte_eth_sctpv6_flow sctp6_flow;
280d30ea906Sjfb8856606 	struct rte_eth_ipv6_flow   ipv6_flow;
281d30ea906Sjfb8856606 	struct rte_eth_mac_vlan_flow mac_vlan_flow;
282d30ea906Sjfb8856606 	struct rte_eth_tunnel_flow   tunnel_flow;
283d30ea906Sjfb8856606 };
284d30ea906Sjfb8856606 
285d30ea906Sjfb8856606 /**
286d30ea906Sjfb8856606  * A structure used to contain extend input of flow
287d30ea906Sjfb8856606  */
288d30ea906Sjfb8856606 struct rte_eth_fdir_flow_ext {
289d30ea906Sjfb8856606 	uint16_t vlan_tci;
290d30ea906Sjfb8856606 	uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
291d30ea906Sjfb8856606 	/**< It is filled by the flexible payload to match. */
292d30ea906Sjfb8856606 	uint8_t is_vf;   /**< 1 for VF, 0 for port dev */
293d30ea906Sjfb8856606 	uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
294d30ea906Sjfb8856606 };
295d30ea906Sjfb8856606 
296d30ea906Sjfb8856606 /**
297d30ea906Sjfb8856606  * A structure used to define the input for a flow director filter entry
298d30ea906Sjfb8856606  */
299d30ea906Sjfb8856606 struct rte_eth_fdir_input {
300d30ea906Sjfb8856606 	uint16_t flow_type;
301d30ea906Sjfb8856606 	union rte_eth_fdir_flow flow;
302d30ea906Sjfb8856606 	/**< Flow fields to match, dependent on flow_type */
303d30ea906Sjfb8856606 	struct rte_eth_fdir_flow_ext flow_ext;
304d30ea906Sjfb8856606 	/**< Additional fields to match */
305d30ea906Sjfb8856606 };
306d30ea906Sjfb8856606 
307d30ea906Sjfb8856606 /**
308d30ea906Sjfb8856606  * Behavior will be taken if FDIR match
309d30ea906Sjfb8856606  */
310d30ea906Sjfb8856606 enum rte_eth_fdir_behavior {
311d30ea906Sjfb8856606 	RTE_ETH_FDIR_ACCEPT = 0,
312d30ea906Sjfb8856606 	RTE_ETH_FDIR_REJECT,
313d30ea906Sjfb8856606 	RTE_ETH_FDIR_PASSTHRU,
314d30ea906Sjfb8856606 };
315d30ea906Sjfb8856606 
316d30ea906Sjfb8856606 /**
317d30ea906Sjfb8856606  * Flow director report status
318d30ea906Sjfb8856606  * It defines what will be reported if FDIR entry is matched.
319d30ea906Sjfb8856606  */
320d30ea906Sjfb8856606 enum rte_eth_fdir_status {
321d30ea906Sjfb8856606 	RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */
322d30ea906Sjfb8856606 	RTE_ETH_FDIR_REPORT_ID,            /**< Only report FD ID. */
323d30ea906Sjfb8856606 	RTE_ETH_FDIR_REPORT_ID_FLEX_4,     /**< Report FD ID and 4 flex bytes. */
324d30ea906Sjfb8856606 	RTE_ETH_FDIR_REPORT_FLEX_8,        /**< Report 8 flex bytes. */
325d30ea906Sjfb8856606 };
326d30ea906Sjfb8856606 
327d30ea906Sjfb8856606 /**
328d30ea906Sjfb8856606  * A structure used to define an action when match FDIR packet filter.
329d30ea906Sjfb8856606  */
330d30ea906Sjfb8856606 struct rte_eth_fdir_action {
331d30ea906Sjfb8856606 	uint16_t rx_queue;        /**< Queue assigned to if FDIR match. */
332d30ea906Sjfb8856606 	enum rte_eth_fdir_behavior behavior;     /**< Behavior will be taken */
333d30ea906Sjfb8856606 	enum rte_eth_fdir_status report_status;  /**< Status report option */
334d30ea906Sjfb8856606 	uint8_t flex_off;
335d30ea906Sjfb8856606 	/**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or
336d30ea906Sjfb8856606 	     RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported
337d30ea906Sjfb8856606 	     flex bytes start from in flexible payload. */
338d30ea906Sjfb8856606 };
339d30ea906Sjfb8856606 
340d30ea906Sjfb8856606 /**
341*2d9fd380Sjfb8856606  * A structure used to define the flow director filter entry by filter_ctrl API.
342d30ea906Sjfb8856606  */
343d30ea906Sjfb8856606 struct rte_eth_fdir_filter {
344d30ea906Sjfb8856606 	uint32_t soft_id;
345d30ea906Sjfb8856606 	/**< ID, an unique value is required when deal with FDIR entry */
346d30ea906Sjfb8856606 	struct rte_eth_fdir_input input;    /**< Input set */
347d30ea906Sjfb8856606 	struct rte_eth_fdir_action action;  /**< Action taken when match */
348d30ea906Sjfb8856606 };
349d30ea906Sjfb8856606 
350d30ea906Sjfb8856606 /**
351d30ea906Sjfb8856606  *  A structure used to configure FDIR masks that are used by the device
352d30ea906Sjfb8856606  *  to match the various fields of RX packet headers.
353d30ea906Sjfb8856606  */
354d30ea906Sjfb8856606 struct rte_eth_fdir_masks {
355d30ea906Sjfb8856606 	uint16_t vlan_tci_mask;   /**< Bit mask for vlan_tci in big endian */
356d30ea906Sjfb8856606 	/** Bit mask for ipv4 flow in big endian. */
357d30ea906Sjfb8856606 	struct rte_eth_ipv4_flow   ipv4_mask;
3581646932aSjfb8856606 	/** Bit mask for ipv6 flow in big endian. */
359d30ea906Sjfb8856606 	struct rte_eth_ipv6_flow   ipv6_mask;
360d30ea906Sjfb8856606 	/** Bit mask for L4 source port in big endian. */
361d30ea906Sjfb8856606 	uint16_t src_port_mask;
362d30ea906Sjfb8856606 	/** Bit mask for L4 destination port in big endian. */
363d30ea906Sjfb8856606 	uint16_t dst_port_mask;
364d30ea906Sjfb8856606 	/** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the
365d30ea906Sjfb8856606 	    first byte on the wire */
366d30ea906Sjfb8856606 	uint8_t mac_addr_byte_mask;
367d30ea906Sjfb8856606 	/** Bit mask for tunnel ID in big endian. */
368d30ea906Sjfb8856606 	uint32_t tunnel_id_mask;
369d30ea906Sjfb8856606 	uint8_t tunnel_type_mask; /**< 1 - Match tunnel type,
370d30ea906Sjfb8856606 				       0 - Ignore tunnel type. */
371d30ea906Sjfb8856606 };
372d30ea906Sjfb8856606 
373d30ea906Sjfb8856606 /**
374d30ea906Sjfb8856606  * Payload type
375d30ea906Sjfb8856606  */
376d30ea906Sjfb8856606 enum rte_eth_payload_type {
377d30ea906Sjfb8856606 	RTE_ETH_PAYLOAD_UNKNOWN = 0,
378d30ea906Sjfb8856606 	RTE_ETH_RAW_PAYLOAD,
379d30ea906Sjfb8856606 	RTE_ETH_L2_PAYLOAD,
380d30ea906Sjfb8856606 	RTE_ETH_L3_PAYLOAD,
381d30ea906Sjfb8856606 	RTE_ETH_L4_PAYLOAD,
382d30ea906Sjfb8856606 	RTE_ETH_PAYLOAD_MAX = 8,
383d30ea906Sjfb8856606 };
384d30ea906Sjfb8856606 
385d30ea906Sjfb8856606 /**
386d30ea906Sjfb8856606  * A structure used to select bytes extracted from the protocol layers to
387d30ea906Sjfb8856606  * flexible payload for filter
388d30ea906Sjfb8856606  */
389d30ea906Sjfb8856606 struct rte_eth_flex_payload_cfg {
390d30ea906Sjfb8856606 	enum rte_eth_payload_type type;  /**< Payload type */
391d30ea906Sjfb8856606 	uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
392d30ea906Sjfb8856606 	/**< Offset in bytes from the beginning of packet's payload
393d30ea906Sjfb8856606 	     src_offset[i] indicates the flexbyte i's offset in original
394d30ea906Sjfb8856606 	     packet payload. This value should be less than
395d30ea906Sjfb8856606 	     flex_payload_limit in struct rte_eth_fdir_info.*/
396d30ea906Sjfb8856606 };
397d30ea906Sjfb8856606 
398d30ea906Sjfb8856606 /**
399d30ea906Sjfb8856606  * A structure used to define FDIR masks for flexible payload
400d30ea906Sjfb8856606  * for each flow type
401d30ea906Sjfb8856606  */
402d30ea906Sjfb8856606 struct rte_eth_fdir_flex_mask {
403d30ea906Sjfb8856606 	uint16_t flow_type;
404d30ea906Sjfb8856606 	uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
405d30ea906Sjfb8856606 	/**< Mask for the whole flexible payload */
406d30ea906Sjfb8856606 };
407d30ea906Sjfb8856606 
408d30ea906Sjfb8856606 /**
409d30ea906Sjfb8856606  * A structure used to define all flexible payload related setting
410d30ea906Sjfb8856606  * include flex payload and flex mask
411d30ea906Sjfb8856606  */
412d30ea906Sjfb8856606 struct rte_eth_fdir_flex_conf {
413d30ea906Sjfb8856606 	uint16_t nb_payloads;  /**< The number of following payload cfg */
414d30ea906Sjfb8856606 	uint16_t nb_flexmasks; /**< The number of following mask */
415d30ea906Sjfb8856606 	struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
416d30ea906Sjfb8856606 	/**< Flex payload configuration for each payload type */
417d30ea906Sjfb8856606 	struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
418d30ea906Sjfb8856606 	/**< Flex mask configuration for each flow type */
419d30ea906Sjfb8856606 };
420d30ea906Sjfb8856606 
421d30ea906Sjfb8856606 /**
422d30ea906Sjfb8856606  *  Flow Director setting modes: none, signature or perfect.
423d30ea906Sjfb8856606  */
424d30ea906Sjfb8856606 enum rte_fdir_mode {
425d30ea906Sjfb8856606 	RTE_FDIR_MODE_NONE      = 0, /**< Disable FDIR support. */
426d30ea906Sjfb8856606 	RTE_FDIR_MODE_SIGNATURE,     /**< Enable FDIR signature filter mode. */
427d30ea906Sjfb8856606 	RTE_FDIR_MODE_PERFECT,       /**< Enable FDIR perfect filter mode. */
428d30ea906Sjfb8856606 	RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */
429d30ea906Sjfb8856606 	RTE_FDIR_MODE_PERFECT_TUNNEL,   /**< Enable FDIR filter mode - tunnel. */
430d30ea906Sjfb8856606 };
431d30ea906Sjfb8856606 
432d30ea906Sjfb8856606 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t))
433d30ea906Sjfb8856606 #define RTE_FLOW_MASK_ARRAY_SIZE \
434d30ea906Sjfb8856606 	(RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
435d30ea906Sjfb8856606 
436d30ea906Sjfb8856606 /**
437d30ea906Sjfb8856606  * A structure used to get the information of flow director filter.
438d30ea906Sjfb8856606  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation.
439d30ea906Sjfb8856606  * It includes the mode, flexible payload configuration information,
440d30ea906Sjfb8856606  * capabilities and supported flow types, flexible payload characters.
441d30ea906Sjfb8856606  * It can be gotten to help taking specific configurations per device.
442d30ea906Sjfb8856606  */
443d30ea906Sjfb8856606 struct rte_eth_fdir_info {
444d30ea906Sjfb8856606 	enum rte_fdir_mode mode; /**< Flow director mode */
445d30ea906Sjfb8856606 	struct rte_eth_fdir_masks mask;
446d30ea906Sjfb8856606 	/** Flex payload configuration information */
447d30ea906Sjfb8856606 	struct rte_eth_fdir_flex_conf flex_conf;
448d30ea906Sjfb8856606 	uint32_t guarant_spc; /**< Guaranteed spaces.*/
449d30ea906Sjfb8856606 	uint32_t best_spc; /**< Best effort spaces.*/
450d30ea906Sjfb8856606 	/** Bit mask for every supported flow type. */
451d30ea906Sjfb8856606 	uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
452d30ea906Sjfb8856606 	uint32_t max_flexpayload; /**< Total flex payload in bytes. */
453d30ea906Sjfb8856606 	/** Flexible payload unit in bytes. Size and alignments of all flex
454d30ea906Sjfb8856606 	    payload segments should be multiplies of this value. */
455d30ea906Sjfb8856606 	uint32_t flex_payload_unit;
456d30ea906Sjfb8856606 	/** Max number of flexible payload continuous segments.
457d30ea906Sjfb8856606 	    Each segment should be a multiple of flex_payload_unit.*/
458d30ea906Sjfb8856606 	uint32_t max_flex_payload_segment_num;
459d30ea906Sjfb8856606 	/** Maximum src_offset in bytes allowed. It indicates that
460d30ea906Sjfb8856606 	    src_offset[i] in struct rte_eth_flex_payload_cfg should be less
461d30ea906Sjfb8856606 	    than this value. */
462d30ea906Sjfb8856606 	uint16_t flex_payload_limit;
463d30ea906Sjfb8856606 	/** Flex bitmask unit in bytes. Size of flex bitmasks should be a
464d30ea906Sjfb8856606 	    multiply of this value. */
465d30ea906Sjfb8856606 	uint32_t flex_bitmask_unit;
466d30ea906Sjfb8856606 	/** Max supported size of flex bitmasks in flex_bitmask_unit */
467d30ea906Sjfb8856606 	uint32_t max_flex_bitmask_num;
468d30ea906Sjfb8856606 };
469d30ea906Sjfb8856606 
470d30ea906Sjfb8856606 /**
471d30ea906Sjfb8856606  * A structure used to define the statistics of flow director.
472d30ea906Sjfb8856606  * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation.
473d30ea906Sjfb8856606  */
474d30ea906Sjfb8856606 struct rte_eth_fdir_stats {
475d30ea906Sjfb8856606 	uint32_t collision;    /**< Number of filters with collision. */
476d30ea906Sjfb8856606 	uint32_t free;         /**< Number of free filters. */
477d30ea906Sjfb8856606 	uint32_t maxhash;
478d30ea906Sjfb8856606 	/**< The lookup hash value of the added filter that updated the value
479d30ea906Sjfb8856606 	   of the MAXLEN field */
480d30ea906Sjfb8856606 	uint32_t maxlen;       /**< Longest linked list of filters. */
481d30ea906Sjfb8856606 	uint64_t add;          /**< Number of added filters. */
482d30ea906Sjfb8856606 	uint64_t remove;       /**< Number of removed filters. */
483d30ea906Sjfb8856606 	uint64_t f_add;        /**< Number of failed added filters. */
484d30ea906Sjfb8856606 	uint64_t f_remove;     /**< Number of failed removed filters. */
485d30ea906Sjfb8856606 	uint32_t guarant_cnt;  /**< Number of filters in guaranteed spaces. */
486d30ea906Sjfb8856606 	uint32_t best_cnt;     /**< Number of filters in best effort spaces. */
487d30ea906Sjfb8856606 };
488d30ea906Sjfb8856606 
489d30ea906Sjfb8856606 #ifdef __cplusplus
490d30ea906Sjfb8856606 }
491d30ea906Sjfb8856606 #endif
492d30ea906Sjfb8856606 
493d30ea906Sjfb8856606 #endif /* _RTE_ETH_CTRL_H_ */
494