xref: /f-stack/dpdk/lib/librte_acl/rte_acl.c (revision 031be553)
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Intel Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <rte_acl.h>
35 #include "acl.h"
36 
37 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
38 
39 static struct rte_tailq_elem rte_acl_tailq = {
40 	.name = "RTE_ACL",
41 };
42 EAL_REGISTER_TAILQ(rte_acl_tailq)
43 
44 /*
45  * If the compiler doesn't support AVX2 instructions,
46  * then the dummy one would be used instead for AVX2 classify method.
47  */
48 int __attribute__ ((weak))
49 rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
50 	__rte_unused const uint8_t **data,
51 	__rte_unused uint32_t *results,
52 	__rte_unused uint32_t num,
53 	__rte_unused uint32_t categories)
54 {
55 	return -ENOTSUP;
56 }
57 
58 int __attribute__ ((weak))
59 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
60 	__rte_unused const uint8_t **data,
61 	__rte_unused uint32_t *results,
62 	__rte_unused uint32_t num,
63 	__rte_unused uint32_t categories)
64 {
65 	return -ENOTSUP;
66 }
67 
68 int __attribute__ ((weak))
69 rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
70 	__rte_unused const uint8_t **data,
71 	__rte_unused uint32_t *results,
72 	__rte_unused uint32_t num,
73 	__rte_unused uint32_t categories)
74 {
75 	return -ENOTSUP;
76 }
77 
78 int __attribute__ ((weak))
79 rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
80 	__rte_unused const uint8_t **data,
81 	__rte_unused uint32_t *results,
82 	__rte_unused uint32_t num,
83 	__rte_unused uint32_t categories)
84 {
85 	return -ENOTSUP;
86 }
87 
88 static const rte_acl_classify_t classify_fns[] = {
89 	[RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
90 	[RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
91 	[RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
92 	[RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
93 	[RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
94 	[RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
95 };
96 
97 /* by default, use always available scalar code path. */
98 static enum rte_acl_classify_alg rte_acl_default_classify =
99 	RTE_ACL_CLASSIFY_SCALAR;
100 
101 static void
102 rte_acl_set_default_classify(enum rte_acl_classify_alg alg)
103 {
104 	rte_acl_default_classify = alg;
105 }
106 
107 extern int
108 rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
109 {
110 	if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
111 		return -EINVAL;
112 
113 	ctx->alg = alg;
114 	return 0;
115 }
116 
117 /*
118  * Select highest available classify method as default one.
119  * Note that CLASSIFY_AVX2 should be set as a default only
120  * if both conditions are met:
121  * at build time compiler supports AVX2 and target cpu supports AVX2.
122  */
123 RTE_INIT(rte_acl_init)
124 {
125 	enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
126 
127 #if defined(RTE_ARCH_ARM64)
128 	alg =  RTE_ACL_CLASSIFY_NEON;
129 #elif defined(RTE_ARCH_ARM)
130 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
131 		alg =  RTE_ACL_CLASSIFY_NEON;
132 #elif defined(RTE_ARCH_PPC_64)
133 	alg = RTE_ACL_CLASSIFY_ALTIVEC;
134 #else
135 #ifdef CC_AVX2_SUPPORT
136 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
137 		alg = RTE_ACL_CLASSIFY_AVX2;
138 	else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
139 #else
140 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
141 #endif
142 		alg = RTE_ACL_CLASSIFY_SSE;
143 
144 #endif
145 	rte_acl_set_default_classify(alg);
146 }
147 
148 int
149 rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
150 	uint32_t *results, uint32_t num, uint32_t categories,
151 	enum rte_acl_classify_alg alg)
152 {
153 	if (categories != 1 &&
154 			((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
155 		return -EINVAL;
156 
157 	return classify_fns[alg](ctx, data, results, num, categories);
158 }
159 
160 int
161 rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
162 	uint32_t *results, uint32_t num, uint32_t categories)
163 {
164 	return rte_acl_classify_alg(ctx, data, results, num, categories,
165 		ctx->alg);
166 }
167 
168 struct rte_acl_ctx *
169 rte_acl_find_existing(const char *name)
170 {
171 	struct rte_acl_ctx *ctx = NULL;
172 	struct rte_acl_list *acl_list;
173 	struct rte_tailq_entry *te;
174 
175 	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
176 
177 	rte_rwlock_read_lock(RTE_EAL_TAILQ_RWLOCK);
178 	TAILQ_FOREACH(te, acl_list, next) {
179 		ctx = (struct rte_acl_ctx *) te->data;
180 		if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
181 			break;
182 	}
183 	rte_rwlock_read_unlock(RTE_EAL_TAILQ_RWLOCK);
184 
185 	if (te == NULL) {
186 		rte_errno = ENOENT;
187 		return NULL;
188 	}
189 	return ctx;
190 }
191 
192 void
193 rte_acl_free(struct rte_acl_ctx *ctx)
194 {
195 	struct rte_acl_list *acl_list;
196 	struct rte_tailq_entry *te;
197 
198 	if (ctx == NULL)
199 		return;
200 
201 	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
202 
203 	rte_rwlock_write_lock(RTE_EAL_TAILQ_RWLOCK);
204 
205 	/* find our tailq entry */
206 	TAILQ_FOREACH(te, acl_list, next) {
207 		if (te->data == (void *) ctx)
208 			break;
209 	}
210 	if (te == NULL) {
211 		rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
212 		return;
213 	}
214 
215 	TAILQ_REMOVE(acl_list, te, next);
216 
217 	rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
218 
219 	rte_free(ctx->mem);
220 	rte_free(ctx);
221 	rte_free(te);
222 }
223 
224 struct rte_acl_ctx *
225 rte_acl_create(const struct rte_acl_param *param)
226 {
227 	size_t sz;
228 	struct rte_acl_ctx *ctx;
229 	struct rte_acl_list *acl_list;
230 	struct rte_tailq_entry *te;
231 	char name[sizeof(ctx->name)];
232 
233 	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
234 
235 	/* check that input parameters are valid. */
236 	if (param == NULL || param->name == NULL) {
237 		rte_errno = EINVAL;
238 		return NULL;
239 	}
240 
241 	snprintf(name, sizeof(name), "ACL_%s", param->name);
242 
243 	/* calculate amount of memory required for pattern set. */
244 	sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
245 
246 	/* get EAL TAILQ lock. */
247 	rte_rwlock_write_lock(RTE_EAL_TAILQ_RWLOCK);
248 
249 	/* if we already have one with that name */
250 	TAILQ_FOREACH(te, acl_list, next) {
251 		ctx = (struct rte_acl_ctx *) te->data;
252 		if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
253 			break;
254 	}
255 
256 	/* if ACL with such name doesn't exist, then create a new one. */
257 	if (te == NULL) {
258 		ctx = NULL;
259 		te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
260 
261 		if (te == NULL) {
262 			RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
263 			goto exit;
264 		}
265 
266 		ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
267 
268 		if (ctx == NULL) {
269 			RTE_LOG(ERR, ACL,
270 				"allocation of %zu bytes on socket %d for %s failed\n",
271 				sz, param->socket_id, name);
272 			rte_free(te);
273 			goto exit;
274 		}
275 		/* init new allocated context. */
276 		ctx->rules = ctx + 1;
277 		ctx->max_rules = param->max_rule_num;
278 		ctx->rule_sz = param->rule_size;
279 		ctx->socket_id = param->socket_id;
280 		ctx->alg = rte_acl_default_classify;
281 		snprintf(ctx->name, sizeof(ctx->name), "%s", param->name);
282 
283 		te->data = (void *) ctx;
284 
285 		TAILQ_INSERT_TAIL(acl_list, te, next);
286 	}
287 
288 exit:
289 	rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
290 	return ctx;
291 }
292 
293 static int
294 acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
295 {
296 	uint8_t *pos;
297 
298 	if (num + ctx->num_rules > ctx->max_rules)
299 		return -ENOMEM;
300 
301 	pos = ctx->rules;
302 	pos += ctx->rule_sz * ctx->num_rules;
303 	memcpy(pos, rules, num * ctx->rule_sz);
304 	ctx->num_rules += num;
305 
306 	return 0;
307 }
308 
309 static int
310 acl_check_rule(const struct rte_acl_rule_data *rd)
311 {
312 	if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
313 			rd->category_mask) == 0 ||
314 			rd->priority > RTE_ACL_MAX_PRIORITY ||
315 			rd->priority < RTE_ACL_MIN_PRIORITY)
316 		return -EINVAL;
317 	return 0;
318 }
319 
320 int
321 rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
322 	uint32_t num)
323 {
324 	const struct rte_acl_rule *rv;
325 	uint32_t i;
326 	int32_t rc;
327 
328 	if (ctx == NULL || rules == NULL || 0 == ctx->rule_sz)
329 		return -EINVAL;
330 
331 	for (i = 0; i != num; i++) {
332 		rv = (const struct rte_acl_rule *)
333 			((uintptr_t)rules + i * ctx->rule_sz);
334 		rc = acl_check_rule(&rv->data);
335 		if (rc != 0) {
336 			RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
337 				__func__, ctx->name, i + 1);
338 			return rc;
339 		}
340 	}
341 
342 	return acl_add_rules(ctx, rules, num);
343 }
344 
345 /*
346  * Reset all rules.
347  * Note that RT structures are not affected.
348  */
349 void
350 rte_acl_reset_rules(struct rte_acl_ctx *ctx)
351 {
352 	if (ctx != NULL)
353 		ctx->num_rules = 0;
354 }
355 
356 /*
357  * Reset all rules and destroys RT structures.
358  */
359 void
360 rte_acl_reset(struct rte_acl_ctx *ctx)
361 {
362 	if (ctx != NULL) {
363 		rte_acl_reset_rules(ctx);
364 		rte_acl_build(ctx, &ctx->config);
365 	}
366 }
367 
368 /*
369  * Dump ACL context to the stdout.
370  */
371 void
372 rte_acl_dump(const struct rte_acl_ctx *ctx)
373 {
374 	if (!ctx)
375 		return;
376 	printf("acl context <%s>@%p\n", ctx->name, ctx);
377 	printf("  socket_id=%"PRId32"\n", ctx->socket_id);
378 	printf("  alg=%"PRId32"\n", ctx->alg);
379 	printf("  max_rules=%"PRIu32"\n", ctx->max_rules);
380 	printf("  rule_size=%"PRIu32"\n", ctx->rule_sz);
381 	printf("  num_rules=%"PRIu32"\n", ctx->num_rules);
382 	printf("  num_categories=%"PRIu32"\n", ctx->num_categories);
383 	printf("  num_tries=%"PRIu32"\n", ctx->num_tries);
384 }
385 
386 /*
387  * Dump all ACL contexts to the stdout.
388  */
389 void
390 rte_acl_list_dump(void)
391 {
392 	struct rte_acl_ctx *ctx;
393 	struct rte_acl_list *acl_list;
394 	struct rte_tailq_entry *te;
395 
396 	acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
397 
398 	rte_rwlock_read_lock(RTE_EAL_TAILQ_RWLOCK);
399 	TAILQ_FOREACH(te, acl_list, next) {
400 		ctx = (struct rte_acl_ctx *) te->data;
401 		rte_acl_dump(ctx);
402 	}
403 	rte_rwlock_read_unlock(RTE_EAL_TAILQ_RWLOCK);
404 }
405