xref: /f-stack/dpdk/kernel/linux/igb_uio/compat.h (revision 6b8a3e40)
1*6b8a3e40Sjfb8856606 /* SPDX-License-Identifier: GPL-2.0 */
2*6b8a3e40Sjfb8856606 /*
3*6b8a3e40Sjfb8856606  * Minimal wrappers to allow compiling igb_uio on older kernels.
4*6b8a3e40Sjfb8856606  */
5*6b8a3e40Sjfb8856606 
6*6b8a3e40Sjfb8856606 #ifndef RHEL_RELEASE_VERSION
7*6b8a3e40Sjfb8856606 #define RHEL_RELEASE_VERSION(a, b) (((a) << 8) + (b))
8*6b8a3e40Sjfb8856606 #endif
9*6b8a3e40Sjfb8856606 
10*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0)
11*6b8a3e40Sjfb8856606 #define pci_cfg_access_lock   pci_block_user_cfg_access
12*6b8a3e40Sjfb8856606 #define pci_cfg_access_unlock pci_unblock_user_cfg_access
13*6b8a3e40Sjfb8856606 #endif
14*6b8a3e40Sjfb8856606 
15*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 18, 0)
16*6b8a3e40Sjfb8856606 #define HAVE_PTE_MASK_PAGE_IOMAP
17*6b8a3e40Sjfb8856606 #endif
18*6b8a3e40Sjfb8856606 
19*6b8a3e40Sjfb8856606 #ifndef PCI_MSIX_ENTRY_SIZE
20*6b8a3e40Sjfb8856606 #define PCI_MSIX_ENTRY_SIZE            16
21*6b8a3e40Sjfb8856606 #define PCI_MSIX_ENTRY_VECTOR_CTRL     12
22*6b8a3e40Sjfb8856606 #define PCI_MSIX_ENTRY_CTRL_MASKBIT    1
23*6b8a3e40Sjfb8856606 #endif
24*6b8a3e40Sjfb8856606 
25*6b8a3e40Sjfb8856606 /*
26*6b8a3e40Sjfb8856606  * for kernels < 2.6.38 and backported patch that moves MSI-X entry definition
27*6b8a3e40Sjfb8856606  * to pci_regs.h Those kernels has PCI_MSIX_ENTRY_SIZE defined but not
28*6b8a3e40Sjfb8856606  * PCI_MSIX_ENTRY_CTRL_MASKBIT
29*6b8a3e40Sjfb8856606  */
30*6b8a3e40Sjfb8856606 #ifndef PCI_MSIX_ENTRY_CTRL_MASKBIT
31*6b8a3e40Sjfb8856606 #define PCI_MSIX_ENTRY_CTRL_MASKBIT    1
32*6b8a3e40Sjfb8856606 #endif
33*6b8a3e40Sjfb8856606 
34*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 34) && \
35*6b8a3e40Sjfb8856606 	(!(defined(RHEL_RELEASE_CODE) && \
36*6b8a3e40Sjfb8856606 	 RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(5, 9)))
37*6b8a3e40Sjfb8856606 
pci_num_vf(struct pci_dev * dev)38*6b8a3e40Sjfb8856606 static int pci_num_vf(struct pci_dev *dev)
39*6b8a3e40Sjfb8856606 {
40*6b8a3e40Sjfb8856606 	struct iov {
41*6b8a3e40Sjfb8856606 		int pos;
42*6b8a3e40Sjfb8856606 		int nres;
43*6b8a3e40Sjfb8856606 		u32 cap;
44*6b8a3e40Sjfb8856606 		u16 ctrl;
45*6b8a3e40Sjfb8856606 		u16 total;
46*6b8a3e40Sjfb8856606 		u16 initial;
47*6b8a3e40Sjfb8856606 		u16 nr_virtfn;
48*6b8a3e40Sjfb8856606 	} *iov = (struct iov *)dev->sriov;
49*6b8a3e40Sjfb8856606 
50*6b8a3e40Sjfb8856606 	if (!dev->is_physfn)
51*6b8a3e40Sjfb8856606 		return 0;
52*6b8a3e40Sjfb8856606 
53*6b8a3e40Sjfb8856606 	return iov->nr_virtfn;
54*6b8a3e40Sjfb8856606 }
55*6b8a3e40Sjfb8856606 
56*6b8a3e40Sjfb8856606 #endif /* < 2.6.34 */
57*6b8a3e40Sjfb8856606 
58*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 39) && \
59*6b8a3e40Sjfb8856606 	(!(defined(RHEL_RELEASE_CODE) && \
60*6b8a3e40Sjfb8856606 	   RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6, 4)))
61*6b8a3e40Sjfb8856606 
62*6b8a3e40Sjfb8856606 #define kstrtoul strict_strtoul
63*6b8a3e40Sjfb8856606 
64*6b8a3e40Sjfb8856606 #endif /* < 2.6.39 */
65*6b8a3e40Sjfb8856606 
66*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 3, 0) && \
67*6b8a3e40Sjfb8856606 	(!(defined(RHEL_RELEASE_CODE) && \
68*6b8a3e40Sjfb8856606 	   RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(6, 3)))
69*6b8a3e40Sjfb8856606 
70*6b8a3e40Sjfb8856606 /* Check if INTX works to control irq's.
71*6b8a3e40Sjfb8856606  * Set's INTX_DISABLE flag and reads it back
72*6b8a3e40Sjfb8856606  */
pci_intx_mask_supported(struct pci_dev * pdev)73*6b8a3e40Sjfb8856606 static bool pci_intx_mask_supported(struct pci_dev *pdev)
74*6b8a3e40Sjfb8856606 {
75*6b8a3e40Sjfb8856606 	bool mask_supported = false;
76*6b8a3e40Sjfb8856606 	uint16_t orig, new;
77*6b8a3e40Sjfb8856606 
78*6b8a3e40Sjfb8856606 	pci_block_user_cfg_access(pdev);
79*6b8a3e40Sjfb8856606 	pci_read_config_word(pdev, PCI_COMMAND, &orig);
80*6b8a3e40Sjfb8856606 	pci_write_config_word(pdev, PCI_COMMAND,
81*6b8a3e40Sjfb8856606 			      orig ^ PCI_COMMAND_INTX_DISABLE);
82*6b8a3e40Sjfb8856606 	pci_read_config_word(pdev, PCI_COMMAND, &new);
83*6b8a3e40Sjfb8856606 
84*6b8a3e40Sjfb8856606 	if ((new ^ orig) & ~PCI_COMMAND_INTX_DISABLE) {
85*6b8a3e40Sjfb8856606 		dev_err(&pdev->dev, "Command register changed from "
86*6b8a3e40Sjfb8856606 			"0x%x to 0x%x: driver or hardware bug?\n", orig, new);
87*6b8a3e40Sjfb8856606 	} else if ((new ^ orig) & PCI_COMMAND_INTX_DISABLE) {
88*6b8a3e40Sjfb8856606 		mask_supported = true;
89*6b8a3e40Sjfb8856606 		pci_write_config_word(pdev, PCI_COMMAND, orig);
90*6b8a3e40Sjfb8856606 	}
91*6b8a3e40Sjfb8856606 	pci_unblock_user_cfg_access(pdev);
92*6b8a3e40Sjfb8856606 
93*6b8a3e40Sjfb8856606 	return mask_supported;
94*6b8a3e40Sjfb8856606 }
95*6b8a3e40Sjfb8856606 
pci_check_and_mask_intx(struct pci_dev * pdev)96*6b8a3e40Sjfb8856606 static bool pci_check_and_mask_intx(struct pci_dev *pdev)
97*6b8a3e40Sjfb8856606 {
98*6b8a3e40Sjfb8856606 	bool pending;
99*6b8a3e40Sjfb8856606 	uint32_t status;
100*6b8a3e40Sjfb8856606 
101*6b8a3e40Sjfb8856606 	pci_block_user_cfg_access(pdev);
102*6b8a3e40Sjfb8856606 	pci_read_config_dword(pdev, PCI_COMMAND, &status);
103*6b8a3e40Sjfb8856606 
104*6b8a3e40Sjfb8856606 	/* interrupt is not ours, goes to out */
105*6b8a3e40Sjfb8856606 	pending = (((status >> 16) & PCI_STATUS_INTERRUPT) != 0);
106*6b8a3e40Sjfb8856606 	if (pending) {
107*6b8a3e40Sjfb8856606 		uint16_t old, new;
108*6b8a3e40Sjfb8856606 
109*6b8a3e40Sjfb8856606 		old = status;
110*6b8a3e40Sjfb8856606 		if (status != 0)
111*6b8a3e40Sjfb8856606 			new = old & (~PCI_COMMAND_INTX_DISABLE);
112*6b8a3e40Sjfb8856606 		else
113*6b8a3e40Sjfb8856606 			new = old | PCI_COMMAND_INTX_DISABLE;
114*6b8a3e40Sjfb8856606 
115*6b8a3e40Sjfb8856606 		if (old != new)
116*6b8a3e40Sjfb8856606 			pci_write_config_word(pdev, PCI_COMMAND, new);
117*6b8a3e40Sjfb8856606 	}
118*6b8a3e40Sjfb8856606 	pci_unblock_user_cfg_access(pdev);
119*6b8a3e40Sjfb8856606 
120*6b8a3e40Sjfb8856606 	return pending;
121*6b8a3e40Sjfb8856606 }
122*6b8a3e40Sjfb8856606 
123*6b8a3e40Sjfb8856606 #endif /* < 3.3.0 */
124*6b8a3e40Sjfb8856606 
125*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 16, 0)
126*6b8a3e40Sjfb8856606 #define HAVE_PCI_IS_BRIDGE_API 1
127*6b8a3e40Sjfb8856606 #endif
128*6b8a3e40Sjfb8856606 
129*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 3, 0)
130*6b8a3e40Sjfb8856606 #define HAVE_MSI_LIST_IN_GENERIC_DEVICE 1
131*6b8a3e40Sjfb8856606 #endif
132*6b8a3e40Sjfb8856606 
133*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)
134*6b8a3e40Sjfb8856606 #define HAVE_PCI_MSI_MASK_IRQ 1
135*6b8a3e40Sjfb8856606 #endif
136*6b8a3e40Sjfb8856606 
137*6b8a3e40Sjfb8856606 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 8, 0)
138*6b8a3e40Sjfb8856606 #define HAVE_ALLOC_IRQ_VECTORS 1
139*6b8a3e40Sjfb8856606 #endif
140*6b8a3e40Sjfb8856606 
igbuio_kernel_is_locked_down(void)141*6b8a3e40Sjfb8856606 static inline bool igbuio_kernel_is_locked_down(void)
142*6b8a3e40Sjfb8856606 {
143*6b8a3e40Sjfb8856606 #ifdef CONFIG_LOCK_DOWN_KERNEL
144*6b8a3e40Sjfb8856606 #ifdef CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT
145*6b8a3e40Sjfb8856606 	return kernel_is_locked_down(NULL);
146*6b8a3e40Sjfb8856606 #elif defined(CONFIG_EFI_SECURE_BOOT_LOCK_DOWN)
147*6b8a3e40Sjfb8856606 	return kernel_is_locked_down();
148*6b8a3e40Sjfb8856606 #else
149*6b8a3e40Sjfb8856606 	return false;
150*6b8a3e40Sjfb8856606 #endif
151*6b8a3e40Sjfb8856606 #else
152*6b8a3e40Sjfb8856606 	return false;
153*6b8a3e40Sjfb8856606 #endif
154*6b8a3e40Sjfb8856606 }
155