xref: /f-stack/dpdk/examples/timer/main.c (revision a9643ea8)
1*a9643ea8Slogwang /*-
2*a9643ea8Slogwang  *   BSD LICENSE
3*a9643ea8Slogwang  *
4*a9643ea8Slogwang  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5*a9643ea8Slogwang  *   All rights reserved.
6*a9643ea8Slogwang  *
7*a9643ea8Slogwang  *   Redistribution and use in source and binary forms, with or without
8*a9643ea8Slogwang  *   modification, are permitted provided that the following conditions
9*a9643ea8Slogwang  *   are met:
10*a9643ea8Slogwang  *
11*a9643ea8Slogwang  *     * Redistributions of source code must retain the above copyright
12*a9643ea8Slogwang  *       notice, this list of conditions and the following disclaimer.
13*a9643ea8Slogwang  *     * Redistributions in binary form must reproduce the above copyright
14*a9643ea8Slogwang  *       notice, this list of conditions and the following disclaimer in
15*a9643ea8Slogwang  *       the documentation and/or other materials provided with the
16*a9643ea8Slogwang  *       distribution.
17*a9643ea8Slogwang  *     * Neither the name of Intel Corporation nor the names of its
18*a9643ea8Slogwang  *       contributors may be used to endorse or promote products derived
19*a9643ea8Slogwang  *       from this software without specific prior written permission.
20*a9643ea8Slogwang  *
21*a9643ea8Slogwang  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22*a9643ea8Slogwang  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23*a9643ea8Slogwang  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24*a9643ea8Slogwang  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25*a9643ea8Slogwang  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26*a9643ea8Slogwang  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27*a9643ea8Slogwang  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28*a9643ea8Slogwang  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29*a9643ea8Slogwang  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30*a9643ea8Slogwang  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31*a9643ea8Slogwang  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32*a9643ea8Slogwang  */
33*a9643ea8Slogwang 
34*a9643ea8Slogwang #include <stdio.h>
35*a9643ea8Slogwang #include <string.h>
36*a9643ea8Slogwang #include <stdint.h>
37*a9643ea8Slogwang #include <errno.h>
38*a9643ea8Slogwang #include <sys/queue.h>
39*a9643ea8Slogwang 
40*a9643ea8Slogwang #include <rte_common.h>
41*a9643ea8Slogwang #include <rte_memory.h>
42*a9643ea8Slogwang #include <rte_memzone.h>
43*a9643ea8Slogwang #include <rte_launch.h>
44*a9643ea8Slogwang #include <rte_eal.h>
45*a9643ea8Slogwang #include <rte_per_lcore.h>
46*a9643ea8Slogwang #include <rte_lcore.h>
47*a9643ea8Slogwang #include <rte_cycles.h>
48*a9643ea8Slogwang #include <rte_timer.h>
49*a9643ea8Slogwang #include <rte_debug.h>
50*a9643ea8Slogwang 
51*a9643ea8Slogwang #define TIMER_RESOLUTION_CYCLES 20000000ULL /* around 10ms at 2 Ghz */
52*a9643ea8Slogwang 
53*a9643ea8Slogwang static struct rte_timer timer0;
54*a9643ea8Slogwang static struct rte_timer timer1;
55*a9643ea8Slogwang 
56*a9643ea8Slogwang /* timer0 callback */
57*a9643ea8Slogwang static void
58*a9643ea8Slogwang timer0_cb(__attribute__((unused)) struct rte_timer *tim,
59*a9643ea8Slogwang 	  __attribute__((unused)) void *arg)
60*a9643ea8Slogwang {
61*a9643ea8Slogwang 	static unsigned counter = 0;
62*a9643ea8Slogwang 	unsigned lcore_id = rte_lcore_id();
63*a9643ea8Slogwang 
64*a9643ea8Slogwang 	printf("%s() on lcore %u\n", __func__, lcore_id);
65*a9643ea8Slogwang 
66*a9643ea8Slogwang 	/* this timer is automatically reloaded until we decide to
67*a9643ea8Slogwang 	 * stop it, when counter reaches 20. */
68*a9643ea8Slogwang 	if ((counter ++) == 20)
69*a9643ea8Slogwang 		rte_timer_stop(tim);
70*a9643ea8Slogwang }
71*a9643ea8Slogwang 
72*a9643ea8Slogwang /* timer1 callback */
73*a9643ea8Slogwang static void
74*a9643ea8Slogwang timer1_cb(__attribute__((unused)) struct rte_timer *tim,
75*a9643ea8Slogwang 	  __attribute__((unused)) void *arg)
76*a9643ea8Slogwang {
77*a9643ea8Slogwang 	unsigned lcore_id = rte_lcore_id();
78*a9643ea8Slogwang 	uint64_t hz;
79*a9643ea8Slogwang 
80*a9643ea8Slogwang 	printf("%s() on lcore %u\n", __func__, lcore_id);
81*a9643ea8Slogwang 
82*a9643ea8Slogwang 	/* reload it on another lcore */
83*a9643ea8Slogwang 	hz = rte_get_timer_hz();
84*a9643ea8Slogwang 	lcore_id = rte_get_next_lcore(lcore_id, 0, 1);
85*a9643ea8Slogwang 	rte_timer_reset(tim, hz/3, SINGLE, lcore_id, timer1_cb, NULL);
86*a9643ea8Slogwang }
87*a9643ea8Slogwang 
88*a9643ea8Slogwang static __attribute__((noreturn)) int
89*a9643ea8Slogwang lcore_mainloop(__attribute__((unused)) void *arg)
90*a9643ea8Slogwang {
91*a9643ea8Slogwang 	uint64_t prev_tsc = 0, cur_tsc, diff_tsc;
92*a9643ea8Slogwang 	unsigned lcore_id;
93*a9643ea8Slogwang 
94*a9643ea8Slogwang 	lcore_id = rte_lcore_id();
95*a9643ea8Slogwang 	printf("Starting mainloop on core %u\n", lcore_id);
96*a9643ea8Slogwang 
97*a9643ea8Slogwang 	while (1) {
98*a9643ea8Slogwang 		/*
99*a9643ea8Slogwang 		 * Call the timer handler on each core: as we don't
100*a9643ea8Slogwang 		 * need a very precise timer, so only call
101*a9643ea8Slogwang 		 * rte_timer_manage() every ~10ms (at 2Ghz). In a real
102*a9643ea8Slogwang 		 * application, this will enhance performances as
103*a9643ea8Slogwang 		 * reading the HPET timer is not efficient.
104*a9643ea8Slogwang 		 */
105*a9643ea8Slogwang 		cur_tsc = rte_rdtsc();
106*a9643ea8Slogwang 		diff_tsc = cur_tsc - prev_tsc;
107*a9643ea8Slogwang 		if (diff_tsc > TIMER_RESOLUTION_CYCLES) {
108*a9643ea8Slogwang 			rte_timer_manage();
109*a9643ea8Slogwang 			prev_tsc = cur_tsc;
110*a9643ea8Slogwang 		}
111*a9643ea8Slogwang 	}
112*a9643ea8Slogwang }
113*a9643ea8Slogwang 
114*a9643ea8Slogwang int
115*a9643ea8Slogwang main(int argc, char **argv)
116*a9643ea8Slogwang {
117*a9643ea8Slogwang 	int ret;
118*a9643ea8Slogwang 	uint64_t hz;
119*a9643ea8Slogwang 	unsigned lcore_id;
120*a9643ea8Slogwang 
121*a9643ea8Slogwang 	/* init EAL */
122*a9643ea8Slogwang 	ret = rte_eal_init(argc, argv);
123*a9643ea8Slogwang 	if (ret < 0)
124*a9643ea8Slogwang 		rte_panic("Cannot init EAL\n");
125*a9643ea8Slogwang 
126*a9643ea8Slogwang 	/* init RTE timer library */
127*a9643ea8Slogwang 	rte_timer_subsystem_init();
128*a9643ea8Slogwang 
129*a9643ea8Slogwang 	/* init timer structures */
130*a9643ea8Slogwang 	rte_timer_init(&timer0);
131*a9643ea8Slogwang 	rte_timer_init(&timer1);
132*a9643ea8Slogwang 
133*a9643ea8Slogwang 	/* load timer0, every second, on master lcore, reloaded automatically */
134*a9643ea8Slogwang 	hz = rte_get_timer_hz();
135*a9643ea8Slogwang 	lcore_id = rte_lcore_id();
136*a9643ea8Slogwang 	rte_timer_reset(&timer0, hz, PERIODICAL, lcore_id, timer0_cb, NULL);
137*a9643ea8Slogwang 
138*a9643ea8Slogwang 	/* load timer1, every second/3, on next lcore, reloaded manually */
139*a9643ea8Slogwang 	lcore_id = rte_get_next_lcore(lcore_id, 0, 1);
140*a9643ea8Slogwang 	rte_timer_reset(&timer1, hz/3, SINGLE, lcore_id, timer1_cb, NULL);
141*a9643ea8Slogwang 
142*a9643ea8Slogwang 	/* call lcore_mainloop() on every slave lcore */
143*a9643ea8Slogwang 	RTE_LCORE_FOREACH_SLAVE(lcore_id) {
144*a9643ea8Slogwang 		rte_eal_remote_launch(lcore_mainloop, NULL, lcore_id);
145*a9643ea8Slogwang 	}
146*a9643ea8Slogwang 
147*a9643ea8Slogwang 	/* call it on master lcore too */
148*a9643ea8Slogwang 	(void) lcore_mainloop(NULL);
149*a9643ea8Slogwang 
150*a9643ea8Slogwang 	return 0;
151*a9643ea8Slogwang }
152