1*a9643ea8Slogwang /*-
2*a9643ea8Slogwang  *   BSD LICENSE
3*a9643ea8Slogwang  *
4*a9643ea8Slogwang  *   Copyright(c) 2015 Intel Corporation. All rights reserved.
5*a9643ea8Slogwang  *   All rights reserved.
6*a9643ea8Slogwang  *
7*a9643ea8Slogwang  *   Redistribution and use in source and binary forms, with or without
8*a9643ea8Slogwang  *   modification, are permitted provided that the following conditions
9*a9643ea8Slogwang  *   are met:
10*a9643ea8Slogwang  *
11*a9643ea8Slogwang  *     * Redistributions of source code must retain the above copyright
12*a9643ea8Slogwang  *       notice, this list of conditions and the following disclaimer.
13*a9643ea8Slogwang  *     * Redistributions in binary form must reproduce the above copyright
14*a9643ea8Slogwang  *       notice, this list of conditions and the following disclaimer in
15*a9643ea8Slogwang  *       the documentation and/or other materials provided with the
16*a9643ea8Slogwang  *       distribution.
17*a9643ea8Slogwang  *     * Neither the name of Intel Corporation nor the names of its
18*a9643ea8Slogwang  *       contributors may be used to endorse or promote products derived
19*a9643ea8Slogwang  *       from this software without specific prior written permission.
20*a9643ea8Slogwang  *
21*a9643ea8Slogwang  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22*a9643ea8Slogwang  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23*a9643ea8Slogwang  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24*a9643ea8Slogwang  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25*a9643ea8Slogwang  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26*a9643ea8Slogwang  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27*a9643ea8Slogwang  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28*a9643ea8Slogwang  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29*a9643ea8Slogwang  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30*a9643ea8Slogwang  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31*a9643ea8Slogwang  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32*a9643ea8Slogwang  */
33*a9643ea8Slogwang 
34*a9643ea8Slogwang 
35*a9643ea8Slogwang #ifndef LTHREAD_TIMER_H_
36*a9643ea8Slogwang #define LTHREAD_TIMER_H_
37*a9643ea8Slogwang 
38*a9643ea8Slogwang #include "lthread_int.h"
39*a9643ea8Slogwang #include "lthread_sched.h"
40*a9643ea8Slogwang 
41*a9643ea8Slogwang 
42*a9643ea8Slogwang static inline uint64_t
43*a9643ea8Slogwang _ns_to_clks(uint64_t ns)
44*a9643ea8Slogwang {
45*a9643ea8Slogwang 	unsigned __int128 clkns = rte_get_tsc_hz();
46*a9643ea8Slogwang 
47*a9643ea8Slogwang 	clkns *= ns;
48*a9643ea8Slogwang 	clkns /= 1000000000;
49*a9643ea8Slogwang 	return (uint64_t) clkns;
50*a9643ea8Slogwang }
51*a9643ea8Slogwang 
52*a9643ea8Slogwang 
53*a9643ea8Slogwang static inline void
54*a9643ea8Slogwang _timer_start(struct lthread *lt, uint64_t clks)
55*a9643ea8Slogwang {
56*a9643ea8Slogwang 	if (clks > 0) {
57*a9643ea8Slogwang 		DIAG_EVENT(lt, LT_DIAG_LTHREAD_TMR_START, &lt->tim, clks);
58*a9643ea8Slogwang 		rte_timer_init(&lt->tim);
59*a9643ea8Slogwang 		rte_timer_reset(&lt->tim,
60*a9643ea8Slogwang 				clks,
61*a9643ea8Slogwang 				SINGLE,
62*a9643ea8Slogwang 				rte_lcore_id(),
63*a9643ea8Slogwang 				_sched_timer_cb,
64*a9643ea8Slogwang 				(void *)lt);
65*a9643ea8Slogwang 	}
66*a9643ea8Slogwang }
67*a9643ea8Slogwang 
68*a9643ea8Slogwang 
69*a9643ea8Slogwang static inline void
70*a9643ea8Slogwang _timer_stop(struct lthread *lt)
71*a9643ea8Slogwang {
72*a9643ea8Slogwang 	if (lt != NULL) {
73*a9643ea8Slogwang 		DIAG_EVENT(lt, LT_DIAG_LTHREAD_TMR_DELETE, &lt->tim, 0);
74*a9643ea8Slogwang 		rte_timer_stop(&lt->tim);
75*a9643ea8Slogwang 	}
76*a9643ea8Slogwang }
77*a9643ea8Slogwang 
78*a9643ea8Slogwang 
79*a9643ea8Slogwang #endif /* LTHREAD_TIMER_H_ */
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