1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause
2d30ea906Sjfb8856606 * Copyright(c) 2010-2018 Intel Corporation
3d30ea906Sjfb8856606 */
4d30ea906Sjfb8856606
5d30ea906Sjfb8856606 #include <stdlib.h>
6d30ea906Sjfb8856606
7*2d9fd380Sjfb8856606 #include <rte_common.h>
8d30ea906Sjfb8856606 #include <rte_string_fns.h>
9d30ea906Sjfb8856606
10d30ea906Sjfb8856606 #include "tmgr.h"
11d30ea906Sjfb8856606
12*2d9fd380Sjfb8856606 static struct rte_sched_subport_profile_params
13d30ea906Sjfb8856606 subport_profile[TMGR_SUBPORT_PROFILE_MAX];
14d30ea906Sjfb8856606
15d30ea906Sjfb8856606 static uint32_t n_subport_profiles;
16d30ea906Sjfb8856606
17d30ea906Sjfb8856606 static struct rte_sched_pipe_params
18d30ea906Sjfb8856606 pipe_profile[TMGR_PIPE_PROFILE_MAX];
19d30ea906Sjfb8856606
20d30ea906Sjfb8856606 static uint32_t n_pipe_profiles;
21d30ea906Sjfb8856606
22*2d9fd380Sjfb8856606 static const struct rte_sched_subport_params subport_params_default = {
23*2d9fd380Sjfb8856606 .n_pipes_per_subport_enabled = 0, /* filled at runtime */
24*2d9fd380Sjfb8856606 .qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64},
25*2d9fd380Sjfb8856606 .pipe_profiles = pipe_profile,
26*2d9fd380Sjfb8856606 .n_pipe_profiles = 0, /* filled at run time */
27*2d9fd380Sjfb8856606 .n_max_pipe_profiles = RTE_DIM(pipe_profile),
28*2d9fd380Sjfb8856606 #ifdef RTE_SCHED_RED
29*2d9fd380Sjfb8856606 .red_params = {
30*2d9fd380Sjfb8856606 /* Traffic Class 0 Colors Green / Yellow / Red */
31*2d9fd380Sjfb8856606 [0][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
32*2d9fd380Sjfb8856606 [0][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
33*2d9fd380Sjfb8856606 [0][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
34*2d9fd380Sjfb8856606
35*2d9fd380Sjfb8856606 /* Traffic Class 1 - Colors Green / Yellow / Red */
36*2d9fd380Sjfb8856606 [1][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
37*2d9fd380Sjfb8856606 [1][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
38*2d9fd380Sjfb8856606 [1][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
39*2d9fd380Sjfb8856606
40*2d9fd380Sjfb8856606 /* Traffic Class 2 - Colors Green / Yellow / Red */
41*2d9fd380Sjfb8856606 [2][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
42*2d9fd380Sjfb8856606 [2][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
43*2d9fd380Sjfb8856606 [2][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
44*2d9fd380Sjfb8856606
45*2d9fd380Sjfb8856606 /* Traffic Class 3 - Colors Green / Yellow / Red */
46*2d9fd380Sjfb8856606 [3][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
47*2d9fd380Sjfb8856606 [3][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
48*2d9fd380Sjfb8856606 [3][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
49*2d9fd380Sjfb8856606
50*2d9fd380Sjfb8856606 /* Traffic Class 4 - Colors Green / Yellow / Red */
51*2d9fd380Sjfb8856606 [4][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
52*2d9fd380Sjfb8856606 [4][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
53*2d9fd380Sjfb8856606 [4][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
54*2d9fd380Sjfb8856606
55*2d9fd380Sjfb8856606 /* Traffic Class 5 - Colors Green / Yellow / Red */
56*2d9fd380Sjfb8856606 [5][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
57*2d9fd380Sjfb8856606 [5][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
58*2d9fd380Sjfb8856606 [5][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
59*2d9fd380Sjfb8856606
60*2d9fd380Sjfb8856606 /* Traffic Class 6 - Colors Green / Yellow / Red */
61*2d9fd380Sjfb8856606 [6][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
62*2d9fd380Sjfb8856606 [6][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
63*2d9fd380Sjfb8856606 [6][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
64*2d9fd380Sjfb8856606
65*2d9fd380Sjfb8856606 /* Traffic Class 7 - Colors Green / Yellow / Red */
66*2d9fd380Sjfb8856606 [7][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
67*2d9fd380Sjfb8856606 [7][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
68*2d9fd380Sjfb8856606 [7][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
69*2d9fd380Sjfb8856606
70*2d9fd380Sjfb8856606 /* Traffic Class 8 - Colors Green / Yellow / Red */
71*2d9fd380Sjfb8856606 [8][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
72*2d9fd380Sjfb8856606 [8][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
73*2d9fd380Sjfb8856606 [8][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
74*2d9fd380Sjfb8856606
75*2d9fd380Sjfb8856606 /* Traffic Class 9 - Colors Green / Yellow / Red */
76*2d9fd380Sjfb8856606 [9][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
77*2d9fd380Sjfb8856606 [9][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
78*2d9fd380Sjfb8856606 [9][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
79*2d9fd380Sjfb8856606
80*2d9fd380Sjfb8856606 /* Traffic Class 10 - Colors Green / Yellow / Red */
81*2d9fd380Sjfb8856606 [10][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
82*2d9fd380Sjfb8856606 [10][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
83*2d9fd380Sjfb8856606 [10][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
84*2d9fd380Sjfb8856606
85*2d9fd380Sjfb8856606 /* Traffic Class 11 - Colors Green / Yellow / Red */
86*2d9fd380Sjfb8856606 [11][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
87*2d9fd380Sjfb8856606 [11][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
88*2d9fd380Sjfb8856606 [11][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
89*2d9fd380Sjfb8856606
90*2d9fd380Sjfb8856606 /* Traffic Class 12 - Colors Green / Yellow / Red */
91*2d9fd380Sjfb8856606 [12][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
92*2d9fd380Sjfb8856606 [12][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
93*2d9fd380Sjfb8856606 [12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
94*2d9fd380Sjfb8856606 },
95*2d9fd380Sjfb8856606 #endif /* RTE_SCHED_RED */
96*2d9fd380Sjfb8856606 };
97*2d9fd380Sjfb8856606
98d30ea906Sjfb8856606 static struct tmgr_port_list tmgr_port_list;
99d30ea906Sjfb8856606
100d30ea906Sjfb8856606 int
tmgr_init(void)101d30ea906Sjfb8856606 tmgr_init(void)
102d30ea906Sjfb8856606 {
103d30ea906Sjfb8856606 TAILQ_INIT(&tmgr_port_list);
104d30ea906Sjfb8856606
105d30ea906Sjfb8856606 return 0;
106d30ea906Sjfb8856606 }
107d30ea906Sjfb8856606
108d30ea906Sjfb8856606 struct tmgr_port *
tmgr_port_find(const char * name)109d30ea906Sjfb8856606 tmgr_port_find(const char *name)
110d30ea906Sjfb8856606 {
111d30ea906Sjfb8856606 struct tmgr_port *tmgr_port;
112d30ea906Sjfb8856606
113d30ea906Sjfb8856606 if (name == NULL)
114d30ea906Sjfb8856606 return NULL;
115d30ea906Sjfb8856606
116d30ea906Sjfb8856606 TAILQ_FOREACH(tmgr_port, &tmgr_port_list, node)
117d30ea906Sjfb8856606 if (strcmp(tmgr_port->name, name) == 0)
118d30ea906Sjfb8856606 return tmgr_port;
119d30ea906Sjfb8856606
120d30ea906Sjfb8856606 return NULL;
121d30ea906Sjfb8856606 }
122d30ea906Sjfb8856606
123d30ea906Sjfb8856606 int
tmgr_subport_profile_add(struct rte_sched_subport_profile_params * params)124*2d9fd380Sjfb8856606 tmgr_subport_profile_add(struct rte_sched_subport_profile_params *params)
125d30ea906Sjfb8856606 {
126d30ea906Sjfb8856606 /* Check input params */
127*2d9fd380Sjfb8856606 if (params == NULL)
128d30ea906Sjfb8856606 return -1;
129d30ea906Sjfb8856606
130d30ea906Sjfb8856606 /* Save profile */
131d30ea906Sjfb8856606 memcpy(&subport_profile[n_subport_profiles],
132*2d9fd380Sjfb8856606 params,
133*2d9fd380Sjfb8856606 sizeof(*params));
134d30ea906Sjfb8856606
135d30ea906Sjfb8856606 n_subport_profiles++;
136d30ea906Sjfb8856606
137d30ea906Sjfb8856606 return 0;
138d30ea906Sjfb8856606 }
139d30ea906Sjfb8856606
140d30ea906Sjfb8856606 int
tmgr_pipe_profile_add(struct rte_sched_pipe_params * p)141d30ea906Sjfb8856606 tmgr_pipe_profile_add(struct rte_sched_pipe_params *p)
142d30ea906Sjfb8856606 {
143d30ea906Sjfb8856606 /* Check input params */
144d30ea906Sjfb8856606 if (p == NULL)
145d30ea906Sjfb8856606 return -1;
146d30ea906Sjfb8856606
147d30ea906Sjfb8856606 /* Save profile */
148d30ea906Sjfb8856606 memcpy(&pipe_profile[n_pipe_profiles],
149d30ea906Sjfb8856606 p,
150d30ea906Sjfb8856606 sizeof(*p));
151d30ea906Sjfb8856606
152d30ea906Sjfb8856606 n_pipe_profiles++;
153d30ea906Sjfb8856606
154d30ea906Sjfb8856606 return 0;
155d30ea906Sjfb8856606 }
156d30ea906Sjfb8856606
157d30ea906Sjfb8856606 struct tmgr_port *
tmgr_port_create(const char * name,struct tmgr_port_params * params)158d30ea906Sjfb8856606 tmgr_port_create(const char *name, struct tmgr_port_params *params)
159d30ea906Sjfb8856606 {
160*2d9fd380Sjfb8856606 struct rte_sched_subport_params subport_params;
161d30ea906Sjfb8856606 struct rte_sched_port_params p;
162d30ea906Sjfb8856606 struct tmgr_port *tmgr_port;
163d30ea906Sjfb8856606 struct rte_sched_port *s;
164d30ea906Sjfb8856606 uint32_t i, j;
165d30ea906Sjfb8856606
166d30ea906Sjfb8856606 /* Check input params */
167d30ea906Sjfb8856606 if ((name == NULL) ||
168d30ea906Sjfb8856606 tmgr_port_find(name) ||
169d30ea906Sjfb8856606 (params == NULL) ||
170d30ea906Sjfb8856606 (params->n_subports_per_port == 0) ||
171*2d9fd380Sjfb8856606 (params->n_pipes_per_subport == 0) ||
172d30ea906Sjfb8856606 (params->cpu_id >= RTE_MAX_NUMA_NODES) ||
173d30ea906Sjfb8856606 (n_subport_profiles == 0) ||
174d30ea906Sjfb8856606 (n_pipe_profiles == 0))
175d30ea906Sjfb8856606 return NULL;
176d30ea906Sjfb8856606
177d30ea906Sjfb8856606 /* Resource create */
178d30ea906Sjfb8856606 p.name = name;
179d30ea906Sjfb8856606 p.socket = (int) params->cpu_id;
180d30ea906Sjfb8856606 p.rate = params->rate;
181d30ea906Sjfb8856606 p.mtu = params->mtu;
182d30ea906Sjfb8856606 p.frame_overhead = params->frame_overhead;
183d30ea906Sjfb8856606 p.n_subports_per_port = params->n_subports_per_port;
184*2d9fd380Sjfb8856606 p.n_subport_profiles = n_subport_profiles;
185*2d9fd380Sjfb8856606 p.subport_profiles = subport_profile;
186*2d9fd380Sjfb8856606 p.n_max_subport_profiles = TMGR_SUBPORT_PROFILE_MAX;
187*2d9fd380Sjfb8856606 p.n_pipes_per_subport = params->n_pipes_per_subport;
188*2d9fd380Sjfb8856606
189d30ea906Sjfb8856606
190d30ea906Sjfb8856606 s = rte_sched_port_config(&p);
191d30ea906Sjfb8856606 if (s == NULL)
192d30ea906Sjfb8856606 return NULL;
193d30ea906Sjfb8856606
194*2d9fd380Sjfb8856606 memcpy(&subport_params, &subport_params_default,
195*2d9fd380Sjfb8856606 sizeof(subport_params_default));
196*2d9fd380Sjfb8856606
197*2d9fd380Sjfb8856606 subport_params.n_pipe_profiles = n_pipe_profiles;
198*2d9fd380Sjfb8856606 subport_params.n_pipes_per_subport_enabled =
199*2d9fd380Sjfb8856606 params->n_pipes_per_subport;
2004418919fSjohnjiang
201d30ea906Sjfb8856606 for (i = 0; i < params->n_subports_per_port; i++) {
202d30ea906Sjfb8856606 int status;
203d30ea906Sjfb8856606
204d30ea906Sjfb8856606 status = rte_sched_subport_config(
205d30ea906Sjfb8856606 s,
206d30ea906Sjfb8856606 i,
207*2d9fd380Sjfb8856606 &subport_params,
208*2d9fd380Sjfb8856606 0);
209d30ea906Sjfb8856606
210d30ea906Sjfb8856606 if (status) {
211d30ea906Sjfb8856606 rte_sched_port_free(s);
212d30ea906Sjfb8856606 return NULL;
213d30ea906Sjfb8856606 }
214d30ea906Sjfb8856606
215*2d9fd380Sjfb8856606 for (j = 0; j < params->n_pipes_per_subport; j++) {
216*2d9fd380Sjfb8856606
217d30ea906Sjfb8856606 status = rte_sched_pipe_config(
218d30ea906Sjfb8856606 s,
219d30ea906Sjfb8856606 i,
220d30ea906Sjfb8856606 j,
221d30ea906Sjfb8856606 0);
222d30ea906Sjfb8856606
223d30ea906Sjfb8856606 if (status) {
224d30ea906Sjfb8856606 rte_sched_port_free(s);
225d30ea906Sjfb8856606 return NULL;
226d30ea906Sjfb8856606 }
227d30ea906Sjfb8856606 }
228d30ea906Sjfb8856606 }
229d30ea906Sjfb8856606
230d30ea906Sjfb8856606 /* Node allocation */
231d30ea906Sjfb8856606 tmgr_port = calloc(1, sizeof(struct tmgr_port));
232d30ea906Sjfb8856606 if (tmgr_port == NULL) {
233d30ea906Sjfb8856606 rte_sched_port_free(s);
234d30ea906Sjfb8856606 return NULL;
235d30ea906Sjfb8856606 }
236d30ea906Sjfb8856606
237d30ea906Sjfb8856606 /* Node fill in */
238d30ea906Sjfb8856606 strlcpy(tmgr_port->name, name, sizeof(tmgr_port->name));
239d30ea906Sjfb8856606 tmgr_port->s = s;
240d30ea906Sjfb8856606 tmgr_port->n_subports_per_port = params->n_subports_per_port;
241*2d9fd380Sjfb8856606 tmgr_port->n_pipes_per_subport = params->n_pipes_per_subport;
242d30ea906Sjfb8856606
243d30ea906Sjfb8856606 /* Node add to list */
244d30ea906Sjfb8856606 TAILQ_INSERT_TAIL(&tmgr_port_list, tmgr_port, node);
245d30ea906Sjfb8856606
246d30ea906Sjfb8856606 return tmgr_port;
247d30ea906Sjfb8856606 }
248d30ea906Sjfb8856606
249d30ea906Sjfb8856606 int
tmgr_subport_config(const char * port_name,uint32_t subport_id,uint32_t subport_profile_id)250d30ea906Sjfb8856606 tmgr_subport_config(const char *port_name,
251d30ea906Sjfb8856606 uint32_t subport_id,
252d30ea906Sjfb8856606 uint32_t subport_profile_id)
253d30ea906Sjfb8856606 {
254d30ea906Sjfb8856606 struct tmgr_port *port;
255d30ea906Sjfb8856606 int status;
256d30ea906Sjfb8856606
257d30ea906Sjfb8856606 /* Check input params */
258d30ea906Sjfb8856606 if (port_name == NULL)
259d30ea906Sjfb8856606 return -1;
260d30ea906Sjfb8856606
261d30ea906Sjfb8856606 port = tmgr_port_find(port_name);
262d30ea906Sjfb8856606 if ((port == NULL) ||
263d30ea906Sjfb8856606 (subport_id >= port->n_subports_per_port) ||
264d30ea906Sjfb8856606 (subport_profile_id >= n_subport_profiles))
265d30ea906Sjfb8856606 return -1;
266d30ea906Sjfb8856606
267d30ea906Sjfb8856606 /* Resource config */
268d30ea906Sjfb8856606 status = rte_sched_subport_config(
269d30ea906Sjfb8856606 port->s,
270d30ea906Sjfb8856606 subport_id,
271*2d9fd380Sjfb8856606 NULL,
272*2d9fd380Sjfb8856606 subport_profile_id);
273d30ea906Sjfb8856606
274d30ea906Sjfb8856606 return status;
275d30ea906Sjfb8856606 }
276d30ea906Sjfb8856606
277d30ea906Sjfb8856606 int
tmgr_pipe_config(const char * port_name,uint32_t subport_id,uint32_t pipe_id_first,uint32_t pipe_id_last,uint32_t pipe_profile_id)278d30ea906Sjfb8856606 tmgr_pipe_config(const char *port_name,
279d30ea906Sjfb8856606 uint32_t subport_id,
280d30ea906Sjfb8856606 uint32_t pipe_id_first,
281d30ea906Sjfb8856606 uint32_t pipe_id_last,
282d30ea906Sjfb8856606 uint32_t pipe_profile_id)
283d30ea906Sjfb8856606 {
284d30ea906Sjfb8856606 struct tmgr_port *port;
285d30ea906Sjfb8856606 uint32_t i;
286d30ea906Sjfb8856606
287d30ea906Sjfb8856606 /* Check input params */
288d30ea906Sjfb8856606 if (port_name == NULL)
289d30ea906Sjfb8856606 return -1;
290d30ea906Sjfb8856606
291d30ea906Sjfb8856606 port = tmgr_port_find(port_name);
292d30ea906Sjfb8856606 if ((port == NULL) ||
293d30ea906Sjfb8856606 (subport_id >= port->n_subports_per_port) ||
294*2d9fd380Sjfb8856606 (pipe_id_first >= port->n_pipes_per_subport) ||
295*2d9fd380Sjfb8856606 (pipe_id_last >= port->n_pipes_per_subport) ||
296d30ea906Sjfb8856606 (pipe_id_first > pipe_id_last) ||
297d30ea906Sjfb8856606 (pipe_profile_id >= n_pipe_profiles))
298d30ea906Sjfb8856606 return -1;
299d30ea906Sjfb8856606
300d30ea906Sjfb8856606 /* Resource config */
301d30ea906Sjfb8856606 for (i = pipe_id_first; i <= pipe_id_last; i++) {
302d30ea906Sjfb8856606 int status;
303d30ea906Sjfb8856606
304d30ea906Sjfb8856606 status = rte_sched_pipe_config(
305d30ea906Sjfb8856606 port->s,
306d30ea906Sjfb8856606 subport_id,
307d30ea906Sjfb8856606 i,
308d30ea906Sjfb8856606 (int) pipe_profile_id);
309d30ea906Sjfb8856606
310d30ea906Sjfb8856606 if (status)
311d30ea906Sjfb8856606 return status;
312d30ea906Sjfb8856606 }
313d30ea906Sjfb8856606
314d30ea906Sjfb8856606 return 0;
315d30ea906Sjfb8856606 }
316