Name Date Size #Lines LOC

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osdep_raw/H22-Aug-2023-7756

osdep_rte/H22-Aug-2023-6244

READMEH A D22-Aug-20231.4 KiB4734

ifpga_api.cH A D22-Aug-20239.8 KiB423314

ifpga_api.hH A D22-Aug-2023894 3018

ifpga_compat.hH A D22-Aug-20231.7 KiB5940

ifpga_defines.hH A D22-Aug-202341 KiB1,7401,280

ifpga_enumerate.cH A D22-Aug-202316.4 KiB741570

ifpga_enumerate.hH A D22-Aug-2023310 136

ifpga_feature_dev.cH A D22-Aug-20239.5 KiB393278

ifpga_feature_dev.hH A D22-Aug-20236.1 KiB225170

ifpga_fme.cH A D22-Aug-202334.7 KiB1,4701,118

ifpga_fme_dperf.cH A D22-Aug-20237.2 KiB302227

ifpga_fme_error.cH A D22-Aug-20239.9 KiB412318

ifpga_fme_iperf.cH A D22-Aug-202320.1 KiB716577

ifpga_fme_pr.cH A D22-Aug-20238.5 KiB358266

ifpga_hw.hH A D22-Aug-20233.2 KiB152115

ifpga_port.cH A D22-Aug-20239.7 KiB430314

ifpga_port_error.cH A D22-Aug-20233.8 KiB164122

meson.buildH A D22-Aug-2023867 4237

opae_at24_eeprom.cH A D22-Aug-20231.4 KiB8866

opae_at24_eeprom.hH A D22-Aug-2023406 157

opae_debug.cH A D22-Aug-20232.9 KiB10381

opae_debug.hH A D22-Aug-2023522 2012

opae_eth_group.cH A D22-Aug-20236.4 KiB317227

opae_eth_group.hH A D22-Aug-20232.1 KiB10382

opae_hw_api.cH A D22-Aug-202321.7 KiB967547

opae_hw_api.hH A D22-Aug-202311.2 KiB358279

opae_i2c.cH A D22-Aug-202311 KiB514388

opae_i2c.hH A D22-Aug-20234.3 KiB133107

opae_ifpga_hw_api.cH A D22-Aug-20232.9 KiB146100

opae_ifpga_hw_api.hH A D22-Aug-202311.8 KiB282207

opae_intel_max10.cH A D22-Aug-202314.1 KiB683537

opae_intel_max10.hH A D22-Aug-20235.6 KiB212165

opae_osdep.hH A D22-Aug-20232.4 KiB9476

opae_spi.cH A D22-Aug-20236.2 KiB304237

opae_spi.hH A D22-Aug-20235.3 KiB175153

opae_spi_transaction.cH A D22-Aug-202310.5 KiB506387

README

1..
2
3/* SPDX-License-Identifier: BSD-3-Clause
4 * Copyright(c) 2010-2018 Intel Corporation
5 */
6
7Intel iFPGA driver
8==================
9
10This directory contains source code of Intel FPGA driver released by
11the team which develops Intel FPGA Open Programmable Acceleration Engine (OPAE).
12The directory of base/ contains the original source package. The base code
13currently supports Intel FPGA solutions including integrated solution (Intel(R)
14Xeon(R) CPU with FPGAs) and discrete solution (Intel(R) Programmable Acceleration
15Card with Intel(R) Arria(R) 10 FPGA) and it could be extended to support more FPGA
16devices in the future.
17
18Please refer to [1][2] for more introduction on OPAE and Intel FPGAs.
19
20[1] https://01.org/OPAE
21[2] https://www.altera.com/solutions/acceleration-hub/overview.html
22
23
24Updating the driver
25===================
26
27NOTE: The source code in this directory should not be modified apart from
28the following file(s):
29
30	osdep_raw/osdep_generic.h
31	osdep_rte/osdep_generic.h
32
33
34New Features
35==================
36
372019-03:
38Support Intel FPGA PAC N3000 card.
39Some features added in this version:
401. Store private features in FME and Port list.
412. Add eth group devices driver.
423. Add altera SPI master driver and Intel MAX10 device driver.
434. Add Altera I2C master driver and AT24 eeprom driver.
445. Add Device Tree support to get the configuration from card.
456. Instruding and exposing APIs to DPDK PMD driver to access networking
46functionality.
47