1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause 22bfe3f2eSlogwang * 3*2d9fd380Sjfb8856606 * Copyright(c) 2019-2020 Xilinx, Inc. 4*2d9fd380Sjfb8856606 * Copyright(c) 2016-2019 Solarflare Communications Inc. 52bfe3f2eSlogwang * 62bfe3f2eSlogwang * This software was jointly developed between OKTET Labs (under contract 72bfe3f2eSlogwang * for Solarflare) and Solarflare Communications, Inc. 82bfe3f2eSlogwang */ 92bfe3f2eSlogwang 102bfe3f2eSlogwang #ifndef _SFC_DEBUG_H_ 112bfe3f2eSlogwang #define _SFC_DEBUG_H_ 122bfe3f2eSlogwang 132bfe3f2eSlogwang #include <rte_debug.h> 142bfe3f2eSlogwang 152bfe3f2eSlogwang #ifdef RTE_LIBRTE_SFC_EFX_DEBUG 16d30ea906Sjfb8856606 /* Avoid dependency from RTE_LOG_DP_LEVEL to be able to enable debug check 172bfe3f2eSlogwang * in the driver only. 182bfe3f2eSlogwang */ 192bfe3f2eSlogwang #define SFC_ASSERT(exp) RTE_VERIFY(exp) 202bfe3f2eSlogwang #else 212bfe3f2eSlogwang /* If the driver debug is not enabled, follow DPDK debug/non-debug */ 222bfe3f2eSlogwang #define SFC_ASSERT(exp) RTE_ASSERT(exp) 232bfe3f2eSlogwang #endif 242bfe3f2eSlogwang 252bfe3f2eSlogwang /* Log PMD message, automatically add prefix and \n */ 262bfe3f2eSlogwang #define sfc_panic(sa, fmt, args...) \ 272bfe3f2eSlogwang do { \ 284418919fSjohnjiang const struct sfc_adapter_shared *_sas; \ 292bfe3f2eSlogwang \ 304418919fSjohnjiang _sas = (sa)->priv.shared; \ 311646932aSjfb8856606 rte_panic("sfc " PCI_PRI_FMT \ 321646932aSjfb8856606 " #%" PRIu16 ": " fmt "\n", \ 334418919fSjohnjiang _sas->pci_addr.domain, _sas->pci_addr.bus, \ 344418919fSjohnjiang _sas->pci_addr.devid, _sas->pci_addr.function,\ 354418919fSjohnjiang _sas->port_id, ##args); \ 362bfe3f2eSlogwang } while (0) 372bfe3f2eSlogwang 382bfe3f2eSlogwang #endif /* _SFC_DEBUG_H_ */ 39