1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2016-2018 Solarflare Communications Inc. 4 * All rights reserved. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 /* sysconf() */ 11 #include <unistd.h> 12 13 #include <rte_errno.h> 14 #include <rte_alarm.h> 15 16 #include "efx.h" 17 18 #include "sfc.h" 19 #include "sfc_log.h" 20 #include "sfc_ev.h" 21 #include "sfc_rx.h" 22 #include "sfc_tx.h" 23 #include "sfc_kvargs.h" 24 #include "sfc_tweak.h" 25 26 27 int 28 sfc_dma_alloc(const struct sfc_adapter *sa, const char *name, uint16_t id, 29 size_t len, int socket_id, efsys_mem_t *esmp) 30 { 31 const struct rte_memzone *mz; 32 33 sfc_log_init(sa, "name=%s id=%u len=%lu socket_id=%d", 34 name, id, len, socket_id); 35 36 mz = rte_eth_dma_zone_reserve(sa->eth_dev, name, id, len, 37 sysconf(_SC_PAGESIZE), socket_id); 38 if (mz == NULL) { 39 sfc_err(sa, "cannot reserve DMA zone for %s:%u %#x@%d: %s", 40 name, (unsigned int)id, (unsigned int)len, socket_id, 41 rte_strerror(rte_errno)); 42 return ENOMEM; 43 } 44 45 esmp->esm_addr = mz->iova; 46 if (esmp->esm_addr == RTE_BAD_IOVA) { 47 (void)rte_memzone_free(mz); 48 return EFAULT; 49 } 50 51 esmp->esm_mz = mz; 52 esmp->esm_base = mz->addr; 53 54 return 0; 55 } 56 57 void 58 sfc_dma_free(const struct sfc_adapter *sa, efsys_mem_t *esmp) 59 { 60 int rc; 61 62 sfc_log_init(sa, "name=%s", esmp->esm_mz->name); 63 64 rc = rte_memzone_free(esmp->esm_mz); 65 if (rc != 0) 66 sfc_err(sa, "rte_memzone_free(() failed: %d", rc); 67 68 memset(esmp, 0, sizeof(*esmp)); 69 } 70 71 static uint32_t 72 sfc_phy_cap_from_link_speeds(uint32_t speeds) 73 { 74 uint32_t phy_caps = 0; 75 76 if (~speeds & ETH_LINK_SPEED_FIXED) { 77 phy_caps |= (1 << EFX_PHY_CAP_AN); 78 /* 79 * If no speeds are specified in the mask, any supported 80 * may be negotiated 81 */ 82 if (speeds == ETH_LINK_SPEED_AUTONEG) 83 phy_caps |= 84 (1 << EFX_PHY_CAP_1000FDX) | 85 (1 << EFX_PHY_CAP_10000FDX) | 86 (1 << EFX_PHY_CAP_25000FDX) | 87 (1 << EFX_PHY_CAP_40000FDX) | 88 (1 << EFX_PHY_CAP_50000FDX) | 89 (1 << EFX_PHY_CAP_100000FDX); 90 } 91 if (speeds & ETH_LINK_SPEED_1G) 92 phy_caps |= (1 << EFX_PHY_CAP_1000FDX); 93 if (speeds & ETH_LINK_SPEED_10G) 94 phy_caps |= (1 << EFX_PHY_CAP_10000FDX); 95 if (speeds & ETH_LINK_SPEED_25G) 96 phy_caps |= (1 << EFX_PHY_CAP_25000FDX); 97 if (speeds & ETH_LINK_SPEED_40G) 98 phy_caps |= (1 << EFX_PHY_CAP_40000FDX); 99 if (speeds & ETH_LINK_SPEED_50G) 100 phy_caps |= (1 << EFX_PHY_CAP_50000FDX); 101 if (speeds & ETH_LINK_SPEED_100G) 102 phy_caps |= (1 << EFX_PHY_CAP_100000FDX); 103 104 return phy_caps; 105 } 106 107 /* 108 * Check requested device level configuration. 109 * Receive and transmit configuration is checked in corresponding 110 * modules. 111 */ 112 static int 113 sfc_check_conf(struct sfc_adapter *sa) 114 { 115 const struct rte_eth_conf *conf = &sa->eth_dev->data->dev_conf; 116 int rc = 0; 117 118 sa->port.phy_adv_cap = 119 sfc_phy_cap_from_link_speeds(conf->link_speeds) & 120 sa->port.phy_adv_cap_mask; 121 if ((sa->port.phy_adv_cap & ~(1 << EFX_PHY_CAP_AN)) == 0) { 122 sfc_err(sa, "No link speeds from mask %#x are supported", 123 conf->link_speeds); 124 rc = EINVAL; 125 } 126 127 #if !EFSYS_OPT_LOOPBACK 128 if (conf->lpbk_mode != 0) { 129 sfc_err(sa, "Loopback not supported"); 130 rc = EINVAL; 131 } 132 #endif 133 134 if (conf->dcb_capability_en != 0) { 135 sfc_err(sa, "Priority-based flow control not supported"); 136 rc = EINVAL; 137 } 138 139 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 140 sfc_err(sa, "Flow Director not supported"); 141 rc = EINVAL; 142 } 143 144 if ((conf->intr_conf.lsc != 0) && 145 (sa->intr.type != EFX_INTR_LINE) && 146 (sa->intr.type != EFX_INTR_MESSAGE)) { 147 sfc_err(sa, "Link status change interrupt not supported"); 148 rc = EINVAL; 149 } 150 151 if (conf->intr_conf.rxq != 0) { 152 sfc_err(sa, "Receive queue interrupt not supported"); 153 rc = EINVAL; 154 } 155 156 return rc; 157 } 158 159 /* 160 * Find out maximum number of receive and transmit queues which could be 161 * advertised. 162 * 163 * NIC is kept initialized on success to allow other modules acquire 164 * defaults and capabilities. 165 */ 166 static int 167 sfc_estimate_resource_limits(struct sfc_adapter *sa) 168 { 169 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 170 efx_drv_limits_t limits; 171 int rc; 172 uint32_t evq_allocated; 173 uint32_t rxq_allocated; 174 uint32_t txq_allocated; 175 176 memset(&limits, 0, sizeof(limits)); 177 178 /* Request at least one Rx and Tx queue */ 179 limits.edl_min_rxq_count = 1; 180 limits.edl_min_txq_count = 1; 181 /* Management event queue plus event queue for each Tx and Rx queue */ 182 limits.edl_min_evq_count = 183 1 + limits.edl_min_rxq_count + limits.edl_min_txq_count; 184 185 /* Divide by number of functions to guarantee that all functions 186 * will get promised resources 187 */ 188 /* FIXME Divide by number of functions (not 2) below */ 189 limits.edl_max_evq_count = encp->enc_evq_limit / 2; 190 SFC_ASSERT(limits.edl_max_evq_count >= limits.edl_min_rxq_count); 191 192 /* Split equally between receive and transmit */ 193 limits.edl_max_rxq_count = 194 MIN(encp->enc_rxq_limit, (limits.edl_max_evq_count - 1) / 2); 195 SFC_ASSERT(limits.edl_max_rxq_count >= limits.edl_min_rxq_count); 196 197 limits.edl_max_txq_count = 198 MIN(encp->enc_txq_limit, 199 limits.edl_max_evq_count - 1 - limits.edl_max_rxq_count); 200 201 if (sa->tso) 202 limits.edl_max_txq_count = 203 MIN(limits.edl_max_txq_count, 204 encp->enc_fw_assisted_tso_v2_n_contexts / 205 encp->enc_hw_pf_count); 206 207 SFC_ASSERT(limits.edl_max_txq_count >= limits.edl_min_rxq_count); 208 209 /* Configure the minimum required resources needed for the 210 * driver to operate, and the maximum desired resources that the 211 * driver is capable of using. 212 */ 213 efx_nic_set_drv_limits(sa->nic, &limits); 214 215 sfc_log_init(sa, "init nic"); 216 rc = efx_nic_init(sa->nic); 217 if (rc != 0) 218 goto fail_nic_init; 219 220 /* Find resource dimensions assigned by firmware to this function */ 221 rc = efx_nic_get_vi_pool(sa->nic, &evq_allocated, &rxq_allocated, 222 &txq_allocated); 223 if (rc != 0) 224 goto fail_get_vi_pool; 225 226 /* It still may allocate more than maximum, ensure limit */ 227 evq_allocated = MIN(evq_allocated, limits.edl_max_evq_count); 228 rxq_allocated = MIN(rxq_allocated, limits.edl_max_rxq_count); 229 txq_allocated = MIN(txq_allocated, limits.edl_max_txq_count); 230 231 /* Subtract management EVQ not used for traffic */ 232 SFC_ASSERT(evq_allocated > 0); 233 evq_allocated--; 234 235 /* Right now we use separate EVQ for Rx and Tx */ 236 sa->rxq_max = MIN(rxq_allocated, evq_allocated / 2); 237 sa->txq_max = MIN(txq_allocated, evq_allocated - sa->rxq_max); 238 239 /* Keep NIC initialized */ 240 return 0; 241 242 fail_get_vi_pool: 243 fail_nic_init: 244 efx_nic_fini(sa->nic); 245 return rc; 246 } 247 248 static int 249 sfc_set_drv_limits(struct sfc_adapter *sa) 250 { 251 const struct rte_eth_dev_data *data = sa->eth_dev->data; 252 efx_drv_limits_t lim; 253 254 memset(&lim, 0, sizeof(lim)); 255 256 /* Limits are strict since take into account initial estimation */ 257 lim.edl_min_evq_count = lim.edl_max_evq_count = 258 1 + data->nb_rx_queues + data->nb_tx_queues; 259 lim.edl_min_rxq_count = lim.edl_max_rxq_count = data->nb_rx_queues; 260 lim.edl_min_txq_count = lim.edl_max_txq_count = data->nb_tx_queues; 261 262 return efx_nic_set_drv_limits(sa->nic, &lim); 263 } 264 265 static int 266 sfc_set_fw_subvariant(struct sfc_adapter *sa) 267 { 268 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 269 uint64_t tx_offloads = sa->eth_dev->data->dev_conf.txmode.offloads; 270 unsigned int txq_index; 271 efx_nic_fw_subvariant_t req_fw_subvariant; 272 efx_nic_fw_subvariant_t cur_fw_subvariant; 273 int rc; 274 275 if (!encp->enc_fw_subvariant_no_tx_csum_supported) { 276 sfc_info(sa, "no-Tx-checksum subvariant not supported"); 277 return 0; 278 } 279 280 for (txq_index = 0; txq_index < sa->txq_count; ++txq_index) { 281 struct sfc_txq_info *txq_info = &sa->txq_info[txq_index]; 282 283 if (txq_info->txq != NULL) 284 tx_offloads |= txq_info->txq->offloads; 285 } 286 287 if (tx_offloads & (DEV_TX_OFFLOAD_IPV4_CKSUM | 288 DEV_TX_OFFLOAD_TCP_CKSUM | 289 DEV_TX_OFFLOAD_UDP_CKSUM | 290 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM)) 291 req_fw_subvariant = EFX_NIC_FW_SUBVARIANT_DEFAULT; 292 else 293 req_fw_subvariant = EFX_NIC_FW_SUBVARIANT_NO_TX_CSUM; 294 295 rc = efx_nic_get_fw_subvariant(sa->nic, &cur_fw_subvariant); 296 if (rc != 0) { 297 sfc_err(sa, "failed to get FW subvariant: %d", rc); 298 return rc; 299 } 300 sfc_info(sa, "FW subvariant is %u vs required %u", 301 cur_fw_subvariant, req_fw_subvariant); 302 303 if (cur_fw_subvariant == req_fw_subvariant) 304 return 0; 305 306 rc = efx_nic_set_fw_subvariant(sa->nic, req_fw_subvariant); 307 if (rc != 0) { 308 sfc_err(sa, "failed to set FW subvariant %u: %d", 309 req_fw_subvariant, rc); 310 return rc; 311 } 312 sfc_info(sa, "FW subvariant set to %u", req_fw_subvariant); 313 314 return 0; 315 } 316 317 static int 318 sfc_try_start(struct sfc_adapter *sa) 319 { 320 const efx_nic_cfg_t *encp; 321 int rc; 322 323 sfc_log_init(sa, "entry"); 324 325 SFC_ASSERT(sfc_adapter_is_locked(sa)); 326 SFC_ASSERT(sa->state == SFC_ADAPTER_STARTING); 327 328 sfc_log_init(sa, "set FW subvariant"); 329 rc = sfc_set_fw_subvariant(sa); 330 if (rc != 0) 331 goto fail_set_fw_subvariant; 332 333 sfc_log_init(sa, "set resource limits"); 334 rc = sfc_set_drv_limits(sa); 335 if (rc != 0) 336 goto fail_set_drv_limits; 337 338 sfc_log_init(sa, "init nic"); 339 rc = efx_nic_init(sa->nic); 340 if (rc != 0) 341 goto fail_nic_init; 342 343 encp = efx_nic_cfg_get(sa->nic); 344 if (encp->enc_tunnel_encapsulations_supported != 0) { 345 sfc_log_init(sa, "apply tunnel config"); 346 rc = efx_tunnel_reconfigure(sa->nic); 347 if (rc != 0) 348 goto fail_tunnel_reconfigure; 349 } 350 351 rc = sfc_intr_start(sa); 352 if (rc != 0) 353 goto fail_intr_start; 354 355 rc = sfc_ev_start(sa); 356 if (rc != 0) 357 goto fail_ev_start; 358 359 rc = sfc_port_start(sa); 360 if (rc != 0) 361 goto fail_port_start; 362 363 rc = sfc_rx_start(sa); 364 if (rc != 0) 365 goto fail_rx_start; 366 367 rc = sfc_tx_start(sa); 368 if (rc != 0) 369 goto fail_tx_start; 370 371 rc = sfc_flow_start(sa); 372 if (rc != 0) 373 goto fail_flows_insert; 374 375 sfc_log_init(sa, "done"); 376 return 0; 377 378 fail_flows_insert: 379 sfc_tx_stop(sa); 380 381 fail_tx_start: 382 sfc_rx_stop(sa); 383 384 fail_rx_start: 385 sfc_port_stop(sa); 386 387 fail_port_start: 388 sfc_ev_stop(sa); 389 390 fail_ev_start: 391 sfc_intr_stop(sa); 392 393 fail_intr_start: 394 fail_tunnel_reconfigure: 395 efx_nic_fini(sa->nic); 396 397 fail_nic_init: 398 fail_set_drv_limits: 399 fail_set_fw_subvariant: 400 sfc_log_init(sa, "failed %d", rc); 401 return rc; 402 } 403 404 int 405 sfc_start(struct sfc_adapter *sa) 406 { 407 unsigned int start_tries = 3; 408 int rc; 409 410 sfc_log_init(sa, "entry"); 411 412 SFC_ASSERT(sfc_adapter_is_locked(sa)); 413 414 switch (sa->state) { 415 case SFC_ADAPTER_CONFIGURED: 416 break; 417 case SFC_ADAPTER_STARTED: 418 sfc_notice(sa, "already started"); 419 return 0; 420 default: 421 rc = EINVAL; 422 goto fail_bad_state; 423 } 424 425 sa->state = SFC_ADAPTER_STARTING; 426 427 do { 428 rc = sfc_try_start(sa); 429 } while ((--start_tries > 0) && 430 (rc == EIO || rc == EAGAIN || rc == ENOENT || rc == EINVAL)); 431 432 if (rc != 0) 433 goto fail_try_start; 434 435 sa->state = SFC_ADAPTER_STARTED; 436 sfc_log_init(sa, "done"); 437 return 0; 438 439 fail_try_start: 440 sa->state = SFC_ADAPTER_CONFIGURED; 441 fail_bad_state: 442 sfc_log_init(sa, "failed %d", rc); 443 return rc; 444 } 445 446 void 447 sfc_stop(struct sfc_adapter *sa) 448 { 449 sfc_log_init(sa, "entry"); 450 451 SFC_ASSERT(sfc_adapter_is_locked(sa)); 452 453 switch (sa->state) { 454 case SFC_ADAPTER_STARTED: 455 break; 456 case SFC_ADAPTER_CONFIGURED: 457 sfc_notice(sa, "already stopped"); 458 return; 459 default: 460 sfc_err(sa, "stop in unexpected state %u", sa->state); 461 SFC_ASSERT(B_FALSE); 462 return; 463 } 464 465 sa->state = SFC_ADAPTER_STOPPING; 466 467 sfc_flow_stop(sa); 468 sfc_tx_stop(sa); 469 sfc_rx_stop(sa); 470 sfc_port_stop(sa); 471 sfc_ev_stop(sa); 472 sfc_intr_stop(sa); 473 efx_nic_fini(sa->nic); 474 475 sa->state = SFC_ADAPTER_CONFIGURED; 476 sfc_log_init(sa, "done"); 477 } 478 479 static int 480 sfc_restart(struct sfc_adapter *sa) 481 { 482 int rc; 483 484 SFC_ASSERT(sfc_adapter_is_locked(sa)); 485 486 if (sa->state != SFC_ADAPTER_STARTED) 487 return EINVAL; 488 489 sfc_stop(sa); 490 491 rc = sfc_start(sa); 492 if (rc != 0) 493 sfc_err(sa, "restart failed"); 494 495 return rc; 496 } 497 498 static void 499 sfc_restart_if_required(void *arg) 500 { 501 struct sfc_adapter *sa = arg; 502 503 /* If restart is scheduled, clear the flag and do it */ 504 if (rte_atomic32_cmpset((volatile uint32_t *)&sa->restart_required, 505 1, 0)) { 506 sfc_adapter_lock(sa); 507 if (sa->state == SFC_ADAPTER_STARTED) 508 (void)sfc_restart(sa); 509 sfc_adapter_unlock(sa); 510 } 511 } 512 513 void 514 sfc_schedule_restart(struct sfc_adapter *sa) 515 { 516 int rc; 517 518 /* Schedule restart alarm if it is not scheduled yet */ 519 if (!rte_atomic32_test_and_set(&sa->restart_required)) 520 return; 521 522 rc = rte_eal_alarm_set(1, sfc_restart_if_required, sa); 523 if (rc == -ENOTSUP) 524 sfc_warn(sa, "alarms are not supported, restart is pending"); 525 else if (rc != 0) 526 sfc_err(sa, "cannot arm restart alarm (rc=%d)", rc); 527 else 528 sfc_notice(sa, "restart scheduled"); 529 } 530 531 int 532 sfc_configure(struct sfc_adapter *sa) 533 { 534 int rc; 535 536 sfc_log_init(sa, "entry"); 537 538 SFC_ASSERT(sfc_adapter_is_locked(sa)); 539 540 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED || 541 sa->state == SFC_ADAPTER_CONFIGURED); 542 sa->state = SFC_ADAPTER_CONFIGURING; 543 544 rc = sfc_check_conf(sa); 545 if (rc != 0) 546 goto fail_check_conf; 547 548 rc = sfc_intr_configure(sa); 549 if (rc != 0) 550 goto fail_intr_configure; 551 552 rc = sfc_port_configure(sa); 553 if (rc != 0) 554 goto fail_port_configure; 555 556 rc = sfc_rx_configure(sa); 557 if (rc != 0) 558 goto fail_rx_configure; 559 560 rc = sfc_tx_configure(sa); 561 if (rc != 0) 562 goto fail_tx_configure; 563 564 sa->state = SFC_ADAPTER_CONFIGURED; 565 sfc_log_init(sa, "done"); 566 return 0; 567 568 fail_tx_configure: 569 sfc_rx_close(sa); 570 571 fail_rx_configure: 572 sfc_port_close(sa); 573 574 fail_port_configure: 575 sfc_intr_close(sa); 576 577 fail_intr_configure: 578 fail_check_conf: 579 sa->state = SFC_ADAPTER_INITIALIZED; 580 sfc_log_init(sa, "failed %d", rc); 581 return rc; 582 } 583 584 void 585 sfc_close(struct sfc_adapter *sa) 586 { 587 sfc_log_init(sa, "entry"); 588 589 SFC_ASSERT(sfc_adapter_is_locked(sa)); 590 591 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 592 sa->state = SFC_ADAPTER_CLOSING; 593 594 sfc_tx_close(sa); 595 sfc_rx_close(sa); 596 sfc_port_close(sa); 597 sfc_intr_close(sa); 598 599 sa->state = SFC_ADAPTER_INITIALIZED; 600 sfc_log_init(sa, "done"); 601 } 602 603 static int 604 sfc_mem_bar_init(struct sfc_adapter *sa, unsigned int membar) 605 { 606 struct rte_eth_dev *eth_dev = sa->eth_dev; 607 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 608 efsys_bar_t *ebp = &sa->mem_bar; 609 struct rte_mem_resource *res = &pci_dev->mem_resource[membar]; 610 611 SFC_BAR_LOCK_INIT(ebp, eth_dev->data->name); 612 ebp->esb_rid = membar; 613 ebp->esb_dev = pci_dev; 614 ebp->esb_base = res->addr; 615 return 0; 616 } 617 618 static void 619 sfc_mem_bar_fini(struct sfc_adapter *sa) 620 { 621 efsys_bar_t *ebp = &sa->mem_bar; 622 623 SFC_BAR_LOCK_DESTROY(ebp); 624 memset(ebp, 0, sizeof(*ebp)); 625 } 626 627 /* 628 * A fixed RSS key which has a property of being symmetric 629 * (symmetrical flows are distributed to the same CPU) 630 * and also known to give a uniform distribution 631 * (a good distribution of traffic between different CPUs) 632 */ 633 static const uint8_t default_rss_key[EFX_RSS_KEY_SIZE] = { 634 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 635 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 636 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 637 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 638 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 639 }; 640 641 static int 642 sfc_rss_attach(struct sfc_adapter *sa) 643 { 644 struct sfc_rss *rss = &sa->rss; 645 int rc; 646 647 rc = efx_intr_init(sa->nic, sa->intr.type, NULL); 648 if (rc != 0) 649 goto fail_intr_init; 650 651 rc = efx_ev_init(sa->nic); 652 if (rc != 0) 653 goto fail_ev_init; 654 655 rc = efx_rx_init(sa->nic); 656 if (rc != 0) 657 goto fail_rx_init; 658 659 rc = efx_rx_scale_default_support_get(sa->nic, &rss->context_type); 660 if (rc != 0) 661 goto fail_scale_support_get; 662 663 rc = efx_rx_hash_default_support_get(sa->nic, &rss->hash_support); 664 if (rc != 0) 665 goto fail_hash_support_get; 666 667 rc = sfc_rx_hash_init(sa); 668 if (rc != 0) 669 goto fail_rx_hash_init; 670 671 efx_rx_fini(sa->nic); 672 efx_ev_fini(sa->nic); 673 efx_intr_fini(sa->nic); 674 675 rte_memcpy(rss->key, default_rss_key, sizeof(rss->key)); 676 677 return 0; 678 679 fail_rx_hash_init: 680 fail_hash_support_get: 681 fail_scale_support_get: 682 efx_rx_fini(sa->nic); 683 684 fail_rx_init: 685 efx_ev_fini(sa->nic); 686 687 fail_ev_init: 688 efx_intr_fini(sa->nic); 689 690 fail_intr_init: 691 return rc; 692 } 693 694 static void 695 sfc_rss_detach(struct sfc_adapter *sa) 696 { 697 sfc_rx_hash_fini(sa); 698 } 699 700 int 701 sfc_attach(struct sfc_adapter *sa) 702 { 703 const efx_nic_cfg_t *encp; 704 efx_nic_t *enp = sa->nic; 705 int rc; 706 707 sfc_log_init(sa, "entry"); 708 709 SFC_ASSERT(sfc_adapter_is_locked(sa)); 710 711 efx_mcdi_new_epoch(enp); 712 713 sfc_log_init(sa, "reset nic"); 714 rc = efx_nic_reset(enp); 715 if (rc != 0) 716 goto fail_nic_reset; 717 718 /* 719 * Probed NIC is sufficient for tunnel init. 720 * Initialize tunnel support to be able to use libefx 721 * efx_tunnel_config_udp_{add,remove}() in any state and 722 * efx_tunnel_reconfigure() on start up. 723 */ 724 rc = efx_tunnel_init(enp); 725 if (rc != 0) 726 goto fail_tunnel_init; 727 728 encp = efx_nic_cfg_get(sa->nic); 729 730 if (sa->dp_tx->features & SFC_DP_TX_FEAT_TSO) { 731 sa->tso = encp->enc_fw_assisted_tso_v2_enabled; 732 if (!sa->tso) 733 sfc_warn(sa, 734 "TSO support isn't available on this adapter"); 735 } 736 737 sfc_log_init(sa, "estimate resource limits"); 738 rc = sfc_estimate_resource_limits(sa); 739 if (rc != 0) 740 goto fail_estimate_rsrc_limits; 741 742 sa->txq_max_entries = encp->enc_txq_max_ndescs; 743 SFC_ASSERT(rte_is_power_of_2(sa->txq_max_entries)); 744 745 rc = sfc_intr_attach(sa); 746 if (rc != 0) 747 goto fail_intr_attach; 748 749 rc = sfc_ev_attach(sa); 750 if (rc != 0) 751 goto fail_ev_attach; 752 753 rc = sfc_port_attach(sa); 754 if (rc != 0) 755 goto fail_port_attach; 756 757 rc = sfc_rss_attach(sa); 758 if (rc != 0) 759 goto fail_rss_attach; 760 761 rc = sfc_filter_attach(sa); 762 if (rc != 0) 763 goto fail_filter_attach; 764 765 sfc_log_init(sa, "fini nic"); 766 efx_nic_fini(enp); 767 768 sfc_flow_init(sa); 769 770 sa->state = SFC_ADAPTER_INITIALIZED; 771 772 sfc_log_init(sa, "done"); 773 return 0; 774 775 fail_filter_attach: 776 sfc_rss_detach(sa); 777 778 fail_rss_attach: 779 sfc_port_detach(sa); 780 781 fail_port_attach: 782 sfc_ev_detach(sa); 783 784 fail_ev_attach: 785 sfc_intr_detach(sa); 786 787 fail_intr_attach: 788 efx_nic_fini(sa->nic); 789 790 fail_estimate_rsrc_limits: 791 fail_tunnel_init: 792 efx_tunnel_fini(sa->nic); 793 794 fail_nic_reset: 795 796 sfc_log_init(sa, "failed %d", rc); 797 return rc; 798 } 799 800 void 801 sfc_detach(struct sfc_adapter *sa) 802 { 803 sfc_log_init(sa, "entry"); 804 805 SFC_ASSERT(sfc_adapter_is_locked(sa)); 806 807 sfc_flow_fini(sa); 808 809 sfc_filter_detach(sa); 810 sfc_rss_detach(sa); 811 sfc_port_detach(sa); 812 sfc_ev_detach(sa); 813 sfc_intr_detach(sa); 814 efx_tunnel_fini(sa->nic); 815 816 sa->state = SFC_ADAPTER_UNINITIALIZED; 817 } 818 819 static int 820 sfc_kvarg_fv_variant_handler(__rte_unused const char *key, 821 const char *value_str, void *opaque) 822 { 823 uint32_t *value = opaque; 824 825 if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_DONT_CARE) == 0) 826 *value = EFX_FW_VARIANT_DONT_CARE; 827 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_FULL_FEATURED) == 0) 828 *value = EFX_FW_VARIANT_FULL_FEATURED; 829 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_LOW_LATENCY) == 0) 830 *value = EFX_FW_VARIANT_LOW_LATENCY; 831 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_PACKED_STREAM) == 0) 832 *value = EFX_FW_VARIANT_PACKED_STREAM; 833 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_DPDK) == 0) 834 *value = EFX_FW_VARIANT_DPDK; 835 else 836 return -EINVAL; 837 838 return 0; 839 } 840 841 static int 842 sfc_get_fw_variant(struct sfc_adapter *sa, efx_fw_variant_t *efv) 843 { 844 efx_nic_fw_info_t enfi; 845 int rc; 846 847 rc = efx_nic_get_fw_version(sa->nic, &enfi); 848 if (rc != 0) 849 return rc; 850 else if (!enfi.enfi_dpcpu_fw_ids_valid) 851 return ENOTSUP; 852 853 /* 854 * Firmware variant can be uniquely identified by the RxDPCPU 855 * firmware id 856 */ 857 switch (enfi.enfi_rx_dpcpu_fw_id) { 858 case EFX_RXDP_FULL_FEATURED_FW_ID: 859 *efv = EFX_FW_VARIANT_FULL_FEATURED; 860 break; 861 862 case EFX_RXDP_LOW_LATENCY_FW_ID: 863 *efv = EFX_FW_VARIANT_LOW_LATENCY; 864 break; 865 866 case EFX_RXDP_PACKED_STREAM_FW_ID: 867 *efv = EFX_FW_VARIANT_PACKED_STREAM; 868 break; 869 870 case EFX_RXDP_DPDK_FW_ID: 871 *efv = EFX_FW_VARIANT_DPDK; 872 break; 873 874 default: 875 /* 876 * Other firmware variants are not considered, since they are 877 * not supported in the device parameters 878 */ 879 *efv = EFX_FW_VARIANT_DONT_CARE; 880 break; 881 } 882 883 return 0; 884 } 885 886 static const char * 887 sfc_fw_variant2str(efx_fw_variant_t efv) 888 { 889 switch (efv) { 890 case EFX_RXDP_FULL_FEATURED_FW_ID: 891 return SFC_KVARG_FW_VARIANT_FULL_FEATURED; 892 case EFX_RXDP_LOW_LATENCY_FW_ID: 893 return SFC_KVARG_FW_VARIANT_LOW_LATENCY; 894 case EFX_RXDP_PACKED_STREAM_FW_ID: 895 return SFC_KVARG_FW_VARIANT_PACKED_STREAM; 896 case EFX_RXDP_DPDK_FW_ID: 897 return SFC_KVARG_FW_VARIANT_DPDK; 898 default: 899 return "unknown"; 900 } 901 } 902 903 static int 904 sfc_kvarg_rxd_wait_timeout_ns(struct sfc_adapter *sa) 905 { 906 int rc; 907 long value; 908 909 value = SFC_RXD_WAIT_TIMEOUT_NS_DEF; 910 911 rc = sfc_kvargs_process(sa, SFC_KVARG_RXD_WAIT_TIMEOUT_NS, 912 sfc_kvarg_long_handler, &value); 913 if (rc != 0) 914 return rc; 915 916 if (value < 0 || 917 (unsigned long)value > EFX_RXQ_ES_SUPER_BUFFER_HOL_BLOCK_MAX) { 918 sfc_err(sa, "wrong '" SFC_KVARG_RXD_WAIT_TIMEOUT_NS "' " 919 "was set (%ld);", value); 920 sfc_err(sa, "it must not be less than 0 or greater than %u", 921 EFX_RXQ_ES_SUPER_BUFFER_HOL_BLOCK_MAX); 922 return EINVAL; 923 } 924 925 sa->rxd_wait_timeout_ns = value; 926 return 0; 927 } 928 929 static int 930 sfc_nic_probe(struct sfc_adapter *sa) 931 { 932 efx_nic_t *enp = sa->nic; 933 efx_fw_variant_t preferred_efv; 934 efx_fw_variant_t efv; 935 int rc; 936 937 preferred_efv = EFX_FW_VARIANT_DONT_CARE; 938 rc = sfc_kvargs_process(sa, SFC_KVARG_FW_VARIANT, 939 sfc_kvarg_fv_variant_handler, 940 &preferred_efv); 941 if (rc != 0) { 942 sfc_err(sa, "invalid %s parameter value", SFC_KVARG_FW_VARIANT); 943 return rc; 944 } 945 946 rc = sfc_kvarg_rxd_wait_timeout_ns(sa); 947 if (rc != 0) 948 return rc; 949 950 rc = efx_nic_probe(enp, preferred_efv); 951 if (rc == EACCES) { 952 /* Unprivileged functions cannot set FW variant */ 953 rc = efx_nic_probe(enp, EFX_FW_VARIANT_DONT_CARE); 954 } 955 if (rc != 0) 956 return rc; 957 958 rc = sfc_get_fw_variant(sa, &efv); 959 if (rc == ENOTSUP) { 960 sfc_warn(sa, "FW variant can not be obtained"); 961 return 0; 962 } 963 if (rc != 0) 964 return rc; 965 966 /* Check that firmware variant was changed to the requested one */ 967 if (preferred_efv != EFX_FW_VARIANT_DONT_CARE && preferred_efv != efv) { 968 sfc_warn(sa, "FW variant has not changed to the requested %s", 969 sfc_fw_variant2str(preferred_efv)); 970 } 971 972 sfc_notice(sa, "running FW variant is %s", sfc_fw_variant2str(efv)); 973 974 return 0; 975 } 976 977 int 978 sfc_probe(struct sfc_adapter *sa) 979 { 980 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev); 981 unsigned int membar; 982 efx_nic_t *enp; 983 int rc; 984 985 sfc_log_init(sa, "entry"); 986 987 SFC_ASSERT(sfc_adapter_is_locked(sa)); 988 989 sa->socket_id = rte_socket_id(); 990 rte_atomic32_init(&sa->restart_required); 991 992 sfc_log_init(sa, "get family"); 993 rc = efx_family(pci_dev->id.vendor_id, pci_dev->id.device_id, 994 &sa->family, &membar); 995 if (rc != 0) 996 goto fail_family; 997 sfc_log_init(sa, "family is %u, membar is %u", sa->family, membar); 998 999 sfc_log_init(sa, "init mem bar"); 1000 rc = sfc_mem_bar_init(sa, membar); 1001 if (rc != 0) 1002 goto fail_mem_bar_init; 1003 1004 sfc_log_init(sa, "create nic"); 1005 rte_spinlock_init(&sa->nic_lock); 1006 rc = efx_nic_create(sa->family, (efsys_identifier_t *)sa, 1007 &sa->mem_bar, &sa->nic_lock, &enp); 1008 if (rc != 0) 1009 goto fail_nic_create; 1010 sa->nic = enp; 1011 1012 rc = sfc_mcdi_init(sa); 1013 if (rc != 0) 1014 goto fail_mcdi_init; 1015 1016 sfc_log_init(sa, "probe nic"); 1017 rc = sfc_nic_probe(sa); 1018 if (rc != 0) 1019 goto fail_nic_probe; 1020 1021 sfc_log_init(sa, "done"); 1022 return 0; 1023 1024 fail_nic_probe: 1025 sfc_mcdi_fini(sa); 1026 1027 fail_mcdi_init: 1028 sfc_log_init(sa, "destroy nic"); 1029 sa->nic = NULL; 1030 efx_nic_destroy(enp); 1031 1032 fail_nic_create: 1033 sfc_mem_bar_fini(sa); 1034 1035 fail_mem_bar_init: 1036 fail_family: 1037 sfc_log_init(sa, "failed %d", rc); 1038 return rc; 1039 } 1040 1041 void 1042 sfc_unprobe(struct sfc_adapter *sa) 1043 { 1044 efx_nic_t *enp = sa->nic; 1045 1046 sfc_log_init(sa, "entry"); 1047 1048 SFC_ASSERT(sfc_adapter_is_locked(sa)); 1049 1050 sfc_log_init(sa, "unprobe nic"); 1051 efx_nic_unprobe(enp); 1052 1053 sfc_mcdi_fini(sa); 1054 1055 /* 1056 * Make sure there is no pending alarm to restart since we are 1057 * going to free device private which is passed as the callback 1058 * opaque data. A new alarm cannot be scheduled since MCDI is 1059 * shut down. 1060 */ 1061 rte_eal_alarm_cancel(sfc_restart_if_required, sa); 1062 1063 sfc_log_init(sa, "destroy nic"); 1064 sa->nic = NULL; 1065 efx_nic_destroy(enp); 1066 1067 sfc_mem_bar_fini(sa); 1068 1069 sfc_flow_fini(sa); 1070 sa->state = SFC_ADAPTER_UNINITIALIZED; 1071 } 1072 1073 uint32_t 1074 sfc_register_logtype(const struct rte_pci_addr *pci_addr, 1075 const char *lt_prefix_str, uint32_t ll_default) 1076 { 1077 size_t lt_prefix_str_size = strlen(lt_prefix_str); 1078 size_t lt_str_size_max; 1079 char *lt_str = NULL; 1080 int ret; 1081 1082 if (SIZE_MAX - PCI_PRI_STR_SIZE - 1 > lt_prefix_str_size) { 1083 ++lt_prefix_str_size; /* Reserve space for prefix separator */ 1084 lt_str_size_max = lt_prefix_str_size + PCI_PRI_STR_SIZE + 1; 1085 } else { 1086 return RTE_LOGTYPE_PMD; 1087 } 1088 1089 lt_str = rte_zmalloc("logtype_str", lt_str_size_max, 0); 1090 if (lt_str == NULL) 1091 return RTE_LOGTYPE_PMD; 1092 1093 strncpy(lt_str, lt_prefix_str, lt_prefix_str_size); 1094 lt_str[lt_prefix_str_size - 1] = '.'; 1095 rte_pci_device_name(pci_addr, lt_str + lt_prefix_str_size, 1096 lt_str_size_max - lt_prefix_str_size); 1097 lt_str[lt_str_size_max - 1] = '\0'; 1098 1099 ret = rte_log_register_type_and_pick_level(lt_str, ll_default); 1100 rte_free(lt_str); 1101 1102 return (ret < 0) ? RTE_LOGTYPE_PMD : ret; 1103 } 1104