1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Marvell International Ltd. 3 * Copyright(c) 2018 Semihalf. 4 * All rights reserved. 5 */ 6 7 #include "mvneta_rxtx.h" 8 9 #define MVNETA_PKT_EFFEC_OFFS (MRVL_NETA_PKT_OFFS + MV_MH_SIZE) 10 11 #define MRVL_NETA_DEFAULT_TC 0 12 13 /** Maximum number of descriptors in shadow queue. Must be power of 2 */ 14 #define MRVL_NETA_TX_SHADOWQ_SIZE MRVL_NETA_TXD_MAX 15 16 /** Shadow queue size mask (since shadow queue size is power of 2) */ 17 #define MRVL_NETA_TX_SHADOWQ_MASK (MRVL_NETA_TX_SHADOWQ_SIZE - 1) 18 19 /** Minimum number of sent buffers to release from shadow queue to BM */ 20 #define MRVL_NETA_BUF_RELEASE_BURST_SIZE_MIN 16 21 22 /** Maximum number of sent buffers to release from shadow queue to BM */ 23 #define MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX 64 24 25 #define MVNETA_COOKIE_ADDR_INVALID ~0ULL 26 #define MVNETA_COOKIE_HIGH_ADDR_SHIFT (sizeof(neta_cookie_t) * 8) 27 #define MVNETA_COOKIE_HIGH_ADDR_MASK (~0ULL << MVNETA_COOKIE_HIGH_ADDR_SHIFT) 28 29 #define MVNETA_SET_COOKIE_HIGH_ADDR(addr) { \ 30 if (unlikely(cookie_addr_high == MVNETA_COOKIE_ADDR_INVALID)) \ 31 cookie_addr_high = \ 32 (uint64_t)(addr) & MVNETA_COOKIE_HIGH_ADDR_MASK;\ 33 } 34 35 #define MVNETA_CHECK_COOKIE_HIGH_ADDR(addr) \ 36 ((likely(cookie_addr_high == \ 37 ((uint64_t)(addr) & MVNETA_COOKIE_HIGH_ADDR_MASK))) ? 1 : 0) 38 39 struct mvneta_rxq { 40 struct mvneta_priv *priv; 41 struct rte_mempool *mp; 42 int queue_id; 43 int port_id; 44 int size; 45 int cksum_enabled; 46 uint64_t bytes_recv; 47 uint64_t drop_mac; 48 uint64_t pkts_processed; 49 }; 50 51 /* 52 * To use buffer harvesting based on loopback port shadow queue structure 53 * was introduced for buffers information bookkeeping. 54 */ 55 struct mvneta_shadow_txq { 56 int head; /* write index - used when sending buffers */ 57 int tail; /* read index - used when releasing buffers */ 58 u16 size; /* queue occupied size */ 59 struct neta_buff_inf ent[MRVL_NETA_TX_SHADOWQ_SIZE]; /* q entries */ 60 }; 61 62 struct mvneta_txq { 63 struct mvneta_priv *priv; 64 int queue_id; 65 int port_id; 66 uint64_t bytes_sent; 67 struct mvneta_shadow_txq shadow_txq; 68 int tx_deferred_start; 69 }; 70 71 static uint64_t cookie_addr_high = MVNETA_COOKIE_ADDR_INVALID; 72 static uint16_t rx_desc_free_thresh = MRVL_NETA_BUF_RELEASE_BURST_SIZE_MIN; 73 74 static inline int 75 mvneta_buffs_refill(struct mvneta_priv *priv, struct mvneta_rxq *rxq, u16 *num) 76 { 77 struct rte_mbuf *mbufs[MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX]; 78 struct neta_buff_inf entries[MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX]; 79 int i, ret; 80 uint16_t nb_desc = *num; 81 82 ret = rte_pktmbuf_alloc_bulk(rxq->mp, mbufs, nb_desc); 83 if (ret) { 84 MVNETA_LOG(ERR, "Failed to allocate %u mbufs.", nb_desc); 85 *num = 0; 86 return -1; 87 } 88 89 MVNETA_SET_COOKIE_HIGH_ADDR(mbufs[0]); 90 91 for (i = 0; i < nb_desc; i++) { 92 if (unlikely(!MVNETA_CHECK_COOKIE_HIGH_ADDR(mbufs[i]))) { 93 MVNETA_LOG(ERR, 94 "mbuf virt high addr 0x%lx out of range 0x%lx", 95 (uint64_t)mbufs[i] >> 32, 96 cookie_addr_high >> 32); 97 *num = 0; 98 goto out; 99 } 100 entries[i].addr = rte_mbuf_data_iova_default(mbufs[i]); 101 entries[i].cookie = (neta_cookie_t)(uint64_t)mbufs[i]; 102 } 103 neta_ppio_inq_put_buffs(priv->ppio, rxq->queue_id, entries, num); 104 105 out: 106 for (i = *num; i < nb_desc; i++) 107 rte_pktmbuf_free(mbufs[i]); 108 109 return 0; 110 } 111 112 /** 113 * Allocate buffers from mempool 114 * and store addresses in rx descriptors. 115 * 116 * @return 117 * 0 on success, negative error value otherwise. 118 */ 119 static inline int 120 mvneta_buffs_alloc(struct mvneta_priv *priv, struct mvneta_rxq *rxq, int *num) 121 { 122 uint16_t nb_desc, nb_desc_burst, sent = 0; 123 int ret = 0; 124 125 nb_desc = *num; 126 127 do { 128 nb_desc_burst = 129 (nb_desc < MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX) ? 130 nb_desc : MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX; 131 132 ret = mvneta_buffs_refill(priv, rxq, &nb_desc_burst); 133 if (unlikely(ret || !nb_desc_burst)) 134 break; 135 136 sent += nb_desc_burst; 137 nb_desc -= nb_desc_burst; 138 139 } while (nb_desc); 140 141 *num = sent; 142 143 return ret; 144 } 145 146 static inline void 147 mvneta_fill_shadowq(struct mvneta_shadow_txq *sq, struct rte_mbuf *buf) 148 { 149 sq->ent[sq->head].cookie = (uint64_t)buf; 150 sq->ent[sq->head].addr = buf ? 151 rte_mbuf_data_iova_default(buf) : 0; 152 153 sq->head = (sq->head + 1) & MRVL_NETA_TX_SHADOWQ_MASK; 154 sq->size++; 155 } 156 157 static inline void 158 mvneta_fill_desc(struct neta_ppio_desc *desc, struct rte_mbuf *buf) 159 { 160 neta_ppio_outq_desc_reset(desc); 161 neta_ppio_outq_desc_set_phys_addr(desc, rte_pktmbuf_iova(buf)); 162 neta_ppio_outq_desc_set_pkt_offset(desc, 0); 163 neta_ppio_outq_desc_set_pkt_len(desc, rte_pktmbuf_data_len(buf)); 164 } 165 166 /** 167 * Release already sent buffers to mempool. 168 * 169 * @param ppio 170 * Pointer to the port structure. 171 * @param sq 172 * Pointer to the shadow queue. 173 * @param qid 174 * Queue id number. 175 * @param force 176 * Force releasing packets. 177 */ 178 static inline void 179 mvneta_sent_buffers_free(struct neta_ppio *ppio, 180 struct mvneta_shadow_txq *sq, int qid) 181 { 182 struct neta_buff_inf *entry; 183 uint16_t nb_done = 0; 184 int i; 185 int tail = sq->tail; 186 187 neta_ppio_get_num_outq_done(ppio, qid, &nb_done); 188 189 if (nb_done > sq->size) { 190 MVNETA_LOG(ERR, "nb_done: %d, sq->size %d", 191 nb_done, sq->size); 192 return; 193 } 194 195 for (i = 0; i < nb_done; i++) { 196 entry = &sq->ent[tail]; 197 198 if (unlikely(!entry->addr)) { 199 MVNETA_LOG(DEBUG, 200 "Shadow memory @%d: cookie(%lx), pa(%lx)!", 201 tail, (u64)entry->cookie, 202 (u64)entry->addr); 203 tail = (tail + 1) & MRVL_NETA_TX_SHADOWQ_MASK; 204 continue; 205 } 206 207 struct rte_mbuf *mbuf; 208 209 mbuf = (struct rte_mbuf *) 210 (cookie_addr_high | entry->cookie); 211 rte_pktmbuf_free(mbuf); 212 tail = (tail + 1) & MRVL_NETA_TX_SHADOWQ_MASK; 213 } 214 215 sq->tail = tail; 216 sq->size -= nb_done; 217 } 218 219 /** 220 * Return packet type information and l3/l4 offsets. 221 * 222 * @param desc 223 * Pointer to the received packet descriptor. 224 * @param l3_offset 225 * l3 packet offset. 226 * @param l4_offset 227 * l4 packet offset. 228 * 229 * @return 230 * Packet type information. 231 */ 232 static inline uint64_t 233 mvneta_desc_to_packet_type_and_offset(struct neta_ppio_desc *desc, 234 uint8_t *l3_offset, uint8_t *l4_offset) 235 { 236 enum neta_inq_l3_type l3_type; 237 enum neta_inq_l4_type l4_type; 238 uint64_t packet_type; 239 240 neta_ppio_inq_desc_get_l3_info(desc, &l3_type, l3_offset); 241 neta_ppio_inq_desc_get_l4_info(desc, &l4_type, l4_offset); 242 243 packet_type = RTE_PTYPE_L2_ETHER; 244 245 if (NETA_RXD_GET_VLAN_INFO(desc)) 246 packet_type |= RTE_PTYPE_L2_ETHER_VLAN; 247 248 switch (l3_type) { 249 case NETA_INQ_L3_TYPE_IPV4_BAD: 250 case NETA_INQ_L3_TYPE_IPV4_OK: 251 packet_type |= RTE_PTYPE_L3_IPV4; 252 break; 253 case NETA_INQ_L3_TYPE_IPV6: 254 packet_type |= RTE_PTYPE_L3_IPV6; 255 break; 256 default: 257 packet_type |= RTE_PTYPE_UNKNOWN; 258 MVNETA_LOG(DEBUG, "Failed to recognize l3 packet type"); 259 break; 260 } 261 262 switch (l4_type) { 263 case NETA_INQ_L4_TYPE_TCP: 264 packet_type |= RTE_PTYPE_L4_TCP; 265 break; 266 case NETA_INQ_L4_TYPE_UDP: 267 packet_type |= RTE_PTYPE_L4_UDP; 268 break; 269 default: 270 packet_type |= RTE_PTYPE_UNKNOWN; 271 MVNETA_LOG(DEBUG, "Failed to recognize l4 packet type"); 272 break; 273 } 274 275 return packet_type; 276 } 277 278 /** 279 * Prepare offload information. 280 * 281 * @param ol_flags 282 * Offload flags. 283 * @param packet_type 284 * Packet type bitfield. 285 * @param l3_type 286 * Pointer to the neta_ouq_l3_type structure. 287 * @param l4_type 288 * Pointer to the neta_outq_l4_type structure. 289 * @param gen_l3_cksum 290 * Will be set to 1 in case l3 checksum is computed. 291 * @param l4_cksum 292 * Will be set to 1 in case l4 checksum is computed. 293 * 294 * @return 295 * 0 on success, negative error value otherwise. 296 */ 297 static inline int 298 mvneta_prepare_proto_info(uint64_t ol_flags, uint32_t packet_type, 299 enum neta_outq_l3_type *l3_type, 300 enum neta_outq_l4_type *l4_type, 301 int *gen_l3_cksum, 302 int *gen_l4_cksum) 303 { 304 /* 305 * Based on ol_flags prepare information 306 * for neta_ppio_outq_desc_set_proto_info() which setups descriptor 307 * for offloading. 308 */ 309 if (ol_flags & PKT_TX_IPV4) { 310 *l3_type = NETA_OUTQ_L3_TYPE_IPV4; 311 *gen_l3_cksum = ol_flags & PKT_TX_IP_CKSUM ? 1 : 0; 312 } else if (ol_flags & PKT_TX_IPV6) { 313 *l3_type = NETA_OUTQ_L3_TYPE_IPV6; 314 /* no checksum for ipv6 header */ 315 *gen_l3_cksum = 0; 316 } else { 317 /* if something different then stop processing */ 318 return -1; 319 } 320 321 ol_flags &= PKT_TX_L4_MASK; 322 if ((packet_type & RTE_PTYPE_L4_TCP) && 323 ol_flags == PKT_TX_TCP_CKSUM) { 324 *l4_type = NETA_OUTQ_L4_TYPE_TCP; 325 *gen_l4_cksum = 1; 326 } else if ((packet_type & RTE_PTYPE_L4_UDP) && 327 ol_flags == PKT_TX_UDP_CKSUM) { 328 *l4_type = NETA_OUTQ_L4_TYPE_UDP; 329 *gen_l4_cksum = 1; 330 } else { 331 *l4_type = NETA_OUTQ_L4_TYPE_OTHER; 332 /* no checksum for other type */ 333 *gen_l4_cksum = 0; 334 } 335 336 return 0; 337 } 338 339 /** 340 * Get offload information from the received packet descriptor. 341 * 342 * @param desc 343 * Pointer to the received packet descriptor. 344 * 345 * @return 346 * Mbuf offload flags. 347 */ 348 static inline uint64_t 349 mvneta_desc_to_ol_flags(struct neta_ppio_desc *desc) 350 { 351 uint64_t flags; 352 enum neta_inq_desc_status status; 353 354 status = neta_ppio_inq_desc_get_l3_pkt_error(desc); 355 if (unlikely(status != NETA_DESC_ERR_OK)) 356 flags = PKT_RX_IP_CKSUM_BAD; 357 else 358 flags = PKT_RX_IP_CKSUM_GOOD; 359 360 status = neta_ppio_inq_desc_get_l4_pkt_error(desc); 361 if (unlikely(status != NETA_DESC_ERR_OK)) 362 flags |= PKT_RX_L4_CKSUM_BAD; 363 else 364 flags |= PKT_RX_L4_CKSUM_GOOD; 365 366 return flags; 367 } 368 369 /** 370 * DPDK callback for transmit. 371 * 372 * @param txq 373 * Generic pointer transmit queue. 374 * @param tx_pkts 375 * Packets to transmit. 376 * @param nb_pkts 377 * Number of packets in array. 378 * 379 * @return 380 * Number of packets successfully transmitted. 381 */ 382 static uint16_t 383 mvneta_tx_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) 384 { 385 struct mvneta_txq *q = txq; 386 struct mvneta_shadow_txq *sq; 387 struct neta_ppio_desc descs[nb_pkts]; 388 389 int i, ret, bytes_sent = 0; 390 uint16_t num, sq_free_size; 391 uint64_t addr; 392 393 sq = &q->shadow_txq; 394 if (unlikely(!nb_pkts || !q->priv->ppio)) 395 return 0; 396 397 if (sq->size) 398 mvneta_sent_buffers_free(q->priv->ppio, 399 sq, q->queue_id); 400 401 sq_free_size = MRVL_NETA_TX_SHADOWQ_SIZE - sq->size - 1; 402 if (unlikely(nb_pkts > sq_free_size)) { 403 MVNETA_LOG(DEBUG, 404 "No room in shadow queue for %d packets! %d packets will be sent.", 405 nb_pkts, sq_free_size); 406 nb_pkts = sq_free_size; 407 } 408 409 410 for (i = 0; i < nb_pkts; i++) { 411 struct rte_mbuf *mbuf = tx_pkts[i]; 412 int gen_l3_cksum, gen_l4_cksum; 413 enum neta_outq_l3_type l3_type; 414 enum neta_outq_l4_type l4_type; 415 416 /* Fill first mbuf info in shadow queue */ 417 mvneta_fill_shadowq(sq, mbuf); 418 mvneta_fill_desc(&descs[i], mbuf); 419 420 bytes_sent += rte_pktmbuf_pkt_len(mbuf); 421 422 ret = mvneta_prepare_proto_info(mbuf->ol_flags, 423 mbuf->packet_type, 424 &l3_type, &l4_type, 425 &gen_l3_cksum, 426 &gen_l4_cksum); 427 if (unlikely(ret)) 428 continue; 429 430 neta_ppio_outq_desc_set_proto_info(&descs[i], l3_type, l4_type, 431 mbuf->l2_len, 432 mbuf->l2_len + mbuf->l3_len, 433 gen_l3_cksum, gen_l4_cksum); 434 } 435 num = nb_pkts; 436 neta_ppio_send(q->priv->ppio, q->queue_id, descs, &nb_pkts); 437 438 439 /* number of packets that were not sent */ 440 if (unlikely(num > nb_pkts)) { 441 for (i = nb_pkts; i < num; i++) { 442 sq->head = (MRVL_NETA_TX_SHADOWQ_SIZE + sq->head - 1) & 443 MRVL_NETA_TX_SHADOWQ_MASK; 444 addr = cookie_addr_high | sq->ent[sq->head].cookie; 445 bytes_sent -= 446 rte_pktmbuf_pkt_len((struct rte_mbuf *)addr); 447 } 448 sq->size -= num - nb_pkts; 449 } 450 451 q->bytes_sent += bytes_sent; 452 453 return nb_pkts; 454 } 455 456 /** DPDK callback for S/G transmit. 457 * 458 * @param txq 459 * Generic pointer transmit queue. 460 * @param tx_pkts 461 * Packets to transmit. 462 * @param nb_pkts 463 * Number of packets in array. 464 * 465 * @return 466 * Number of packets successfully transmitted. 467 */ 468 static uint16_t 469 mvneta_tx_sg_pkt_burst(void *txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts) 470 { 471 struct mvneta_txq *q = txq; 472 struct mvneta_shadow_txq *sq; 473 struct neta_ppio_desc descs[nb_pkts * NETA_PPIO_DESC_NUM_FRAGS]; 474 struct neta_ppio_sg_pkts pkts; 475 uint8_t frags[nb_pkts]; 476 int i, j, ret, bytes_sent = 0; 477 int tail, tail_first; 478 uint16_t num, sq_free_size; 479 uint16_t nb_segs, total_descs = 0; 480 uint64_t addr; 481 482 sq = &q->shadow_txq; 483 pkts.frags = frags; 484 pkts.num = 0; 485 486 if (unlikely(!q->priv->ppio)) 487 return 0; 488 489 if (sq->size) 490 mvneta_sent_buffers_free(q->priv->ppio, 491 sq, q->queue_id); 492 /* Save shadow queue free size */ 493 sq_free_size = MRVL_NETA_TX_SHADOWQ_SIZE - sq->size - 1; 494 495 tail = 0; 496 for (i = 0; i < nb_pkts; i++) { 497 struct rte_mbuf *mbuf = tx_pkts[i]; 498 struct rte_mbuf *seg = NULL; 499 int gen_l3_cksum, gen_l4_cksum; 500 enum neta_outq_l3_type l3_type; 501 enum neta_outq_l4_type l4_type; 502 503 nb_segs = mbuf->nb_segs; 504 total_descs += nb_segs; 505 506 /* 507 * Check if total_descs does not exceed 508 * shadow queue free size 509 */ 510 if (unlikely(total_descs > sq_free_size)) { 511 total_descs -= nb_segs; 512 MVNETA_LOG(DEBUG, 513 "No room in shadow queue for %d packets! " 514 "%d packets will be sent.", 515 nb_pkts, i); 516 break; 517 } 518 519 520 /* Check if nb_segs does not exceed the max nb of desc per 521 * fragmented packet 522 */ 523 if (unlikely(nb_segs > NETA_PPIO_DESC_NUM_FRAGS)) { 524 total_descs -= nb_segs; 525 MVNETA_LOG(ERR, 526 "Too many segments. Packet won't be sent."); 527 break; 528 } 529 530 pkts.frags[pkts.num] = nb_segs; 531 pkts.num++; 532 tail_first = tail; 533 534 seg = mbuf; 535 for (j = 0; j < nb_segs - 1; j++) { 536 /* For the subsequent segments, set shadow queue 537 * buffer to NULL 538 */ 539 mvneta_fill_shadowq(sq, NULL); 540 mvneta_fill_desc(&descs[tail], seg); 541 542 tail++; 543 seg = seg->next; 544 } 545 /* Put first mbuf info in last shadow queue entry */ 546 mvneta_fill_shadowq(sq, mbuf); 547 /* Update descriptor with last segment */ 548 mvneta_fill_desc(&descs[tail++], seg); 549 550 bytes_sent += rte_pktmbuf_pkt_len(mbuf); 551 552 ret = mvneta_prepare_proto_info(mbuf->ol_flags, 553 mbuf->packet_type, 554 &l3_type, &l4_type, 555 &gen_l3_cksum, 556 &gen_l4_cksum); 557 if (unlikely(ret)) 558 continue; 559 560 neta_ppio_outq_desc_set_proto_info(&descs[tail_first], 561 l3_type, l4_type, 562 mbuf->l2_len, 563 mbuf->l2_len + mbuf->l3_len, 564 gen_l3_cksum, gen_l4_cksum); 565 } 566 num = total_descs; 567 neta_ppio_send_sg(q->priv->ppio, q->queue_id, descs, &total_descs, 568 &pkts); 569 570 /* number of packets that were not sent */ 571 if (unlikely(num > total_descs)) { 572 for (i = total_descs; i < num; i++) { 573 sq->head = (MRVL_NETA_TX_SHADOWQ_SIZE + 574 sq->head - 1) & 575 MRVL_NETA_TX_SHADOWQ_MASK; 576 addr = sq->ent[sq->head].cookie; 577 if (addr) { 578 struct rte_mbuf *mbuf; 579 580 mbuf = (struct rte_mbuf *) 581 (cookie_addr_high | addr); 582 bytes_sent -= rte_pktmbuf_pkt_len(mbuf); 583 } 584 } 585 sq->size -= num - total_descs; 586 nb_pkts = pkts.num; 587 } 588 589 q->bytes_sent += bytes_sent; 590 591 return nb_pkts; 592 } 593 594 /** 595 * Set tx burst function according to offload flag 596 * 597 * @param dev 598 * Pointer to Ethernet device structure. 599 */ 600 void 601 mvneta_set_tx_function(struct rte_eth_dev *dev) 602 { 603 struct mvneta_priv *priv = dev->data->dev_private; 604 605 /* Use a simple Tx queue (no offloads, no multi segs) if possible */ 606 if (priv->multiseg) { 607 MVNETA_LOG(INFO, "Using multi-segment tx callback"); 608 dev->tx_pkt_burst = mvneta_tx_sg_pkt_burst; 609 } else { 610 MVNETA_LOG(INFO, "Using single-segment tx callback"); 611 dev->tx_pkt_burst = mvneta_tx_pkt_burst; 612 } 613 } 614 615 /** 616 * DPDK callback for receive. 617 * 618 * @param rxq 619 * Generic pointer to the receive queue. 620 * @param rx_pkts 621 * Array to store received packets. 622 * @param nb_pkts 623 * Maximum number of packets in array. 624 * 625 * @return 626 * Number of packets successfully received. 627 */ 628 uint16_t 629 mvneta_rx_pkt_burst(void *rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts) 630 { 631 struct mvneta_rxq *q = rxq; 632 struct neta_ppio_desc descs[nb_pkts]; 633 int i, ret, rx_done = 0, rx_dropped = 0; 634 635 if (unlikely(!q || !q->priv->ppio)) 636 return 0; 637 638 ret = neta_ppio_recv(q->priv->ppio, q->queue_id, 639 descs, &nb_pkts); 640 641 if (unlikely(ret < 0)) { 642 MVNETA_LOG(ERR, "Failed to receive packets"); 643 return 0; 644 } 645 646 for (i = 0; i < nb_pkts; i++) { 647 struct rte_mbuf *mbuf; 648 uint8_t l3_offset, l4_offset; 649 enum neta_inq_desc_status status; 650 uint64_t addr; 651 652 addr = cookie_addr_high | 653 neta_ppio_inq_desc_get_cookie(&descs[i]); 654 mbuf = (struct rte_mbuf *)addr; 655 656 rte_pktmbuf_reset(mbuf); 657 658 /* drop packet in case of mac, overrun or resource error */ 659 status = neta_ppio_inq_desc_get_l2_pkt_error(&descs[i]); 660 if (unlikely(status != NETA_DESC_ERR_OK)) { 661 /* Release the mbuf to the mempool since 662 * it won't be transferred to tx path 663 */ 664 rte_pktmbuf_free(mbuf); 665 q->drop_mac++; 666 rx_dropped++; 667 continue; 668 } 669 670 mbuf->data_off += MVNETA_PKT_EFFEC_OFFS; 671 mbuf->pkt_len = neta_ppio_inq_desc_get_pkt_len(&descs[i]); 672 mbuf->data_len = mbuf->pkt_len; 673 mbuf->port = q->port_id; 674 mbuf->packet_type = 675 mvneta_desc_to_packet_type_and_offset(&descs[i], 676 &l3_offset, 677 &l4_offset); 678 mbuf->l2_len = l3_offset; 679 mbuf->l3_len = l4_offset - l3_offset; 680 681 if (likely(q->cksum_enabled)) 682 mbuf->ol_flags = mvneta_desc_to_ol_flags(&descs[i]); 683 684 rx_pkts[rx_done++] = mbuf; 685 q->bytes_recv += mbuf->pkt_len; 686 } 687 q->pkts_processed += rx_done + rx_dropped; 688 689 if (q->pkts_processed > rx_desc_free_thresh) { 690 int buf_to_refill = rx_desc_free_thresh; 691 692 ret = mvneta_buffs_alloc(q->priv, q, &buf_to_refill); 693 if (ret) 694 MVNETA_LOG(ERR, "Refill failed"); 695 q->pkts_processed -= buf_to_refill; 696 } 697 698 return rx_done; 699 } 700 701 /** 702 * DPDK callback to configure the receive queue. 703 * 704 * @param dev 705 * Pointer to Ethernet device structure. 706 * @param idx 707 * RX queue index. 708 * @param desc 709 * Number of descriptors to configure in queue. 710 * @param socket 711 * NUMA socket on which memory must be allocated. 712 * @param conf 713 * Thresholds parameters (unused_). 714 * @param mp 715 * Memory pool for buffer allocations. 716 * 717 * @return 718 * 0 on success, negative error value otherwise. 719 */ 720 int 721 mvneta_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, 722 unsigned int socket, 723 const struct rte_eth_rxconf *conf __rte_unused, 724 struct rte_mempool *mp) 725 { 726 struct mvneta_priv *priv = dev->data->dev_private; 727 struct mvneta_rxq *rxq; 728 uint32_t frame_size, buf_size = rte_pktmbuf_data_room_size(mp); 729 uint32_t max_rx_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 730 731 frame_size = buf_size - RTE_PKTMBUF_HEADROOM - MVNETA_PKT_EFFEC_OFFS; 732 733 if (frame_size < max_rx_pkt_len) { 734 MVNETA_LOG(ERR, 735 "Mbuf size must be increased to %u bytes to hold up " 736 "to %u bytes of data.", 737 buf_size + max_rx_pkt_len - frame_size, 738 max_rx_pkt_len); 739 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 740 MVNETA_LOG(INFO, "Setting max rx pkt len to %u", 741 dev->data->dev_conf.rxmode.max_rx_pkt_len); 742 } 743 744 if (dev->data->rx_queues[idx]) { 745 rte_free(dev->data->rx_queues[idx]); 746 dev->data->rx_queues[idx] = NULL; 747 } 748 749 rxq = rte_zmalloc_socket("rxq", sizeof(*rxq), 0, socket); 750 if (!rxq) 751 return -ENOMEM; 752 753 rxq->priv = priv; 754 rxq->mp = mp; 755 rxq->cksum_enabled = dev->data->dev_conf.rxmode.offloads & 756 DEV_RX_OFFLOAD_IPV4_CKSUM; 757 rxq->queue_id = idx; 758 rxq->port_id = dev->data->port_id; 759 rxq->size = desc; 760 rx_desc_free_thresh = RTE_MIN(rx_desc_free_thresh, (desc / 2)); 761 priv->ppio_params.inqs_params.tcs_params[MRVL_NETA_DEFAULT_TC].size = 762 desc; 763 764 dev->data->rx_queues[idx] = rxq; 765 766 return 0; 767 } 768 769 /** 770 * DPDK callback to configure the transmit queue. 771 * 772 * @param dev 773 * Pointer to Ethernet device structure. 774 * @param idx 775 * Transmit queue index. 776 * @param desc 777 * Number of descriptors to configure in the queue. 778 * @param socket 779 * NUMA socket on which memory must be allocated. 780 * @param conf 781 * Tx queue configuration parameters. 782 * 783 * @return 784 * 0 on success, negative error value otherwise. 785 */ 786 int 787 mvneta_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc, 788 unsigned int socket, const struct rte_eth_txconf *conf) 789 { 790 struct mvneta_priv *priv = dev->data->dev_private; 791 struct mvneta_txq *txq; 792 793 if (dev->data->tx_queues[idx]) { 794 rte_free(dev->data->tx_queues[idx]); 795 dev->data->tx_queues[idx] = NULL; 796 } 797 798 txq = rte_zmalloc_socket("txq", sizeof(*txq), 0, socket); 799 if (!txq) 800 return -ENOMEM; 801 802 txq->priv = priv; 803 txq->queue_id = idx; 804 txq->port_id = dev->data->port_id; 805 txq->tx_deferred_start = conf->tx_deferred_start; 806 dev->data->tx_queues[idx] = txq; 807 808 priv->ppio_params.outqs_params.outqs_params[idx].size = desc; 809 priv->ppio_params.outqs_params.outqs_params[idx].weight = 1; 810 811 return 0; 812 } 813 814 /** 815 * DPDK callback to release the transmit queue. 816 * 817 * @param txq 818 * Generic transmit queue pointer. 819 */ 820 void 821 mvneta_tx_queue_release(void *txq) 822 { 823 struct mvneta_txq *q = txq; 824 825 if (!q) 826 return; 827 828 rte_free(q); 829 } 830 831 /** 832 * Return mbufs to mempool. 833 * 834 * @param rxq 835 * Pointer to rx queue structure 836 * @param desc 837 * Array of rx descriptors 838 */ 839 static void 840 mvneta_recv_buffs_free(struct neta_ppio_desc *desc, uint16_t num) 841 { 842 uint64_t addr; 843 uint8_t i; 844 845 for (i = 0; i < num; i++) { 846 if (desc) { 847 addr = cookie_addr_high | 848 neta_ppio_inq_desc_get_cookie(desc); 849 if (addr) 850 rte_pktmbuf_free((struct rte_mbuf *)addr); 851 desc++; 852 } 853 } 854 } 855 856 int 857 mvneta_alloc_rx_bufs(struct rte_eth_dev *dev) 858 { 859 struct mvneta_priv *priv = dev->data->dev_private; 860 int ret = 0, i; 861 862 for (i = 0; i < dev->data->nb_rx_queues; i++) { 863 struct mvneta_rxq *rxq = dev->data->rx_queues[i]; 864 int num = rxq->size; 865 866 ret = mvneta_buffs_alloc(priv, rxq, &num); 867 if (ret || num != rxq->size) { 868 rte_free(rxq); 869 return ret; 870 } 871 } 872 873 return 0; 874 } 875 876 /** 877 * Flush single receive queue. 878 * 879 * @param rxq 880 * Pointer to rx queue structure. 881 * @param descs 882 * Array of rx descriptors 883 */ 884 static void 885 mvneta_rx_queue_flush(struct mvneta_rxq *rxq) 886 { 887 struct neta_ppio_desc *descs; 888 struct neta_buff_inf *bufs; 889 uint16_t num; 890 int ret, i; 891 892 descs = rte_malloc("rxdesc", MRVL_NETA_RXD_MAX * sizeof(*descs), 0); 893 bufs = rte_malloc("buffs", MRVL_NETA_RXD_MAX * sizeof(*bufs), 0); 894 895 do { 896 num = MRVL_NETA_RXD_MAX; 897 ret = neta_ppio_recv(rxq->priv->ppio, 898 rxq->queue_id, 899 descs, &num); 900 mvneta_recv_buffs_free(descs, num); 901 } while (ret == 0 && num); 902 903 rxq->pkts_processed = 0; 904 905 num = MRVL_NETA_RXD_MAX; 906 907 neta_ppio_inq_get_all_buffs(rxq->priv->ppio, rxq->queue_id, bufs, &num); 908 MVNETA_LOG(INFO, "freeing %u unused bufs.", num); 909 910 for (i = 0; i < num; i++) { 911 uint64_t addr; 912 if (bufs[i].cookie) { 913 addr = cookie_addr_high | bufs[i].cookie; 914 rte_pktmbuf_free((struct rte_mbuf *)addr); 915 } 916 } 917 918 rte_free(descs); 919 rte_free(bufs); 920 } 921 922 /** 923 * Flush single transmit queue. 924 * 925 * @param txq 926 * Pointer to tx queue structure 927 */ 928 static void 929 mvneta_tx_queue_flush(struct mvneta_txq *txq) 930 { 931 struct mvneta_shadow_txq *sq = &txq->shadow_txq; 932 933 if (sq->size) 934 mvneta_sent_buffers_free(txq->priv->ppio, sq, 935 txq->queue_id); 936 937 /* free the rest of them */ 938 while (sq->tail != sq->head) { 939 uint64_t addr = cookie_addr_high | 940 sq->ent[sq->tail].cookie; 941 rte_pktmbuf_free((struct rte_mbuf *)addr); 942 sq->tail = (sq->tail + 1) & MRVL_NETA_TX_SHADOWQ_MASK; 943 } 944 memset(sq, 0, sizeof(*sq)); 945 } 946 947 void 948 mvneta_flush_queues(struct rte_eth_dev *dev) 949 { 950 int i; 951 952 MVNETA_LOG(INFO, "Flushing rx queues"); 953 for (i = 0; i < dev->data->nb_rx_queues; i++) { 954 struct mvneta_rxq *rxq = dev->data->rx_queues[i]; 955 956 mvneta_rx_queue_flush(rxq); 957 } 958 959 MVNETA_LOG(INFO, "Flushing tx queues"); 960 for (i = 0; i < dev->data->nb_tx_queues; i++) { 961 struct mvneta_txq *txq = dev->data->tx_queues[i]; 962 963 mvneta_tx_queue_flush(txq); 964 } 965 } 966 967 /** 968 * DPDK callback to release the receive queue. 969 * 970 * @param rxq 971 * Generic receive queue pointer. 972 */ 973 void 974 mvneta_rx_queue_release(void *rxq) 975 { 976 struct mvneta_rxq *q = rxq; 977 978 if (!q) 979 return; 980 981 /* If dev_stop was called already, mbufs are already 982 * returned to mempool and ppio is deinitialized. 983 * Skip this step. 984 */ 985 986 if (q->priv->ppio) 987 mvneta_rx_queue_flush(q); 988 989 rte_free(rxq); 990 } 991 992 /** 993 * DPDK callback to get information about specific receive queue. 994 * 995 * @param dev 996 * Pointer to Ethernet device structure. 997 * @param rx_queue_id 998 * Receive queue index. 999 * @param qinfo 1000 * Receive queue information structure. 1001 */ 1002 void 1003 mvneta_rxq_info_get(struct rte_eth_dev *dev, uint16_t rx_queue_id, 1004 struct rte_eth_rxq_info *qinfo) 1005 { 1006 struct mvneta_rxq *q = dev->data->rx_queues[rx_queue_id]; 1007 1008 qinfo->mp = q->mp; 1009 qinfo->nb_desc = q->size; 1010 } 1011 1012 /** 1013 * DPDK callback to get information about specific transmit queue. 1014 * 1015 * @param dev 1016 * Pointer to Ethernet device structure. 1017 * @param tx_queue_id 1018 * Transmit queue index. 1019 * @param qinfo 1020 * Transmit queue information structure. 1021 */ 1022 void 1023 mvneta_txq_info_get(struct rte_eth_dev *dev, uint16_t tx_queue_id, 1024 struct rte_eth_txq_info *qinfo) 1025 { 1026 struct mvneta_priv *priv = dev->data->dev_private; 1027 1028 qinfo->nb_desc = 1029 priv->ppio_params.outqs_params.outqs_params[tx_queue_id].size; 1030 } 1031