1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause 2d30ea906Sjfb8856606 * Copyright(c) 2018 Marvell International Ltd. 3d30ea906Sjfb8856606 * Copyright(c) 2018 Semihalf. 4d30ea906Sjfb8856606 * All rights reserved. 5d30ea906Sjfb8856606 */ 6d30ea906Sjfb8856606 7d30ea906Sjfb8856606 #ifndef _MVNETA_ETHDEV_H_ 8d30ea906Sjfb8856606 #define _MVNETA_ETHDEV_H_ 9d30ea906Sjfb8856606 10d30ea906Sjfb8856606 #include <rte_ethdev.h> 11d30ea906Sjfb8856606 #include <rte_malloc.h> 12d30ea906Sjfb8856606 #include <rte_log.h> 13d30ea906Sjfb8856606 14d30ea906Sjfb8856606 /* 15d30ea906Sjfb8856606 * container_of is defined by both DPDK and MUSDK, 16d30ea906Sjfb8856606 * we'll declare only one version. 17d30ea906Sjfb8856606 * 18d30ea906Sjfb8856606 * Note that it is not used in this PMD anyway. 19d30ea906Sjfb8856606 */ 20d30ea906Sjfb8856606 #ifdef container_of 21d30ea906Sjfb8856606 #undef container_of 22d30ea906Sjfb8856606 #endif 23d30ea906Sjfb8856606 24d30ea906Sjfb8856606 #include <drivers/mv_neta.h> 25d30ea906Sjfb8856606 #include <drivers/mv_neta_ppio.h> 26d30ea906Sjfb8856606 27d30ea906Sjfb8856606 /** Packet offset inside RX buffer. */ 28d30ea906Sjfb8856606 #define MRVL_NETA_PKT_OFFS 64 29d30ea906Sjfb8856606 30d30ea906Sjfb8856606 /** Maximum number of rx/tx queues per port */ 31d30ea906Sjfb8856606 #define MRVL_NETA_RXQ_MAX 8 32d30ea906Sjfb8856606 #define MRVL_NETA_TXQ_MAX 8 33d30ea906Sjfb8856606 34d30ea906Sjfb8856606 /** Minimum/maximum number of descriptors in tx queue */ 35d30ea906Sjfb8856606 #define MRVL_NETA_TXD_MIN 16 36d30ea906Sjfb8856606 #define MRVL_NETA_TXD_MAX 2048 37d30ea906Sjfb8856606 38d30ea906Sjfb8856606 /** Tx queue descriptors alignment in B */ 39d30ea906Sjfb8856606 #define MRVL_NETA_TXD_ALIGN 32 40d30ea906Sjfb8856606 41d30ea906Sjfb8856606 /** Minimum/maximum number of descriptors in rx queue */ 42d30ea906Sjfb8856606 #define MRVL_NETA_RXD_MIN 16 43d30ea906Sjfb8856606 #define MRVL_NETA_RXD_MAX 2048 44d30ea906Sjfb8856606 45d30ea906Sjfb8856606 /** Rx queue descriptors alignment in B */ 46d30ea906Sjfb8856606 #define MRVL_NETA_RXD_ALIGN 32 47d30ea906Sjfb8856606 48d30ea906Sjfb8856606 #define MRVL_NETA_VLAN_TAG_LEN 4 49*4418919fSjohnjiang #define MRVL_NETA_ETH_HDRS_LEN (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \ 50d30ea906Sjfb8856606 MRVL_NETA_VLAN_TAG_LEN) 51d30ea906Sjfb8856606 52d30ea906Sjfb8856606 #define MRVL_NETA_HDRS_LEN (MV_MH_SIZE + MRVL_NETA_ETH_HDRS_LEN) 53d30ea906Sjfb8856606 #define MRVL_NETA_MTU_TO_MRU(mtu) ((mtu) + MRVL_NETA_HDRS_LEN) 54d30ea906Sjfb8856606 #define MRVL_NETA_MRU_TO_MTU(mru) ((mru) - MRVL_NETA_HDRS_LEN) 55d30ea906Sjfb8856606 56*4418919fSjohnjiang /** Rx offloads capabilities */ 57*4418919fSjohnjiang #define MVNETA_RX_OFFLOADS (DEV_RX_OFFLOAD_JUMBO_FRAME | \ 58*4418919fSjohnjiang DEV_RX_OFFLOAD_CHECKSUM) 59*4418919fSjohnjiang 60*4418919fSjohnjiang /** Tx offloads capabilities */ 61*4418919fSjohnjiang #define MVNETA_TX_OFFLOAD_CHECKSUM (DEV_TX_OFFLOAD_IPV4_CKSUM | \ 62*4418919fSjohnjiang DEV_TX_OFFLOAD_UDP_CKSUM | \ 63*4418919fSjohnjiang DEV_TX_OFFLOAD_TCP_CKSUM) 64*4418919fSjohnjiang #define MVNETA_TX_OFFLOADS (MVNETA_TX_OFFLOAD_CHECKSUM | \ 65*4418919fSjohnjiang DEV_TX_OFFLOAD_MULTI_SEGS) 66*4418919fSjohnjiang 67*4418919fSjohnjiang #define MVNETA_TX_PKT_OFFLOADS (PKT_TX_IP_CKSUM | \ 68*4418919fSjohnjiang PKT_TX_TCP_CKSUM | \ 69*4418919fSjohnjiang PKT_TX_UDP_CKSUM) 70d30ea906Sjfb8856606 71d30ea906Sjfb8856606 struct mvneta_priv { 72d30ea906Sjfb8856606 /* Hot fields, used in fast path. */ 73d30ea906Sjfb8856606 struct neta_ppio *ppio; /**< Port handler pointer */ 74d30ea906Sjfb8856606 75d30ea906Sjfb8856606 uint8_t pp_id; 76d30ea906Sjfb8856606 uint8_t ppio_id; /* ppio port id */ 77d30ea906Sjfb8856606 uint8_t uc_mc_flushed; 78d30ea906Sjfb8856606 uint8_t multiseg; 79d30ea906Sjfb8856606 80d30ea906Sjfb8856606 struct neta_ppio_params ppio_params; 81d30ea906Sjfb8856606 82d30ea906Sjfb8856606 uint64_t rate_max; 83d30ea906Sjfb8856606 struct rte_eth_stats prev_stats; 84d30ea906Sjfb8856606 }; 85d30ea906Sjfb8856606 86d30ea906Sjfb8856606 /** Current log type. */ 87d30ea906Sjfb8856606 extern int mvneta_logtype; 88d30ea906Sjfb8856606 89d30ea906Sjfb8856606 #define MVNETA_LOG(level, fmt, args...) \ 90d30ea906Sjfb8856606 rte_log(RTE_LOG_ ## level, mvneta_logtype, "%s(): " fmt "\n", \ 91d30ea906Sjfb8856606 __func__, ##args) 92d30ea906Sjfb8856606 93d30ea906Sjfb8856606 #endif /* _MVNETA_ETHDEV_H_ */ 94