1*2d9fd380Sjfb8856606 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
2*2d9fd380Sjfb8856606 * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved.
3*2d9fd380Sjfb8856606 */
4*2d9fd380Sjfb8856606
5*2d9fd380Sjfb8856606 #ifndef _IONIC_DEV_H_
6*2d9fd380Sjfb8856606 #define _IONIC_DEV_H_
7*2d9fd380Sjfb8856606
8*2d9fd380Sjfb8856606 #include <stdbool.h>
9*2d9fd380Sjfb8856606
10*2d9fd380Sjfb8856606 #include "ionic_osdep.h"
11*2d9fd380Sjfb8856606 #include "ionic_if.h"
12*2d9fd380Sjfb8856606 #include "ionic_regs.h"
13*2d9fd380Sjfb8856606
14*2d9fd380Sjfb8856606 #define IONIC_MIN_MTU RTE_ETHER_MIN_MTU
15*2d9fd380Sjfb8856606 #define IONIC_MAX_MTU 9194
16*2d9fd380Sjfb8856606
17*2d9fd380Sjfb8856606 #define IONIC_MAX_RING_DESC 32768
18*2d9fd380Sjfb8856606 #define IONIC_MIN_RING_DESC 16
19*2d9fd380Sjfb8856606 #define IONIC_DEF_TXRX_DESC 4096
20*2d9fd380Sjfb8856606
21*2d9fd380Sjfb8856606 #define IONIC_LIFS_MAX 1024
22*2d9fd380Sjfb8856606
23*2d9fd380Sjfb8856606 #define IONIC_DEVCMD_TIMEOUT 30 /* devcmd_timeout */
24*2d9fd380Sjfb8856606 #define IONIC_ALIGN 4096
25*2d9fd380Sjfb8856606
26*2d9fd380Sjfb8856606 struct ionic_adapter;
27*2d9fd380Sjfb8856606
28*2d9fd380Sjfb8856606 struct ionic_dev_bar {
29*2d9fd380Sjfb8856606 void __iomem *vaddr;
30*2d9fd380Sjfb8856606 rte_iova_t bus_addr;
31*2d9fd380Sjfb8856606 unsigned long len;
32*2d9fd380Sjfb8856606 };
33*2d9fd380Sjfb8856606
ionic_struct_size_checks(void)34*2d9fd380Sjfb8856606 static inline void ionic_struct_size_checks(void)
35*2d9fd380Sjfb8856606 {
36*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_doorbell) != 8);
37*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_intr) != 32);
38*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_intr_status) != 8);
39*2d9fd380Sjfb8856606
40*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(union ionic_dev_regs) != 4096);
41*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(union ionic_dev_info_regs) != 2048);
42*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(union ionic_dev_cmd_regs) != 2048);
43*2d9fd380Sjfb8856606
44*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_stats) != 1024);
45*2d9fd380Sjfb8856606
46*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_cmd) != 64);
47*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_admin_comp) != 16);
48*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_cmd) != 64);
49*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_nop_comp) != 16);
50*2d9fd380Sjfb8856606
51*2d9fd380Sjfb8856606 /* Device commands */
52*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_cmd) != 64);
53*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_identify_comp) != 16);
54*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_cmd) != 64);
55*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_init_comp) != 16);
56*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_cmd) != 64);
57*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_reset_comp) != 16);
58*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_cmd) != 64);
59*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_getattr_comp) != 16);
60*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_cmd) != 64);
61*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_dev_setattr_comp) != 16);
62*2d9fd380Sjfb8856606
63*2d9fd380Sjfb8856606 /* Port commands */
64*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_cmd) != 64);
65*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_identify_comp) != 16);
66*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_cmd) != 64);
67*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_init_comp) != 16);
68*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_cmd) != 64);
69*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_reset_comp) != 16);
70*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_cmd) != 64);
71*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_getattr_comp) != 16);
72*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_cmd) != 64);
73*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_port_setattr_comp) != 16);
74*2d9fd380Sjfb8856606
75*2d9fd380Sjfb8856606 /* LIF commands */
76*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_cmd) != 64);
77*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_init_comp) != 16);
78*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_reset_cmd) != 64);
79*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_cmd) != 64);
80*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_getattr_comp) != 16);
81*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_cmd) != 64);
82*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_lif_setattr_comp) != 16);
83*2d9fd380Sjfb8856606
84*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_cmd) != 64);
85*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_q_init_comp) != 16);
86*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_q_control_cmd) != 64);
87*2d9fd380Sjfb8856606
88*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_mode_set_cmd) != 64);
89*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_cmd) != 64);
90*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_add_comp) != 16);
91*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rx_filter_del_cmd) != 64);
92*2d9fd380Sjfb8856606
93*2d9fd380Sjfb8856606 /* RDMA commands */
94*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_reset_cmd) != 64);
95*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rdma_queue_cmd) != 64);
96*2d9fd380Sjfb8856606
97*2d9fd380Sjfb8856606 /* Events */
98*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_cmd) != 4);
99*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(union ionic_notifyq_comp) != 64);
100*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_notifyq_event) != 64);
101*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_link_change_event) != 64);
102*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_reset_event) != 64);
103*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_heartbeat_event) != 64);
104*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_log_event) != 64);
105*2d9fd380Sjfb8856606
106*2d9fd380Sjfb8856606 /* I/O */
107*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_desc) != 16);
108*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_sg_desc) != 128);
109*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_txq_comp) != 16);
110*2d9fd380Sjfb8856606
111*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_desc) != 16);
112*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_sg_desc) != 128);
113*2d9fd380Sjfb8856606 RTE_BUILD_BUG_ON(sizeof(struct ionic_rxq_comp) != 16);
114*2d9fd380Sjfb8856606 }
115*2d9fd380Sjfb8856606
116*2d9fd380Sjfb8856606 struct ionic_dev {
117*2d9fd380Sjfb8856606 union ionic_dev_info_regs __iomem *dev_info;
118*2d9fd380Sjfb8856606 union ionic_dev_cmd_regs __iomem *dev_cmd;
119*2d9fd380Sjfb8856606
120*2d9fd380Sjfb8856606 struct ionic_doorbell __iomem *db_pages;
121*2d9fd380Sjfb8856606 rte_iova_t phy_db_pages;
122*2d9fd380Sjfb8856606
123*2d9fd380Sjfb8856606 struct ionic_intr __iomem *intr_ctrl;
124*2d9fd380Sjfb8856606
125*2d9fd380Sjfb8856606 struct ionic_intr_status __iomem *intr_status;
126*2d9fd380Sjfb8856606
127*2d9fd380Sjfb8856606 struct ionic_port_info *port_info;
128*2d9fd380Sjfb8856606 const struct rte_memzone *port_info_z;
129*2d9fd380Sjfb8856606 rte_iova_t port_info_pa;
130*2d9fd380Sjfb8856606 uint32_t port_info_sz;
131*2d9fd380Sjfb8856606 };
132*2d9fd380Sjfb8856606
133*2d9fd380Sjfb8856606 struct ionic_queue;
134*2d9fd380Sjfb8856606 struct ionic_desc_info;
135*2d9fd380Sjfb8856606
136*2d9fd380Sjfb8856606 typedef void (*desc_cb)(struct ionic_queue *q,
137*2d9fd380Sjfb8856606 uint32_t q_desc_index,
138*2d9fd380Sjfb8856606 uint32_t cq_desc_index,
139*2d9fd380Sjfb8856606 void *cb_arg, void *service_cb_arg);
140*2d9fd380Sjfb8856606
141*2d9fd380Sjfb8856606 struct ionic_desc_info {
142*2d9fd380Sjfb8856606 desc_cb cb;
143*2d9fd380Sjfb8856606 void *cb_arg;
144*2d9fd380Sjfb8856606 };
145*2d9fd380Sjfb8856606
146*2d9fd380Sjfb8856606 struct ionic_queue {
147*2d9fd380Sjfb8856606 struct ionic_dev *idev;
148*2d9fd380Sjfb8856606 struct ionic_lif *lif;
149*2d9fd380Sjfb8856606 struct ionic_cq *bound_cq;
150*2d9fd380Sjfb8856606 uint32_t index;
151*2d9fd380Sjfb8856606 uint32_t type;
152*2d9fd380Sjfb8856606 uint32_t hw_index;
153*2d9fd380Sjfb8856606 uint32_t hw_type;
154*2d9fd380Sjfb8856606 void *base;
155*2d9fd380Sjfb8856606 void *sg_base;
156*2d9fd380Sjfb8856606 rte_iova_t base_pa;
157*2d9fd380Sjfb8856606 rte_iova_t sg_base_pa;
158*2d9fd380Sjfb8856606 struct ionic_desc_info *info;
159*2d9fd380Sjfb8856606 uint32_t tail_idx;
160*2d9fd380Sjfb8856606 uint32_t head_idx;
161*2d9fd380Sjfb8856606 uint32_t num_descs;
162*2d9fd380Sjfb8856606 uint32_t desc_size;
163*2d9fd380Sjfb8856606 uint32_t sg_desc_size;
164*2d9fd380Sjfb8856606 uint32_t pid;
165*2d9fd380Sjfb8856606 uint32_t qid;
166*2d9fd380Sjfb8856606 uint32_t qtype;
167*2d9fd380Sjfb8856606 struct ionic_doorbell __iomem *db;
168*2d9fd380Sjfb8856606 void *nop_desc;
169*2d9fd380Sjfb8856606 };
170*2d9fd380Sjfb8856606
171*2d9fd380Sjfb8856606 #define IONIC_INTR_INDEX_NOT_ASSIGNED (-1)
172*2d9fd380Sjfb8856606 #define IONIC_INTR_NAME_MAX_SZ (32)
173*2d9fd380Sjfb8856606
174*2d9fd380Sjfb8856606 struct ionic_intr_info {
175*2d9fd380Sjfb8856606 char name[IONIC_INTR_NAME_MAX_SZ];
176*2d9fd380Sjfb8856606 int index;
177*2d9fd380Sjfb8856606 uint32_t vector;
178*2d9fd380Sjfb8856606 struct ionic_intr __iomem *ctrl;
179*2d9fd380Sjfb8856606 };
180*2d9fd380Sjfb8856606
181*2d9fd380Sjfb8856606 struct ionic_cq {
182*2d9fd380Sjfb8856606 struct ionic_lif *lif;
183*2d9fd380Sjfb8856606 struct ionic_queue *bound_q;
184*2d9fd380Sjfb8856606 uint32_t tail_idx;
185*2d9fd380Sjfb8856606 uint32_t num_descs;
186*2d9fd380Sjfb8856606 uint32_t desc_size;
187*2d9fd380Sjfb8856606 bool done_color;
188*2d9fd380Sjfb8856606 void *base;
189*2d9fd380Sjfb8856606 rte_iova_t base_pa;
190*2d9fd380Sjfb8856606 struct ionic_intr_info *bound_intr;
191*2d9fd380Sjfb8856606 };
192*2d9fd380Sjfb8856606
193*2d9fd380Sjfb8856606 /** ionic_admin_ctx - Admin command context.
194*2d9fd380Sjfb8856606 * @pending_work: Flag that indicates a completion.
195*2d9fd380Sjfb8856606 * @cmd: Admin command (64B) to be copied to the queue.
196*2d9fd380Sjfb8856606 * @comp: Admin completion (16B) copied from the queue.
197*2d9fd380Sjfb8856606 */
198*2d9fd380Sjfb8856606 struct ionic_admin_ctx {
199*2d9fd380Sjfb8856606 bool pending_work;
200*2d9fd380Sjfb8856606 union ionic_adminq_cmd cmd;
201*2d9fd380Sjfb8856606 union ionic_adminq_comp comp;
202*2d9fd380Sjfb8856606 };
203*2d9fd380Sjfb8856606
204*2d9fd380Sjfb8856606 struct ionic_lif;
205*2d9fd380Sjfb8856606 struct ionic_adapter;
206*2d9fd380Sjfb8856606 struct ionic_qcq;
207*2d9fd380Sjfb8856606
208*2d9fd380Sjfb8856606 void ionic_intr_init(struct ionic_dev *idev, struct ionic_intr_info *intr,
209*2d9fd380Sjfb8856606 unsigned long index);
210*2d9fd380Sjfb8856606
211*2d9fd380Sjfb8856606 int ionic_dev_setup(struct ionic_adapter *adapter);
212*2d9fd380Sjfb8856606
213*2d9fd380Sjfb8856606 void ionic_dev_cmd_go(struct ionic_dev *idev, union ionic_dev_cmd *cmd);
214*2d9fd380Sjfb8856606 uint8_t ionic_dev_cmd_status(struct ionic_dev *idev);
215*2d9fd380Sjfb8856606 bool ionic_dev_cmd_done(struct ionic_dev *idev);
216*2d9fd380Sjfb8856606 void ionic_dev_cmd_comp(struct ionic_dev *idev, void *mem);
217*2d9fd380Sjfb8856606
218*2d9fd380Sjfb8856606 void ionic_dev_cmd_identify(struct ionic_dev *idev, uint8_t ver);
219*2d9fd380Sjfb8856606 void ionic_dev_cmd_init(struct ionic_dev *idev);
220*2d9fd380Sjfb8856606 void ionic_dev_cmd_reset(struct ionic_dev *idev);
221*2d9fd380Sjfb8856606
222*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_identify(struct ionic_dev *idev);
223*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_init(struct ionic_dev *idev);
224*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_reset(struct ionic_dev *idev);
225*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_state(struct ionic_dev *idev, uint8_t state);
226*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_speed(struct ionic_dev *idev, uint32_t speed);
227*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_mtu(struct ionic_dev *idev, uint32_t mtu);
228*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_autoneg(struct ionic_dev *idev, uint8_t an_enable);
229*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_fec(struct ionic_dev *idev, uint8_t fec_type);
230*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_pause(struct ionic_dev *idev, uint8_t pause_type);
231*2d9fd380Sjfb8856606 void ionic_dev_cmd_port_loopback(struct ionic_dev *idev,
232*2d9fd380Sjfb8856606 uint8_t loopback_mode);
233*2d9fd380Sjfb8856606
234*2d9fd380Sjfb8856606 void ionic_dev_cmd_lif_identify(struct ionic_dev *idev, uint8_t type,
235*2d9fd380Sjfb8856606 uint8_t ver);
236*2d9fd380Sjfb8856606 void ionic_dev_cmd_lif_init(struct ionic_dev *idev, uint16_t lif_index,
237*2d9fd380Sjfb8856606 rte_iova_t addr);
238*2d9fd380Sjfb8856606 void ionic_dev_cmd_lif_reset(struct ionic_dev *idev, uint16_t lif_index);
239*2d9fd380Sjfb8856606 void ionic_dev_cmd_adminq_init(struct ionic_dev *idev, struct ionic_qcq *qcq,
240*2d9fd380Sjfb8856606 uint16_t lif_index, uint16_t intr_index);
241*2d9fd380Sjfb8856606
242*2d9fd380Sjfb8856606 struct ionic_doorbell __iomem *ionic_db_map(struct ionic_lif *lif,
243*2d9fd380Sjfb8856606 struct ionic_queue *q);
244*2d9fd380Sjfb8856606 int ionic_db_page_num(struct ionic_lif *lif, int pid);
245*2d9fd380Sjfb8856606
246*2d9fd380Sjfb8856606 int ionic_cq_init(struct ionic_lif *lif, struct ionic_cq *cq,
247*2d9fd380Sjfb8856606 struct ionic_intr_info *intr, uint32_t num_descs,
248*2d9fd380Sjfb8856606 size_t desc_size);
249*2d9fd380Sjfb8856606 void ionic_cq_map(struct ionic_cq *cq, void *base, rte_iova_t base_pa);
250*2d9fd380Sjfb8856606 void ionic_cq_bind(struct ionic_cq *cq, struct ionic_queue *q);
251*2d9fd380Sjfb8856606 typedef bool (*ionic_cq_cb)(struct ionic_cq *cq, uint32_t cq_desc_index,
252*2d9fd380Sjfb8856606 void *cb_arg);
253*2d9fd380Sjfb8856606 uint32_t ionic_cq_service(struct ionic_cq *cq, uint32_t work_to_do,
254*2d9fd380Sjfb8856606 ionic_cq_cb cb, void *cb_arg);
255*2d9fd380Sjfb8856606
256*2d9fd380Sjfb8856606 int ionic_q_init(struct ionic_lif *lif, struct ionic_dev *idev,
257*2d9fd380Sjfb8856606 struct ionic_queue *q, uint32_t index, uint32_t num_descs,
258*2d9fd380Sjfb8856606 size_t desc_size, size_t sg_desc_size, uint32_t pid);
259*2d9fd380Sjfb8856606 void ionic_q_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
260*2d9fd380Sjfb8856606 void ionic_q_sg_map(struct ionic_queue *q, void *base, rte_iova_t base_pa);
261*2d9fd380Sjfb8856606 void ionic_q_flush(struct ionic_queue *q);
262*2d9fd380Sjfb8856606 void ionic_q_post(struct ionic_queue *q, bool ring_doorbell, desc_cb cb,
263*2d9fd380Sjfb8856606 void *cb_arg);
264*2d9fd380Sjfb8856606 uint32_t ionic_q_space_avail(struct ionic_queue *q);
265*2d9fd380Sjfb8856606 bool ionic_q_has_space(struct ionic_queue *q, uint32_t want);
266*2d9fd380Sjfb8856606 void ionic_q_service(struct ionic_queue *q, uint32_t cq_desc_index,
267*2d9fd380Sjfb8856606 uint32_t stop_index, void *service_cb_arg);
268*2d9fd380Sjfb8856606
269*2d9fd380Sjfb8856606 int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);
270*2d9fd380Sjfb8856606
271*2d9fd380Sjfb8856606 #endif /* _IONIC_DEV_H_ */
272