1 /*- 2 * BSD LICENSE 3 * 4 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 5 * Copyright 2017 NXP. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef __DPDK_RXTX_H__ 35 #define __DPDK_RXTX_H__ 36 37 /* internal offset from where IC is copied to packet buffer*/ 38 #define DEFAULT_ICIOF 32 39 /* IC transfer size */ 40 #define DEFAULT_ICSZ 48 41 42 /* IC offsets from buffer header address */ 43 #define DEFAULT_RX_ICEOF 16 44 #define DEFAULT_TX_ICEOF 16 45 46 /* 47 * Values for the L3R field of the FM Parse Results 48 */ 49 /* L3 Type field: First IP Present IPv4 */ 50 #define DPAA_L3_PARSE_RESULT_IPV4 0x80 51 /* L3 Type field: First IP Present IPv6 */ 52 #define DPAA_L3_PARSE_RESULT_IPV6 0x40 53 /* Values for the L4R field of the FM Parse Results 54 * See $8.8.4.7.20 - L4 HXS - L4 Results from DPAA-Rev2 Reference Manual. 55 */ 56 /* L4 Type field: UDP */ 57 #define DPAA_L4_PARSE_RESULT_UDP 0x40 58 /* L4 Type field: TCP */ 59 #define DPAA_L4_PARSE_RESULT_TCP 0x20 60 61 #define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */ 62 63 #define DPAA_MAX_DEQUEUE_NUM_FRAMES 63 64 /** <Maximum number of frames to be dequeued in a single rx call*/ 65 66 /* FD structure masks and offset */ 67 #define DPAA_FD_FORMAT_MASK 0xE0000000 68 #define DPAA_FD_OFFSET_MASK 0x1FF00000 69 #define DPAA_FD_LENGTH_MASK 0xFFFFF 70 #define DPAA_FD_FORMAT_SHIFT 29 71 #define DPAA_FD_OFFSET_SHIFT 20 72 73 /* Parsing mask (Little Endian) - 0x00E044ED00800000 74 * Classification Plan ID 0x00 75 * L4R 0xE0 - 76 * 0x20 - TCP 77 * 0x40 - UDP 78 * 0x80 - SCTP 79 * L3R 0xEDC4 (in Big Endian) - 80 * 0x8000 - IPv4 81 * 0x4000 - IPv6 82 * 0x8140 - IPv4 Ext + Frag 83 * 0x8040 - IPv4 Frag 84 * 0x8100 - IPv4 Ext 85 * 0x4140 - IPv6 Ext + Frag 86 * 0x4040 - IPv6 Frag 87 * 0x4100 - IPv6 Ext 88 * L2R 0x8000 (in Big Endian) - 89 * 0x8000 - Ethernet type 90 * ShimR & Logical Port ID 0x0000 91 */ 92 #define DPAA_PARSE_MASK 0x00E044ED00800000 93 #define DPAA_PARSE_VLAN_MASK 0x0000000000700000 94 95 /* Parsed values (Little Endian) */ 96 #define DPAA_PKT_TYPE_NONE 0x0000000000000000 97 #define DPAA_PKT_TYPE_ETHER 0x0000000000800000 98 #define DPAA_PKT_TYPE_IPV4 \ 99 (0x0000008000000000 | DPAA_PKT_TYPE_ETHER) 100 #define DPAA_PKT_TYPE_IPV6 \ 101 (0x0000004000000000 | DPAA_PKT_TYPE_ETHER) 102 #define DPAA_PKT_TYPE_GRE \ 103 (0x0000002000000000 | DPAA_PKT_TYPE_ETHER) 104 #define DPAA_PKT_TYPE_IPV4_FRAG \ 105 (0x0000400000000000 | DPAA_PKT_TYPE_IPV4) 106 #define DPAA_PKT_TYPE_IPV6_FRAG \ 107 (0x0000400000000000 | DPAA_PKT_TYPE_IPV6) 108 #define DPAA_PKT_TYPE_IPV4_EXT \ 109 (0x0000000100000000 | DPAA_PKT_TYPE_IPV4) 110 #define DPAA_PKT_TYPE_IPV6_EXT \ 111 (0x0000000100000000 | DPAA_PKT_TYPE_IPV6) 112 #define DPAA_PKT_TYPE_IPV4_TCP \ 113 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4) 114 #define DPAA_PKT_TYPE_IPV6_TCP \ 115 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6) 116 #define DPAA_PKT_TYPE_IPV4_UDP \ 117 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4) 118 #define DPAA_PKT_TYPE_IPV6_UDP \ 119 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6) 120 #define DPAA_PKT_TYPE_IPV4_SCTP \ 121 (0x0080000000000000 | DPAA_PKT_TYPE_IPV4) 122 #define DPAA_PKT_TYPE_IPV6_SCTP \ 123 (0x0080000000000000 | DPAA_PKT_TYPE_IPV6) 124 #define DPAA_PKT_TYPE_IPV4_FRAG_TCP \ 125 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_FRAG) 126 #define DPAA_PKT_TYPE_IPV6_FRAG_TCP \ 127 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_FRAG) 128 #define DPAA_PKT_TYPE_IPV4_FRAG_UDP \ 129 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_FRAG) 130 #define DPAA_PKT_TYPE_IPV6_FRAG_UDP \ 131 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_FRAG) 132 #define DPAA_PKT_TYPE_IPV4_FRAG_SCTP \ 133 (0x0080000000000000 | DPAA_PKT_TYPE_IPV4_FRAG) 134 #define DPAA_PKT_TYPE_IPV6_FRAG_SCTP \ 135 (0x0080000000000000 | DPAA_PKT_TYPE_IPV6_FRAG) 136 #define DPAA_PKT_TYPE_IPV4_EXT_UDP \ 137 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_EXT) 138 #define DPAA_PKT_TYPE_IPV6_EXT_UDP \ 139 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_EXT) 140 #define DPAA_PKT_TYPE_IPV4_EXT_TCP \ 141 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_EXT) 142 #define DPAA_PKT_TYPE_IPV6_EXT_TCP \ 143 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_EXT) 144 #define DPAA_PKT_TYPE_TUNNEL_4_4 \ 145 (0x0000000800000000 | DPAA_PKT_TYPE_IPV4) 146 #define DPAA_PKT_TYPE_TUNNEL_6_6 \ 147 (0x0000000400000000 | DPAA_PKT_TYPE_IPV6) 148 #define DPAA_PKT_TYPE_TUNNEL_4_6 \ 149 (0x0000000400000000 | DPAA_PKT_TYPE_IPV4) 150 #define DPAA_PKT_TYPE_TUNNEL_6_4 \ 151 (0x0000000800000000 | DPAA_PKT_TYPE_IPV6) 152 #define DPAA_PKT_TYPE_TUNNEL_4_4_UDP \ 153 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4) 154 #define DPAA_PKT_TYPE_TUNNEL_6_6_UDP \ 155 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6) 156 #define DPAA_PKT_TYPE_TUNNEL_4_6_UDP \ 157 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6) 158 #define DPAA_PKT_TYPE_TUNNEL_6_4_UDP \ 159 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4) 160 #define DPAA_PKT_TYPE_TUNNEL_4_4_TCP \ 161 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4) 162 #define DPAA_PKT_TYPE_TUNNEL_6_6_TCP \ 163 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6) 164 #define DPAA_PKT_TYPE_TUNNEL_4_6_TCP \ 165 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6) 166 #define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \ 167 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4) 168 #define DPAA_PKT_L3_LEN_SHIFT 7 169 170 /** 171 * FMan parse result array 172 */ 173 struct dpaa_eth_parse_results_t { 174 uint8_t lpid; /**< Logical port id */ 175 uint8_t shimr; /**< Shim header result */ 176 union { 177 uint16_t l2r; /**< Layer 2 result */ 178 struct { 179 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ 180 uint16_t ethernet:1; 181 uint16_t vlan:1; 182 uint16_t llc_snap:1; 183 uint16_t mpls:1; 184 uint16_t ppoe_ppp:1; 185 uint16_t unused_1:3; 186 uint16_t unknown_eth_proto:1; 187 uint16_t eth_frame_type:2; 188 uint16_t l2r_err:5; 189 /*00-unicast, 01-multicast, 11-broadcast*/ 190 #else 191 uint16_t l2r_err:5; 192 uint16_t eth_frame_type:2; 193 uint16_t unknown_eth_proto:1; 194 uint16_t unused_1:3; 195 uint16_t ppoe_ppp:1; 196 uint16_t mpls:1; 197 uint16_t llc_snap:1; 198 uint16_t vlan:1; 199 uint16_t ethernet:1; 200 #endif 201 } __attribute__((__packed__)); 202 } __attribute__((__packed__)); 203 union { 204 uint16_t l3r; /**< Layer 3 result */ 205 struct { 206 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ 207 uint16_t first_ipv4:1; 208 uint16_t first_ipv6:1; 209 uint16_t gre:1; 210 uint16_t min_enc:1; 211 uint16_t last_ipv4:1; 212 uint16_t last_ipv6:1; 213 uint16_t first_info_err:1;/*0 info, 1 error*/ 214 uint16_t first_ip_err_code:5; 215 uint16_t last_info_err:1; /*0 info, 1 error*/ 216 uint16_t last_ip_err_code:3; 217 #else 218 uint16_t last_ip_err_code:3; 219 uint16_t last_info_err:1; /*0 info, 1 error*/ 220 uint16_t first_ip_err_code:5; 221 uint16_t first_info_err:1;/*0 info, 1 error*/ 222 uint16_t last_ipv6:1; 223 uint16_t last_ipv4:1; 224 uint16_t min_enc:1; 225 uint16_t gre:1; 226 uint16_t first_ipv6:1; 227 uint16_t first_ipv4:1; 228 #endif 229 } __attribute__((__packed__)); 230 } __attribute__((__packed__)); 231 union { 232 uint8_t l4r; /**< Layer 4 result */ 233 struct{ 234 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ 235 uint8_t l4_type:3; 236 uint8_t l4_info_err:1; 237 uint8_t l4_result:4; 238 /* if type IPSec: 1 ESP, 2 AH */ 239 #else 240 uint8_t l4_result:4; 241 /* if type IPSec: 1 ESP, 2 AH */ 242 uint8_t l4_info_err:1; 243 uint8_t l4_type:3; 244 #endif 245 } __attribute__((__packed__)); 246 } __attribute__((__packed__)); 247 uint8_t cplan; /**< Classification plan id */ 248 uint16_t nxthdr; /**< Next Header */ 249 uint16_t cksum; /**< Checksum */ 250 uint32_t lcv; /**< LCV */ 251 uint8_t shim_off[3]; /**< Shim offset */ 252 uint8_t eth_off; /**< ETH offset */ 253 uint8_t llc_snap_off; /**< LLC_SNAP offset */ 254 uint8_t vlan_off[2]; /**< VLAN offset */ 255 uint8_t etype_off; /**< ETYPE offset */ 256 uint8_t pppoe_off; /**< PPP offset */ 257 uint8_t mpls_off[2]; /**< MPLS offset */ 258 uint8_t ip_off[2]; /**< IP offset */ 259 uint8_t gre_off; /**< GRE offset */ 260 uint8_t l4_off; /**< Layer 4 offset */ 261 uint8_t nxthdr_off; /**< Parser end point */ 262 } __attribute__ ((__packed__)); 263 264 /* The structure is the Prepended Data to the Frame which is used by FMAN */ 265 struct annotations_t { 266 uint8_t reserved[DEFAULT_RX_ICEOF]; 267 struct dpaa_eth_parse_results_t parse; /**< Pointer to Parsed result*/ 268 uint64_t reserved1; 269 uint64_t hash; /**< Hash Result */ 270 }; 271 272 #define GET_ANNOTATIONS(_buf) \ 273 (struct annotations_t *)(_buf) 274 275 #define GET_RX_PRS(_buf) \ 276 (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \ 277 DEFAULT_RX_ICEOF) 278 279 #define GET_TX_PRS(_buf) \ 280 (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \ 281 DEFAULT_TX_ICEOF) 282 283 uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs); 284 285 uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs); 286 287 uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused, 288 struct rte_mbuf **bufs __rte_unused, 289 uint16_t nb_bufs __rte_unused); 290 291 struct rte_mbuf *dpaa_eth_sg_to_mbuf(struct qm_fd *fd, uint32_t ifid); 292 293 int dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf, 294 struct qm_fd *fd, 295 uint32_t bpid); 296 297 #endif 298