1 /*- 2 * BSD LICENSE 3 * 4 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 5 * Copyright 2017 NXP. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /* System headers */ 34 #include <stdio.h> 35 #include <inttypes.h> 36 #include <unistd.h> 37 #include <limits.h> 38 #include <sched.h> 39 #include <signal.h> 40 #include <pthread.h> 41 #include <sys/types.h> 42 #include <sys/syscall.h> 43 44 #include <rte_byteorder.h> 45 #include <rte_common.h> 46 #include <rte_interrupts.h> 47 #include <rte_log.h> 48 #include <rte_debug.h> 49 #include <rte_pci.h> 50 #include <rte_atomic.h> 51 #include <rte_branch_prediction.h> 52 #include <rte_memory.h> 53 #include <rte_tailq.h> 54 #include <rte_eal.h> 55 #include <rte_alarm.h> 56 #include <rte_ether.h> 57 #include <rte_ethdev.h> 58 #include <rte_malloc.h> 59 #include <rte_ring.h> 60 61 #include <rte_dpaa_bus.h> 62 #include <rte_dpaa_logs.h> 63 #include <dpaa_mempool.h> 64 65 #include <dpaa_ethdev.h> 66 #include <dpaa_rxtx.h> 67 68 #include <fsl_usd.h> 69 #include <fsl_qman.h> 70 #include <fsl_bman.h> 71 #include <fsl_fman.h> 72 73 /* Keep track of whether QMAN and BMAN have been globally initialized */ 74 static int is_global_init; 75 76 struct rte_dpaa_xstats_name_off { 77 char name[RTE_ETH_XSTATS_NAME_SIZE]; 78 uint32_t offset; 79 }; 80 81 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = { 82 {"rx_align_err", 83 offsetof(struct dpaa_if_stats, raln)}, 84 {"rx_valid_pause", 85 offsetof(struct dpaa_if_stats, rxpf)}, 86 {"rx_fcs_err", 87 offsetof(struct dpaa_if_stats, rfcs)}, 88 {"rx_vlan_frame", 89 offsetof(struct dpaa_if_stats, rvlan)}, 90 {"rx_frame_err", 91 offsetof(struct dpaa_if_stats, rerr)}, 92 {"rx_drop_err", 93 offsetof(struct dpaa_if_stats, rdrp)}, 94 {"rx_undersized", 95 offsetof(struct dpaa_if_stats, rund)}, 96 {"rx_oversize_err", 97 offsetof(struct dpaa_if_stats, rovr)}, 98 {"rx_fragment_pkt", 99 offsetof(struct dpaa_if_stats, rfrg)}, 100 {"tx_valid_pause", 101 offsetof(struct dpaa_if_stats, txpf)}, 102 {"tx_fcs_err", 103 offsetof(struct dpaa_if_stats, terr)}, 104 {"tx_vlan_frame", 105 offsetof(struct dpaa_if_stats, tvlan)}, 106 {"rx_undersized", 107 offsetof(struct dpaa_if_stats, tund)}, 108 }; 109 110 static int 111 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 112 { 113 struct dpaa_if *dpaa_intf = dev->data->dev_private; 114 115 PMD_INIT_FUNC_TRACE(); 116 117 if (mtu < ETHER_MIN_MTU) 118 return -EINVAL; 119 if (mtu > ETHER_MAX_LEN) 120 dev->data->dev_conf.rxmode.jumbo_frame = 1; 121 else 122 dev->data->dev_conf.rxmode.jumbo_frame = 0; 123 124 dev->data->dev_conf.rxmode.max_rx_pkt_len = mtu; 125 126 fman_if_set_maxfrm(dpaa_intf->fif, mtu); 127 128 return 0; 129 } 130 131 static int 132 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused) 133 { 134 PMD_INIT_FUNC_TRACE(); 135 136 if (dev->data->dev_conf.rxmode.jumbo_frame == 1) { 137 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= 138 DPAA_MAX_RX_PKT_LEN) 139 return dpaa_mtu_set(dev, 140 dev->data->dev_conf.rxmode.max_rx_pkt_len); 141 else 142 return -1; 143 } 144 return 0; 145 } 146 147 static const uint32_t * 148 dpaa_supported_ptypes_get(struct rte_eth_dev *dev) 149 { 150 static const uint32_t ptypes[] = { 151 /*todo -= add more types */ 152 RTE_PTYPE_L2_ETHER, 153 RTE_PTYPE_L3_IPV4, 154 RTE_PTYPE_L3_IPV4_EXT, 155 RTE_PTYPE_L3_IPV6, 156 RTE_PTYPE_L3_IPV6_EXT, 157 RTE_PTYPE_L4_TCP, 158 RTE_PTYPE_L4_UDP, 159 RTE_PTYPE_L4_SCTP 160 }; 161 162 PMD_INIT_FUNC_TRACE(); 163 164 if (dev->rx_pkt_burst == dpaa_eth_queue_rx) 165 return ptypes; 166 return NULL; 167 } 168 169 static int dpaa_eth_dev_start(struct rte_eth_dev *dev) 170 { 171 struct dpaa_if *dpaa_intf = dev->data->dev_private; 172 173 PMD_INIT_FUNC_TRACE(); 174 175 /* Change tx callback to the real one */ 176 dev->tx_pkt_burst = dpaa_eth_queue_tx; 177 fman_if_enable_rx(dpaa_intf->fif); 178 179 return 0; 180 } 181 182 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev) 183 { 184 struct dpaa_if *dpaa_intf = dev->data->dev_private; 185 186 PMD_INIT_FUNC_TRACE(); 187 188 fman_if_disable_rx(dpaa_intf->fif); 189 dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 190 } 191 192 static void dpaa_eth_dev_close(struct rte_eth_dev *dev) 193 { 194 PMD_INIT_FUNC_TRACE(); 195 196 dpaa_eth_dev_stop(dev); 197 } 198 199 static int 200 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused, 201 char *fw_version, 202 size_t fw_size) 203 { 204 int ret; 205 FILE *svr_file = NULL; 206 unsigned int svr_ver = 0; 207 208 PMD_INIT_FUNC_TRACE(); 209 210 svr_file = fopen(DPAA_SOC_ID_FILE, "r"); 211 if (!svr_file) { 212 DPAA_PMD_ERR("Unable to open SoC device"); 213 return -ENOTSUP; /* Not supported on this infra */ 214 } 215 if (fscanf(svr_file, "svr:%x", &svr_ver) <= 0) 216 DPAA_PMD_ERR("Unable to read SoC device"); 217 218 fclose(svr_file); 219 220 ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x", 221 svr_ver, fman_ip_rev); 222 ret += 1; /* add the size of '\0' */ 223 224 if (fw_size < (uint32_t)ret) 225 return ret; 226 else 227 return 0; 228 } 229 230 static void dpaa_eth_dev_info(struct rte_eth_dev *dev, 231 struct rte_eth_dev_info *dev_info) 232 { 233 struct dpaa_if *dpaa_intf = dev->data->dev_private; 234 235 PMD_INIT_FUNC_TRACE(); 236 237 dev_info->max_rx_queues = dpaa_intf->nb_rx_queues; 238 dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; 239 dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; 240 dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; 241 dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; 242 dev_info->max_hash_mac_addrs = 0; 243 dev_info->max_vfs = 0; 244 dev_info->max_vmdq_pools = ETH_16_POOLS; 245 dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; 246 dev_info->speed_capa = (ETH_LINK_SPEED_1G | 247 ETH_LINK_SPEED_10G); 248 dev_info->rx_offload_capa = 249 (DEV_RX_OFFLOAD_IPV4_CKSUM | 250 DEV_RX_OFFLOAD_UDP_CKSUM | 251 DEV_RX_OFFLOAD_TCP_CKSUM); 252 dev_info->tx_offload_capa = 253 (DEV_TX_OFFLOAD_IPV4_CKSUM | 254 DEV_TX_OFFLOAD_UDP_CKSUM | 255 DEV_TX_OFFLOAD_TCP_CKSUM); 256 } 257 258 static int dpaa_eth_link_update(struct rte_eth_dev *dev, 259 int wait_to_complete __rte_unused) 260 { 261 struct dpaa_if *dpaa_intf = dev->data->dev_private; 262 struct rte_eth_link *link = &dev->data->dev_link; 263 264 PMD_INIT_FUNC_TRACE(); 265 266 if (dpaa_intf->fif->mac_type == fman_mac_1g) 267 link->link_speed = 1000; 268 else if (dpaa_intf->fif->mac_type == fman_mac_10g) 269 link->link_speed = 10000; 270 else 271 DPAA_PMD_ERR("invalid link_speed: %s, %d", 272 dpaa_intf->name, dpaa_intf->fif->mac_type); 273 274 link->link_status = dpaa_intf->valid; 275 link->link_duplex = ETH_LINK_FULL_DUPLEX; 276 link->link_autoneg = ETH_LINK_AUTONEG; 277 return 0; 278 } 279 280 static int dpaa_eth_stats_get(struct rte_eth_dev *dev, 281 struct rte_eth_stats *stats) 282 { 283 struct dpaa_if *dpaa_intf = dev->data->dev_private; 284 285 PMD_INIT_FUNC_TRACE(); 286 287 fman_if_stats_get(dpaa_intf->fif, stats); 288 return 0; 289 } 290 291 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev) 292 { 293 struct dpaa_if *dpaa_intf = dev->data->dev_private; 294 295 PMD_INIT_FUNC_TRACE(); 296 297 fman_if_stats_reset(dpaa_intf->fif); 298 } 299 300 static int 301 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 302 unsigned int n) 303 { 304 struct dpaa_if *dpaa_intf = dev->data->dev_private; 305 unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings); 306 uint64_t values[sizeof(struct dpaa_if_stats) / 8]; 307 308 if (xstats == NULL) 309 return 0; 310 311 if (n < num) 312 return num; 313 314 fman_if_stats_get_all(dpaa_intf->fif, values, 315 sizeof(struct dpaa_if_stats) / 8); 316 317 for (i = 0; i < num; i++) { 318 xstats[i].id = i; 319 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8]; 320 } 321 return i; 322 } 323 324 static int 325 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 326 struct rte_eth_xstat_name *xstats_names, 327 __rte_unused unsigned int limit) 328 { 329 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 330 331 if (xstats_names != NULL) 332 for (i = 0; i < stat_cnt; i++) 333 snprintf(xstats_names[i].name, 334 sizeof(xstats_names[i].name), 335 "%s", 336 dpaa_xstats_strings[i].name); 337 338 return stat_cnt; 339 } 340 341 static int 342 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 343 uint64_t *values, unsigned int n) 344 { 345 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 346 uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8]; 347 348 if (!ids) { 349 struct dpaa_if *dpaa_intf = dev->data->dev_private; 350 351 if (n < stat_cnt) 352 return stat_cnt; 353 354 if (!values) 355 return 0; 356 357 fman_if_stats_get_all(dpaa_intf->fif, values_copy, 358 sizeof(struct dpaa_if_stats)); 359 360 for (i = 0; i < stat_cnt; i++) 361 values[i] = 362 values_copy[dpaa_xstats_strings[i].offset / 8]; 363 364 return stat_cnt; 365 } 366 367 dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 368 369 for (i = 0; i < n; i++) { 370 if (ids[i] >= stat_cnt) { 371 DPAA_PMD_ERR("id value isn't valid"); 372 return -1; 373 } 374 values[i] = values_copy[ids[i]]; 375 } 376 return n; 377 } 378 379 static int 380 dpaa_xstats_get_names_by_id( 381 struct rte_eth_dev *dev, 382 struct rte_eth_xstat_name *xstats_names, 383 const uint64_t *ids, 384 unsigned int limit) 385 { 386 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 387 struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 388 389 if (!ids) 390 return dpaa_xstats_get_names(dev, xstats_names, limit); 391 392 dpaa_xstats_get_names(dev, xstats_names_copy, limit); 393 394 for (i = 0; i < limit; i++) { 395 if (ids[i] >= stat_cnt) { 396 DPAA_PMD_ERR("id value isn't valid"); 397 return -1; 398 } 399 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 400 } 401 return limit; 402 } 403 404 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev) 405 { 406 struct dpaa_if *dpaa_intf = dev->data->dev_private; 407 408 PMD_INIT_FUNC_TRACE(); 409 410 fman_if_promiscuous_enable(dpaa_intf->fif); 411 } 412 413 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev) 414 { 415 struct dpaa_if *dpaa_intf = dev->data->dev_private; 416 417 PMD_INIT_FUNC_TRACE(); 418 419 fman_if_promiscuous_disable(dpaa_intf->fif); 420 } 421 422 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev) 423 { 424 struct dpaa_if *dpaa_intf = dev->data->dev_private; 425 426 PMD_INIT_FUNC_TRACE(); 427 428 fman_if_set_mcast_filter_table(dpaa_intf->fif); 429 } 430 431 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev) 432 { 433 struct dpaa_if *dpaa_intf = dev->data->dev_private; 434 435 PMD_INIT_FUNC_TRACE(); 436 437 fman_if_reset_mcast_filter_table(dpaa_intf->fif); 438 } 439 440 static 441 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 442 uint16_t nb_desc __rte_unused, 443 unsigned int socket_id __rte_unused, 444 const struct rte_eth_rxconf *rx_conf __rte_unused, 445 struct rte_mempool *mp) 446 { 447 struct dpaa_if *dpaa_intf = dev->data->dev_private; 448 449 PMD_INIT_FUNC_TRACE(); 450 451 DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx); 452 453 if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) { 454 struct fman_if_ic_params icp; 455 uint32_t fd_offset; 456 uint32_t bp_size; 457 458 if (!mp->pool_data) { 459 DPAA_PMD_ERR("Not an offloaded buffer pool!"); 460 return -1; 461 } 462 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 463 464 memset(&icp, 0, sizeof(icp)); 465 /* set ICEOF for to the default value , which is 0*/ 466 icp.iciof = DEFAULT_ICIOF; 467 icp.iceof = DEFAULT_RX_ICEOF; 468 icp.icsz = DEFAULT_ICSZ; 469 fman_if_set_ic_params(dpaa_intf->fif, &icp); 470 471 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE; 472 fman_if_set_fdoff(dpaa_intf->fif, fd_offset); 473 474 /* Buffer pool size should be equal to Dataroom Size*/ 475 bp_size = rte_pktmbuf_data_room_size(mp); 476 fman_if_set_bp(dpaa_intf->fif, mp->size, 477 dpaa_intf->bp_info->bpid, bp_size); 478 dpaa_intf->valid = 1; 479 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d", 480 dpaa_intf->name, fd_offset, 481 fman_if_get_fdoff(dpaa_intf->fif)); 482 } 483 dev->data->rx_queues[queue_idx] = &dpaa_intf->rx_queues[queue_idx]; 484 485 return 0; 486 } 487 488 static 489 void dpaa_eth_rx_queue_release(void *rxq __rte_unused) 490 { 491 PMD_INIT_FUNC_TRACE(); 492 } 493 494 static 495 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 496 uint16_t nb_desc __rte_unused, 497 unsigned int socket_id __rte_unused, 498 const struct rte_eth_txconf *tx_conf __rte_unused) 499 { 500 struct dpaa_if *dpaa_intf = dev->data->dev_private; 501 502 PMD_INIT_FUNC_TRACE(); 503 504 DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx); 505 dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx]; 506 return 0; 507 } 508 509 static void dpaa_eth_tx_queue_release(void *txq __rte_unused) 510 { 511 PMD_INIT_FUNC_TRACE(); 512 } 513 514 static int dpaa_link_down(struct rte_eth_dev *dev) 515 { 516 PMD_INIT_FUNC_TRACE(); 517 518 dpaa_eth_dev_stop(dev); 519 return 0; 520 } 521 522 static int dpaa_link_up(struct rte_eth_dev *dev) 523 { 524 PMD_INIT_FUNC_TRACE(); 525 526 dpaa_eth_dev_start(dev); 527 return 0; 528 } 529 530 static int 531 dpaa_flow_ctrl_set(struct rte_eth_dev *dev, 532 struct rte_eth_fc_conf *fc_conf) 533 { 534 struct dpaa_if *dpaa_intf = dev->data->dev_private; 535 struct rte_eth_fc_conf *net_fc; 536 537 PMD_INIT_FUNC_TRACE(); 538 539 if (!(dpaa_intf->fc_conf)) { 540 dpaa_intf->fc_conf = rte_zmalloc(NULL, 541 sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 542 if (!dpaa_intf->fc_conf) { 543 DPAA_PMD_ERR("unable to save flow control info"); 544 return -ENOMEM; 545 } 546 } 547 net_fc = dpaa_intf->fc_conf; 548 549 if (fc_conf->high_water < fc_conf->low_water) { 550 DPAA_PMD_ERR("Incorrect Flow Control Configuration"); 551 return -EINVAL; 552 } 553 554 if (fc_conf->mode == RTE_FC_NONE) { 555 return 0; 556 } else if (fc_conf->mode == RTE_FC_TX_PAUSE || 557 fc_conf->mode == RTE_FC_FULL) { 558 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water, 559 fc_conf->low_water, 560 dpaa_intf->bp_info->bpid); 561 if (fc_conf->pause_time) 562 fman_if_set_fc_quanta(dpaa_intf->fif, 563 fc_conf->pause_time); 564 } 565 566 /* Save the information in dpaa device */ 567 net_fc->pause_time = fc_conf->pause_time; 568 net_fc->high_water = fc_conf->high_water; 569 net_fc->low_water = fc_conf->low_water; 570 net_fc->send_xon = fc_conf->send_xon; 571 net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd; 572 net_fc->mode = fc_conf->mode; 573 net_fc->autoneg = fc_conf->autoneg; 574 575 return 0; 576 } 577 578 static int 579 dpaa_flow_ctrl_get(struct rte_eth_dev *dev, 580 struct rte_eth_fc_conf *fc_conf) 581 { 582 struct dpaa_if *dpaa_intf = dev->data->dev_private; 583 struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf; 584 int ret; 585 586 PMD_INIT_FUNC_TRACE(); 587 588 if (net_fc) { 589 fc_conf->pause_time = net_fc->pause_time; 590 fc_conf->high_water = net_fc->high_water; 591 fc_conf->low_water = net_fc->low_water; 592 fc_conf->send_xon = net_fc->send_xon; 593 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd; 594 fc_conf->mode = net_fc->mode; 595 fc_conf->autoneg = net_fc->autoneg; 596 return 0; 597 } 598 ret = fman_if_get_fc_threshold(dpaa_intf->fif); 599 if (ret) { 600 fc_conf->mode = RTE_FC_TX_PAUSE; 601 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 602 } else { 603 fc_conf->mode = RTE_FC_NONE; 604 } 605 606 return 0; 607 } 608 609 static int 610 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev, 611 struct ether_addr *addr, 612 uint32_t index, 613 __rte_unused uint32_t pool) 614 { 615 int ret; 616 struct dpaa_if *dpaa_intf = dev->data->dev_private; 617 618 PMD_INIT_FUNC_TRACE(); 619 620 ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index); 621 622 if (ret) 623 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:" 624 " err = %d", ret); 625 return 0; 626 } 627 628 static void 629 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev, 630 uint32_t index) 631 { 632 struct dpaa_if *dpaa_intf = dev->data->dev_private; 633 634 PMD_INIT_FUNC_TRACE(); 635 636 fman_if_clear_mac_addr(dpaa_intf->fif, index); 637 } 638 639 static void 640 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev, 641 struct ether_addr *addr) 642 { 643 int ret; 644 struct dpaa_if *dpaa_intf = dev->data->dev_private; 645 646 PMD_INIT_FUNC_TRACE(); 647 648 ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0); 649 if (ret) 650 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret); 651 } 652 653 static struct eth_dev_ops dpaa_devops = { 654 .dev_configure = dpaa_eth_dev_configure, 655 .dev_start = dpaa_eth_dev_start, 656 .dev_stop = dpaa_eth_dev_stop, 657 .dev_close = dpaa_eth_dev_close, 658 .dev_infos_get = dpaa_eth_dev_info, 659 .dev_supported_ptypes_get = dpaa_supported_ptypes_get, 660 661 .rx_queue_setup = dpaa_eth_rx_queue_setup, 662 .tx_queue_setup = dpaa_eth_tx_queue_setup, 663 .rx_queue_release = dpaa_eth_rx_queue_release, 664 .tx_queue_release = dpaa_eth_tx_queue_release, 665 666 .flow_ctrl_get = dpaa_flow_ctrl_get, 667 .flow_ctrl_set = dpaa_flow_ctrl_set, 668 669 .link_update = dpaa_eth_link_update, 670 .stats_get = dpaa_eth_stats_get, 671 .xstats_get = dpaa_dev_xstats_get, 672 .xstats_get_by_id = dpaa_xstats_get_by_id, 673 .xstats_get_names_by_id = dpaa_xstats_get_names_by_id, 674 .xstats_get_names = dpaa_xstats_get_names, 675 .xstats_reset = dpaa_eth_stats_reset, 676 .stats_reset = dpaa_eth_stats_reset, 677 .promiscuous_enable = dpaa_eth_promiscuous_enable, 678 .promiscuous_disable = dpaa_eth_promiscuous_disable, 679 .allmulticast_enable = dpaa_eth_multicast_enable, 680 .allmulticast_disable = dpaa_eth_multicast_disable, 681 .mtu_set = dpaa_mtu_set, 682 .dev_set_link_down = dpaa_link_down, 683 .dev_set_link_up = dpaa_link_up, 684 .mac_addr_add = dpaa_dev_add_mac_addr, 685 .mac_addr_remove = dpaa_dev_remove_mac_addr, 686 .mac_addr_set = dpaa_dev_set_mac_addr, 687 688 .fw_version_get = dpaa_fw_version_get, 689 }; 690 691 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf) 692 { 693 struct rte_eth_fc_conf *fc_conf; 694 int ret; 695 696 PMD_INIT_FUNC_TRACE(); 697 698 if (!(dpaa_intf->fc_conf)) { 699 dpaa_intf->fc_conf = rte_zmalloc(NULL, 700 sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 701 if (!dpaa_intf->fc_conf) { 702 DPAA_PMD_ERR("unable to save flow control info"); 703 return -ENOMEM; 704 } 705 } 706 fc_conf = dpaa_intf->fc_conf; 707 ret = fman_if_get_fc_threshold(dpaa_intf->fif); 708 if (ret) { 709 fc_conf->mode = RTE_FC_TX_PAUSE; 710 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 711 } else { 712 fc_conf->mode = RTE_FC_NONE; 713 } 714 715 return 0; 716 } 717 718 /* Initialise an Rx FQ */ 719 static int dpaa_rx_queue_init(struct qman_fq *fq, 720 uint32_t fqid) 721 { 722 struct qm_mcc_initfq opts = {0}; 723 int ret; 724 725 PMD_INIT_FUNC_TRACE(); 726 727 ret = qman_reserve_fqid(fqid); 728 if (ret) { 729 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d", 730 fqid, ret); 731 return -EINVAL; 732 } 733 734 DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid); 735 ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 736 if (ret) { 737 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d", 738 fqid, ret); 739 return ret; 740 } 741 742 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 743 QM_INITFQ_WE_CONTEXTA; 744 745 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY; 746 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING | 747 QM_FQCTRL_PREFERINCACHE; 748 opts.fqd.context_a.stashing.exclusive = 0; 749 opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH; 750 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH; 751 opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH; 752 753 /*Enable tail drop */ 754 opts.we_mask = opts.we_mask | QM_INITFQ_WE_TDTHRESH; 755 opts.fqd.fq_ctrl = opts.fqd.fq_ctrl | QM_FQCTRL_TDE; 756 qm_fqd_taildrop_set(&opts.fqd.td, CONG_THRESHOLD_RX_Q, 1); 757 758 ret = qman_init_fq(fq, 0, &opts); 759 if (ret) 760 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret); 761 return ret; 762 } 763 764 /* Initialise a Tx FQ */ 765 static int dpaa_tx_queue_init(struct qman_fq *fq, 766 struct fman_if *fman_intf) 767 { 768 struct qm_mcc_initfq opts = {0}; 769 int ret; 770 771 PMD_INIT_FUNC_TRACE(); 772 773 ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID | 774 QMAN_FQ_FLAG_TO_DCPORTAL, fq); 775 if (ret) { 776 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret); 777 return ret; 778 } 779 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 780 QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA; 781 opts.fqd.dest.channel = fman_intf->tx_channel_id; 782 opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY; 783 opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE; 784 opts.fqd.context_b = 0; 785 /* no tx-confirmation */ 786 opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi; 787 opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo; 788 DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid); 789 ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts); 790 if (ret) 791 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret); 792 return ret; 793 } 794 795 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 796 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */ 797 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid) 798 { 799 struct qm_mcc_initfq opts = {0}; 800 int ret; 801 802 PMD_INIT_FUNC_TRACE(); 803 804 ret = qman_reserve_fqid(fqid); 805 if (ret) { 806 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d", 807 fqid, ret); 808 return -EINVAL; 809 } 810 /* "map" this Rx FQ to one of the interfaces Tx FQID */ 811 DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid); 812 ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 813 if (ret) { 814 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d", 815 fqid, ret); 816 return ret; 817 } 818 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL; 819 opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY; 820 ret = qman_init_fq(fq, 0, &opts); 821 if (ret) 822 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d", 823 fqid, ret); 824 return ret; 825 } 826 #endif 827 828 /* Initialise a network interface */ 829 static int 830 dpaa_dev_init(struct rte_eth_dev *eth_dev) 831 { 832 int num_cores, num_rx_fqs, fqid; 833 int loop, ret = 0; 834 int dev_id; 835 struct rte_dpaa_device *dpaa_device; 836 struct dpaa_if *dpaa_intf; 837 struct fm_eth_port_cfg *cfg; 838 struct fman_if *fman_intf; 839 struct fman_if_bpool *bp, *tmp_bp; 840 841 PMD_INIT_FUNC_TRACE(); 842 843 /* For secondary processes, the primary has done all the work */ 844 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 845 return 0; 846 847 dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device); 848 dev_id = dpaa_device->id.dev_id; 849 dpaa_intf = eth_dev->data->dev_private; 850 cfg = &dpaa_netcfg->port_cfg[dev_id]; 851 fman_intf = cfg->fman_if; 852 853 dpaa_intf->name = dpaa_device->name; 854 855 /* save fman_if & cfg in the interface struture */ 856 dpaa_intf->fif = fman_intf; 857 dpaa_intf->ifid = dev_id; 858 dpaa_intf->cfg = cfg; 859 860 /* Initialize Rx FQ's */ 861 if (getenv("DPAA_NUM_RX_QUEUES")) 862 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES")); 863 else 864 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES; 865 866 /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX 867 * queues. 868 */ 869 if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) { 870 DPAA_PMD_ERR("Invalid number of RX queues\n"); 871 return -EINVAL; 872 } 873 874 dpaa_intf->rx_queues = rte_zmalloc(NULL, 875 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE); 876 if (!dpaa_intf->rx_queues) { 877 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n"); 878 return -ENOMEM; 879 } 880 881 for (loop = 0; loop < num_rx_fqs; loop++) { 882 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid * 883 DPAA_PCD_FQID_MULTIPLIER + loop; 884 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop], fqid); 885 if (ret) 886 goto free_rx; 887 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf; 888 } 889 dpaa_intf->nb_rx_queues = num_rx_fqs; 890 891 /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */ 892 num_cores = rte_lcore_count(); 893 dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) * 894 num_cores, MAX_CACHELINE); 895 if (!dpaa_intf->tx_queues) { 896 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n"); 897 ret = -ENOMEM; 898 goto free_rx; 899 } 900 901 for (loop = 0; loop < num_cores; loop++) { 902 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop], 903 fman_intf); 904 if (ret) 905 goto free_tx; 906 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf; 907 } 908 dpaa_intf->nb_tx_queues = num_cores; 909 910 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 911 dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 912 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err); 913 dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf; 914 dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 915 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err); 916 dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf; 917 #endif 918 919 DPAA_PMD_DEBUG("All frame queues created"); 920 921 /* Get the initial configuration for flow control */ 922 dpaa_fc_set_default(dpaa_intf); 923 924 /* reset bpool list, initialize bpool dynamically */ 925 list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) { 926 list_del(&bp->node); 927 free(bp); 928 } 929 930 /* Populate ethdev structure */ 931 eth_dev->dev_ops = &dpaa_devops; 932 eth_dev->rx_pkt_burst = dpaa_eth_queue_rx; 933 eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 934 935 /* Allocate memory for storing MAC addresses */ 936 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", 937 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0); 938 if (eth_dev->data->mac_addrs == NULL) { 939 DPAA_PMD_ERR("Failed to allocate %d bytes needed to " 940 "store MAC addresses", 941 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER); 942 ret = -ENOMEM; 943 goto free_tx; 944 } 945 946 /* copy the primary mac address */ 947 ether_addr_copy(&fman_intf->mac_addr, ð_dev->data->mac_addrs[0]); 948 949 RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n", 950 dpaa_device->name, 951 fman_intf->mac_addr.addr_bytes[0], 952 fman_intf->mac_addr.addr_bytes[1], 953 fman_intf->mac_addr.addr_bytes[2], 954 fman_intf->mac_addr.addr_bytes[3], 955 fman_intf->mac_addr.addr_bytes[4], 956 fman_intf->mac_addr.addr_bytes[5]); 957 958 /* Disable RX mode */ 959 fman_if_discard_rx_errors(fman_intf); 960 fman_if_disable_rx(fman_intf); 961 /* Disable promiscuous mode */ 962 fman_if_promiscuous_disable(fman_intf); 963 /* Disable multicast */ 964 fman_if_reset_mcast_filter_table(fman_intf); 965 /* Reset interface statistics */ 966 fman_if_stats_reset(fman_intf); 967 968 return 0; 969 970 free_tx: 971 rte_free(dpaa_intf->tx_queues); 972 dpaa_intf->tx_queues = NULL; 973 dpaa_intf->nb_tx_queues = 0; 974 975 free_rx: 976 rte_free(dpaa_intf->rx_queues); 977 dpaa_intf->rx_queues = NULL; 978 dpaa_intf->nb_rx_queues = 0; 979 return ret; 980 } 981 982 static int 983 dpaa_dev_uninit(struct rte_eth_dev *dev) 984 { 985 struct dpaa_if *dpaa_intf = dev->data->dev_private; 986 987 PMD_INIT_FUNC_TRACE(); 988 989 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 990 return -EPERM; 991 992 if (!dpaa_intf) { 993 DPAA_PMD_WARN("Already closed or not started"); 994 return -1; 995 } 996 997 dpaa_eth_dev_close(dev); 998 999 /* release configuration memory */ 1000 if (dpaa_intf->fc_conf) 1001 rte_free(dpaa_intf->fc_conf); 1002 1003 rte_free(dpaa_intf->rx_queues); 1004 dpaa_intf->rx_queues = NULL; 1005 1006 rte_free(dpaa_intf->tx_queues); 1007 dpaa_intf->tx_queues = NULL; 1008 1009 /* free memory for storing MAC addresses */ 1010 rte_free(dev->data->mac_addrs); 1011 dev->data->mac_addrs = NULL; 1012 1013 dev->dev_ops = NULL; 1014 dev->rx_pkt_burst = NULL; 1015 dev->tx_pkt_burst = NULL; 1016 1017 return 0; 1018 } 1019 1020 static int 1021 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, 1022 struct rte_dpaa_device *dpaa_dev) 1023 { 1024 int diag; 1025 int ret; 1026 struct rte_eth_dev *eth_dev; 1027 1028 PMD_INIT_FUNC_TRACE(); 1029 1030 /* In case of secondary process, the device is already configured 1031 * and no further action is required, except portal initialization 1032 * and verifying secondary attachment to port name. 1033 */ 1034 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1035 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name); 1036 if (!eth_dev) 1037 return -ENOMEM; 1038 return 0; 1039 } 1040 1041 if (!is_global_init) { 1042 /* One time load of Qman/Bman drivers */ 1043 ret = qman_global_init(); 1044 if (ret) { 1045 DPAA_PMD_ERR("QMAN initialization failed: %d", 1046 ret); 1047 return ret; 1048 } 1049 ret = bman_global_init(); 1050 if (ret) { 1051 DPAA_PMD_ERR("BMAN initialization failed: %d", 1052 ret); 1053 return ret; 1054 } 1055 1056 is_global_init = 1; 1057 } 1058 1059 ret = rte_dpaa_portal_init((void *)1); 1060 if (ret) { 1061 DPAA_PMD_ERR("Unable to initialize portal"); 1062 return ret; 1063 } 1064 1065 eth_dev = rte_eth_dev_allocate(dpaa_dev->name); 1066 if (eth_dev == NULL) 1067 return -ENOMEM; 1068 1069 eth_dev->data->dev_private = rte_zmalloc( 1070 "ethdev private structure", 1071 sizeof(struct dpaa_if), 1072 RTE_CACHE_LINE_SIZE); 1073 if (!eth_dev->data->dev_private) { 1074 DPAA_PMD_ERR("Cannot allocate memzone for port data"); 1075 rte_eth_dev_release_port(eth_dev); 1076 return -ENOMEM; 1077 } 1078 1079 eth_dev->device = &dpaa_dev->device; 1080 eth_dev->device->driver = &dpaa_drv->driver; 1081 dpaa_dev->eth_dev = eth_dev; 1082 1083 /* Invoke PMD device initialization function */ 1084 diag = dpaa_dev_init(eth_dev); 1085 if (diag == 0) 1086 return 0; 1087 1088 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1089 rte_free(eth_dev->data->dev_private); 1090 1091 rte_eth_dev_release_port(eth_dev); 1092 return diag; 1093 } 1094 1095 static int 1096 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) 1097 { 1098 struct rte_eth_dev *eth_dev; 1099 1100 PMD_INIT_FUNC_TRACE(); 1101 1102 eth_dev = dpaa_dev->eth_dev; 1103 dpaa_dev_uninit(eth_dev); 1104 1105 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1106 rte_free(eth_dev->data->dev_private); 1107 1108 rte_eth_dev_release_port(eth_dev); 1109 1110 return 0; 1111 } 1112 1113 static struct rte_dpaa_driver rte_dpaa_pmd = { 1114 .drv_type = FSL_DPAA_ETH, 1115 .probe = rte_dpaa_probe, 1116 .remove = rte_dpaa_remove, 1117 }; 1118 1119 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd); 1120