1 /*- 2 * BSD LICENSE 3 * 4 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved. 5 * Copyright 2017 NXP. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 /* System headers */ 34 #include <stdio.h> 35 #include <inttypes.h> 36 #include <unistd.h> 37 #include <limits.h> 38 #include <sched.h> 39 #include <signal.h> 40 #include <pthread.h> 41 #include <sys/types.h> 42 #include <sys/syscall.h> 43 44 #include <rte_byteorder.h> 45 #include <rte_common.h> 46 #include <rte_interrupts.h> 47 #include <rte_log.h> 48 #include <rte_debug.h> 49 #include <rte_pci.h> 50 #include <rte_atomic.h> 51 #include <rte_branch_prediction.h> 52 #include <rte_memory.h> 53 #include <rte_tailq.h> 54 #include <rte_eal.h> 55 #include <rte_alarm.h> 56 #include <rte_ether.h> 57 #include <rte_ethdev.h> 58 #include <rte_malloc.h> 59 #include <rte_ring.h> 60 61 #include <rte_dpaa_bus.h> 62 #include <rte_dpaa_logs.h> 63 #include <dpaa_mempool.h> 64 65 #include <dpaa_ethdev.h> 66 #include <dpaa_rxtx.h> 67 68 #include <fsl_usd.h> 69 #include <fsl_qman.h> 70 #include <fsl_bman.h> 71 #include <fsl_fman.h> 72 73 /* Keep track of whether QMAN and BMAN have been globally initialized */ 74 static int is_global_init; 75 76 struct rte_dpaa_xstats_name_off { 77 char name[RTE_ETH_XSTATS_NAME_SIZE]; 78 uint32_t offset; 79 }; 80 81 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = { 82 {"rx_align_err", 83 offsetof(struct dpaa_if_stats, raln)}, 84 {"rx_valid_pause", 85 offsetof(struct dpaa_if_stats, rxpf)}, 86 {"rx_fcs_err", 87 offsetof(struct dpaa_if_stats, rfcs)}, 88 {"rx_vlan_frame", 89 offsetof(struct dpaa_if_stats, rvlan)}, 90 {"rx_frame_err", 91 offsetof(struct dpaa_if_stats, rerr)}, 92 {"rx_drop_err", 93 offsetof(struct dpaa_if_stats, rdrp)}, 94 {"rx_undersized", 95 offsetof(struct dpaa_if_stats, rund)}, 96 {"rx_oversize_err", 97 offsetof(struct dpaa_if_stats, rovr)}, 98 {"rx_fragment_pkt", 99 offsetof(struct dpaa_if_stats, rfrg)}, 100 {"tx_valid_pause", 101 offsetof(struct dpaa_if_stats, txpf)}, 102 {"tx_fcs_err", 103 offsetof(struct dpaa_if_stats, terr)}, 104 {"tx_vlan_frame", 105 offsetof(struct dpaa_if_stats, tvlan)}, 106 {"rx_undersized", 107 offsetof(struct dpaa_if_stats, tund)}, 108 }; 109 110 static int 111 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 112 { 113 struct dpaa_if *dpaa_intf = dev->data->dev_private; 114 115 PMD_INIT_FUNC_TRACE(); 116 117 if (mtu < ETHER_MIN_MTU) 118 return -EINVAL; 119 if (mtu > ETHER_MAX_LEN) 120 dev->data->dev_conf.rxmode.jumbo_frame = 1; 121 else 122 dev->data->dev_conf.rxmode.jumbo_frame = 0; 123 124 dev->data->dev_conf.rxmode.max_rx_pkt_len = mtu; 125 126 fman_if_set_maxfrm(dpaa_intf->fif, mtu); 127 128 return 0; 129 } 130 131 static int 132 dpaa_eth_dev_configure(struct rte_eth_dev *dev __rte_unused) 133 { 134 PMD_INIT_FUNC_TRACE(); 135 136 if (dev->data->dev_conf.rxmode.jumbo_frame == 1) { 137 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= 138 DPAA_MAX_RX_PKT_LEN) 139 return dpaa_mtu_set(dev, 140 dev->data->dev_conf.rxmode.max_rx_pkt_len); 141 else 142 return -1; 143 } 144 return 0; 145 } 146 147 static const uint32_t * 148 dpaa_supported_ptypes_get(struct rte_eth_dev *dev) 149 { 150 static const uint32_t ptypes[] = { 151 /*todo -= add more types */ 152 RTE_PTYPE_L2_ETHER, 153 RTE_PTYPE_L3_IPV4, 154 RTE_PTYPE_L3_IPV4_EXT, 155 RTE_PTYPE_L3_IPV6, 156 RTE_PTYPE_L3_IPV6_EXT, 157 RTE_PTYPE_L4_TCP, 158 RTE_PTYPE_L4_UDP, 159 RTE_PTYPE_L4_SCTP 160 }; 161 162 PMD_INIT_FUNC_TRACE(); 163 164 if (dev->rx_pkt_burst == dpaa_eth_queue_rx) 165 return ptypes; 166 return NULL; 167 } 168 169 static int dpaa_eth_dev_start(struct rte_eth_dev *dev) 170 { 171 struct dpaa_if *dpaa_intf = dev->data->dev_private; 172 173 PMD_INIT_FUNC_TRACE(); 174 175 /* Change tx callback to the real one */ 176 dev->tx_pkt_burst = dpaa_eth_queue_tx; 177 fman_if_enable_rx(dpaa_intf->fif); 178 179 return 0; 180 } 181 182 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev) 183 { 184 struct dpaa_if *dpaa_intf = dev->data->dev_private; 185 186 PMD_INIT_FUNC_TRACE(); 187 188 fman_if_disable_rx(dpaa_intf->fif); 189 dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 190 } 191 192 static void dpaa_eth_dev_close(struct rte_eth_dev *dev) 193 { 194 PMD_INIT_FUNC_TRACE(); 195 196 dpaa_eth_dev_stop(dev); 197 } 198 199 static int 200 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused, 201 char *fw_version, 202 size_t fw_size) 203 { 204 int ret; 205 FILE *svr_file = NULL; 206 unsigned int svr_ver = 0; 207 208 PMD_INIT_FUNC_TRACE(); 209 210 svr_file = fopen(DPAA_SOC_ID_FILE, "r"); 211 if (!svr_file) { 212 DPAA_PMD_ERR("Unable to open SoC device"); 213 return -ENOTSUP; /* Not supported on this infra */ 214 } 215 if (fscanf(svr_file, "svr:%x", &svr_ver) <= 0) 216 DPAA_PMD_ERR("Unable to read SoC device"); 217 218 fclose(svr_file); 219 220 ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x", 221 svr_ver, fman_ip_rev); 222 ret += 1; /* add the size of '\0' */ 223 224 if (fw_size < (uint32_t)ret) 225 return ret; 226 else 227 return 0; 228 } 229 230 static void dpaa_eth_dev_info(struct rte_eth_dev *dev, 231 struct rte_eth_dev_info *dev_info) 232 { 233 struct dpaa_if *dpaa_intf = dev->data->dev_private; 234 235 PMD_INIT_FUNC_TRACE(); 236 237 dev_info->max_rx_queues = dpaa_intf->nb_rx_queues; 238 dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; 239 dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; 240 dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; 241 dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; 242 dev_info->max_hash_mac_addrs = 0; 243 dev_info->max_vfs = 0; 244 dev_info->max_vmdq_pools = ETH_16_POOLS; 245 dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; 246 dev_info->speed_capa = (ETH_LINK_SPEED_1G | 247 ETH_LINK_SPEED_10G); 248 dev_info->rx_offload_capa = 249 (DEV_RX_OFFLOAD_IPV4_CKSUM | 250 DEV_RX_OFFLOAD_UDP_CKSUM | 251 DEV_RX_OFFLOAD_TCP_CKSUM); 252 dev_info->tx_offload_capa = 253 (DEV_TX_OFFLOAD_IPV4_CKSUM | 254 DEV_TX_OFFLOAD_UDP_CKSUM | 255 DEV_TX_OFFLOAD_TCP_CKSUM); 256 } 257 258 static int dpaa_eth_link_update(struct rte_eth_dev *dev, 259 int wait_to_complete __rte_unused) 260 { 261 struct dpaa_if *dpaa_intf = dev->data->dev_private; 262 struct rte_eth_link *link = &dev->data->dev_link; 263 264 PMD_INIT_FUNC_TRACE(); 265 266 if (dpaa_intf->fif->mac_type == fman_mac_1g) 267 link->link_speed = 1000; 268 else if (dpaa_intf->fif->mac_type == fman_mac_10g) 269 link->link_speed = 10000; 270 else 271 DPAA_PMD_ERR("invalid link_speed: %s, %d", 272 dpaa_intf->name, dpaa_intf->fif->mac_type); 273 274 link->link_status = dpaa_intf->valid; 275 link->link_duplex = ETH_LINK_FULL_DUPLEX; 276 link->link_autoneg = ETH_LINK_AUTONEG; 277 return 0; 278 } 279 280 static int dpaa_eth_stats_get(struct rte_eth_dev *dev, 281 struct rte_eth_stats *stats) 282 { 283 struct dpaa_if *dpaa_intf = dev->data->dev_private; 284 285 PMD_INIT_FUNC_TRACE(); 286 287 fman_if_stats_get(dpaa_intf->fif, stats); 288 return 0; 289 } 290 291 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev) 292 { 293 struct dpaa_if *dpaa_intf = dev->data->dev_private; 294 295 PMD_INIT_FUNC_TRACE(); 296 297 fman_if_stats_reset(dpaa_intf->fif); 298 } 299 300 static int 301 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats, 302 unsigned int n) 303 { 304 struct dpaa_if *dpaa_intf = dev->data->dev_private; 305 unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings); 306 uint64_t values[sizeof(struct dpaa_if_stats) / 8]; 307 308 if (xstats == NULL) 309 return 0; 310 311 if (n < num) 312 return num; 313 314 fman_if_stats_get_all(dpaa_intf->fif, values, 315 sizeof(struct dpaa_if_stats) / 8); 316 317 for (i = 0; i < num; i++) { 318 xstats[i].id = i; 319 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8]; 320 } 321 return i; 322 } 323 324 static int 325 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 326 struct rte_eth_xstat_name *xstats_names, 327 unsigned int limit) 328 { 329 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 330 331 if (limit < stat_cnt) 332 return stat_cnt; 333 334 if (xstats_names != NULL) 335 for (i = 0; i < stat_cnt; i++) 336 snprintf(xstats_names[i].name, 337 sizeof(xstats_names[i].name), 338 "%s", 339 dpaa_xstats_strings[i].name); 340 341 return stat_cnt; 342 } 343 344 static int 345 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids, 346 uint64_t *values, unsigned int n) 347 { 348 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 349 uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8]; 350 351 if (!ids) { 352 struct dpaa_if *dpaa_intf = dev->data->dev_private; 353 354 if (n < stat_cnt) 355 return stat_cnt; 356 357 if (!values) 358 return 0; 359 360 fman_if_stats_get_all(dpaa_intf->fif, values_copy, 361 sizeof(struct dpaa_if_stats) / 8); 362 363 for (i = 0; i < stat_cnt; i++) 364 values[i] = 365 values_copy[dpaa_xstats_strings[i].offset / 8]; 366 367 return stat_cnt; 368 } 369 370 dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt); 371 372 for (i = 0; i < n; i++) { 373 if (ids[i] >= stat_cnt) { 374 DPAA_PMD_ERR("id value isn't valid"); 375 return -1; 376 } 377 values[i] = values_copy[ids[i]]; 378 } 379 return n; 380 } 381 382 static int 383 dpaa_xstats_get_names_by_id( 384 struct rte_eth_dev *dev, 385 struct rte_eth_xstat_name *xstats_names, 386 const uint64_t *ids, 387 unsigned int limit) 388 { 389 unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings); 390 struct rte_eth_xstat_name xstats_names_copy[stat_cnt]; 391 392 if (!ids) 393 return dpaa_xstats_get_names(dev, xstats_names, limit); 394 395 dpaa_xstats_get_names(dev, xstats_names_copy, limit); 396 397 for (i = 0; i < limit; i++) { 398 if (ids[i] >= stat_cnt) { 399 DPAA_PMD_ERR("id value isn't valid"); 400 return -1; 401 } 402 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name); 403 } 404 return limit; 405 } 406 407 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev) 408 { 409 struct dpaa_if *dpaa_intf = dev->data->dev_private; 410 411 PMD_INIT_FUNC_TRACE(); 412 413 fman_if_promiscuous_enable(dpaa_intf->fif); 414 } 415 416 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev) 417 { 418 struct dpaa_if *dpaa_intf = dev->data->dev_private; 419 420 PMD_INIT_FUNC_TRACE(); 421 422 fman_if_promiscuous_disable(dpaa_intf->fif); 423 } 424 425 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev) 426 { 427 struct dpaa_if *dpaa_intf = dev->data->dev_private; 428 429 PMD_INIT_FUNC_TRACE(); 430 431 fman_if_set_mcast_filter_table(dpaa_intf->fif); 432 } 433 434 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev) 435 { 436 struct dpaa_if *dpaa_intf = dev->data->dev_private; 437 438 PMD_INIT_FUNC_TRACE(); 439 440 fman_if_reset_mcast_filter_table(dpaa_intf->fif); 441 } 442 443 static 444 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 445 uint16_t nb_desc __rte_unused, 446 unsigned int socket_id __rte_unused, 447 const struct rte_eth_rxconf *rx_conf __rte_unused, 448 struct rte_mempool *mp) 449 { 450 struct dpaa_if *dpaa_intf = dev->data->dev_private; 451 452 PMD_INIT_FUNC_TRACE(); 453 454 DPAA_PMD_INFO("Rx queue setup for queue index: %d", queue_idx); 455 456 if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) { 457 struct fman_if_ic_params icp; 458 uint32_t fd_offset; 459 uint32_t bp_size; 460 461 if (!mp->pool_data) { 462 DPAA_PMD_ERR("Not an offloaded buffer pool!"); 463 return -1; 464 } 465 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); 466 467 memset(&icp, 0, sizeof(icp)); 468 /* set ICEOF for to the default value , which is 0*/ 469 icp.iciof = DEFAULT_ICIOF; 470 icp.iceof = DEFAULT_RX_ICEOF; 471 icp.icsz = DEFAULT_ICSZ; 472 fman_if_set_ic_params(dpaa_intf->fif, &icp); 473 474 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE; 475 fman_if_set_fdoff(dpaa_intf->fif, fd_offset); 476 477 /* Buffer pool size should be equal to Dataroom Size*/ 478 bp_size = rte_pktmbuf_data_room_size(mp); 479 fman_if_set_bp(dpaa_intf->fif, mp->size, 480 dpaa_intf->bp_info->bpid, bp_size); 481 dpaa_intf->valid = 1; 482 DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d", 483 dpaa_intf->name, fd_offset, 484 fman_if_get_fdoff(dpaa_intf->fif)); 485 } 486 dev->data->rx_queues[queue_idx] = &dpaa_intf->rx_queues[queue_idx]; 487 488 return 0; 489 } 490 491 static 492 void dpaa_eth_rx_queue_release(void *rxq __rte_unused) 493 { 494 PMD_INIT_FUNC_TRACE(); 495 } 496 497 static 498 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, 499 uint16_t nb_desc __rte_unused, 500 unsigned int socket_id __rte_unused, 501 const struct rte_eth_txconf *tx_conf __rte_unused) 502 { 503 struct dpaa_if *dpaa_intf = dev->data->dev_private; 504 505 PMD_INIT_FUNC_TRACE(); 506 507 DPAA_PMD_INFO("Tx queue setup for queue index: %d", queue_idx); 508 dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx]; 509 return 0; 510 } 511 512 static void dpaa_eth_tx_queue_release(void *txq __rte_unused) 513 { 514 PMD_INIT_FUNC_TRACE(); 515 } 516 517 static int dpaa_link_down(struct rte_eth_dev *dev) 518 { 519 PMD_INIT_FUNC_TRACE(); 520 521 dpaa_eth_dev_stop(dev); 522 return 0; 523 } 524 525 static int dpaa_link_up(struct rte_eth_dev *dev) 526 { 527 PMD_INIT_FUNC_TRACE(); 528 529 dpaa_eth_dev_start(dev); 530 return 0; 531 } 532 533 static int 534 dpaa_flow_ctrl_set(struct rte_eth_dev *dev, 535 struct rte_eth_fc_conf *fc_conf) 536 { 537 struct dpaa_if *dpaa_intf = dev->data->dev_private; 538 struct rte_eth_fc_conf *net_fc; 539 540 PMD_INIT_FUNC_TRACE(); 541 542 if (!(dpaa_intf->fc_conf)) { 543 dpaa_intf->fc_conf = rte_zmalloc(NULL, 544 sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 545 if (!dpaa_intf->fc_conf) { 546 DPAA_PMD_ERR("unable to save flow control info"); 547 return -ENOMEM; 548 } 549 } 550 net_fc = dpaa_intf->fc_conf; 551 552 if (fc_conf->high_water < fc_conf->low_water) { 553 DPAA_PMD_ERR("Incorrect Flow Control Configuration"); 554 return -EINVAL; 555 } 556 557 if (fc_conf->mode == RTE_FC_NONE) { 558 return 0; 559 } else if (fc_conf->mode == RTE_FC_TX_PAUSE || 560 fc_conf->mode == RTE_FC_FULL) { 561 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water, 562 fc_conf->low_water, 563 dpaa_intf->bp_info->bpid); 564 if (fc_conf->pause_time) 565 fman_if_set_fc_quanta(dpaa_intf->fif, 566 fc_conf->pause_time); 567 } 568 569 /* Save the information in dpaa device */ 570 net_fc->pause_time = fc_conf->pause_time; 571 net_fc->high_water = fc_conf->high_water; 572 net_fc->low_water = fc_conf->low_water; 573 net_fc->send_xon = fc_conf->send_xon; 574 net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd; 575 net_fc->mode = fc_conf->mode; 576 net_fc->autoneg = fc_conf->autoneg; 577 578 return 0; 579 } 580 581 static int 582 dpaa_flow_ctrl_get(struct rte_eth_dev *dev, 583 struct rte_eth_fc_conf *fc_conf) 584 { 585 struct dpaa_if *dpaa_intf = dev->data->dev_private; 586 struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf; 587 int ret; 588 589 PMD_INIT_FUNC_TRACE(); 590 591 if (net_fc) { 592 fc_conf->pause_time = net_fc->pause_time; 593 fc_conf->high_water = net_fc->high_water; 594 fc_conf->low_water = net_fc->low_water; 595 fc_conf->send_xon = net_fc->send_xon; 596 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd; 597 fc_conf->mode = net_fc->mode; 598 fc_conf->autoneg = net_fc->autoneg; 599 return 0; 600 } 601 ret = fman_if_get_fc_threshold(dpaa_intf->fif); 602 if (ret) { 603 fc_conf->mode = RTE_FC_TX_PAUSE; 604 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 605 } else { 606 fc_conf->mode = RTE_FC_NONE; 607 } 608 609 return 0; 610 } 611 612 static int 613 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev, 614 struct ether_addr *addr, 615 uint32_t index, 616 __rte_unused uint32_t pool) 617 { 618 int ret; 619 struct dpaa_if *dpaa_intf = dev->data->dev_private; 620 621 PMD_INIT_FUNC_TRACE(); 622 623 ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index); 624 625 if (ret) 626 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:" 627 " err = %d", ret); 628 return 0; 629 } 630 631 static void 632 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev, 633 uint32_t index) 634 { 635 struct dpaa_if *dpaa_intf = dev->data->dev_private; 636 637 PMD_INIT_FUNC_TRACE(); 638 639 fman_if_clear_mac_addr(dpaa_intf->fif, index); 640 } 641 642 static void 643 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev, 644 struct ether_addr *addr) 645 { 646 int ret; 647 struct dpaa_if *dpaa_intf = dev->data->dev_private; 648 649 PMD_INIT_FUNC_TRACE(); 650 651 ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0); 652 if (ret) 653 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret); 654 } 655 656 static struct eth_dev_ops dpaa_devops = { 657 .dev_configure = dpaa_eth_dev_configure, 658 .dev_start = dpaa_eth_dev_start, 659 .dev_stop = dpaa_eth_dev_stop, 660 .dev_close = dpaa_eth_dev_close, 661 .dev_infos_get = dpaa_eth_dev_info, 662 .dev_supported_ptypes_get = dpaa_supported_ptypes_get, 663 664 .rx_queue_setup = dpaa_eth_rx_queue_setup, 665 .tx_queue_setup = dpaa_eth_tx_queue_setup, 666 .rx_queue_release = dpaa_eth_rx_queue_release, 667 .tx_queue_release = dpaa_eth_tx_queue_release, 668 669 .flow_ctrl_get = dpaa_flow_ctrl_get, 670 .flow_ctrl_set = dpaa_flow_ctrl_set, 671 672 .link_update = dpaa_eth_link_update, 673 .stats_get = dpaa_eth_stats_get, 674 .xstats_get = dpaa_dev_xstats_get, 675 .xstats_get_by_id = dpaa_xstats_get_by_id, 676 .xstats_get_names_by_id = dpaa_xstats_get_names_by_id, 677 .xstats_get_names = dpaa_xstats_get_names, 678 .xstats_reset = dpaa_eth_stats_reset, 679 .stats_reset = dpaa_eth_stats_reset, 680 .promiscuous_enable = dpaa_eth_promiscuous_enable, 681 .promiscuous_disable = dpaa_eth_promiscuous_disable, 682 .allmulticast_enable = dpaa_eth_multicast_enable, 683 .allmulticast_disable = dpaa_eth_multicast_disable, 684 .mtu_set = dpaa_mtu_set, 685 .dev_set_link_down = dpaa_link_down, 686 .dev_set_link_up = dpaa_link_up, 687 .mac_addr_add = dpaa_dev_add_mac_addr, 688 .mac_addr_remove = dpaa_dev_remove_mac_addr, 689 .mac_addr_set = dpaa_dev_set_mac_addr, 690 691 .fw_version_get = dpaa_fw_version_get, 692 }; 693 694 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf) 695 { 696 struct rte_eth_fc_conf *fc_conf; 697 int ret; 698 699 PMD_INIT_FUNC_TRACE(); 700 701 if (!(dpaa_intf->fc_conf)) { 702 dpaa_intf->fc_conf = rte_zmalloc(NULL, 703 sizeof(struct rte_eth_fc_conf), MAX_CACHELINE); 704 if (!dpaa_intf->fc_conf) { 705 DPAA_PMD_ERR("unable to save flow control info"); 706 return -ENOMEM; 707 } 708 } 709 fc_conf = dpaa_intf->fc_conf; 710 ret = fman_if_get_fc_threshold(dpaa_intf->fif); 711 if (ret) { 712 fc_conf->mode = RTE_FC_TX_PAUSE; 713 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif); 714 } else { 715 fc_conf->mode = RTE_FC_NONE; 716 } 717 718 return 0; 719 } 720 721 /* Initialise an Rx FQ */ 722 static int dpaa_rx_queue_init(struct qman_fq *fq, 723 uint32_t fqid) 724 { 725 struct qm_mcc_initfq opts = {0}; 726 int ret; 727 728 PMD_INIT_FUNC_TRACE(); 729 730 ret = qman_reserve_fqid(fqid); 731 if (ret) { 732 DPAA_PMD_ERR("reserve rx fqid %d failed with ret: %d", 733 fqid, ret); 734 return -EINVAL; 735 } 736 737 DPAA_PMD_DEBUG("creating rx fq %p, fqid %d", fq, fqid); 738 ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 739 if (ret) { 740 DPAA_PMD_ERR("create rx fqid %d failed with ret: %d", 741 fqid, ret); 742 return ret; 743 } 744 745 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 746 QM_INITFQ_WE_CONTEXTA; 747 748 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY; 749 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING | 750 QM_FQCTRL_PREFERINCACHE; 751 opts.fqd.context_a.stashing.exclusive = 0; 752 opts.fqd.context_a.stashing.annotation_cl = DPAA_IF_RX_ANNOTATION_STASH; 753 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH; 754 opts.fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH; 755 756 /*Enable tail drop */ 757 opts.we_mask = opts.we_mask | QM_INITFQ_WE_TDTHRESH; 758 opts.fqd.fq_ctrl = opts.fqd.fq_ctrl | QM_FQCTRL_TDE; 759 qm_fqd_taildrop_set(&opts.fqd.td, CONG_THRESHOLD_RX_Q, 1); 760 761 ret = qman_init_fq(fq, 0, &opts); 762 if (ret) 763 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d", fqid, ret); 764 return ret; 765 } 766 767 /* Initialise a Tx FQ */ 768 static int dpaa_tx_queue_init(struct qman_fq *fq, 769 struct fman_if *fman_intf) 770 { 771 struct qm_mcc_initfq opts = {0}; 772 int ret; 773 774 PMD_INIT_FUNC_TRACE(); 775 776 ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID | 777 QMAN_FQ_FLAG_TO_DCPORTAL, fq); 778 if (ret) { 779 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret); 780 return ret; 781 } 782 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL | 783 QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA; 784 opts.fqd.dest.channel = fman_intf->tx_channel_id; 785 opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY; 786 opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE; 787 opts.fqd.context_b = 0; 788 /* no tx-confirmation */ 789 opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi; 790 opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo; 791 DPAA_PMD_DEBUG("init tx fq %p, fqid %d", fq, fq->fqid); 792 ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts); 793 if (ret) 794 DPAA_PMD_ERR("init tx fqid %d failed %d", fq->fqid, ret); 795 return ret; 796 } 797 798 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 799 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */ 800 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid) 801 { 802 struct qm_mcc_initfq opts = {0}; 803 int ret; 804 805 PMD_INIT_FUNC_TRACE(); 806 807 ret = qman_reserve_fqid(fqid); 808 if (ret) { 809 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d", 810 fqid, ret); 811 return -EINVAL; 812 } 813 /* "map" this Rx FQ to one of the interfaces Tx FQID */ 814 DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid); 815 ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); 816 if (ret) { 817 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d", 818 fqid, ret); 819 return ret; 820 } 821 opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL; 822 opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY; 823 ret = qman_init_fq(fq, 0, &opts); 824 if (ret) 825 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d", 826 fqid, ret); 827 return ret; 828 } 829 #endif 830 831 /* Initialise a network interface */ 832 static int 833 dpaa_dev_init(struct rte_eth_dev *eth_dev) 834 { 835 int num_cores, num_rx_fqs, fqid; 836 int loop, ret = 0; 837 int dev_id; 838 struct rte_dpaa_device *dpaa_device; 839 struct dpaa_if *dpaa_intf; 840 struct fm_eth_port_cfg *cfg; 841 struct fman_if *fman_intf; 842 struct fman_if_bpool *bp, *tmp_bp; 843 844 PMD_INIT_FUNC_TRACE(); 845 846 /* For secondary processes, the primary has done all the work */ 847 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 848 return 0; 849 850 dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device); 851 dev_id = dpaa_device->id.dev_id; 852 dpaa_intf = eth_dev->data->dev_private; 853 cfg = &dpaa_netcfg->port_cfg[dev_id]; 854 fman_intf = cfg->fman_if; 855 856 dpaa_intf->name = dpaa_device->name; 857 858 /* save fman_if & cfg in the interface struture */ 859 dpaa_intf->fif = fman_intf; 860 dpaa_intf->ifid = dev_id; 861 dpaa_intf->cfg = cfg; 862 863 /* Initialize Rx FQ's */ 864 if (getenv("DPAA_NUM_RX_QUEUES")) 865 num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES")); 866 else 867 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES; 868 869 /* Each device can not have more than DPAA_PCD_FQID_MULTIPLIER RX 870 * queues. 871 */ 872 if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_PCD_FQID_MULTIPLIER) { 873 DPAA_PMD_ERR("Invalid number of RX queues\n"); 874 return -EINVAL; 875 } 876 877 dpaa_intf->rx_queues = rte_zmalloc(NULL, 878 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE); 879 if (!dpaa_intf->rx_queues) { 880 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n"); 881 return -ENOMEM; 882 } 883 884 for (loop = 0; loop < num_rx_fqs; loop++) { 885 fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid * 886 DPAA_PCD_FQID_MULTIPLIER + loop; 887 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop], fqid); 888 if (ret) 889 goto free_rx; 890 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf; 891 } 892 dpaa_intf->nb_rx_queues = num_rx_fqs; 893 894 /* Initialise Tx FQs. Have as many Tx FQ's as number of cores */ 895 num_cores = rte_lcore_count(); 896 dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) * 897 num_cores, MAX_CACHELINE); 898 if (!dpaa_intf->tx_queues) { 899 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n"); 900 ret = -ENOMEM; 901 goto free_rx; 902 } 903 904 for (loop = 0; loop < num_cores; loop++) { 905 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop], 906 fman_intf); 907 if (ret) 908 goto free_tx; 909 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf; 910 } 911 dpaa_intf->nb_tx_queues = num_cores; 912 913 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER 914 dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 915 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err); 916 dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf; 917 dpaa_debug_queue_init(&dpaa_intf->debug_queues[ 918 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err); 919 dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf; 920 #endif 921 922 DPAA_PMD_DEBUG("All frame queues created"); 923 924 /* Get the initial configuration for flow control */ 925 dpaa_fc_set_default(dpaa_intf); 926 927 /* reset bpool list, initialize bpool dynamically */ 928 list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) { 929 list_del(&bp->node); 930 free(bp); 931 } 932 933 /* Populate ethdev structure */ 934 eth_dev->dev_ops = &dpaa_devops; 935 eth_dev->rx_pkt_burst = dpaa_eth_queue_rx; 936 eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all; 937 938 /* Allocate memory for storing MAC addresses */ 939 eth_dev->data->mac_addrs = rte_zmalloc("mac_addr", 940 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0); 941 if (eth_dev->data->mac_addrs == NULL) { 942 DPAA_PMD_ERR("Failed to allocate %d bytes needed to " 943 "store MAC addresses", 944 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER); 945 ret = -ENOMEM; 946 goto free_tx; 947 } 948 949 /* copy the primary mac address */ 950 ether_addr_copy(&fman_intf->mac_addr, ð_dev->data->mac_addrs[0]); 951 952 RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n", 953 dpaa_device->name, 954 fman_intf->mac_addr.addr_bytes[0], 955 fman_intf->mac_addr.addr_bytes[1], 956 fman_intf->mac_addr.addr_bytes[2], 957 fman_intf->mac_addr.addr_bytes[3], 958 fman_intf->mac_addr.addr_bytes[4], 959 fman_intf->mac_addr.addr_bytes[5]); 960 961 /* Disable RX mode */ 962 fman_if_discard_rx_errors(fman_intf); 963 fman_if_disable_rx(fman_intf); 964 /* Disable promiscuous mode */ 965 fman_if_promiscuous_disable(fman_intf); 966 /* Disable multicast */ 967 fman_if_reset_mcast_filter_table(fman_intf); 968 /* Reset interface statistics */ 969 fman_if_stats_reset(fman_intf); 970 971 return 0; 972 973 free_tx: 974 rte_free(dpaa_intf->tx_queues); 975 dpaa_intf->tx_queues = NULL; 976 dpaa_intf->nb_tx_queues = 0; 977 978 free_rx: 979 rte_free(dpaa_intf->rx_queues); 980 dpaa_intf->rx_queues = NULL; 981 dpaa_intf->nb_rx_queues = 0; 982 return ret; 983 } 984 985 static int 986 dpaa_dev_uninit(struct rte_eth_dev *dev) 987 { 988 struct dpaa_if *dpaa_intf = dev->data->dev_private; 989 990 PMD_INIT_FUNC_TRACE(); 991 992 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 993 return -EPERM; 994 995 if (!dpaa_intf) { 996 DPAA_PMD_WARN("Already closed or not started"); 997 return -1; 998 } 999 1000 dpaa_eth_dev_close(dev); 1001 1002 /* release configuration memory */ 1003 if (dpaa_intf->fc_conf) 1004 rte_free(dpaa_intf->fc_conf); 1005 1006 rte_free(dpaa_intf->rx_queues); 1007 dpaa_intf->rx_queues = NULL; 1008 1009 rte_free(dpaa_intf->tx_queues); 1010 dpaa_intf->tx_queues = NULL; 1011 1012 /* free memory for storing MAC addresses */ 1013 rte_free(dev->data->mac_addrs); 1014 dev->data->mac_addrs = NULL; 1015 1016 dev->dev_ops = NULL; 1017 dev->rx_pkt_burst = NULL; 1018 dev->tx_pkt_burst = NULL; 1019 1020 return 0; 1021 } 1022 1023 static int 1024 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, 1025 struct rte_dpaa_device *dpaa_dev) 1026 { 1027 int diag; 1028 int ret; 1029 struct rte_eth_dev *eth_dev; 1030 1031 PMD_INIT_FUNC_TRACE(); 1032 1033 /* In case of secondary process, the device is already configured 1034 * and no further action is required, except portal initialization 1035 * and verifying secondary attachment to port name. 1036 */ 1037 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1038 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name); 1039 if (!eth_dev) 1040 return -ENOMEM; 1041 return 0; 1042 } 1043 1044 if (!is_global_init) { 1045 /* One time load of Qman/Bman drivers */ 1046 ret = qman_global_init(); 1047 if (ret) { 1048 DPAA_PMD_ERR("QMAN initialization failed: %d", 1049 ret); 1050 return ret; 1051 } 1052 ret = bman_global_init(); 1053 if (ret) { 1054 DPAA_PMD_ERR("BMAN initialization failed: %d", 1055 ret); 1056 return ret; 1057 } 1058 1059 is_global_init = 1; 1060 } 1061 1062 ret = rte_dpaa_portal_init((void *)1); 1063 if (ret) { 1064 DPAA_PMD_ERR("Unable to initialize portal"); 1065 return ret; 1066 } 1067 1068 eth_dev = rte_eth_dev_allocate(dpaa_dev->name); 1069 if (eth_dev == NULL) 1070 return -ENOMEM; 1071 1072 eth_dev->data->dev_private = rte_zmalloc( 1073 "ethdev private structure", 1074 sizeof(struct dpaa_if), 1075 RTE_CACHE_LINE_SIZE); 1076 if (!eth_dev->data->dev_private) { 1077 DPAA_PMD_ERR("Cannot allocate memzone for port data"); 1078 rte_eth_dev_release_port(eth_dev); 1079 return -ENOMEM; 1080 } 1081 1082 eth_dev->device = &dpaa_dev->device; 1083 eth_dev->device->driver = &dpaa_drv->driver; 1084 dpaa_dev->eth_dev = eth_dev; 1085 1086 /* Invoke PMD device initialization function */ 1087 diag = dpaa_dev_init(eth_dev); 1088 if (diag == 0) 1089 return 0; 1090 1091 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1092 rte_free(eth_dev->data->dev_private); 1093 1094 rte_eth_dev_release_port(eth_dev); 1095 return diag; 1096 } 1097 1098 static int 1099 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) 1100 { 1101 struct rte_eth_dev *eth_dev; 1102 1103 PMD_INIT_FUNC_TRACE(); 1104 1105 eth_dev = dpaa_dev->eth_dev; 1106 dpaa_dev_uninit(eth_dev); 1107 1108 if (rte_eal_process_type() == RTE_PROC_PRIMARY) 1109 rte_free(eth_dev->data->dev_private); 1110 1111 rte_eth_dev_release_port(eth_dev); 1112 1113 return 0; 1114 } 1115 1116 static struct rte_dpaa_driver rte_dpaa_pmd = { 1117 .drv_type = FSL_DPAA_ETH, 1118 .probe = rte_dpaa_probe, 1119 .remove = rte_dpaa_remove, 1120 }; 1121 1122 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd); 1123