1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2014-2017 Chelsio Communications.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Chelsio Communications nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #ifndef __T4_REGS_VALUES_H__
35 #define __T4_REGS_VALUES_H__
36 
37 /*
38  * This file contains definitions for various T4 register value hardware
39  * constants.  The types of values encoded here are predominantly those for
40  * register fields which control "modal" behavior.  For the most part, we do
41  * not include definitions for register fields which are simple numeric
42  * metrics, etc.
43  */
44 
45 /*
46  * SGE definitions.
47  * ================
48  */
49 
50 /*
51  * SGE register field values.
52  */
53 
54 /* CONTROL register */
55 #define X_RXPKTCPLMODE_SPLIT		1
56 #define X_INGPCIEBOUNDARY_32B		0
57 #define X_INGPADBOUNDARY_SHIFT		5
58 #define X_INGPADBOUNDARY_32B		0
59 
60 #define X_T6_INGPADBOUNDARY_SHIFT	3
61 #define X_T6_INGPADBOUNDARY_8B		0
62 
63 /* CONTROL2 register */
64 #define X_INGPACKBOUNDARY_SHIFT		5
65 #define X_INGPACKBOUNDARY_16B		0
66 #define X_INGPACKBOUNDARY_64B		1
67 
68 /* GTS register */
69 #define X_TIMERREG_RESTART_COUNTER	6
70 #define X_TIMERREG_UPDATE_CIDX		7
71 
72 /*
73  * Egress Context field values
74  */
75 #define X_FETCHBURSTMIN_64B		2
76 #define X_FETCHBURSTMIN_128B		3
77 #define X_FETCHBURSTMAX_256B		2
78 #define X_FETCHBURSTMAX_512B		3
79 
80 #define X_HOSTFCMODE_NONE		0
81 
82 /*
83  * Ingress Context field values
84  */
85 #define X_UPDATEDELIVERY_STATUS_PAGE	2
86 
87 #define X_RSPD_TYPE_FLBUF		0
88 #define X_RSPD_TYPE_CPL			1
89 
90 /*
91  * Context field definitions.  This is by no means a complete list of SGE
92  * Context fields.  In the vast majority of cases the firmware initializes
93  * things the way they need to be set up.  But in a few small cases, we need
94  * to compute new values and ship them off to the firmware to be applied to
95  * the SGE Conexts ...
96  */
97 
98 /*
99  * Congestion Manager Definitions.
100  */
101 #define S_CONMCTXT_CNGTPMODE		19
102 #define M_CONMCTXT_CNGTPMODE		0x3
103 #define V_CONMCTXT_CNGTPMODE(x)		((x) << S_CONMCTXT_CNGTPMODE)
104 #define G_CONMCTXT_CNGTPMODE(x)  \
105 	(((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE)
106 #define S_CONMCTXT_CNGCHMAP		0
107 #define M_CONMCTXT_CNGCHMAP		0xffff
108 #define V_CONMCTXT_CNGCHMAP(x)		((x) << S_CONMCTXT_CNGCHMAP)
109 #define G_CONMCTXT_CNGCHMAP(x)   \
110 	(((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP)
111 
112 #define X_CONMCTXT_CNGTPMODE_QUEUE	1
113 #define X_CONMCTXT_CNGTPMODE_CHANNEL	2
114 
115 /*
116  * T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
117  * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
118  * offsets 8x and a Write Combining single 64-byte Egress Queue Unit
119  * (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64.  For Ingress Queues,
120  * we have a Going To Sleep register at offsets 8x+4.
121  *
122  * As noted above, we have many instances of the Simple Doorbell and Going To
123  * Sleep registers at offsets 8x and 8x+4, respectively.  We want to use a
124  * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
125  * avoid buffering of the writes to the Simple Doorbell and we want to use a
126  * non-contiguous offset for the Going To Sleep writes in order to avoid
127  * possible combining between them.
128  */
129 #define SGE_UDB_SIZE		128
130 #define SGE_UDB_KDOORBELL	8
131 #define SGE_UDB_GTS		20
132 
133 /*
134  * CIM definitions.
135  * ================
136  */
137 
138 /*
139  * CIM register field values.
140  */
141 #define X_MBOWNER_NONE			0
142 #define X_MBOWNER_FW			1
143 #define X_MBOWNER_PL			2
144 
145 /*
146  * PCI-E definitions.
147  * ==================
148  */
149 #define X_WINDOW_SHIFT			10
150 #define X_PCIEOFST_SHIFT		10
151 
152 /*
153  * TP definitions.
154  * ===============
155  */
156 
157 /*
158  * TP_VLAN_PRI_MAP controls which subset of fields will be present in the
159  * Compressed Filter Tuple for LE filters.  Each bit set in TP_VLAN_PRI_MAP
160  * selects for a particular field being present.  These fields, when present
161  * in the Compressed Filter Tuple, have the following widths in bits.
162  */
163 #define W_FT_FCOE			1
164 #define W_FT_PORT			3
165 #define W_FT_VNIC_ID			17
166 #define W_FT_VLAN			17
167 #define W_FT_TOS			8
168 #define W_FT_PROTOCOL			8
169 #define W_FT_ETHERTYPE			16
170 #define W_FT_MACMATCH			9
171 #define W_FT_MPSHITTYPE			3
172 #define W_FT_FRAGMENTATION		1
173 
174 #endif /* __T4_REGS_VALUES_H__ */
175