1 /*- 2 * BSD LICENSE 3 * 4 * Copyright (c) 2015-2017 Atomic Rules LLC 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of copyright holder nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _ARK_MPU_H_ 35 #define _ARK_MPU_H_ 36 37 #include <stdint.h> 38 39 #include <rte_memory.h> 40 41 /* The MPU or Memory Prefetch Unit is an internal Arkville hardware 42 * module for moving data between host memory and the hardware FPGA. 43 * This module is *not* intended for end-user manipulation, hence 44 * there is minimal documentation. 45 */ 46 47 /* 48 * MPU hardware structures 49 * These are overlay structures to a memory mapped FPGA device. These 50 * structs will never be instantiated in ram memory 51 */ 52 53 #define ARK_MPU_ID 0x00 54 struct ark_mpu_id_t { 55 union { 56 char id[4]; 57 uint32_t idnum; 58 }; 59 union { 60 char ver[4]; 61 uint32_t vernum; 62 }; 63 uint32_t phys_id; 64 uint32_t mrr_code; 65 }; 66 67 #define ARK_MPU_HW 0x010 68 struct ark_mpu_hw_t { 69 uint16_t num_queues; 70 uint16_t reserved; 71 uint32_t hw_depth; 72 uint32_t obj_size; 73 uint32_t obj_per_mrr; 74 }; 75 76 #define ARK_MPU_CFG 0x040 77 struct ark_mpu_cfg_t { 78 rte_iova_t ring_base; /* rte_iova_t is a uint64_t */ 79 uint32_t ring_size; 80 uint32_t ring_mask; 81 uint32_t min_host_move; 82 uint32_t min_hw_move; 83 volatile uint32_t sw_prod_index; 84 volatile uint32_t hw_cons_index; 85 volatile uint32_t command; 86 }; 87 enum ARK_MPU_COMMAND { 88 MPU_CMD_IDLE = 1, 89 MPU_CMD_RUN = 2, 90 MPU_CMD_STOP = 4, 91 MPU_CMD_RESET = 8, 92 MPU_CMD_FORCE_RESET = 16, 93 MPU_COMMAND_LIMIT = 0xfFFFFFFF 94 }; 95 96 #define ARK_MPU_STATS 0x080 97 struct ark_mpu_stats_t { 98 volatile uint64_t pci_request; 99 volatile uint64_t q_empty; 100 volatile uint64_t q_q1; 101 volatile uint64_t q_q2; 102 volatile uint64_t q_q3; 103 volatile uint64_t q_q4; 104 volatile uint64_t q_full; 105 }; 106 107 #define ARK_MPU_DEBUG 0x0C0 108 struct ark_mpu_debug_t { 109 volatile uint32_t state; 110 uint32_t reserved; 111 volatile uint32_t count; 112 volatile uint32_t take; 113 volatile uint32_t peek[4]; 114 }; 115 116 /* Consolidated structure */ 117 struct ark_mpu_t { 118 struct ark_mpu_id_t id; 119 uint8_t reserved0[(ARK_MPU_HW - ARK_MPU_ID) 120 - sizeof(struct ark_mpu_id_t)]; 121 struct ark_mpu_hw_t hw; 122 uint8_t reserved1[(ARK_MPU_CFG - ARK_MPU_HW) - 123 sizeof(struct ark_mpu_hw_t)]; 124 struct ark_mpu_cfg_t cfg; 125 uint8_t reserved2[(ARK_MPU_STATS - ARK_MPU_CFG) - 126 sizeof(struct ark_mpu_cfg_t)]; 127 struct ark_mpu_stats_t stats; 128 uint8_t reserved3[(ARK_MPU_DEBUG - ARK_MPU_STATS) - 129 sizeof(struct ark_mpu_stats_t)]; 130 struct ark_mpu_debug_t debug; 131 }; 132 133 uint16_t ark_api_num_queues(struct ark_mpu_t *mpu); 134 uint16_t ark_api_num_queues_per_port(struct ark_mpu_t *mpu, 135 uint16_t ark_ports); 136 int ark_mpu_verify(struct ark_mpu_t *mpu, uint32_t obj_size); 137 void ark_mpu_stop(struct ark_mpu_t *mpu); 138 void ark_mpu_start(struct ark_mpu_t *mpu); 139 int ark_mpu_reset(struct ark_mpu_t *mpu); 140 int ark_mpu_configure(struct ark_mpu_t *mpu, rte_iova_t ring, 141 uint32_t ring_size, int is_tx); 142 143 void ark_mpu_dump(struct ark_mpu_t *mpu, const char *msg, uint16_t idx); 144 void ark_mpu_dump_setup(struct ark_mpu_t *mpu, uint16_t qid); 145 void ark_mpu_reset_stats(struct ark_mpu_t *mpu); 146 147 /* this action is in a performance critical path */ 148 static inline void 149 ark_mpu_set_producer(struct ark_mpu_t *mpu, uint32_t idx) 150 { 151 mpu->cfg.sw_prod_index = idx; 152 } 153 154 #endif 155