1*d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause
22bfe3f2eSlogwang *
3*d30ea906Sjfb8856606 * Copyright 2017 NXP
42bfe3f2eSlogwang *
52bfe3f2eSlogwang */
62bfe3f2eSlogwang
72bfe3f2eSlogwang #ifndef __DPAA_BITS_H
82bfe3f2eSlogwang #define __DPAA_BITS_H
92bfe3f2eSlogwang
102bfe3f2eSlogwang /* Bitfield stuff. */
112bfe3f2eSlogwang #define BITS_PER_ULONG (sizeof(unsigned long) << 3)
122bfe3f2eSlogwang #define SHIFT_PER_ULONG (((1 << 5) == BITS_PER_ULONG) ? 5 : 6)
132bfe3f2eSlogwang #define BITS_MASK(idx) (1UL << ((idx) & (BITS_PER_ULONG - 1)))
142bfe3f2eSlogwang #define BITS_IDX(idx) ((idx) >> SHIFT_PER_ULONG)
152bfe3f2eSlogwang
dpaa_set_bits(unsigned long mask,volatile unsigned long * p)162bfe3f2eSlogwang static inline void dpaa_set_bits(unsigned long mask,
172bfe3f2eSlogwang volatile unsigned long *p)
182bfe3f2eSlogwang {
192bfe3f2eSlogwang *p |= mask;
202bfe3f2eSlogwang }
212bfe3f2eSlogwang
dpaa_set_bit(int idx,volatile unsigned long * bits)222bfe3f2eSlogwang static inline void dpaa_set_bit(int idx, volatile unsigned long *bits)
232bfe3f2eSlogwang {
242bfe3f2eSlogwang dpaa_set_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
252bfe3f2eSlogwang }
262bfe3f2eSlogwang
dpaa_clear_bits(unsigned long mask,volatile unsigned long * p)272bfe3f2eSlogwang static inline void dpaa_clear_bits(unsigned long mask,
282bfe3f2eSlogwang volatile unsigned long *p)
292bfe3f2eSlogwang {
302bfe3f2eSlogwang *p &= ~mask;
312bfe3f2eSlogwang }
322bfe3f2eSlogwang
dpaa_clear_bit(int idx,volatile unsigned long * bits)332bfe3f2eSlogwang static inline void dpaa_clear_bit(int idx,
342bfe3f2eSlogwang volatile unsigned long *bits)
352bfe3f2eSlogwang {
362bfe3f2eSlogwang dpaa_clear_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
372bfe3f2eSlogwang }
382bfe3f2eSlogwang
392bfe3f2eSlogwang #endif /* __DPAA_BITS_H */
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