1*a9643ea8Slogwang.. BSD LICENSE 2*a9643ea8Slogwang Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 3*a9643ea8Slogwang All rights reserved. 4*a9643ea8Slogwang 5*a9643ea8Slogwang Redistribution and use in source and binary forms, with or without 6*a9643ea8Slogwang modification, are permitted provided that the following conditions 7*a9643ea8Slogwang are met: 8*a9643ea8Slogwang 9*a9643ea8Slogwang * Redistributions of source code must retain the above copyright 10*a9643ea8Slogwang notice, this list of conditions and the following disclaimer. 11*a9643ea8Slogwang * Redistributions in binary form must reproduce the above copyright 12*a9643ea8Slogwang notice, this list of conditions and the following disclaimer in 13*a9643ea8Slogwang the documentation and/or other materials provided with the 14*a9643ea8Slogwang distribution. 15*a9643ea8Slogwang * Neither the name of Intel Corporation nor the names of its 16*a9643ea8Slogwang contributors may be used to endorse or promote products derived 17*a9643ea8Slogwang from this software without specific prior written permission. 18*a9643ea8Slogwang 19*a9643ea8Slogwang THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20*a9643ea8Slogwang "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21*a9643ea8Slogwang LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 22*a9643ea8Slogwang A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 23*a9643ea8Slogwang OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24*a9643ea8Slogwang SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25*a9643ea8Slogwang LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26*a9643ea8Slogwang DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27*a9643ea8Slogwang THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28*a9643ea8Slogwang (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29*a9643ea8Slogwang OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30*a9643ea8Slogwang 31*a9643ea8Slogwang.. _Timer_Library: 32*a9643ea8Slogwang 33*a9643ea8SlogwangTimer Library 34*a9643ea8Slogwang============= 35*a9643ea8Slogwang 36*a9643ea8SlogwangThe Timer library provides a timer service to DPDK execution units to enable execution of callback functions asynchronously. 37*a9643ea8SlogwangFeatures of the library are: 38*a9643ea8Slogwang 39*a9643ea8Slogwang* Timers can be periodic (multi-shot) or single (one-shot). 40*a9643ea8Slogwang 41*a9643ea8Slogwang* Timers can be loaded from one core and executed on another. It has to be specified in the call to rte_timer_reset(). 42*a9643ea8Slogwang 43*a9643ea8Slogwang* Timers provide high precision (depends on the call frequency to rte_timer_manage() that checks timer expiration for the local core). 44*a9643ea8Slogwang 45*a9643ea8Slogwang* If not required in the application, timers can be disabled at compilation time by not calling the rte_timer_manage() to increase performance. 46*a9643ea8Slogwang 47*a9643ea8SlogwangThe timer library uses the rte_get_timer_cycles() function that uses the High Precision Event Timer (HPET) 48*a9643ea8Slogwangor the CPUs Time Stamp Counter (TSC) to provide a reliable time reference. 49*a9643ea8Slogwang 50*a9643ea8SlogwangThis library provides an interface to add, delete and restart a timer. The API is based on BSD callout() with a few differences. 51*a9643ea8SlogwangRefer to the `callout manual <http://www.daemon-systems.org/man/callout.9.html>`_. 52*a9643ea8Slogwang 53*a9643ea8SlogwangImplementation Details 54*a9643ea8Slogwang---------------------- 55*a9643ea8Slogwang 56*a9643ea8SlogwangTimers are tracked on a per-lcore basis, 57*a9643ea8Slogwangwith all pending timers for a core being maintained in order of timer expiry in a skiplist data structure. 58*a9643ea8SlogwangThe skiplist used has ten levels and each entry in the table appears in each level with probability ¼^level. 59*a9643ea8SlogwangThis means that all entries are present in level 0, 1 in every 4 entries is present at level 1, 60*a9643ea8Slogwangone in every 16 at level 2 and so on up to level 9. 61*a9643ea8SlogwangThis means that adding and removing entries from the timer list for a core can be done in log(n) time, 62*a9643ea8Slogwangup to 4^10 entries, that is, approximately 1,000,000 timers per lcore. 63*a9643ea8Slogwang 64*a9643ea8SlogwangA timer structure contains a special field called status, 65*a9643ea8Slogwangwhich is a union of a timer state (stopped, pending, running, config) and an owner (lcore id). 66*a9643ea8SlogwangDepending on the timer state, we know if a timer is present in a list or not: 67*a9643ea8Slogwang 68*a9643ea8Slogwang* STOPPED: no owner, not in a list 69*a9643ea8Slogwang 70*a9643ea8Slogwang* CONFIG: owned by a core, must not be modified by another core, maybe in a list or not, depending on previous state 71*a9643ea8Slogwang 72*a9643ea8Slogwang* PENDING: owned by a core, present in a list 73*a9643ea8Slogwang 74*a9643ea8Slogwang* RUNNING: owned by a core, must not be modified by another core, present in a list 75*a9643ea8Slogwang 76*a9643ea8SlogwangResetting or stopping a timer while it is in a CONFIG or RUNNING state is not allowed. 77*a9643ea8SlogwangWhen modifying the state of a timer, 78*a9643ea8Slogwanga Compare And Swap instruction should be used to guarantee that the status (state+owner) is modified atomically. 79*a9643ea8Slogwang 80*a9643ea8SlogwangInside the rte_timer_manage() function, 81*a9643ea8Slogwangthe skiplist is used as a regular list by iterating along the level 0 list, which contains all timer entries, 82*a9643ea8Slogwanguntil an entry which has not yet expired has been encountered. 83*a9643ea8SlogwangTo improve performance in the case where there are entries in the timer list but none of those timers have yet expired, 84*a9643ea8Slogwangthe expiry time of the first list entry is maintained within the per-core timer list structure itself. 85*a9643ea8SlogwangOn 64-bit platforms, this value can be checked without the need to take a lock on the overall structure. 86*a9643ea8Slogwang(Since expiry times are maintained as 64-bit values, 87*a9643ea8Slogwanga check on the value cannot be done on 32-bit platforms without using either a compare-and-swap (CAS) instruction or using a lock, 88*a9643ea8Slogwangso this additional check is skipped in favor of checking as normal once the lock has been taken.) 89*a9643ea8SlogwangOn both 64-bit and 32-bit platforms, 90*a9643ea8Slogwanga call to rte_timer_manage() returns without taking a lock in the case where the timer list for the calling core is empty. 91*a9643ea8Slogwang 92*a9643ea8SlogwangUse Cases 93*a9643ea8Slogwang--------- 94*a9643ea8Slogwang 95*a9643ea8SlogwangThe timer library is used for periodic calls, such as garbage collectors, or some state machines (ARP, bridging, and so on). 96*a9643ea8Slogwang 97*a9643ea8SlogwangReferences 98*a9643ea8Slogwang---------- 99*a9643ea8Slogwang 100*a9643ea8Slogwang* `callout manual <http://www.daemon-systems.org/man/callout.9.html>`_ 101*a9643ea8Slogwang - The callout facility that provides timers with a mechanism to execute a function at a given time. 102*a9643ea8Slogwang 103*a9643ea8Slogwang* `HPET <http://en.wikipedia.org/wiki/HPET>`_ 104*a9643ea8Slogwang - Information about the High Precision Event Timer (HPET). 105