xref: /f-stack/dpdk/app/test/test_timer_racecond.c (revision 2d9fd380)
1*2d9fd380Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause
24418919fSjohnjiang  * Copyright(c) 2015 Akamai Technologies.
34418919fSjohnjiang  * All rights reserved.
44418919fSjohnjiang  *
54418919fSjohnjiang  *   Redistribution and use in source and binary forms, with or without
64418919fSjohnjiang  *   modification, are permitted provided that the following conditions
74418919fSjohnjiang  *   are met:
84418919fSjohnjiang  *
94418919fSjohnjiang  *     * Redistributions of source code must retain the above copyright
104418919fSjohnjiang  *       notice, this list of conditions and the following disclaimer.
114418919fSjohnjiang  *     * Redistributions in binary form must reproduce the above copyright
124418919fSjohnjiang  *       notice, this list of conditions and the following disclaimer in
134418919fSjohnjiang  *       the documentation and/or other materials provided with the
144418919fSjohnjiang  *       distribution.
154418919fSjohnjiang  *     * Neither the name of Intel Corporation nor the names of its
164418919fSjohnjiang  *       contributors may be used to endorse or promote products derived
174418919fSjohnjiang  *       from this software without specific prior written permission.
184418919fSjohnjiang  *
194418919fSjohnjiang  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
204418919fSjohnjiang  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
214418919fSjohnjiang  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
224418919fSjohnjiang  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
234418919fSjohnjiang  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
244418919fSjohnjiang  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
254418919fSjohnjiang  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
264418919fSjohnjiang  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
274418919fSjohnjiang  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
284418919fSjohnjiang  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
294418919fSjohnjiang  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
304418919fSjohnjiang  */
314418919fSjohnjiang 
324418919fSjohnjiang #include "test.h"
334418919fSjohnjiang 
344418919fSjohnjiang #include <stdio.h>
354418919fSjohnjiang #include <unistd.h>
364418919fSjohnjiang #include <inttypes.h>
374418919fSjohnjiang #include <rte_cycles.h>
384418919fSjohnjiang #include <rte_timer.h>
394418919fSjohnjiang #include <rte_common.h>
404418919fSjohnjiang #include <rte_lcore.h>
414418919fSjohnjiang #include <rte_random.h>
424418919fSjohnjiang #include <rte_malloc.h>
434418919fSjohnjiang #include <rte_pause.h>
444418919fSjohnjiang 
454418919fSjohnjiang #ifdef RTE_EXEC_ENV_LINUX
464418919fSjohnjiang #define usec_delay(us) usleep(us)
474418919fSjohnjiang #else
484418919fSjohnjiang #define usec_delay(us) rte_delay_us(us)
494418919fSjohnjiang #endif
504418919fSjohnjiang 
514418919fSjohnjiang #define BILLION (1UL << 30)
524418919fSjohnjiang 
534418919fSjohnjiang #define TEST_DURATION_S 4 /* in seconds */
544418919fSjohnjiang #define N_TIMERS    50
554418919fSjohnjiang 
564418919fSjohnjiang static struct rte_timer timer[N_TIMERS];
57*2d9fd380Sjfb8856606 static unsigned int timer_lcore_id[N_TIMERS];
584418919fSjohnjiang 
59*2d9fd380Sjfb8856606 static unsigned int main_lcore;
60*2d9fd380Sjfb8856606 static volatile unsigned int stop_workers;
614418919fSjohnjiang 
624418919fSjohnjiang static int reload_timer(struct rte_timer *tim);
634418919fSjohnjiang 
64*2d9fd380Sjfb8856606 RTE_LOG_REGISTER(timer_logtype_test, test.timer, INFO);
654418919fSjohnjiang 
664418919fSjohnjiang static void
timer_cb(struct rte_timer * tim,void * arg __rte_unused)674418919fSjohnjiang timer_cb(struct rte_timer *tim, void *arg __rte_unused)
684418919fSjohnjiang {
694418919fSjohnjiang 	/* Simulate slow callback function, 100 us. */
704418919fSjohnjiang 	rte_delay_us(100);
714418919fSjohnjiang 	if (tim == &timer[0])
724418919fSjohnjiang 		rte_log(RTE_LOG_DEBUG, timer_logtype_test,
734418919fSjohnjiang 			"------------------------------------------------\n");
744418919fSjohnjiang 	rte_log(RTE_LOG_DEBUG, timer_logtype_test, "%s: core %u timer %"
754418919fSjohnjiang 		PRIuPTR "\n", __func__, rte_lcore_id(), tim - timer);
764418919fSjohnjiang 	(void)reload_timer(tim);
774418919fSjohnjiang }
784418919fSjohnjiang 
794418919fSjohnjiang RTE_DEFINE_PER_LCORE(unsigned, n_reset_collisions);
804418919fSjohnjiang 
814418919fSjohnjiang static int
reload_timer(struct rte_timer * tim)824418919fSjohnjiang reload_timer(struct rte_timer *tim)
834418919fSjohnjiang {
844418919fSjohnjiang 	/* Make timer expire roughly when the TSC hits the next BILLION
854418919fSjohnjiang 	 * multiple. Add in timer's index to make them expire in nearly
864418919fSjohnjiang 	 * sorted order. This makes all timers somewhat synchronized,
874418919fSjohnjiang 	 * firing ~2-3 times per second, assuming 2-3 GHz TSCs.
884418919fSjohnjiang 	 */
894418919fSjohnjiang 	uint64_t ticks = BILLION - (rte_get_timer_cycles() % BILLION) +
904418919fSjohnjiang 	    (tim - timer);
914418919fSjohnjiang 	int ret;
924418919fSjohnjiang 
93*2d9fd380Sjfb8856606 	ret = rte_timer_reset(tim, ticks, PERIODICAL, main_lcore, timer_cb, NULL);
944418919fSjohnjiang 	if (ret != 0) {
954418919fSjohnjiang 		rte_log(RTE_LOG_DEBUG, timer_logtype_test,
964418919fSjohnjiang 			"- core %u failed to reset timer %" PRIuPTR " (OK)\n",
974418919fSjohnjiang 			rte_lcore_id(), tim - timer);
984418919fSjohnjiang 		RTE_PER_LCORE(n_reset_collisions) += 1;
994418919fSjohnjiang 	}
1004418919fSjohnjiang 	return ret;
1014418919fSjohnjiang }
1024418919fSjohnjiang 
1034418919fSjohnjiang static int
worker_main_loop(__rte_unused void * arg)104*2d9fd380Sjfb8856606 worker_main_loop(__rte_unused void *arg)
1054418919fSjohnjiang {
1064418919fSjohnjiang 	unsigned lcore_id = rte_lcore_id();
1074418919fSjohnjiang 	unsigned i;
1084418919fSjohnjiang 
1094418919fSjohnjiang 	RTE_PER_LCORE(n_reset_collisions) = 0;
1104418919fSjohnjiang 
1114418919fSjohnjiang 	printf("Starting main loop on core %u\n", lcore_id);
1124418919fSjohnjiang 
113*2d9fd380Sjfb8856606 	while (!stop_workers) {
1144418919fSjohnjiang 		/* Wait until the timer manager is running.
1154418919fSjohnjiang 		 * We know it's running when we see timer[0] NOT pending.
1164418919fSjohnjiang 		 */
1174418919fSjohnjiang 		if (rte_timer_pending(&timer[0])) {
1184418919fSjohnjiang 			rte_pause();
1194418919fSjohnjiang 			continue;
1204418919fSjohnjiang 		}
1214418919fSjohnjiang 
1224418919fSjohnjiang 		/* Now, go cause some havoc!
1234418919fSjohnjiang 		 * Reload our timers.
1244418919fSjohnjiang 		 */
1254418919fSjohnjiang 		for (i = 0; i < N_TIMERS; i++) {
1264418919fSjohnjiang 			if (timer_lcore_id[i] == lcore_id)
1274418919fSjohnjiang 				(void)reload_timer(&timer[i]);
1284418919fSjohnjiang 		}
1294418919fSjohnjiang 		usec_delay(100*1000); /* sleep 100 ms */
1304418919fSjohnjiang 	}
1314418919fSjohnjiang 
1324418919fSjohnjiang 	if (RTE_PER_LCORE(n_reset_collisions) != 0) {
1334418919fSjohnjiang 		printf("- core %u, %u reset collisions (OK)\n",
1344418919fSjohnjiang 			lcore_id, RTE_PER_LCORE(n_reset_collisions));
1354418919fSjohnjiang 	}
1364418919fSjohnjiang 	return 0;
1374418919fSjohnjiang }
1384418919fSjohnjiang 
1394418919fSjohnjiang static int
test_timer_racecond(void)1404418919fSjohnjiang test_timer_racecond(void)
1414418919fSjohnjiang {
1424418919fSjohnjiang 	int ret;
1434418919fSjohnjiang 	uint64_t hz;
1444418919fSjohnjiang 	uint64_t cur_time;
1454418919fSjohnjiang 	uint64_t end_time;
1464418919fSjohnjiang 	int64_t diff = 0;
1474418919fSjohnjiang 	unsigned lcore_id;
1484418919fSjohnjiang 	unsigned i;
1494418919fSjohnjiang 
150*2d9fd380Sjfb8856606 	main_lcore = lcore_id = rte_lcore_id();
1514418919fSjohnjiang 	hz = rte_get_timer_hz();
1524418919fSjohnjiang 
1534418919fSjohnjiang 	/* init and start timers */
1544418919fSjohnjiang 	for (i = 0; i < N_TIMERS; i++) {
1554418919fSjohnjiang 		rte_timer_init(&timer[i]);
1564418919fSjohnjiang 		ret = reload_timer(&timer[i]);
1574418919fSjohnjiang 		TEST_ASSERT(ret == 0, "reload_timer failed");
1584418919fSjohnjiang 
159*2d9fd380Sjfb8856606 		/* Distribute timers to workers.
160*2d9fd380Sjfb8856606 		 * Note that we assign timer[0] to the main.
1614418919fSjohnjiang 		 */
1624418919fSjohnjiang 		timer_lcore_id[i] = lcore_id;
1634418919fSjohnjiang 		lcore_id = rte_get_next_lcore(lcore_id, 1, 1);
1644418919fSjohnjiang 	}
1654418919fSjohnjiang 
1664418919fSjohnjiang 	/* calculate the "end of test" time */
1674418919fSjohnjiang 	cur_time = rte_get_timer_cycles();
1684418919fSjohnjiang 	end_time = cur_time + (hz * TEST_DURATION_S);
1694418919fSjohnjiang 
170*2d9fd380Sjfb8856606 	/* start worker cores */
171*2d9fd380Sjfb8856606 	stop_workers = 0;
1724418919fSjohnjiang 	printf("Start timer manage race condition test (%u seconds)\n",
1734418919fSjohnjiang 			TEST_DURATION_S);
174*2d9fd380Sjfb8856606 	rte_eal_mp_remote_launch(worker_main_loop, NULL, SKIP_MAIN);
1754418919fSjohnjiang 
1764418919fSjohnjiang 	while (diff >= 0) {
1774418919fSjohnjiang 		/* run the timers */
1784418919fSjohnjiang 		rte_timer_manage();
1794418919fSjohnjiang 
1804418919fSjohnjiang 		/* wait 100 ms */
1814418919fSjohnjiang 		usec_delay(100*1000);
1824418919fSjohnjiang 
1834418919fSjohnjiang 		cur_time = rte_get_timer_cycles();
1844418919fSjohnjiang 		diff = end_time - cur_time;
1854418919fSjohnjiang 	}
1864418919fSjohnjiang 
187*2d9fd380Sjfb8856606 	/* stop worker cores */
1884418919fSjohnjiang 	printf("Stopping timer manage race condition test\n");
189*2d9fd380Sjfb8856606 	stop_workers = 1;
1904418919fSjohnjiang 	rte_eal_mp_wait_lcore();
1914418919fSjohnjiang 
1924418919fSjohnjiang 	/* stop timers */
1934418919fSjohnjiang 	for (i = 0; i < N_TIMERS; i++) {
1944418919fSjohnjiang 		ret = rte_timer_stop(&timer[i]);
1954418919fSjohnjiang 		TEST_ASSERT(ret == 0, "rte_timer_stop failed");
1964418919fSjohnjiang 	}
1974418919fSjohnjiang 
1984418919fSjohnjiang 	return TEST_SUCCESS;
1994418919fSjohnjiang }
2004418919fSjohnjiang 
2014418919fSjohnjiang REGISTER_TEST_COMMAND(timer_racecond_autotest, test_timer_racecond);
202