xref: /f-stack/dpdk/app/test/test_sched.c (revision 2d9fd380)
14418919fSjohnjiang /* SPDX-License-Identifier: BSD-3-Clause
24418919fSjohnjiang  * Copyright(c) 2010-2014 Intel Corporation
34418919fSjohnjiang  */
44418919fSjohnjiang 
54418919fSjohnjiang #include <stdlib.h>
64418919fSjohnjiang #include <stdio.h>
74418919fSjohnjiang #include <string.h>
84418919fSjohnjiang #include <stdint.h>
94418919fSjohnjiang #include <unistd.h>
104418919fSjohnjiang 
114418919fSjohnjiang #include "test.h"
124418919fSjohnjiang 
134418919fSjohnjiang #include <rte_cycles.h>
144418919fSjohnjiang #include <rte_ether.h>
154418919fSjohnjiang #include <rte_ip.h>
164418919fSjohnjiang #include <rte_byteorder.h>
174418919fSjohnjiang #include <rte_sched.h>
184418919fSjohnjiang 
194418919fSjohnjiang 
204418919fSjohnjiang #define SUBPORT         0
214418919fSjohnjiang #define PIPE            1
224418919fSjohnjiang #define TC              2
234418919fSjohnjiang #define QUEUE           0
24*2d9fd380Sjfb8856606 #define MAX_SCHED_SUBPORT_PROFILES  8
254418919fSjohnjiang 
264418919fSjohnjiang static struct rte_sched_pipe_params pipe_profile[] = {
274418919fSjohnjiang 	{ /* Profile #0 */
284418919fSjohnjiang 		.tb_rate = 305175,
294418919fSjohnjiang 		.tb_size = 1000000,
304418919fSjohnjiang 
314418919fSjohnjiang 		.tc_rate = {305175, 305175, 305175, 305175, 305175, 305175,
324418919fSjohnjiang 			305175, 305175, 305175, 305175, 305175, 305175, 305175},
334418919fSjohnjiang 		.tc_period = 40,
344418919fSjohnjiang 		.tc_ov_weight = 1,
354418919fSjohnjiang 
364418919fSjohnjiang 		.wrr_weights = {1, 1, 1, 1},
374418919fSjohnjiang 	},
384418919fSjohnjiang };
394418919fSjohnjiang 
40*2d9fd380Sjfb8856606 static struct rte_sched_subport_profile_params
41*2d9fd380Sjfb8856606 		subport_profile[] = {
424418919fSjohnjiang 	{
434418919fSjohnjiang 		.tb_rate = 1250000000,
444418919fSjohnjiang 		.tb_size = 1000000,
454418919fSjohnjiang 		.tc_rate = {1250000000, 1250000000, 1250000000, 1250000000,
464418919fSjohnjiang 			1250000000, 1250000000, 1250000000, 1250000000, 1250000000,
474418919fSjohnjiang 			1250000000, 1250000000, 1250000000, 1250000000},
484418919fSjohnjiang 		.tc_period = 10,
49*2d9fd380Sjfb8856606 	},
50*2d9fd380Sjfb8856606 };
51*2d9fd380Sjfb8856606 
52*2d9fd380Sjfb8856606 static struct rte_sched_subport_params subport_param[] = {
53*2d9fd380Sjfb8856606 	{
544418919fSjohnjiang 		.n_pipes_per_subport_enabled = 1024,
554418919fSjohnjiang 		.qsize = {32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32},
564418919fSjohnjiang 		.pipe_profiles = pipe_profile,
574418919fSjohnjiang 		.n_pipe_profiles = 1,
584418919fSjohnjiang 		.n_max_pipe_profiles = 1,
594418919fSjohnjiang 	},
604418919fSjohnjiang };
614418919fSjohnjiang 
624418919fSjohnjiang static struct rte_sched_port_params port_param = {
634418919fSjohnjiang 	.socket = 0, /* computed */
644418919fSjohnjiang 	.rate = 0, /* computed */
654418919fSjohnjiang 	.mtu = 1522,
664418919fSjohnjiang 	.frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT,
674418919fSjohnjiang 	.n_subports_per_port = 1,
68*2d9fd380Sjfb8856606 	.n_subport_profiles = 1,
69*2d9fd380Sjfb8856606 	.subport_profiles = subport_profile,
70*2d9fd380Sjfb8856606 	.n_max_subport_profiles = MAX_SCHED_SUBPORT_PROFILES,
714418919fSjohnjiang 	.n_pipes_per_subport = 1024,
724418919fSjohnjiang };
734418919fSjohnjiang 
744418919fSjohnjiang #define NB_MBUF          32
754418919fSjohnjiang #define MBUF_DATA_SZ     (2048 + RTE_PKTMBUF_HEADROOM)
764418919fSjohnjiang #define MEMPOOL_CACHE_SZ 0
774418919fSjohnjiang #define SOCKET           0
784418919fSjohnjiang 
794418919fSjohnjiang 
804418919fSjohnjiang static struct rte_mempool *
create_mempool(void)814418919fSjohnjiang create_mempool(void)
824418919fSjohnjiang {
834418919fSjohnjiang 	struct rte_mempool * mp;
844418919fSjohnjiang 
854418919fSjohnjiang 	mp = rte_mempool_lookup("test_sched");
864418919fSjohnjiang 	if (!mp)
874418919fSjohnjiang 		mp = rte_pktmbuf_pool_create("test_sched", NB_MBUF,
884418919fSjohnjiang 			MEMPOOL_CACHE_SZ, 0, MBUF_DATA_SZ, SOCKET);
894418919fSjohnjiang 
904418919fSjohnjiang 	return mp;
914418919fSjohnjiang }
924418919fSjohnjiang 
934418919fSjohnjiang static void
prepare_pkt(struct rte_sched_port * port,struct rte_mbuf * mbuf)944418919fSjohnjiang prepare_pkt(struct rte_sched_port *port, struct rte_mbuf *mbuf)
954418919fSjohnjiang {
964418919fSjohnjiang 	struct rte_ether_hdr *eth_hdr;
974418919fSjohnjiang 	struct rte_vlan_hdr *vlan1, *vlan2;
984418919fSjohnjiang 	struct rte_ipv4_hdr *ip_hdr;
994418919fSjohnjiang 
1004418919fSjohnjiang 	/* Simulate a classifier */
1014418919fSjohnjiang 	eth_hdr = rte_pktmbuf_mtod(mbuf, struct rte_ether_hdr *);
1024418919fSjohnjiang 	vlan1 = (struct rte_vlan_hdr *)(&eth_hdr->ether_type);
1034418919fSjohnjiang 	vlan2 = (struct rte_vlan_hdr *)(
1044418919fSjohnjiang 		(uintptr_t)&eth_hdr->ether_type + sizeof(struct rte_vlan_hdr));
1054418919fSjohnjiang 	eth_hdr = (struct rte_ether_hdr *)(
1064418919fSjohnjiang 		(uintptr_t)&eth_hdr->ether_type +
1074418919fSjohnjiang 		2 * sizeof(struct rte_vlan_hdr));
1084418919fSjohnjiang 	ip_hdr = (struct rte_ipv4_hdr *)(
1094418919fSjohnjiang 		(uintptr_t)eth_hdr + sizeof(eth_hdr->ether_type));
1104418919fSjohnjiang 
1114418919fSjohnjiang 	vlan1->vlan_tci = rte_cpu_to_be_16(SUBPORT);
1124418919fSjohnjiang 	vlan2->vlan_tci = rte_cpu_to_be_16(PIPE);
1134418919fSjohnjiang 	eth_hdr->ether_type =  rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV4);
1144418919fSjohnjiang 	ip_hdr->dst_addr = RTE_IPV4(0,0,TC,QUEUE);
1154418919fSjohnjiang 
1164418919fSjohnjiang 
1174418919fSjohnjiang 	rte_sched_port_pkt_write(port, mbuf, SUBPORT, PIPE, TC, QUEUE,
1184418919fSjohnjiang 					RTE_COLOR_YELLOW);
1194418919fSjohnjiang 
1204418919fSjohnjiang 	/* 64 byte packet */
1214418919fSjohnjiang 	mbuf->pkt_len  = 60;
1224418919fSjohnjiang 	mbuf->data_len = 60;
1234418919fSjohnjiang }
1244418919fSjohnjiang 
1254418919fSjohnjiang 
1264418919fSjohnjiang /**
1274418919fSjohnjiang  * test main entrance for library sched
1284418919fSjohnjiang  */
1294418919fSjohnjiang static int
test_sched(void)1304418919fSjohnjiang test_sched(void)
1314418919fSjohnjiang {
1324418919fSjohnjiang 	struct rte_mempool *mp = NULL;
1334418919fSjohnjiang 	struct rte_sched_port *port = NULL;
1344418919fSjohnjiang 	uint32_t pipe;
1354418919fSjohnjiang 	struct rte_mbuf *in_mbufs[10];
1364418919fSjohnjiang 	struct rte_mbuf *out_mbufs[10];
1374418919fSjohnjiang 	int i;
1384418919fSjohnjiang 
1394418919fSjohnjiang 	int err;
1404418919fSjohnjiang 
1414418919fSjohnjiang 	mp = create_mempool();
1424418919fSjohnjiang 	TEST_ASSERT_NOT_NULL(mp, "Error creating mempool\n");
1434418919fSjohnjiang 
1444418919fSjohnjiang 	port_param.socket = 0;
1454418919fSjohnjiang 	port_param.rate = (uint64_t) 10000 * 1000 * 1000 / 8;
1464418919fSjohnjiang 
1474418919fSjohnjiang 	port = rte_sched_port_config(&port_param);
1484418919fSjohnjiang 	TEST_ASSERT_NOT_NULL(port, "Error config sched port\n");
1494418919fSjohnjiang 
150*2d9fd380Sjfb8856606 	err = rte_sched_subport_config(port, SUBPORT, subport_param, 0);
1514418919fSjohnjiang 	TEST_ASSERT_SUCCESS(err, "Error config sched, err=%d\n", err);
1524418919fSjohnjiang 
1534418919fSjohnjiang 	for (pipe = 0; pipe < subport_param[0].n_pipes_per_subport_enabled; pipe++) {
1544418919fSjohnjiang 		err = rte_sched_pipe_config(port, SUBPORT, pipe, 0);
1554418919fSjohnjiang 		TEST_ASSERT_SUCCESS(err, "Error config sched pipe %u, err=%d\n", pipe, err);
1564418919fSjohnjiang 	}
1574418919fSjohnjiang 
1584418919fSjohnjiang 	for (i = 0; i < 10; i++) {
1594418919fSjohnjiang 		in_mbufs[i] = rte_pktmbuf_alloc(mp);
1604418919fSjohnjiang 		TEST_ASSERT_NOT_NULL(in_mbufs[i], "Packet allocation failed\n");
1614418919fSjohnjiang 		prepare_pkt(port, in_mbufs[i]);
1624418919fSjohnjiang 	}
1634418919fSjohnjiang 
1644418919fSjohnjiang 
1654418919fSjohnjiang 	err = rte_sched_port_enqueue(port, in_mbufs, 10);
1664418919fSjohnjiang 	TEST_ASSERT_EQUAL(err, 10, "Wrong enqueue, err=%d\n", err);
1674418919fSjohnjiang 
1684418919fSjohnjiang 	err = rte_sched_port_dequeue(port, out_mbufs, 10);
1694418919fSjohnjiang 	TEST_ASSERT_EQUAL(err, 10, "Wrong dequeue, err=%d\n", err);
1704418919fSjohnjiang 
1714418919fSjohnjiang 	for (i = 0; i < 10; i++) {
1724418919fSjohnjiang 		enum rte_color color;
1734418919fSjohnjiang 		uint32_t subport, traffic_class, queue;
1744418919fSjohnjiang 
1754418919fSjohnjiang 		color = rte_sched_port_pkt_read_color(out_mbufs[i]);
1764418919fSjohnjiang 		TEST_ASSERT_EQUAL(color, RTE_COLOR_YELLOW, "Wrong color\n");
1774418919fSjohnjiang 
1784418919fSjohnjiang 		rte_sched_port_pkt_read_tree_path(port, out_mbufs[i],
1794418919fSjohnjiang 				&subport, &pipe, &traffic_class, &queue);
1804418919fSjohnjiang 
1814418919fSjohnjiang 		TEST_ASSERT_EQUAL(subport, SUBPORT, "Wrong subport\n");
1824418919fSjohnjiang 		TEST_ASSERT_EQUAL(pipe, PIPE, "Wrong pipe\n");
1834418919fSjohnjiang 		TEST_ASSERT_EQUAL(traffic_class, TC, "Wrong traffic_class\n");
1844418919fSjohnjiang 		TEST_ASSERT_EQUAL(queue, QUEUE, "Wrong queue\n");
1854418919fSjohnjiang 
1864418919fSjohnjiang 	}
1874418919fSjohnjiang 
1884418919fSjohnjiang 
1894418919fSjohnjiang 	struct rte_sched_subport_stats subport_stats;
1904418919fSjohnjiang 	uint32_t tc_ov;
1914418919fSjohnjiang 	rte_sched_subport_read_stats(port, SUBPORT, &subport_stats, &tc_ov);
1924418919fSjohnjiang #if 0
1934418919fSjohnjiang 	TEST_ASSERT_EQUAL(subport_stats.n_pkts_tc[TC-1], 10, "Wrong subport stats\n");
1944418919fSjohnjiang #endif
1954418919fSjohnjiang 	struct rte_sched_queue_stats queue_stats;
1964418919fSjohnjiang 	uint16_t qlen;
1974418919fSjohnjiang 	rte_sched_queue_read_stats(port, QUEUE, &queue_stats, &qlen);
1984418919fSjohnjiang #if 0
1994418919fSjohnjiang 	TEST_ASSERT_EQUAL(queue_stats.n_pkts, 10, "Wrong queue stats\n");
2004418919fSjohnjiang #endif
2014418919fSjohnjiang 
2024418919fSjohnjiang 	rte_sched_port_free(port);
2034418919fSjohnjiang 
2044418919fSjohnjiang 	return 0;
2054418919fSjohnjiang }
2064418919fSjohnjiang 
2074418919fSjohnjiang REGISTER_TEST_COMMAND(sched_autotest, test_sched);
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