1d30ea906Sjfb8856606 /*
2d30ea906Sjfb8856606  * SPDX-License-Identifier: BSD-3-Clause
3d30ea906Sjfb8856606  * Copyright 2017 Cavium, Inc.
4d30ea906Sjfb8856606  */
5d30ea906Sjfb8856606 
6d30ea906Sjfb8856606 #include "test_pipeline_common.h"
7d30ea906Sjfb8856606 
8d30ea906Sjfb8856606 int
pipeline_test_result(struct evt_test * test,struct evt_options * opt)9d30ea906Sjfb8856606 pipeline_test_result(struct evt_test *test, struct evt_options *opt)
10d30ea906Sjfb8856606 {
11d30ea906Sjfb8856606 	RTE_SET_USED(opt);
12d30ea906Sjfb8856606 	int i;
13d30ea906Sjfb8856606 	uint64_t total = 0;
14d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
15d30ea906Sjfb8856606 
16d30ea906Sjfb8856606 	evt_info("Packet distribution across worker cores :");
17d30ea906Sjfb8856606 	for (i = 0; i < t->nb_workers; i++)
18d30ea906Sjfb8856606 		total += t->worker[i].processed_pkts;
19d30ea906Sjfb8856606 	for (i = 0; i < t->nb_workers; i++)
20d30ea906Sjfb8856606 		evt_info("Worker %d packets: "CLGRN"%"PRIx64""CLNRM" percentage:"
21d30ea906Sjfb8856606 				CLGRN" %3.2f"CLNRM, i,
22d30ea906Sjfb8856606 				t->worker[i].processed_pkts,
23d30ea906Sjfb8856606 				(((double)t->worker[i].processed_pkts)/total)
24d30ea906Sjfb8856606 				* 100);
25d30ea906Sjfb8856606 	return t->result;
26d30ea906Sjfb8856606 }
27d30ea906Sjfb8856606 
28d30ea906Sjfb8856606 void
pipeline_opt_dump(struct evt_options * opt,uint8_t nb_queues)29d30ea906Sjfb8856606 pipeline_opt_dump(struct evt_options *opt, uint8_t nb_queues)
30d30ea906Sjfb8856606 {
31d30ea906Sjfb8856606 	evt_dump("nb_worker_lcores", "%d", evt_nr_active_lcores(opt->wlcores));
32d30ea906Sjfb8856606 	evt_dump_worker_lcores(opt);
33d30ea906Sjfb8856606 	evt_dump_nb_stages(opt);
34d30ea906Sjfb8856606 	evt_dump("nb_evdev_ports", "%d", pipeline_nb_event_ports(opt));
35d30ea906Sjfb8856606 	evt_dump("nb_evdev_queues", "%d", nb_queues);
36d30ea906Sjfb8856606 	evt_dump_queue_priority(opt);
37d30ea906Sjfb8856606 	evt_dump_sched_type_list(opt);
38d30ea906Sjfb8856606 	evt_dump_producer_type(opt);
39d30ea906Sjfb8856606 }
40d30ea906Sjfb8856606 
41d30ea906Sjfb8856606 static inline uint64_t
processed_pkts(struct test_pipeline * t)42d30ea906Sjfb8856606 processed_pkts(struct test_pipeline *t)
43d30ea906Sjfb8856606 {
44d30ea906Sjfb8856606 	uint8_t i;
45d30ea906Sjfb8856606 	uint64_t total = 0;
46d30ea906Sjfb8856606 
47d30ea906Sjfb8856606 	rte_smp_rmb();
48d30ea906Sjfb8856606 	for (i = 0; i < t->nb_workers; i++)
49d30ea906Sjfb8856606 		total += t->worker[i].processed_pkts;
50d30ea906Sjfb8856606 
51d30ea906Sjfb8856606 	return total;
52d30ea906Sjfb8856606 }
53d30ea906Sjfb8856606 
54d30ea906Sjfb8856606 int
pipeline_launch_lcores(struct evt_test * test,struct evt_options * opt,int (* worker)(void *))55d30ea906Sjfb8856606 pipeline_launch_lcores(struct evt_test *test, struct evt_options *opt,
56d30ea906Sjfb8856606 		int (*worker)(void *))
57d30ea906Sjfb8856606 {
58d30ea906Sjfb8856606 	int ret, lcore_id;
59d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
60d30ea906Sjfb8856606 
61d30ea906Sjfb8856606 	int port_idx = 0;
62d30ea906Sjfb8856606 	/* launch workers */
63*2d9fd380Sjfb8856606 	RTE_LCORE_FOREACH_WORKER(lcore_id) {
64d30ea906Sjfb8856606 		if (!(opt->wlcores[lcore_id]))
65d30ea906Sjfb8856606 			continue;
66d30ea906Sjfb8856606 
67d30ea906Sjfb8856606 		ret = rte_eal_remote_launch(worker,
68d30ea906Sjfb8856606 				 &t->worker[port_idx], lcore_id);
69d30ea906Sjfb8856606 		if (ret) {
70d30ea906Sjfb8856606 			evt_err("failed to launch worker %d", lcore_id);
71d30ea906Sjfb8856606 			return ret;
72d30ea906Sjfb8856606 		}
73d30ea906Sjfb8856606 		port_idx++;
74d30ea906Sjfb8856606 	}
75d30ea906Sjfb8856606 
76d30ea906Sjfb8856606 	uint64_t perf_cycles = rte_get_timer_cycles();
77d30ea906Sjfb8856606 	const uint64_t perf_sample = rte_get_timer_hz();
78d30ea906Sjfb8856606 
79d30ea906Sjfb8856606 	static float total_mpps;
80d30ea906Sjfb8856606 	static uint64_t samples;
81d30ea906Sjfb8856606 
82d30ea906Sjfb8856606 	uint64_t prev_pkts = 0;
83d30ea906Sjfb8856606 
84d30ea906Sjfb8856606 	while (t->done == false) {
85d30ea906Sjfb8856606 		const uint64_t new_cycles = rte_get_timer_cycles();
86d30ea906Sjfb8856606 
87d30ea906Sjfb8856606 		if ((new_cycles - perf_cycles) > perf_sample) {
88d30ea906Sjfb8856606 			const uint64_t curr_pkts = processed_pkts(t);
89d30ea906Sjfb8856606 
90d30ea906Sjfb8856606 			float mpps = (float)(curr_pkts - prev_pkts)/1000000;
91d30ea906Sjfb8856606 
92d30ea906Sjfb8856606 			prev_pkts = curr_pkts;
93d30ea906Sjfb8856606 			perf_cycles = new_cycles;
94d30ea906Sjfb8856606 			total_mpps += mpps;
95d30ea906Sjfb8856606 			++samples;
96d30ea906Sjfb8856606 			printf(CLGRN"\r%.3f mpps avg %.3f mpps"CLNRM,
97d30ea906Sjfb8856606 					mpps, total_mpps/samples);
98d30ea906Sjfb8856606 			fflush(stdout);
99d30ea906Sjfb8856606 		}
100d30ea906Sjfb8856606 	}
101d30ea906Sjfb8856606 	printf("\n");
102d30ea906Sjfb8856606 	return 0;
103d30ea906Sjfb8856606 }
104d30ea906Sjfb8856606 
105d30ea906Sjfb8856606 int
pipeline_opt_check(struct evt_options * opt,uint64_t nb_queues)106d30ea906Sjfb8856606 pipeline_opt_check(struct evt_options *opt, uint64_t nb_queues)
107d30ea906Sjfb8856606 {
108d30ea906Sjfb8856606 	unsigned int lcores;
109*2d9fd380Sjfb8856606 
110*2d9fd380Sjfb8856606 	/* N worker + main */
111d30ea906Sjfb8856606 	lcores = 2;
112d30ea906Sjfb8856606 
113*2d9fd380Sjfb8856606 	if (opt->prod_type != EVT_PROD_TYPE_ETH_RX_ADPTR) {
114*2d9fd380Sjfb8856606 		evt_err("Invalid producer type '%s' valid producer '%s'",
115*2d9fd380Sjfb8856606 			evt_prod_id_to_name(opt->prod_type),
116*2d9fd380Sjfb8856606 			evt_prod_id_to_name(EVT_PROD_TYPE_ETH_RX_ADPTR));
117*2d9fd380Sjfb8856606 		return -1;
118*2d9fd380Sjfb8856606 	}
119*2d9fd380Sjfb8856606 
120d30ea906Sjfb8856606 	if (!rte_eth_dev_count_avail()) {
121d30ea906Sjfb8856606 		evt_err("test needs minimum 1 ethernet dev");
122d30ea906Sjfb8856606 		return -1;
123d30ea906Sjfb8856606 	}
124d30ea906Sjfb8856606 
125d30ea906Sjfb8856606 	if (rte_lcore_count() < lcores) {
126d30ea906Sjfb8856606 		evt_err("test need minimum %d lcores", lcores);
127d30ea906Sjfb8856606 		return -1;
128d30ea906Sjfb8856606 	}
129d30ea906Sjfb8856606 
130d30ea906Sjfb8856606 	/* Validate worker lcores */
131*2d9fd380Sjfb8856606 	if (evt_lcores_has_overlap(opt->wlcores, rte_get_main_lcore())) {
132*2d9fd380Sjfb8856606 		evt_err("worker lcores overlaps with main lcore");
133d30ea906Sjfb8856606 		return -1;
134d30ea906Sjfb8856606 	}
135d30ea906Sjfb8856606 	if (evt_has_disabled_lcore(opt->wlcores)) {
136d30ea906Sjfb8856606 		evt_err("one or more workers lcores are not enabled");
137d30ea906Sjfb8856606 		return -1;
138d30ea906Sjfb8856606 	}
139d30ea906Sjfb8856606 	if (!evt_has_active_lcore(opt->wlcores)) {
140d30ea906Sjfb8856606 		evt_err("minimum one worker is required");
141d30ea906Sjfb8856606 		return -1;
142d30ea906Sjfb8856606 	}
143d30ea906Sjfb8856606 
144d30ea906Sjfb8856606 	if (nb_queues > EVT_MAX_QUEUES) {
145d30ea906Sjfb8856606 		evt_err("number of queues exceeds %d", EVT_MAX_QUEUES);
146d30ea906Sjfb8856606 		return -1;
147d30ea906Sjfb8856606 	}
148d30ea906Sjfb8856606 	if (pipeline_nb_event_ports(opt) > EVT_MAX_PORTS) {
149d30ea906Sjfb8856606 		evt_err("number of ports exceeds %d", EVT_MAX_PORTS);
150d30ea906Sjfb8856606 		return -1;
151d30ea906Sjfb8856606 	}
152d30ea906Sjfb8856606 
153d30ea906Sjfb8856606 	if (evt_has_invalid_stage(opt))
154d30ea906Sjfb8856606 		return -1;
155d30ea906Sjfb8856606 
156d30ea906Sjfb8856606 	if (evt_has_invalid_sched_type(opt))
157d30ea906Sjfb8856606 		return -1;
158d30ea906Sjfb8856606 
159d30ea906Sjfb8856606 	return 0;
160d30ea906Sjfb8856606 }
161d30ea906Sjfb8856606 
162d30ea906Sjfb8856606 #define NB_RX_DESC			128
163d30ea906Sjfb8856606 #define NB_TX_DESC			512
164d30ea906Sjfb8856606 int
pipeline_ethdev_setup(struct evt_test * test,struct evt_options * opt)165d30ea906Sjfb8856606 pipeline_ethdev_setup(struct evt_test *test, struct evt_options *opt)
166d30ea906Sjfb8856606 {
167d30ea906Sjfb8856606 	uint16_t i;
1684418919fSjohnjiang 	int ret;
169d30ea906Sjfb8856606 	uint8_t nb_queues = 1;
170d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
171d30ea906Sjfb8856606 	struct rte_eth_rxconf rx_conf;
172d30ea906Sjfb8856606 	struct rte_eth_conf port_conf = {
173d30ea906Sjfb8856606 		.rxmode = {
174d30ea906Sjfb8856606 			.mq_mode = ETH_MQ_RX_RSS,
175d30ea906Sjfb8856606 		},
176d30ea906Sjfb8856606 		.rx_adv_conf = {
177d30ea906Sjfb8856606 			.rss_conf = {
178d30ea906Sjfb8856606 				.rss_key = NULL,
179d30ea906Sjfb8856606 				.rss_hf = ETH_RSS_IP,
180d30ea906Sjfb8856606 			},
181d30ea906Sjfb8856606 		},
182d30ea906Sjfb8856606 	};
183d30ea906Sjfb8856606 
184d30ea906Sjfb8856606 	if (!rte_eth_dev_count_avail()) {
185d30ea906Sjfb8856606 		evt_err("No ethernet ports found.");
186d30ea906Sjfb8856606 		return -ENODEV;
187d30ea906Sjfb8856606 	}
188d30ea906Sjfb8856606 
1894418919fSjohnjiang 	if (opt->max_pkt_sz < RTE_ETHER_MIN_LEN) {
1904418919fSjohnjiang 		evt_err("max_pkt_sz can not be less than %d",
1914418919fSjohnjiang 			RTE_ETHER_MIN_LEN);
1924418919fSjohnjiang 		return -EINVAL;
1934418919fSjohnjiang 	}
1944418919fSjohnjiang 
1954418919fSjohnjiang 	port_conf.rxmode.max_rx_pkt_len = opt->max_pkt_sz;
1964418919fSjohnjiang 	if (opt->max_pkt_sz > RTE_ETHER_MAX_LEN)
1974418919fSjohnjiang 		port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
1984418919fSjohnjiang 
199d30ea906Sjfb8856606 	t->internal_port = 1;
200d30ea906Sjfb8856606 	RTE_ETH_FOREACH_DEV(i) {
201d30ea906Sjfb8856606 		struct rte_eth_dev_info dev_info;
202d30ea906Sjfb8856606 		struct rte_eth_conf local_port_conf = port_conf;
203d30ea906Sjfb8856606 		uint32_t caps = 0;
204d30ea906Sjfb8856606 
2054418919fSjohnjiang 		ret = rte_event_eth_tx_adapter_caps_get(opt->dev_id, i, &caps);
2064418919fSjohnjiang 		if (ret != 0) {
2074418919fSjohnjiang 			evt_err("failed to get event tx adapter[%d] caps", i);
2084418919fSjohnjiang 			return ret;
2094418919fSjohnjiang 		}
2104418919fSjohnjiang 
211d30ea906Sjfb8856606 		if (!(caps & RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT))
212d30ea906Sjfb8856606 			t->internal_port = 0;
213d30ea906Sjfb8856606 
2144418919fSjohnjiang 		ret = rte_eth_dev_info_get(i, &dev_info);
2154418919fSjohnjiang 		if (ret != 0) {
2164418919fSjohnjiang 			evt_err("Error during getting device (port %u) info: %s\n",
2174418919fSjohnjiang 				i, strerror(-ret));
2184418919fSjohnjiang 			return ret;
2194418919fSjohnjiang 		}
2204418919fSjohnjiang 
221*2d9fd380Sjfb8856606 		/* Enable mbuf fast free if PMD has the capability. */
222*2d9fd380Sjfb8856606 		if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
223*2d9fd380Sjfb8856606 			local_port_conf.txmode.offloads |=
224*2d9fd380Sjfb8856606 				DEV_TX_OFFLOAD_MBUF_FAST_FREE;
225*2d9fd380Sjfb8856606 
226d30ea906Sjfb8856606 		rx_conf = dev_info.default_rxconf;
227d30ea906Sjfb8856606 		rx_conf.offloads = port_conf.rxmode.offloads;
228d30ea906Sjfb8856606 
229d30ea906Sjfb8856606 		local_port_conf.rx_adv_conf.rss_conf.rss_hf &=
230d30ea906Sjfb8856606 			dev_info.flow_type_rss_offloads;
231d30ea906Sjfb8856606 		if (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=
232d30ea906Sjfb8856606 				port_conf.rx_adv_conf.rss_conf.rss_hf) {
233d30ea906Sjfb8856606 			evt_info("Port %u modified RSS hash function based on hardware support,"
234d30ea906Sjfb8856606 				"requested:%#"PRIx64" configured:%#"PRIx64"",
235d30ea906Sjfb8856606 				i,
236d30ea906Sjfb8856606 				port_conf.rx_adv_conf.rss_conf.rss_hf,
237d30ea906Sjfb8856606 				local_port_conf.rx_adv_conf.rss_conf.rss_hf);
238d30ea906Sjfb8856606 		}
239d30ea906Sjfb8856606 
240d30ea906Sjfb8856606 		if (rte_eth_dev_configure(i, nb_queues, nb_queues,
241d30ea906Sjfb8856606 					&local_port_conf)
242d30ea906Sjfb8856606 				< 0) {
243d30ea906Sjfb8856606 			evt_err("Failed to configure eth port [%d]", i);
244d30ea906Sjfb8856606 			return -EINVAL;
245d30ea906Sjfb8856606 		}
246d30ea906Sjfb8856606 
247d30ea906Sjfb8856606 		if (rte_eth_rx_queue_setup(i, 0, NB_RX_DESC,
248d30ea906Sjfb8856606 				rte_socket_id(), &rx_conf, t->pool) < 0) {
249d30ea906Sjfb8856606 			evt_err("Failed to setup eth port [%d] rx_queue: %d.",
250d30ea906Sjfb8856606 					i, 0);
251d30ea906Sjfb8856606 			return -EINVAL;
252d30ea906Sjfb8856606 		}
253d30ea906Sjfb8856606 		if (rte_eth_tx_queue_setup(i, 0, NB_TX_DESC,
254d30ea906Sjfb8856606 					rte_socket_id(), NULL) < 0) {
255d30ea906Sjfb8856606 			evt_err("Failed to setup eth port [%d] tx_queue: %d.",
256d30ea906Sjfb8856606 					i, 0);
257d30ea906Sjfb8856606 			return -EINVAL;
258d30ea906Sjfb8856606 		}
259d30ea906Sjfb8856606 
2604418919fSjohnjiang 		ret = rte_eth_promiscuous_enable(i);
2614418919fSjohnjiang 		if (ret != 0) {
2624418919fSjohnjiang 			evt_err("Failed to enable promiscuous mode for eth port [%d]: %s",
2634418919fSjohnjiang 				i, rte_strerror(-ret));
2644418919fSjohnjiang 			return ret;
2654418919fSjohnjiang 		}
266d30ea906Sjfb8856606 	}
267d30ea906Sjfb8856606 
268d30ea906Sjfb8856606 	return 0;
269d30ea906Sjfb8856606 }
270d30ea906Sjfb8856606 
271d30ea906Sjfb8856606 int
pipeline_event_port_setup(struct evt_test * test,struct evt_options * opt,uint8_t * queue_arr,uint8_t nb_queues,const struct rte_event_port_conf p_conf)272d30ea906Sjfb8856606 pipeline_event_port_setup(struct evt_test *test, struct evt_options *opt,
273d30ea906Sjfb8856606 		uint8_t *queue_arr, uint8_t nb_queues,
274d30ea906Sjfb8856606 		const struct rte_event_port_conf p_conf)
275d30ea906Sjfb8856606 {
276d30ea906Sjfb8856606 	int ret;
277d30ea906Sjfb8856606 	uint8_t port;
278d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
279d30ea906Sjfb8856606 
280d30ea906Sjfb8856606 
281d30ea906Sjfb8856606 	/* setup one port per worker, linking to all queues */
282d30ea906Sjfb8856606 	for (port = 0; port < evt_nr_active_lcores(opt->wlcores); port++) {
283d30ea906Sjfb8856606 		struct worker_data *w = &t->worker[port];
284d30ea906Sjfb8856606 
285d30ea906Sjfb8856606 		w->dev_id = opt->dev_id;
286d30ea906Sjfb8856606 		w->port_id = port;
287d30ea906Sjfb8856606 		w->t = t;
288d30ea906Sjfb8856606 		w->processed_pkts = 0;
289d30ea906Sjfb8856606 
290d30ea906Sjfb8856606 		ret = rte_event_port_setup(opt->dev_id, port, &p_conf);
291d30ea906Sjfb8856606 		if (ret) {
292d30ea906Sjfb8856606 			evt_err("failed to setup port %d", port);
293d30ea906Sjfb8856606 			return ret;
294d30ea906Sjfb8856606 		}
295d30ea906Sjfb8856606 
296d30ea906Sjfb8856606 		if (rte_event_port_link(opt->dev_id, port, queue_arr, NULL,
297d30ea906Sjfb8856606 					nb_queues) != nb_queues)
298d30ea906Sjfb8856606 			goto link_fail;
299d30ea906Sjfb8856606 	}
300d30ea906Sjfb8856606 
301d30ea906Sjfb8856606 	return 0;
302d30ea906Sjfb8856606 
303d30ea906Sjfb8856606 link_fail:
304d30ea906Sjfb8856606 	evt_err("failed to link queues to port %d", port);
305d30ea906Sjfb8856606 	return -EINVAL;
306d30ea906Sjfb8856606 }
307d30ea906Sjfb8856606 
308d30ea906Sjfb8856606 int
pipeline_event_rx_adapter_setup(struct evt_options * opt,uint8_t stride,struct rte_event_port_conf prod_conf)309d30ea906Sjfb8856606 pipeline_event_rx_adapter_setup(struct evt_options *opt, uint8_t stride,
310d30ea906Sjfb8856606 		struct rte_event_port_conf prod_conf)
311d30ea906Sjfb8856606 {
312d30ea906Sjfb8856606 	int ret = 0;
313d30ea906Sjfb8856606 	uint16_t prod;
314d30ea906Sjfb8856606 	struct rte_event_eth_rx_adapter_queue_conf queue_conf;
315d30ea906Sjfb8856606 
316d30ea906Sjfb8856606 	memset(&queue_conf, 0,
317d30ea906Sjfb8856606 			sizeof(struct rte_event_eth_rx_adapter_queue_conf));
318d30ea906Sjfb8856606 	queue_conf.ev.sched_type = opt->sched_type_list[0];
319d30ea906Sjfb8856606 	RTE_ETH_FOREACH_DEV(prod) {
320d30ea906Sjfb8856606 		uint32_t cap;
321d30ea906Sjfb8856606 
322d30ea906Sjfb8856606 		ret = rte_event_eth_rx_adapter_caps_get(opt->dev_id,
323d30ea906Sjfb8856606 				prod, &cap);
324d30ea906Sjfb8856606 		if (ret) {
325d30ea906Sjfb8856606 			evt_err("failed to get event rx adapter[%d]"
326d30ea906Sjfb8856606 					" capabilities",
327d30ea906Sjfb8856606 					opt->dev_id);
328d30ea906Sjfb8856606 			return ret;
329d30ea906Sjfb8856606 		}
330d30ea906Sjfb8856606 		queue_conf.ev.queue_id = prod * stride;
331d30ea906Sjfb8856606 		ret = rte_event_eth_rx_adapter_create(prod, opt->dev_id,
332d30ea906Sjfb8856606 				&prod_conf);
333d30ea906Sjfb8856606 		if (ret) {
334d30ea906Sjfb8856606 			evt_err("failed to create rx adapter[%d]", prod);
335d30ea906Sjfb8856606 			return ret;
336d30ea906Sjfb8856606 		}
337d30ea906Sjfb8856606 		ret = rte_event_eth_rx_adapter_queue_add(prod, prod, -1,
338d30ea906Sjfb8856606 				&queue_conf);
339d30ea906Sjfb8856606 		if (ret) {
340d30ea906Sjfb8856606 			evt_err("failed to add rx queues to adapter[%d]", prod);
341d30ea906Sjfb8856606 			return ret;
342d30ea906Sjfb8856606 		}
343d30ea906Sjfb8856606 
344d30ea906Sjfb8856606 		if (!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) {
3454418919fSjohnjiang 			uint32_t service_id = -1U;
346d30ea906Sjfb8856606 
347d30ea906Sjfb8856606 			rte_event_eth_rx_adapter_service_id_get(prod,
348d30ea906Sjfb8856606 					&service_id);
349d30ea906Sjfb8856606 			ret = evt_service_setup(service_id);
350d30ea906Sjfb8856606 			if (ret) {
351d30ea906Sjfb8856606 				evt_err("Failed to setup service core"
352d30ea906Sjfb8856606 						" for Rx adapter");
353d30ea906Sjfb8856606 				return ret;
354d30ea906Sjfb8856606 			}
355d30ea906Sjfb8856606 		}
356d30ea906Sjfb8856606 
357d30ea906Sjfb8856606 		evt_info("Port[%d] using Rx adapter[%d] configured", prod,
358d30ea906Sjfb8856606 				prod);
359d30ea906Sjfb8856606 	}
360d30ea906Sjfb8856606 
361d30ea906Sjfb8856606 	return ret;
362d30ea906Sjfb8856606 }
363d30ea906Sjfb8856606 
364d30ea906Sjfb8856606 int
pipeline_event_tx_adapter_setup(struct evt_options * opt,struct rte_event_port_conf port_conf)365d30ea906Sjfb8856606 pipeline_event_tx_adapter_setup(struct evt_options *opt,
366d30ea906Sjfb8856606 		struct rte_event_port_conf port_conf)
367d30ea906Sjfb8856606 {
368d30ea906Sjfb8856606 	int ret = 0;
369d30ea906Sjfb8856606 	uint16_t consm;
370d30ea906Sjfb8856606 
371d30ea906Sjfb8856606 	RTE_ETH_FOREACH_DEV(consm) {
372d30ea906Sjfb8856606 		uint32_t cap;
373d30ea906Sjfb8856606 
374d30ea906Sjfb8856606 		ret = rte_event_eth_tx_adapter_caps_get(opt->dev_id,
375d30ea906Sjfb8856606 				consm, &cap);
376d30ea906Sjfb8856606 		if (ret) {
377d30ea906Sjfb8856606 			evt_err("failed to get event tx adapter[%d] caps",
378d30ea906Sjfb8856606 					consm);
379d30ea906Sjfb8856606 			return ret;
380d30ea906Sjfb8856606 		}
381d30ea906Sjfb8856606 
382d30ea906Sjfb8856606 		ret = rte_event_eth_tx_adapter_create(consm, opt->dev_id,
383d30ea906Sjfb8856606 				&port_conf);
384d30ea906Sjfb8856606 		if (ret) {
385d30ea906Sjfb8856606 			evt_err("failed to create tx adapter[%d]", consm);
386d30ea906Sjfb8856606 			return ret;
387d30ea906Sjfb8856606 		}
388d30ea906Sjfb8856606 
389d30ea906Sjfb8856606 		ret = rte_event_eth_tx_adapter_queue_add(consm, consm, -1);
390d30ea906Sjfb8856606 		if (ret) {
391d30ea906Sjfb8856606 			evt_err("failed to add tx queues to adapter[%d]",
392d30ea906Sjfb8856606 					consm);
393d30ea906Sjfb8856606 			return ret;
394d30ea906Sjfb8856606 		}
395d30ea906Sjfb8856606 
396d30ea906Sjfb8856606 		if (!(cap & RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT)) {
3974418919fSjohnjiang 			uint32_t service_id = -1U;
398d30ea906Sjfb8856606 
3990c6bd470Sfengbojiang 			ret = rte_event_eth_tx_adapter_service_id_get(consm,
400d30ea906Sjfb8856606 								   &service_id);
4010c6bd470Sfengbojiang 			if (ret != -ESRCH && ret != 0) {
4020c6bd470Sfengbojiang 				evt_err("Failed to get Tx adptr service ID");
4030c6bd470Sfengbojiang 				return ret;
4040c6bd470Sfengbojiang 			}
405d30ea906Sjfb8856606 			ret = evt_service_setup(service_id);
406d30ea906Sjfb8856606 			if (ret) {
407d30ea906Sjfb8856606 				evt_err("Failed to setup service core"
4080c6bd470Sfengbojiang 						" for Tx adapter");
409d30ea906Sjfb8856606 				return ret;
410d30ea906Sjfb8856606 			}
411d30ea906Sjfb8856606 		}
412d30ea906Sjfb8856606 
413d30ea906Sjfb8856606 		evt_info("Port[%d] using Tx adapter[%d] Configured", consm,
414d30ea906Sjfb8856606 				consm);
415d30ea906Sjfb8856606 	}
416d30ea906Sjfb8856606 
417d30ea906Sjfb8856606 	return ret;
418d30ea906Sjfb8856606 }
419d30ea906Sjfb8856606 
420d30ea906Sjfb8856606 void
pipeline_ethdev_destroy(struct evt_test * test,struct evt_options * opt)421d30ea906Sjfb8856606 pipeline_ethdev_destroy(struct evt_test *test, struct evt_options *opt)
422d30ea906Sjfb8856606 {
423d30ea906Sjfb8856606 	uint16_t i;
424d30ea906Sjfb8856606 	RTE_SET_USED(test);
425d30ea906Sjfb8856606 	RTE_SET_USED(opt);
426d30ea906Sjfb8856606 
427d30ea906Sjfb8856606 	RTE_ETH_FOREACH_DEV(i) {
428d30ea906Sjfb8856606 		rte_event_eth_rx_adapter_stop(i);
429d30ea906Sjfb8856606 		rte_event_eth_tx_adapter_stop(i);
430d30ea906Sjfb8856606 		rte_eth_dev_stop(i);
431d30ea906Sjfb8856606 	}
432d30ea906Sjfb8856606 }
433d30ea906Sjfb8856606 
434d30ea906Sjfb8856606 void
pipeline_eventdev_destroy(struct evt_test * test,struct evt_options * opt)435d30ea906Sjfb8856606 pipeline_eventdev_destroy(struct evt_test *test, struct evt_options *opt)
436d30ea906Sjfb8856606 {
437d30ea906Sjfb8856606 	RTE_SET_USED(test);
438d30ea906Sjfb8856606 
4394418919fSjohnjiang 	rte_event_dev_stop(opt->dev_id);
440d30ea906Sjfb8856606 	rte_event_dev_close(opt->dev_id);
441d30ea906Sjfb8856606 }
442d30ea906Sjfb8856606 
443d30ea906Sjfb8856606 int
pipeline_mempool_setup(struct evt_test * test,struct evt_options * opt)444d30ea906Sjfb8856606 pipeline_mempool_setup(struct evt_test *test, struct evt_options *opt)
445d30ea906Sjfb8856606 {
446d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
4474418919fSjohnjiang 	int i, ret;
4484418919fSjohnjiang 
4494418919fSjohnjiang 	if (!opt->mbuf_sz)
4504418919fSjohnjiang 		opt->mbuf_sz = RTE_MBUF_DEFAULT_BUF_SIZE;
4514418919fSjohnjiang 
4524418919fSjohnjiang 	if (!opt->max_pkt_sz)
4534418919fSjohnjiang 		opt->max_pkt_sz = RTE_ETHER_MAX_LEN;
4544418919fSjohnjiang 
4554418919fSjohnjiang 	RTE_ETH_FOREACH_DEV(i) {
4564418919fSjohnjiang 		struct rte_eth_dev_info dev_info;
4574418919fSjohnjiang 		uint16_t data_size = 0;
4584418919fSjohnjiang 
4594418919fSjohnjiang 		memset(&dev_info, 0, sizeof(dev_info));
4604418919fSjohnjiang 		ret = rte_eth_dev_info_get(i, &dev_info);
4614418919fSjohnjiang 		if (ret != 0) {
4624418919fSjohnjiang 			evt_err("Error during getting device (port %u) info: %s\n",
4634418919fSjohnjiang 				i, strerror(-ret));
4644418919fSjohnjiang 			return ret;
4654418919fSjohnjiang 		}
4664418919fSjohnjiang 
4674418919fSjohnjiang 		if (dev_info.rx_desc_lim.nb_mtu_seg_max != UINT16_MAX &&
4684418919fSjohnjiang 				dev_info.rx_desc_lim.nb_mtu_seg_max != 0) {
4694418919fSjohnjiang 			data_size = opt->max_pkt_sz /
4704418919fSjohnjiang 				dev_info.rx_desc_lim.nb_mtu_seg_max;
4714418919fSjohnjiang 			data_size += RTE_PKTMBUF_HEADROOM;
4724418919fSjohnjiang 
4734418919fSjohnjiang 			if (data_size  > opt->mbuf_sz)
4744418919fSjohnjiang 				opt->mbuf_sz = data_size;
4754418919fSjohnjiang 		}
4764418919fSjohnjiang 	}
477d30ea906Sjfb8856606 
478d30ea906Sjfb8856606 	t->pool = rte_pktmbuf_pool_create(test->name, /* mempool name */
479d30ea906Sjfb8856606 			opt->pool_sz, /* number of elements*/
480d30ea906Sjfb8856606 			512, /* cache size*/
481d30ea906Sjfb8856606 			0,
4824418919fSjohnjiang 			opt->mbuf_sz,
483d30ea906Sjfb8856606 			opt->socket_id); /* flags */
484d30ea906Sjfb8856606 
485d30ea906Sjfb8856606 	if (t->pool == NULL) {
486d30ea906Sjfb8856606 		evt_err("failed to create mempool");
487d30ea906Sjfb8856606 		return -ENOMEM;
488d30ea906Sjfb8856606 	}
489d30ea906Sjfb8856606 
490d30ea906Sjfb8856606 	return 0;
491d30ea906Sjfb8856606 }
492d30ea906Sjfb8856606 
493d30ea906Sjfb8856606 void
pipeline_mempool_destroy(struct evt_test * test,struct evt_options * opt)494d30ea906Sjfb8856606 pipeline_mempool_destroy(struct evt_test *test, struct evt_options *opt)
495d30ea906Sjfb8856606 {
496d30ea906Sjfb8856606 	RTE_SET_USED(opt);
497d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
498d30ea906Sjfb8856606 
499d30ea906Sjfb8856606 	rte_mempool_free(t->pool);
500d30ea906Sjfb8856606 }
501d30ea906Sjfb8856606 
502d30ea906Sjfb8856606 int
pipeline_test_setup(struct evt_test * test,struct evt_options * opt)503d30ea906Sjfb8856606 pipeline_test_setup(struct evt_test *test, struct evt_options *opt)
504d30ea906Sjfb8856606 {
505d30ea906Sjfb8856606 	void *test_pipeline;
506d30ea906Sjfb8856606 
507d30ea906Sjfb8856606 	test_pipeline = rte_zmalloc_socket(test->name,
508d30ea906Sjfb8856606 			sizeof(struct test_pipeline), RTE_CACHE_LINE_SIZE,
509d30ea906Sjfb8856606 			opt->socket_id);
510d30ea906Sjfb8856606 	if (test_pipeline  == NULL) {
511d30ea906Sjfb8856606 		evt_err("failed to allocate test_pipeline memory");
512d30ea906Sjfb8856606 		goto nomem;
513d30ea906Sjfb8856606 	}
514d30ea906Sjfb8856606 	test->test_priv = test_pipeline;
515d30ea906Sjfb8856606 
516d30ea906Sjfb8856606 	struct test_pipeline *t = evt_test_priv(test);
517d30ea906Sjfb8856606 
518d30ea906Sjfb8856606 	t->nb_workers = evt_nr_active_lcores(opt->wlcores);
519d30ea906Sjfb8856606 	t->outstand_pkts = opt->nb_pkts * evt_nr_active_lcores(opt->wlcores);
520d30ea906Sjfb8856606 	t->done = false;
521d30ea906Sjfb8856606 	t->nb_flows = opt->nb_flows;
522d30ea906Sjfb8856606 	t->result = EVT_TEST_FAILED;
523d30ea906Sjfb8856606 	t->opt = opt;
524d30ea906Sjfb8856606 	opt->prod_type = EVT_PROD_TYPE_ETH_RX_ADPTR;
525d30ea906Sjfb8856606 	memcpy(t->sched_type_list, opt->sched_type_list,
526d30ea906Sjfb8856606 			sizeof(opt->sched_type_list));
527d30ea906Sjfb8856606 	return 0;
528d30ea906Sjfb8856606 nomem:
529d30ea906Sjfb8856606 	return -ENOMEM;
530d30ea906Sjfb8856606 }
531d30ea906Sjfb8856606 
532d30ea906Sjfb8856606 void
pipeline_test_destroy(struct evt_test * test,struct evt_options * opt)533d30ea906Sjfb8856606 pipeline_test_destroy(struct evt_test *test, struct evt_options *opt)
534d30ea906Sjfb8856606 {
535d30ea906Sjfb8856606 	RTE_SET_USED(opt);
536d30ea906Sjfb8856606 
537d30ea906Sjfb8856606 	rte_free(test->test_priv);
538d30ea906Sjfb8856606 }
539