1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause
2d30ea906Sjfb8856606 * Copyright(c) 2017 Cavium, Inc
32bfe3f2eSlogwang */
42bfe3f2eSlogwang
52bfe3f2eSlogwang #include "test_perf_common.h"
62bfe3f2eSlogwang
7d30ea906Sjfb8856606 /* See http://doc.dpdk.org/guides/tools/testeventdev.html for test details */
82bfe3f2eSlogwang
92bfe3f2eSlogwang static inline int
atq_nb_event_queues(struct evt_options * opt)102bfe3f2eSlogwang atq_nb_event_queues(struct evt_options *opt)
112bfe3f2eSlogwang {
122bfe3f2eSlogwang /* nb_queues = number of producers */
13d30ea906Sjfb8856606 return opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR ?
14d30ea906Sjfb8856606 rte_eth_dev_count_avail() : evt_nr_active_lcores(opt->plcores);
152bfe3f2eSlogwang }
162bfe3f2eSlogwang
17*2d9fd380Sjfb8856606 static __rte_always_inline void
atq_mark_fwd_latency(struct rte_event * const ev)182bfe3f2eSlogwang atq_mark_fwd_latency(struct rte_event *const ev)
192bfe3f2eSlogwang {
202bfe3f2eSlogwang if (unlikely(ev->sub_event_type == 0)) {
212bfe3f2eSlogwang struct perf_elt *const m = ev->event_ptr;
222bfe3f2eSlogwang
232bfe3f2eSlogwang m->timestamp = rte_get_timer_cycles();
242bfe3f2eSlogwang }
252bfe3f2eSlogwang }
262bfe3f2eSlogwang
27*2d9fd380Sjfb8856606 static __rte_always_inline void
atq_fwd_event(struct rte_event * const ev,uint8_t * const sched_type_list,const uint8_t nb_stages)282bfe3f2eSlogwang atq_fwd_event(struct rte_event *const ev, uint8_t *const sched_type_list,
292bfe3f2eSlogwang const uint8_t nb_stages)
302bfe3f2eSlogwang {
312bfe3f2eSlogwang ev->sub_event_type++;
322bfe3f2eSlogwang ev->sched_type = sched_type_list[ev->sub_event_type % nb_stages];
332bfe3f2eSlogwang ev->op = RTE_EVENT_OP_FORWARD;
342bfe3f2eSlogwang ev->event_type = RTE_EVENT_TYPE_CPU;
352bfe3f2eSlogwang }
362bfe3f2eSlogwang
372bfe3f2eSlogwang static int
perf_atq_worker(void * arg,const int enable_fwd_latency)382bfe3f2eSlogwang perf_atq_worker(void *arg, const int enable_fwd_latency)
392bfe3f2eSlogwang {
402bfe3f2eSlogwang PERF_WORKER_INIT;
412bfe3f2eSlogwang struct rte_event ev;
422bfe3f2eSlogwang
432bfe3f2eSlogwang while (t->done == false) {
442bfe3f2eSlogwang uint16_t event = rte_event_dequeue_burst(dev, port, &ev, 1, 0);
452bfe3f2eSlogwang
462bfe3f2eSlogwang if (!event) {
472bfe3f2eSlogwang rte_pause();
482bfe3f2eSlogwang continue;
492bfe3f2eSlogwang }
502bfe3f2eSlogwang
51d30ea906Sjfb8856606 if (enable_fwd_latency && !prod_timer_type)
522bfe3f2eSlogwang /* first stage in pipeline, mark ts to compute fwd latency */
532bfe3f2eSlogwang atq_mark_fwd_latency(&ev);
542bfe3f2eSlogwang
552bfe3f2eSlogwang /* last stage in pipeline */
562bfe3f2eSlogwang if (unlikely((ev.sub_event_type % nb_stages) == laststage)) {
572bfe3f2eSlogwang if (enable_fwd_latency)
582bfe3f2eSlogwang cnt = perf_process_last_stage_latency(pool,
592bfe3f2eSlogwang &ev, w, bufs, sz, cnt);
602bfe3f2eSlogwang else
612bfe3f2eSlogwang cnt = perf_process_last_stage(pool, &ev, w,
622bfe3f2eSlogwang bufs, sz, cnt);
632bfe3f2eSlogwang } else {
642bfe3f2eSlogwang atq_fwd_event(&ev, sched_type_list, nb_stages);
652bfe3f2eSlogwang while (rte_event_enqueue_burst(dev, port, &ev, 1) != 1)
662bfe3f2eSlogwang rte_pause();
672bfe3f2eSlogwang }
682bfe3f2eSlogwang }
692bfe3f2eSlogwang return 0;
702bfe3f2eSlogwang }
712bfe3f2eSlogwang
722bfe3f2eSlogwang static int
perf_atq_worker_burst(void * arg,const int enable_fwd_latency)732bfe3f2eSlogwang perf_atq_worker_burst(void *arg, const int enable_fwd_latency)
742bfe3f2eSlogwang {
752bfe3f2eSlogwang PERF_WORKER_INIT;
762bfe3f2eSlogwang uint16_t i;
772bfe3f2eSlogwang /* +1 to avoid prefetch out of array check */
782bfe3f2eSlogwang struct rte_event ev[BURST_SIZE + 1];
792bfe3f2eSlogwang
802bfe3f2eSlogwang while (t->done == false) {
812bfe3f2eSlogwang uint16_t const nb_rx = rte_event_dequeue_burst(dev, port, ev,
822bfe3f2eSlogwang BURST_SIZE, 0);
832bfe3f2eSlogwang
842bfe3f2eSlogwang if (!nb_rx) {
852bfe3f2eSlogwang rte_pause();
862bfe3f2eSlogwang continue;
872bfe3f2eSlogwang }
882bfe3f2eSlogwang
892bfe3f2eSlogwang for (i = 0; i < nb_rx; i++) {
90d30ea906Sjfb8856606 if (enable_fwd_latency && !prod_timer_type) {
912bfe3f2eSlogwang rte_prefetch0(ev[i+1].event_ptr);
922bfe3f2eSlogwang /* first stage in pipeline.
932bfe3f2eSlogwang * mark time stamp to compute fwd latency
942bfe3f2eSlogwang */
952bfe3f2eSlogwang atq_mark_fwd_latency(&ev[i]);
962bfe3f2eSlogwang }
972bfe3f2eSlogwang /* last stage in pipeline */
982bfe3f2eSlogwang if (unlikely((ev[i].sub_event_type % nb_stages)
992bfe3f2eSlogwang == laststage)) {
1002bfe3f2eSlogwang if (enable_fwd_latency)
1012bfe3f2eSlogwang cnt = perf_process_last_stage_latency(
1022bfe3f2eSlogwang pool, &ev[i], w, bufs, sz, cnt);
1032bfe3f2eSlogwang else
1042bfe3f2eSlogwang cnt = perf_process_last_stage(pool,
1052bfe3f2eSlogwang &ev[i], w, bufs, sz, cnt);
1062bfe3f2eSlogwang
1072bfe3f2eSlogwang ev[i].op = RTE_EVENT_OP_RELEASE;
1082bfe3f2eSlogwang } else {
1092bfe3f2eSlogwang atq_fwd_event(&ev[i], sched_type_list,
1102bfe3f2eSlogwang nb_stages);
1112bfe3f2eSlogwang }
1122bfe3f2eSlogwang }
1132bfe3f2eSlogwang
1142bfe3f2eSlogwang uint16_t enq;
1152bfe3f2eSlogwang
1162bfe3f2eSlogwang enq = rte_event_enqueue_burst(dev, port, ev, nb_rx);
1172bfe3f2eSlogwang while (enq < nb_rx) {
1182bfe3f2eSlogwang enq += rte_event_enqueue_burst(dev, port,
1192bfe3f2eSlogwang ev + enq, nb_rx - enq);
1202bfe3f2eSlogwang }
1212bfe3f2eSlogwang }
1222bfe3f2eSlogwang return 0;
1232bfe3f2eSlogwang }
1242bfe3f2eSlogwang
1252bfe3f2eSlogwang static int
worker_wrapper(void * arg)1262bfe3f2eSlogwang worker_wrapper(void *arg)
1272bfe3f2eSlogwang {
1282bfe3f2eSlogwang struct worker_data *w = arg;
1292bfe3f2eSlogwang struct evt_options *opt = w->t->opt;
1302bfe3f2eSlogwang
1312bfe3f2eSlogwang const bool burst = evt_has_burst_mode(w->dev_id);
1322bfe3f2eSlogwang const int fwd_latency = opt->fwd_latency;
1332bfe3f2eSlogwang
1342bfe3f2eSlogwang /* allow compiler to optimize */
1352bfe3f2eSlogwang if (!burst && !fwd_latency)
1362bfe3f2eSlogwang return perf_atq_worker(arg, 0);
1372bfe3f2eSlogwang else if (!burst && fwd_latency)
1382bfe3f2eSlogwang return perf_atq_worker(arg, 1);
1392bfe3f2eSlogwang else if (burst && !fwd_latency)
1402bfe3f2eSlogwang return perf_atq_worker_burst(arg, 0);
1412bfe3f2eSlogwang else if (burst && fwd_latency)
1422bfe3f2eSlogwang return perf_atq_worker_burst(arg, 1);
1432bfe3f2eSlogwang
1442bfe3f2eSlogwang rte_panic("invalid worker\n");
1452bfe3f2eSlogwang }
1462bfe3f2eSlogwang
1472bfe3f2eSlogwang static int
perf_atq_launch_lcores(struct evt_test * test,struct evt_options * opt)1482bfe3f2eSlogwang perf_atq_launch_lcores(struct evt_test *test, struct evt_options *opt)
1492bfe3f2eSlogwang {
1502bfe3f2eSlogwang return perf_launch_lcores(test, opt, worker_wrapper);
1512bfe3f2eSlogwang }
1522bfe3f2eSlogwang
1532bfe3f2eSlogwang static int
perf_atq_eventdev_setup(struct evt_test * test,struct evt_options * opt)1542bfe3f2eSlogwang perf_atq_eventdev_setup(struct evt_test *test, struct evt_options *opt)
1552bfe3f2eSlogwang {
1562bfe3f2eSlogwang int ret;
1572bfe3f2eSlogwang uint8_t queue;
158d30ea906Sjfb8856606 uint8_t nb_queues;
159d30ea906Sjfb8856606 uint8_t nb_ports;
1604418919fSjohnjiang uint16_t prod;
161d30ea906Sjfb8856606 struct rte_event_dev_info dev_info;
1624418919fSjohnjiang struct test_perf *t = evt_test_priv(test);
163d30ea906Sjfb8856606
164d30ea906Sjfb8856606 nb_ports = evt_nr_active_lcores(opt->wlcores);
165d30ea906Sjfb8856606 nb_ports += (opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR ||
166d30ea906Sjfb8856606 opt->prod_type == EVT_PROD_TYPE_EVENT_TIMER_ADPTR) ? 0 :
167d30ea906Sjfb8856606 evt_nr_active_lcores(opt->plcores);
168d30ea906Sjfb8856606
169d30ea906Sjfb8856606 nb_queues = atq_nb_event_queues(opt);
170d30ea906Sjfb8856606
171d30ea906Sjfb8856606 memset(&dev_info, 0, sizeof(struct rte_event_dev_info));
172d30ea906Sjfb8856606 ret = rte_event_dev_info_get(opt->dev_id, &dev_info);
173d30ea906Sjfb8856606 if (ret) {
174d30ea906Sjfb8856606 evt_err("failed to get eventdev info %d", opt->dev_id);
175d30ea906Sjfb8856606 return ret;
176d30ea906Sjfb8856606 }
1772bfe3f2eSlogwang
1784418919fSjohnjiang ret = evt_configure_eventdev(opt, nb_queues, nb_ports);
1792bfe3f2eSlogwang if (ret) {
1802bfe3f2eSlogwang evt_err("failed to configure eventdev %d", opt->dev_id);
1812bfe3f2eSlogwang return ret;
1822bfe3f2eSlogwang }
1832bfe3f2eSlogwang
1842bfe3f2eSlogwang struct rte_event_queue_conf q_conf = {
1852bfe3f2eSlogwang .priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
1862bfe3f2eSlogwang .event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES,
1872bfe3f2eSlogwang .nb_atomic_flows = opt->nb_flows,
1882bfe3f2eSlogwang .nb_atomic_order_sequences = opt->nb_flows,
1892bfe3f2eSlogwang };
1902bfe3f2eSlogwang /* queue configurations */
191d30ea906Sjfb8856606 for (queue = 0; queue < nb_queues; queue++) {
1922bfe3f2eSlogwang ret = rte_event_queue_setup(opt->dev_id, queue, &q_conf);
1932bfe3f2eSlogwang if (ret) {
1942bfe3f2eSlogwang evt_err("failed to setup queue=%d", queue);
1952bfe3f2eSlogwang return ret;
1962bfe3f2eSlogwang }
1972bfe3f2eSlogwang }
1982bfe3f2eSlogwang
199d30ea906Sjfb8856606 if (opt->wkr_deq_dep > dev_info.max_event_port_dequeue_depth)
200d30ea906Sjfb8856606 opt->wkr_deq_dep = dev_info.max_event_port_dequeue_depth;
201d30ea906Sjfb8856606
202d30ea906Sjfb8856606 /* port configuration */
203d30ea906Sjfb8856606 const struct rte_event_port_conf p_conf = {
204d30ea906Sjfb8856606 .dequeue_depth = opt->wkr_deq_dep,
205d30ea906Sjfb8856606 .enqueue_depth = dev_info.max_event_port_dequeue_depth,
206d30ea906Sjfb8856606 .new_event_threshold = dev_info.max_num_events,
207d30ea906Sjfb8856606 };
208d30ea906Sjfb8856606
209d30ea906Sjfb8856606 ret = perf_event_dev_port_setup(test, opt, 1 /* stride */, nb_queues,
210d30ea906Sjfb8856606 &p_conf);
2112bfe3f2eSlogwang if (ret)
2122bfe3f2eSlogwang return ret;
2132bfe3f2eSlogwang
214d30ea906Sjfb8856606 if (!evt_has_distributed_sched(opt->dev_id)) {
215d30ea906Sjfb8856606 uint32_t service_id;
216d30ea906Sjfb8856606 rte_event_dev_service_id_get(opt->dev_id, &service_id);
217d30ea906Sjfb8856606 ret = evt_service_setup(service_id);
2182bfe3f2eSlogwang if (ret) {
2192bfe3f2eSlogwang evt_err("No service lcore found to run event dev.");
2202bfe3f2eSlogwang return ret;
2212bfe3f2eSlogwang }
222d30ea906Sjfb8856606 }
2232bfe3f2eSlogwang
2242bfe3f2eSlogwang ret = rte_event_dev_start(opt->dev_id);
2252bfe3f2eSlogwang if (ret) {
2262bfe3f2eSlogwang evt_err("failed to start eventdev %d", opt->dev_id);
2272bfe3f2eSlogwang return ret;
2282bfe3f2eSlogwang }
2292bfe3f2eSlogwang
2304418919fSjohnjiang if (opt->prod_type == EVT_PROD_TYPE_ETH_RX_ADPTR) {
2314418919fSjohnjiang RTE_ETH_FOREACH_DEV(prod) {
2324418919fSjohnjiang ret = rte_eth_dev_start(prod);
2334418919fSjohnjiang if (ret) {
2344418919fSjohnjiang evt_err("Ethernet dev [%d] failed to start. Using synthetic producer",
2354418919fSjohnjiang prod);
2364418919fSjohnjiang return ret;
2374418919fSjohnjiang }
2384418919fSjohnjiang
2394418919fSjohnjiang ret = rte_event_eth_rx_adapter_start(prod);
2404418919fSjohnjiang if (ret) {
2414418919fSjohnjiang evt_err("Rx adapter[%d] start failed", prod);
2424418919fSjohnjiang return ret;
2434418919fSjohnjiang }
2444418919fSjohnjiang printf("%s: Port[%d] using Rx adapter[%d] started\n",
2454418919fSjohnjiang __func__, prod, prod);
2464418919fSjohnjiang }
2474418919fSjohnjiang } else if (opt->prod_type == EVT_PROD_TYPE_EVENT_TIMER_ADPTR) {
2484418919fSjohnjiang for (prod = 0; prod < opt->nb_timer_adptrs; prod++) {
2494418919fSjohnjiang ret = rte_event_timer_adapter_start(
2504418919fSjohnjiang t->timer_adptr[prod]);
2514418919fSjohnjiang if (ret) {
2524418919fSjohnjiang evt_err("failed to Start event timer adapter %d"
2534418919fSjohnjiang , prod);
2544418919fSjohnjiang return ret;
2554418919fSjohnjiang }
2564418919fSjohnjiang }
2574418919fSjohnjiang }
2584418919fSjohnjiang
2592bfe3f2eSlogwang return 0;
2602bfe3f2eSlogwang }
2612bfe3f2eSlogwang
2622bfe3f2eSlogwang static void
perf_atq_opt_dump(struct evt_options * opt)2632bfe3f2eSlogwang perf_atq_opt_dump(struct evt_options *opt)
2642bfe3f2eSlogwang {
2652bfe3f2eSlogwang perf_opt_dump(opt, atq_nb_event_queues(opt));
2662bfe3f2eSlogwang }
2672bfe3f2eSlogwang
2682bfe3f2eSlogwang static int
perf_atq_opt_check(struct evt_options * opt)2692bfe3f2eSlogwang perf_atq_opt_check(struct evt_options *opt)
2702bfe3f2eSlogwang {
2712bfe3f2eSlogwang return perf_opt_check(opt, atq_nb_event_queues(opt));
2722bfe3f2eSlogwang }
2732bfe3f2eSlogwang
2742bfe3f2eSlogwang static bool
perf_atq_capability_check(struct evt_options * opt)2752bfe3f2eSlogwang perf_atq_capability_check(struct evt_options *opt)
2762bfe3f2eSlogwang {
2772bfe3f2eSlogwang struct rte_event_dev_info dev_info;
2782bfe3f2eSlogwang
2792bfe3f2eSlogwang rte_event_dev_info_get(opt->dev_id, &dev_info);
2802bfe3f2eSlogwang if (dev_info.max_event_queues < atq_nb_event_queues(opt) ||
2812bfe3f2eSlogwang dev_info.max_event_ports < perf_nb_event_ports(opt)) {
2822bfe3f2eSlogwang evt_err("not enough eventdev queues=%d/%d or ports=%d/%d",
2832bfe3f2eSlogwang atq_nb_event_queues(opt), dev_info.max_event_queues,
2842bfe3f2eSlogwang perf_nb_event_ports(opt), dev_info.max_event_ports);
2852bfe3f2eSlogwang }
2862bfe3f2eSlogwang if (!evt_has_all_types_queue(opt->dev_id))
2872bfe3f2eSlogwang return false;
2882bfe3f2eSlogwang
2892bfe3f2eSlogwang return true;
2902bfe3f2eSlogwang }
2912bfe3f2eSlogwang
2922bfe3f2eSlogwang static const struct evt_test_ops perf_atq = {
2932bfe3f2eSlogwang .cap_check = perf_atq_capability_check,
2942bfe3f2eSlogwang .opt_check = perf_atq_opt_check,
2952bfe3f2eSlogwang .opt_dump = perf_atq_opt_dump,
2962bfe3f2eSlogwang .test_setup = perf_test_setup,
297d30ea906Sjfb8856606 .ethdev_setup = perf_ethdev_setup,
2982bfe3f2eSlogwang .mempool_setup = perf_mempool_setup,
2992bfe3f2eSlogwang .eventdev_setup = perf_atq_eventdev_setup,
3002bfe3f2eSlogwang .launch_lcores = perf_atq_launch_lcores,
3012bfe3f2eSlogwang .eventdev_destroy = perf_eventdev_destroy,
3022bfe3f2eSlogwang .mempool_destroy = perf_mempool_destroy,
303d30ea906Sjfb8856606 .ethdev_destroy = perf_ethdev_destroy,
3042bfe3f2eSlogwang .test_result = perf_test_result,
3052bfe3f2eSlogwang .test_destroy = perf_test_destroy,
3062bfe3f2eSlogwang };
3072bfe3f2eSlogwang
3082bfe3f2eSlogwang EVT_TEST_REGISTER(perf_atq);
309