1d30ea906Sjfb8856606 /* SPDX-License-Identifier: BSD-3-Clause 2d30ea906Sjfb8856606 * Copyright(c) 2017 Intel Corporation 3d30ea906Sjfb8856606 */ 4d30ea906Sjfb8856606 5d30ea906Sjfb8856606 #ifndef TEST_BBDEV_VECTOR_H_ 6d30ea906Sjfb8856606 #define TEST_BBDEV_VECTOR_H_ 7d30ea906Sjfb8856606 8d30ea906Sjfb8856606 #include <rte_bbdev_op.h> 9d30ea906Sjfb8856606 10d30ea906Sjfb8856606 /* Flags which are set when specific parameter is define in vector file */ 11d30ea906Sjfb8856606 enum { 12d30ea906Sjfb8856606 TEST_BBDEV_VF_E = (1ULL << 0), 13d30ea906Sjfb8856606 TEST_BBDEV_VF_EA = (1ULL << 1), 14d30ea906Sjfb8856606 TEST_BBDEV_VF_EB = (1ULL << 2), 15d30ea906Sjfb8856606 TEST_BBDEV_VF_K = (1ULL << 3), 16d30ea906Sjfb8856606 TEST_BBDEV_VF_K_NEG = (1ULL << 4), 17d30ea906Sjfb8856606 TEST_BBDEV_VF_K_POS = (1ULL << 5), 18d30ea906Sjfb8856606 TEST_BBDEV_VF_C_NEG = (1ULL << 6), 19d30ea906Sjfb8856606 TEST_BBDEV_VF_C = (1ULL << 7), 20d30ea906Sjfb8856606 TEST_BBDEV_VF_CAB = (1ULL << 8), 21d30ea906Sjfb8856606 TEST_BBDEV_VF_RV_INDEX = (1ULL << 9), 22d30ea906Sjfb8856606 TEST_BBDEV_VF_ITER_MAX = (1ULL << 10), 23d30ea906Sjfb8856606 TEST_BBDEV_VF_ITER_MIN = (1ULL << 11), 24d30ea906Sjfb8856606 TEST_BBDEV_VF_EXPECTED_ITER_COUNT = (1ULL << 12), 25d30ea906Sjfb8856606 TEST_BBDEV_VF_EXT_SCALE = (1ULL << 13), 26d30ea906Sjfb8856606 TEST_BBDEV_VF_NUM_MAPS = (1ULL << 14), 27d30ea906Sjfb8856606 TEST_BBDEV_VF_NCB = (1ULL << 15), 28d30ea906Sjfb8856606 TEST_BBDEV_VF_NCB_NEG = (1ULL << 16), 29d30ea906Sjfb8856606 TEST_BBDEV_VF_NCB_POS = (1ULL << 17), 30d30ea906Sjfb8856606 TEST_BBDEV_VF_R = (1ULL << 18), 31*4418919fSjohnjiang TEST_BBDEV_VF_BG = (1ULL << 19), 32*4418919fSjohnjiang TEST_BBDEV_VF_ZC = (1ULL << 20), 33*4418919fSjohnjiang TEST_BBDEV_VF_F = (1ULL << 21), 34*4418919fSjohnjiang TEST_BBDEV_VF_QM = (1ULL << 22), 35*4418919fSjohnjiang TEST_BBDEV_VF_CODE_BLOCK_MODE = (1ULL << 23), 36*4418919fSjohnjiang TEST_BBDEV_VF_OP_FLAGS = (1ULL << 24), 37*4418919fSjohnjiang TEST_BBDEV_VF_EXPECTED_STATUS = (1ULL << 25), 38d30ea906Sjfb8856606 }; 39d30ea906Sjfb8856606 40d30ea906Sjfb8856606 enum op_data_type { 41d30ea906Sjfb8856606 DATA_INPUT = 0, 42d30ea906Sjfb8856606 DATA_SOFT_OUTPUT, 43d30ea906Sjfb8856606 DATA_HARD_OUTPUT, 44*4418919fSjohnjiang DATA_HARQ_INPUT, 45*4418919fSjohnjiang DATA_HARQ_OUTPUT, 46d30ea906Sjfb8856606 DATA_NUM_TYPES, 47d30ea906Sjfb8856606 }; 48d30ea906Sjfb8856606 49d30ea906Sjfb8856606 struct op_data_buf { 50d30ea906Sjfb8856606 uint32_t *addr; 51d30ea906Sjfb8856606 uint32_t length; 52d30ea906Sjfb8856606 }; 53d30ea906Sjfb8856606 54d30ea906Sjfb8856606 struct op_data_entries { 55*4418919fSjohnjiang struct op_data_buf segments[RTE_BBDEV_TURBO_MAX_CODE_BLOCKS]; 56d30ea906Sjfb8856606 unsigned int nb_segments; 57d30ea906Sjfb8856606 }; 58d30ea906Sjfb8856606 59d30ea906Sjfb8856606 struct test_bbdev_vector { 60d30ea906Sjfb8856606 enum rte_bbdev_op_type op_type; 61d30ea906Sjfb8856606 int expected_status; 62d30ea906Sjfb8856606 int mask; 63d30ea906Sjfb8856606 union { 64d30ea906Sjfb8856606 struct rte_bbdev_op_turbo_dec turbo_dec; 65d30ea906Sjfb8856606 struct rte_bbdev_op_turbo_enc turbo_enc; 66*4418919fSjohnjiang struct rte_bbdev_op_ldpc_dec ldpc_dec; 67*4418919fSjohnjiang struct rte_bbdev_op_ldpc_enc ldpc_enc; 68d30ea906Sjfb8856606 }; 69d30ea906Sjfb8856606 /* Additional storage for op data entries */ 70d30ea906Sjfb8856606 struct op_data_entries entries[DATA_NUM_TYPES]; 71d30ea906Sjfb8856606 }; 72d30ea906Sjfb8856606 73d30ea906Sjfb8856606 /* fills test vector parameters based on test file */ 74d30ea906Sjfb8856606 int 75d30ea906Sjfb8856606 test_bbdev_vector_read(const char *filename, 76d30ea906Sjfb8856606 struct test_bbdev_vector *vector); 77d30ea906Sjfb8856606 78d30ea906Sjfb8856606 79d30ea906Sjfb8856606 #endif /* TEST_BBDEV_VECTOR_H_ */ 80