1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2010-2017 Intel Corporation 3 */ 4 5 #include <ctype.h> 6 #include <errno.h> 7 #include <inttypes.h> 8 #include <stdbool.h> 9 #include <stdint.h> 10 #include <stdlib.h> 11 #include <string.h> 12 #include <sys/queue.h> 13 14 #include <rte_byteorder.h> 15 #include <rte_log.h> 16 #include <rte_debug.h> 17 #include <rte_interrupts.h> 18 #include <rte_memory.h> 19 #include <rte_memcpy.h> 20 #include <rte_memzone.h> 21 #include <rte_launch.h> 22 #include <rte_eal.h> 23 #include <rte_per_lcore.h> 24 #include <rte_lcore.h> 25 #include <rte_branch_prediction.h> 26 #include <rte_common.h> 27 #include <rte_mempool.h> 28 #include <rte_malloc.h> 29 #include <rte_mbuf.h> 30 #include <rte_errno.h> 31 #include <rte_spinlock.h> 32 #include <rte_string_fns.h> 33 #include <rte_kvargs.h> 34 #include <rte_class.h> 35 #include <rte_ether.h> 36 #include <rte_telemetry.h> 37 38 #include "rte_ethdev_trace.h" 39 #include "rte_ethdev.h" 40 #include "ethdev_driver.h" 41 #include "ethdev_profile.h" 42 #include "ethdev_private.h" 43 44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data"; 45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS]; 46 47 /* public fast-path API */ 48 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS]; 49 50 /* spinlock for eth device callbacks */ 51 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER; 52 53 /* spinlock for add/remove rx callbacks */ 54 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER; 55 56 /* spinlock for add/remove tx callbacks */ 57 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER; 58 59 /* spinlock for shared data allocation */ 60 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER; 61 62 /* store statistics names and its offset in stats structure */ 63 struct rte_eth_xstats_name_off { 64 char name[RTE_ETH_XSTATS_NAME_SIZE]; 65 unsigned offset; 66 }; 67 68 /* Shared memory between primary and secondary processes. */ 69 static struct { 70 uint64_t next_owner_id; 71 rte_spinlock_t ownership_lock; 72 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS]; 73 } *eth_dev_shared_data; 74 75 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = { 76 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)}, 77 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)}, 78 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)}, 79 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)}, 80 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)}, 81 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)}, 82 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)}, 83 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats, 84 rx_nombuf)}, 85 }; 86 87 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings) 88 89 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = { 90 {"packets", offsetof(struct rte_eth_stats, q_ipackets)}, 91 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)}, 92 {"errors", offsetof(struct rte_eth_stats, q_errors)}, 93 }; 94 95 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings) 96 97 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = { 98 {"packets", offsetof(struct rte_eth_stats, q_opackets)}, 99 {"bytes", offsetof(struct rte_eth_stats, q_obytes)}, 100 }; 101 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings) 102 103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \ 104 { DEV_RX_OFFLOAD_##_name, #_name } 105 106 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \ 107 { RTE_ETH_RX_OFFLOAD_##_name, #_name } 108 109 static const struct { 110 uint64_t offload; 111 const char *name; 112 } eth_dev_rx_offload_names[] = { 113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP), 114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM), 115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM), 116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM), 117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO), 118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP), 119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM), 120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP), 121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT), 122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER), 123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND), 124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME), 125 RTE_RX_OFFLOAD_BIT2STR(SCATTER), 126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP), 127 RTE_RX_OFFLOAD_BIT2STR(SECURITY), 128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC), 129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM), 130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM), 131 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH), 132 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT), 133 }; 134 135 #undef RTE_RX_OFFLOAD_BIT2STR 136 #undef RTE_ETH_RX_OFFLOAD_BIT2STR 137 138 #define RTE_TX_OFFLOAD_BIT2STR(_name) \ 139 { DEV_TX_OFFLOAD_##_name, #_name } 140 141 static const struct { 142 uint64_t offload; 143 const char *name; 144 } eth_dev_tx_offload_names[] = { 145 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT), 146 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM), 147 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM), 148 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM), 149 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM), 150 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO), 151 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO), 152 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM), 153 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT), 154 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO), 155 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO), 156 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO), 157 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO), 158 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT), 159 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE), 160 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS), 161 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE), 162 RTE_TX_OFFLOAD_BIT2STR(SECURITY), 163 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO), 164 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO), 165 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM), 166 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP), 167 }; 168 169 #undef RTE_TX_OFFLOAD_BIT2STR 170 171 /** 172 * The user application callback description. 173 * 174 * It contains callback address to be registered by user application, 175 * the pointer to the parameters for callback, and the event type. 176 */ 177 struct rte_eth_dev_callback { 178 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */ 179 rte_eth_dev_cb_fn cb_fn; /**< Callback address */ 180 void *cb_arg; /**< Parameter for callback */ 181 void *ret_param; /**< Return parameter */ 182 enum rte_eth_event_type event; /**< Interrupt event type */ 183 uint32_t active; /**< Callback is executing */ 184 }; 185 186 enum { 187 STAT_QMAP_TX = 0, 188 STAT_QMAP_RX 189 }; 190 191 int 192 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str) 193 { 194 int ret; 195 struct rte_devargs devargs; 196 const char *bus_param_key; 197 char *bus_str = NULL; 198 char *cls_str = NULL; 199 int str_size; 200 201 if (iter == NULL) { 202 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n"); 203 return -EINVAL; 204 } 205 206 if (devargs_str == NULL) { 207 RTE_ETHDEV_LOG(ERR, 208 "Cannot initialize iterator from NULL device description string\n"); 209 return -EINVAL; 210 } 211 212 memset(iter, 0, sizeof(*iter)); 213 memset(&devargs, 0, sizeof(devargs)); 214 215 /* 216 * The devargs string may use various syntaxes: 217 * - 0000:08:00.0,representor=[1-3] 218 * - pci:0000:06:00.0,representor=[0,5] 219 * - class=eth,mac=00:11:22:33:44:55 220 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z 221 */ 222 223 /* 224 * Handle pure class filter (i.e. without any bus-level argument), 225 * from future new syntax. 226 * rte_devargs_parse() is not yet supporting the new syntax, 227 * that's why this simple case is temporarily parsed here. 228 */ 229 #define iter_anybus_str "class=eth," 230 if (strncmp(devargs_str, iter_anybus_str, 231 strlen(iter_anybus_str)) == 0) { 232 iter->cls_str = devargs_str + strlen(iter_anybus_str); 233 goto end; 234 } 235 236 /* Split bus, device and parameters. */ 237 ret = rte_devargs_parse(&devargs, devargs_str); 238 if (ret != 0) 239 goto error; 240 241 /* 242 * Assume parameters of old syntax can match only at ethdev level. 243 * Extra parameters will be ignored, thanks to "+" prefix. 244 */ 245 str_size = strlen(devargs.args) + 2; 246 cls_str = malloc(str_size); 247 if (cls_str == NULL) { 248 ret = -ENOMEM; 249 goto error; 250 } 251 ret = snprintf(cls_str, str_size, "+%s", devargs.args); 252 if (ret != str_size - 1) { 253 ret = -EINVAL; 254 goto error; 255 } 256 iter->cls_str = cls_str; 257 258 iter->bus = devargs.bus; 259 if (iter->bus->dev_iterate == NULL) { 260 ret = -ENOTSUP; 261 goto error; 262 } 263 264 /* Convert bus args to new syntax for use with new API dev_iterate. */ 265 if ((strcmp(iter->bus->name, "vdev") == 0) || 266 (strcmp(iter->bus->name, "fslmc") == 0) || 267 (strcmp(iter->bus->name, "dpaa_bus") == 0)) { 268 bus_param_key = "name"; 269 } else if (strcmp(iter->bus->name, "pci") == 0) { 270 bus_param_key = "addr"; 271 } else { 272 ret = -ENOTSUP; 273 goto error; 274 } 275 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2; 276 bus_str = malloc(str_size); 277 if (bus_str == NULL) { 278 ret = -ENOMEM; 279 goto error; 280 } 281 ret = snprintf(bus_str, str_size, "%s=%s", 282 bus_param_key, devargs.name); 283 if (ret != str_size - 1) { 284 ret = -EINVAL; 285 goto error; 286 } 287 iter->bus_str = bus_str; 288 289 end: 290 iter->cls = rte_class_find_by_name("eth"); 291 rte_devargs_reset(&devargs); 292 return 0; 293 294 error: 295 if (ret == -ENOTSUP) 296 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n", 297 iter->bus->name); 298 rte_devargs_reset(&devargs); 299 free(bus_str); 300 free(cls_str); 301 return ret; 302 } 303 304 uint16_t 305 rte_eth_iterator_next(struct rte_dev_iterator *iter) 306 { 307 if (iter == NULL) { 308 RTE_ETHDEV_LOG(ERR, 309 "Cannot get next device from NULL iterator\n"); 310 return RTE_MAX_ETHPORTS; 311 } 312 313 if (iter->cls == NULL) /* invalid ethdev iterator */ 314 return RTE_MAX_ETHPORTS; 315 316 do { /* loop to try all matching rte_device */ 317 /* If not pure ethdev filter and */ 318 if (iter->bus != NULL && 319 /* not in middle of rte_eth_dev iteration, */ 320 iter->class_device == NULL) { 321 /* get next rte_device to try. */ 322 iter->device = iter->bus->dev_iterate( 323 iter->device, iter->bus_str, iter); 324 if (iter->device == NULL) 325 break; /* no more rte_device candidate */ 326 } 327 /* A device is matching bus part, need to check ethdev part. */ 328 iter->class_device = iter->cls->dev_iterate( 329 iter->class_device, iter->cls_str, iter); 330 if (iter->class_device != NULL) 331 return eth_dev_to_id(iter->class_device); /* match */ 332 } while (iter->bus != NULL); /* need to try next rte_device */ 333 334 /* No more ethdev port to iterate. */ 335 rte_eth_iterator_cleanup(iter); 336 return RTE_MAX_ETHPORTS; 337 } 338 339 void 340 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter) 341 { 342 if (iter == NULL) { 343 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n"); 344 return; 345 } 346 347 if (iter->bus_str == NULL) 348 return; /* nothing to free in pure class filter */ 349 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */ 350 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */ 351 memset(iter, 0, sizeof(*iter)); 352 } 353 354 uint16_t 355 rte_eth_find_next(uint16_t port_id) 356 { 357 while (port_id < RTE_MAX_ETHPORTS && 358 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED) 359 port_id++; 360 361 if (port_id >= RTE_MAX_ETHPORTS) 362 return RTE_MAX_ETHPORTS; 363 364 return port_id; 365 } 366 367 /* 368 * Macro to iterate over all valid ports for internal usage. 369 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports. 370 */ 371 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \ 372 for (port_id = rte_eth_find_next(0); \ 373 port_id < RTE_MAX_ETHPORTS; \ 374 port_id = rte_eth_find_next(port_id + 1)) 375 376 uint16_t 377 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent) 378 { 379 port_id = rte_eth_find_next(port_id); 380 while (port_id < RTE_MAX_ETHPORTS && 381 rte_eth_devices[port_id].device != parent) 382 port_id = rte_eth_find_next(port_id + 1); 383 384 return port_id; 385 } 386 387 uint16_t 388 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id) 389 { 390 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS); 391 return rte_eth_find_next_of(port_id, 392 rte_eth_devices[ref_port_id].device); 393 } 394 395 static void 396 eth_dev_shared_data_prepare(void) 397 { 398 const unsigned flags = 0; 399 const struct rte_memzone *mz; 400 401 rte_spinlock_lock(ð_dev_shared_data_lock); 402 403 if (eth_dev_shared_data == NULL) { 404 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 405 /* Allocate port data and ownership shared memory. */ 406 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA, 407 sizeof(*eth_dev_shared_data), 408 rte_socket_id(), flags); 409 } else 410 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA); 411 if (mz == NULL) 412 rte_panic("Cannot allocate ethdev shared data\n"); 413 414 eth_dev_shared_data = mz->addr; 415 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 416 eth_dev_shared_data->next_owner_id = 417 RTE_ETH_DEV_NO_OWNER + 1; 418 rte_spinlock_init(ð_dev_shared_data->ownership_lock); 419 memset(eth_dev_shared_data->data, 0, 420 sizeof(eth_dev_shared_data->data)); 421 } 422 } 423 424 rte_spinlock_unlock(ð_dev_shared_data_lock); 425 } 426 427 static bool 428 eth_dev_is_allocated(const struct rte_eth_dev *ethdev) 429 { 430 return ethdev->data->name[0] != '\0'; 431 } 432 433 static struct rte_eth_dev * 434 eth_dev_allocated(const char *name) 435 { 436 uint16_t i; 437 438 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX); 439 440 for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 441 if (rte_eth_devices[i].data != NULL && 442 strcmp(rte_eth_devices[i].data->name, name) == 0) 443 return &rte_eth_devices[i]; 444 } 445 return NULL; 446 } 447 448 struct rte_eth_dev * 449 rte_eth_dev_allocated(const char *name) 450 { 451 struct rte_eth_dev *ethdev; 452 453 eth_dev_shared_data_prepare(); 454 455 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 456 457 ethdev = eth_dev_allocated(name); 458 459 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 460 461 return ethdev; 462 } 463 464 static uint16_t 465 eth_dev_find_free_port(void) 466 { 467 uint16_t i; 468 469 for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 470 /* Using shared name field to find a free port. */ 471 if (eth_dev_shared_data->data[i].name[0] == '\0') { 472 RTE_ASSERT(rte_eth_devices[i].state == 473 RTE_ETH_DEV_UNUSED); 474 return i; 475 } 476 } 477 return RTE_MAX_ETHPORTS; 478 } 479 480 static struct rte_eth_dev * 481 eth_dev_get(uint16_t port_id) 482 { 483 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id]; 484 485 eth_dev->data = ð_dev_shared_data->data[port_id]; 486 487 return eth_dev; 488 } 489 490 struct rte_eth_dev * 491 rte_eth_dev_allocate(const char *name) 492 { 493 uint16_t port_id; 494 struct rte_eth_dev *eth_dev = NULL; 495 size_t name_len; 496 497 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN); 498 if (name_len == 0) { 499 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n"); 500 return NULL; 501 } 502 503 if (name_len >= RTE_ETH_NAME_MAX_LEN) { 504 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n"); 505 return NULL; 506 } 507 508 eth_dev_shared_data_prepare(); 509 510 /* Synchronize port creation between primary and secondary threads. */ 511 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 512 513 if (eth_dev_allocated(name) != NULL) { 514 RTE_ETHDEV_LOG(ERR, 515 "Ethernet device with name %s already allocated\n", 516 name); 517 goto unlock; 518 } 519 520 port_id = eth_dev_find_free_port(); 521 if (port_id == RTE_MAX_ETHPORTS) { 522 RTE_ETHDEV_LOG(ERR, 523 "Reached maximum number of Ethernet ports\n"); 524 goto unlock; 525 } 526 527 eth_dev = eth_dev_get(port_id); 528 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name)); 529 eth_dev->data->port_id = port_id; 530 eth_dev->data->backer_port_id = RTE_MAX_ETHPORTS; 531 eth_dev->data->mtu = RTE_ETHER_MTU; 532 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL); 533 534 unlock: 535 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 536 537 return eth_dev; 538 } 539 540 /* 541 * Attach to a port already registered by the primary process, which 542 * makes sure that the same device would have the same port id both 543 * in the primary and secondary process. 544 */ 545 struct rte_eth_dev * 546 rte_eth_dev_attach_secondary(const char *name) 547 { 548 uint16_t i; 549 struct rte_eth_dev *eth_dev = NULL; 550 551 eth_dev_shared_data_prepare(); 552 553 /* Synchronize port attachment to primary port creation and release. */ 554 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 555 556 for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 557 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0) 558 break; 559 } 560 if (i == RTE_MAX_ETHPORTS) { 561 RTE_ETHDEV_LOG(ERR, 562 "Device %s is not driven by the primary process\n", 563 name); 564 } else { 565 eth_dev = eth_dev_get(i); 566 RTE_ASSERT(eth_dev->data->port_id == i); 567 } 568 569 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 570 return eth_dev; 571 } 572 573 int 574 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev) 575 { 576 if (eth_dev == NULL) 577 return -EINVAL; 578 579 eth_dev_shared_data_prepare(); 580 581 if (eth_dev->state != RTE_ETH_DEV_UNUSED) 582 rte_eth_dev_callback_process(eth_dev, 583 RTE_ETH_EVENT_DESTROY, NULL); 584 585 eth_dev_fp_ops_reset(rte_eth_fp_ops + eth_dev->data->port_id); 586 587 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 588 589 eth_dev->state = RTE_ETH_DEV_UNUSED; 590 eth_dev->device = NULL; 591 eth_dev->process_private = NULL; 592 eth_dev->intr_handle = NULL; 593 eth_dev->rx_pkt_burst = NULL; 594 eth_dev->tx_pkt_burst = NULL; 595 eth_dev->tx_pkt_prepare = NULL; 596 eth_dev->rx_queue_count = NULL; 597 eth_dev->rx_descriptor_status = NULL; 598 eth_dev->tx_descriptor_status = NULL; 599 eth_dev->dev_ops = NULL; 600 601 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 602 rte_free(eth_dev->data->rx_queues); 603 rte_free(eth_dev->data->tx_queues); 604 rte_free(eth_dev->data->mac_addrs); 605 rte_free(eth_dev->data->hash_mac_addrs); 606 rte_free(eth_dev->data->dev_private); 607 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex); 608 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data)); 609 } 610 611 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 612 613 return 0; 614 } 615 616 int 617 rte_eth_dev_is_valid_port(uint16_t port_id) 618 { 619 if (port_id >= RTE_MAX_ETHPORTS || 620 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)) 621 return 0; 622 else 623 return 1; 624 } 625 626 static int 627 eth_is_valid_owner_id(uint64_t owner_id) 628 { 629 if (owner_id == RTE_ETH_DEV_NO_OWNER || 630 eth_dev_shared_data->next_owner_id <= owner_id) 631 return 0; 632 return 1; 633 } 634 635 uint64_t 636 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id) 637 { 638 port_id = rte_eth_find_next(port_id); 639 while (port_id < RTE_MAX_ETHPORTS && 640 rte_eth_devices[port_id].data->owner.id != owner_id) 641 port_id = rte_eth_find_next(port_id + 1); 642 643 return port_id; 644 } 645 646 int 647 rte_eth_dev_owner_new(uint64_t *owner_id) 648 { 649 if (owner_id == NULL) { 650 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n"); 651 return -EINVAL; 652 } 653 654 eth_dev_shared_data_prepare(); 655 656 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 657 658 *owner_id = eth_dev_shared_data->next_owner_id++; 659 660 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 661 return 0; 662 } 663 664 static int 665 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id, 666 const struct rte_eth_dev_owner *new_owner) 667 { 668 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id]; 669 struct rte_eth_dev_owner *port_owner; 670 671 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) { 672 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n", 673 port_id); 674 return -ENODEV; 675 } 676 677 if (new_owner == NULL) { 678 RTE_ETHDEV_LOG(ERR, 679 "Cannot set ethdev port %u owner from NULL owner\n", 680 port_id); 681 return -EINVAL; 682 } 683 684 if (!eth_is_valid_owner_id(new_owner->id) && 685 !eth_is_valid_owner_id(old_owner_id)) { 686 RTE_ETHDEV_LOG(ERR, 687 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n", 688 old_owner_id, new_owner->id); 689 return -EINVAL; 690 } 691 692 port_owner = &rte_eth_devices[port_id].data->owner; 693 if (port_owner->id != old_owner_id) { 694 RTE_ETHDEV_LOG(ERR, 695 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n", 696 port_id, port_owner->name, port_owner->id); 697 return -EPERM; 698 } 699 700 /* can not truncate (same structure) */ 701 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN); 702 703 port_owner->id = new_owner->id; 704 705 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n", 706 port_id, new_owner->name, new_owner->id); 707 708 return 0; 709 } 710 711 int 712 rte_eth_dev_owner_set(const uint16_t port_id, 713 const struct rte_eth_dev_owner *owner) 714 { 715 int ret; 716 717 eth_dev_shared_data_prepare(); 718 719 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 720 721 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner); 722 723 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 724 return ret; 725 } 726 727 int 728 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id) 729 { 730 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner) 731 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""}; 732 int ret; 733 734 eth_dev_shared_data_prepare(); 735 736 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 737 738 ret = eth_dev_owner_set(port_id, owner_id, &new_owner); 739 740 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 741 return ret; 742 } 743 744 int 745 rte_eth_dev_owner_delete(const uint64_t owner_id) 746 { 747 uint16_t port_id; 748 int ret = 0; 749 750 eth_dev_shared_data_prepare(); 751 752 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 753 754 if (eth_is_valid_owner_id(owner_id)) { 755 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) 756 if (rte_eth_devices[port_id].data->owner.id == owner_id) 757 memset(&rte_eth_devices[port_id].data->owner, 0, 758 sizeof(struct rte_eth_dev_owner)); 759 RTE_ETHDEV_LOG(NOTICE, 760 "All port owners owned by %016"PRIx64" identifier have removed\n", 761 owner_id); 762 } else { 763 RTE_ETHDEV_LOG(ERR, 764 "Invalid owner id=%016"PRIx64"\n", 765 owner_id); 766 ret = -EINVAL; 767 } 768 769 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 770 771 return ret; 772 } 773 774 int 775 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner) 776 { 777 struct rte_eth_dev *ethdev; 778 779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 780 ethdev = &rte_eth_devices[port_id]; 781 782 if (!eth_dev_is_allocated(ethdev)) { 783 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n", 784 port_id); 785 return -ENODEV; 786 } 787 788 if (owner == NULL) { 789 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n", 790 port_id); 791 return -EINVAL; 792 } 793 794 eth_dev_shared_data_prepare(); 795 796 rte_spinlock_lock(ð_dev_shared_data->ownership_lock); 797 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner)); 798 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock); 799 800 return 0; 801 } 802 803 int 804 rte_eth_dev_socket_id(uint16_t port_id) 805 { 806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1); 807 return rte_eth_devices[port_id].data->numa_node; 808 } 809 810 void * 811 rte_eth_dev_get_sec_ctx(uint16_t port_id) 812 { 813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL); 814 return rte_eth_devices[port_id].security_ctx; 815 } 816 817 uint16_t 818 rte_eth_dev_count_avail(void) 819 { 820 uint16_t p; 821 uint16_t count; 822 823 count = 0; 824 825 RTE_ETH_FOREACH_DEV(p) 826 count++; 827 828 return count; 829 } 830 831 uint16_t 832 rte_eth_dev_count_total(void) 833 { 834 uint16_t port, count = 0; 835 836 RTE_ETH_FOREACH_VALID_DEV(port) 837 count++; 838 839 return count; 840 } 841 842 int 843 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name) 844 { 845 char *tmp; 846 847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 848 849 if (name == NULL) { 850 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n", 851 port_id); 852 return -EINVAL; 853 } 854 855 /* shouldn't check 'rte_eth_devices[i].data', 856 * because it might be overwritten by VDEV PMD */ 857 tmp = eth_dev_shared_data->data[port_id].name; 858 strcpy(name, tmp); 859 return 0; 860 } 861 862 int 863 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id) 864 { 865 uint16_t pid; 866 867 if (name == NULL) { 868 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name"); 869 return -EINVAL; 870 } 871 872 if (port_id == NULL) { 873 RTE_ETHDEV_LOG(ERR, 874 "Cannot get port ID to NULL for %s\n", name); 875 return -EINVAL; 876 } 877 878 RTE_ETH_FOREACH_VALID_DEV(pid) 879 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) { 880 *port_id = pid; 881 return 0; 882 } 883 884 return -ENODEV; 885 } 886 887 static int 888 eth_err(uint16_t port_id, int ret) 889 { 890 if (ret == 0) 891 return 0; 892 if (rte_eth_dev_is_removed(port_id)) 893 return -EIO; 894 return ret; 895 } 896 897 static void 898 eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid) 899 { 900 void **rxq = dev->data->rx_queues; 901 902 if (rxq[qid] == NULL) 903 return; 904 905 if (dev->dev_ops->rx_queue_release != NULL) 906 (*dev->dev_ops->rx_queue_release)(dev, qid); 907 rxq[qid] = NULL; 908 } 909 910 static void 911 eth_dev_txq_release(struct rte_eth_dev *dev, uint16_t qid) 912 { 913 void **txq = dev->data->tx_queues; 914 915 if (txq[qid] == NULL) 916 return; 917 918 if (dev->dev_ops->tx_queue_release != NULL) 919 (*dev->dev_ops->tx_queue_release)(dev, qid); 920 txq[qid] = NULL; 921 } 922 923 static int 924 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues) 925 { 926 uint16_t old_nb_queues = dev->data->nb_rx_queues; 927 unsigned i; 928 929 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */ 930 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues", 931 sizeof(dev->data->rx_queues[0]) * 932 RTE_MAX_QUEUES_PER_PORT, 933 RTE_CACHE_LINE_SIZE); 934 if (dev->data->rx_queues == NULL) { 935 dev->data->nb_rx_queues = 0; 936 return -(ENOMEM); 937 } 938 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */ 939 for (i = nb_queues; i < old_nb_queues; i++) 940 eth_dev_rxq_release(dev, i); 941 942 } else if (dev->data->rx_queues != NULL && nb_queues == 0) { 943 for (i = nb_queues; i < old_nb_queues; i++) 944 eth_dev_rxq_release(dev, i); 945 946 rte_free(dev->data->rx_queues); 947 dev->data->rx_queues = NULL; 948 } 949 dev->data->nb_rx_queues = nb_queues; 950 return 0; 951 } 952 953 static int 954 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id) 955 { 956 uint16_t port_id; 957 958 if (rx_queue_id >= dev->data->nb_rx_queues) { 959 port_id = dev->data->port_id; 960 RTE_ETHDEV_LOG(ERR, 961 "Invalid Rx queue_id=%u of device with port_id=%u\n", 962 rx_queue_id, port_id); 963 return -EINVAL; 964 } 965 966 if (dev->data->rx_queues[rx_queue_id] == NULL) { 967 port_id = dev->data->port_id; 968 RTE_ETHDEV_LOG(ERR, 969 "Queue %u of device with port_id=%u has not been setup\n", 970 rx_queue_id, port_id); 971 return -EINVAL; 972 } 973 974 return 0; 975 } 976 977 static int 978 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id) 979 { 980 uint16_t port_id; 981 982 if (tx_queue_id >= dev->data->nb_tx_queues) { 983 port_id = dev->data->port_id; 984 RTE_ETHDEV_LOG(ERR, 985 "Invalid Tx queue_id=%u of device with port_id=%u\n", 986 tx_queue_id, port_id); 987 return -EINVAL; 988 } 989 990 if (dev->data->tx_queues[tx_queue_id] == NULL) { 991 port_id = dev->data->port_id; 992 RTE_ETHDEV_LOG(ERR, 993 "Queue %u of device with port_id=%u has not been setup\n", 994 tx_queue_id, port_id); 995 return -EINVAL; 996 } 997 998 return 0; 999 } 1000 1001 int 1002 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id) 1003 { 1004 struct rte_eth_dev *dev; 1005 int ret; 1006 1007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1008 dev = &rte_eth_devices[port_id]; 1009 1010 if (!dev->data->dev_started) { 1011 RTE_ETHDEV_LOG(ERR, 1012 "Port %u must be started before start any queue\n", 1013 port_id); 1014 return -EINVAL; 1015 } 1016 1017 ret = eth_dev_validate_rx_queue(dev, rx_queue_id); 1018 if (ret != 0) 1019 return ret; 1020 1021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP); 1022 1023 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) { 1024 RTE_ETHDEV_LOG(INFO, 1025 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n", 1026 rx_queue_id, port_id); 1027 return -EINVAL; 1028 } 1029 1030 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) { 1031 RTE_ETHDEV_LOG(INFO, 1032 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n", 1033 rx_queue_id, port_id); 1034 return 0; 1035 } 1036 1037 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id)); 1038 } 1039 1040 int 1041 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id) 1042 { 1043 struct rte_eth_dev *dev; 1044 int ret; 1045 1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1047 dev = &rte_eth_devices[port_id]; 1048 1049 ret = eth_dev_validate_rx_queue(dev, rx_queue_id); 1050 if (ret != 0) 1051 return ret; 1052 1053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP); 1054 1055 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) { 1056 RTE_ETHDEV_LOG(INFO, 1057 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n", 1058 rx_queue_id, port_id); 1059 return -EINVAL; 1060 } 1061 1062 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) { 1063 RTE_ETHDEV_LOG(INFO, 1064 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n", 1065 rx_queue_id, port_id); 1066 return 0; 1067 } 1068 1069 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id)); 1070 } 1071 1072 int 1073 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id) 1074 { 1075 struct rte_eth_dev *dev; 1076 int ret; 1077 1078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1079 dev = &rte_eth_devices[port_id]; 1080 1081 if (!dev->data->dev_started) { 1082 RTE_ETHDEV_LOG(ERR, 1083 "Port %u must be started before start any queue\n", 1084 port_id); 1085 return -EINVAL; 1086 } 1087 1088 ret = eth_dev_validate_tx_queue(dev, tx_queue_id); 1089 if (ret != 0) 1090 return ret; 1091 1092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP); 1093 1094 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) { 1095 RTE_ETHDEV_LOG(INFO, 1096 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n", 1097 tx_queue_id, port_id); 1098 return -EINVAL; 1099 } 1100 1101 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) { 1102 RTE_ETHDEV_LOG(INFO, 1103 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n", 1104 tx_queue_id, port_id); 1105 return 0; 1106 } 1107 1108 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id)); 1109 } 1110 1111 int 1112 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id) 1113 { 1114 struct rte_eth_dev *dev; 1115 int ret; 1116 1117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1118 dev = &rte_eth_devices[port_id]; 1119 1120 ret = eth_dev_validate_tx_queue(dev, tx_queue_id); 1121 if (ret != 0) 1122 return ret; 1123 1124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP); 1125 1126 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) { 1127 RTE_ETHDEV_LOG(INFO, 1128 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n", 1129 tx_queue_id, port_id); 1130 return -EINVAL; 1131 } 1132 1133 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) { 1134 RTE_ETHDEV_LOG(INFO, 1135 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n", 1136 tx_queue_id, port_id); 1137 return 0; 1138 } 1139 1140 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id)); 1141 } 1142 1143 static int 1144 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues) 1145 { 1146 uint16_t old_nb_queues = dev->data->nb_tx_queues; 1147 unsigned i; 1148 1149 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */ 1150 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues", 1151 sizeof(dev->data->tx_queues[0]) * 1152 RTE_MAX_QUEUES_PER_PORT, 1153 RTE_CACHE_LINE_SIZE); 1154 if (dev->data->tx_queues == NULL) { 1155 dev->data->nb_tx_queues = 0; 1156 return -(ENOMEM); 1157 } 1158 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */ 1159 for (i = nb_queues; i < old_nb_queues; i++) 1160 eth_dev_txq_release(dev, i); 1161 1162 } else if (dev->data->tx_queues != NULL && nb_queues == 0) { 1163 for (i = nb_queues; i < old_nb_queues; i++) 1164 eth_dev_txq_release(dev, i); 1165 1166 rte_free(dev->data->tx_queues); 1167 dev->data->tx_queues = NULL; 1168 } 1169 dev->data->nb_tx_queues = nb_queues; 1170 return 0; 1171 } 1172 1173 uint32_t 1174 rte_eth_speed_bitflag(uint32_t speed, int duplex) 1175 { 1176 switch (speed) { 1177 case ETH_SPEED_NUM_10M: 1178 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD; 1179 case ETH_SPEED_NUM_100M: 1180 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD; 1181 case ETH_SPEED_NUM_1G: 1182 return ETH_LINK_SPEED_1G; 1183 case ETH_SPEED_NUM_2_5G: 1184 return ETH_LINK_SPEED_2_5G; 1185 case ETH_SPEED_NUM_5G: 1186 return ETH_LINK_SPEED_5G; 1187 case ETH_SPEED_NUM_10G: 1188 return ETH_LINK_SPEED_10G; 1189 case ETH_SPEED_NUM_20G: 1190 return ETH_LINK_SPEED_20G; 1191 case ETH_SPEED_NUM_25G: 1192 return ETH_LINK_SPEED_25G; 1193 case ETH_SPEED_NUM_40G: 1194 return ETH_LINK_SPEED_40G; 1195 case ETH_SPEED_NUM_50G: 1196 return ETH_LINK_SPEED_50G; 1197 case ETH_SPEED_NUM_56G: 1198 return ETH_LINK_SPEED_56G; 1199 case ETH_SPEED_NUM_100G: 1200 return ETH_LINK_SPEED_100G; 1201 case ETH_SPEED_NUM_200G: 1202 return ETH_LINK_SPEED_200G; 1203 default: 1204 return 0; 1205 } 1206 } 1207 1208 const char * 1209 rte_eth_dev_rx_offload_name(uint64_t offload) 1210 { 1211 const char *name = "UNKNOWN"; 1212 unsigned int i; 1213 1214 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) { 1215 if (offload == eth_dev_rx_offload_names[i].offload) { 1216 name = eth_dev_rx_offload_names[i].name; 1217 break; 1218 } 1219 } 1220 1221 return name; 1222 } 1223 1224 const char * 1225 rte_eth_dev_tx_offload_name(uint64_t offload) 1226 { 1227 const char *name = "UNKNOWN"; 1228 unsigned int i; 1229 1230 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) { 1231 if (offload == eth_dev_tx_offload_names[i].offload) { 1232 name = eth_dev_tx_offload_names[i].name; 1233 break; 1234 } 1235 } 1236 1237 return name; 1238 } 1239 1240 static inline int 1241 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size, 1242 uint32_t max_rx_pkt_len, uint32_t dev_info_size) 1243 { 1244 int ret = 0; 1245 1246 if (dev_info_size == 0) { 1247 if (config_size != max_rx_pkt_len) { 1248 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size" 1249 " %u != %u is not allowed\n", 1250 port_id, config_size, max_rx_pkt_len); 1251 ret = -EINVAL; 1252 } 1253 } else if (config_size > dev_info_size) { 1254 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u " 1255 "> max allowed value %u\n", port_id, config_size, 1256 dev_info_size); 1257 ret = -EINVAL; 1258 } else if (config_size < RTE_ETHER_MIN_LEN) { 1259 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u " 1260 "< min allowed value %u\n", port_id, config_size, 1261 (unsigned int)RTE_ETHER_MIN_LEN); 1262 ret = -EINVAL; 1263 } 1264 return ret; 1265 } 1266 1267 /* 1268 * Validate offloads that are requested through rte_eth_dev_configure against 1269 * the offloads successfully set by the ethernet device. 1270 * 1271 * @param port_id 1272 * The port identifier of the Ethernet device. 1273 * @param req_offloads 1274 * The offloads that have been requested through `rte_eth_dev_configure`. 1275 * @param set_offloads 1276 * The offloads successfully set by the ethernet device. 1277 * @param offload_type 1278 * The offload type i.e. Rx/Tx string. 1279 * @param offload_name 1280 * The function that prints the offload name. 1281 * @return 1282 * - (0) if validation successful. 1283 * - (-EINVAL) if requested offload has been silently disabled. 1284 * 1285 */ 1286 static int 1287 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads, 1288 uint64_t set_offloads, const char *offload_type, 1289 const char *(*offload_name)(uint64_t)) 1290 { 1291 uint64_t offloads_diff = req_offloads ^ set_offloads; 1292 uint64_t offload; 1293 int ret = 0; 1294 1295 while (offloads_diff != 0) { 1296 /* Check if any offload is requested but not enabled. */ 1297 offload = 1ULL << __builtin_ctzll(offloads_diff); 1298 if (offload & req_offloads) { 1299 RTE_ETHDEV_LOG(ERR, 1300 "Port %u failed to enable %s offload %s\n", 1301 port_id, offload_type, offload_name(offload)); 1302 ret = -EINVAL; 1303 } 1304 1305 /* Check if offload couldn't be disabled. */ 1306 if (offload & set_offloads) { 1307 RTE_ETHDEV_LOG(DEBUG, 1308 "Port %u %s offload %s is not requested but enabled\n", 1309 port_id, offload_type, offload_name(offload)); 1310 } 1311 1312 offloads_diff &= ~offload; 1313 } 1314 1315 return ret; 1316 } 1317 1318 static uint32_t 1319 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu) 1320 { 1321 uint32_t overhead_len; 1322 1323 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu) 1324 overhead_len = max_rx_pktlen - max_mtu; 1325 else 1326 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN; 1327 1328 return overhead_len; 1329 } 1330 1331 int 1332 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q, 1333 const struct rte_eth_conf *dev_conf) 1334 { 1335 struct rte_eth_dev *dev; 1336 struct rte_eth_dev_info dev_info; 1337 struct rte_eth_conf orig_conf; 1338 uint32_t max_rx_pktlen; 1339 uint32_t overhead_len; 1340 int diag; 1341 int ret; 1342 uint16_t old_mtu; 1343 1344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1345 dev = &rte_eth_devices[port_id]; 1346 1347 if (dev_conf == NULL) { 1348 RTE_ETHDEV_LOG(ERR, 1349 "Cannot configure ethdev port %u from NULL config\n", 1350 port_id); 1351 return -EINVAL; 1352 } 1353 1354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP); 1355 1356 if (dev->data->dev_started) { 1357 RTE_ETHDEV_LOG(ERR, 1358 "Port %u must be stopped to allow configuration\n", 1359 port_id); 1360 return -EBUSY; 1361 } 1362 1363 /* 1364 * Ensure that "dev_configured" is always 0 each time prepare to do 1365 * dev_configure() to avoid any non-anticipated behaviour. 1366 * And set to 1 when dev_configure() is executed successfully. 1367 */ 1368 dev->data->dev_configured = 0; 1369 1370 /* Store original config, as rollback required on failure */ 1371 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf)); 1372 1373 /* 1374 * Copy the dev_conf parameter into the dev structure. 1375 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get 1376 */ 1377 if (dev_conf != &dev->data->dev_conf) 1378 memcpy(&dev->data->dev_conf, dev_conf, 1379 sizeof(dev->data->dev_conf)); 1380 1381 /* Backup mtu for rollback */ 1382 old_mtu = dev->data->mtu; 1383 1384 ret = rte_eth_dev_info_get(port_id, &dev_info); 1385 if (ret != 0) 1386 goto rollback; 1387 1388 /* Get the real Ethernet overhead length */ 1389 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen, 1390 dev_info.max_mtu); 1391 1392 /* If number of queues specified by application for both Rx and Tx is 1393 * zero, use driver preferred values. This cannot be done individually 1394 * as it is valid for either Tx or Rx (but not both) to be zero. 1395 * If driver does not provide any preferred valued, fall back on 1396 * EAL defaults. 1397 */ 1398 if (nb_rx_q == 0 && nb_tx_q == 0) { 1399 nb_rx_q = dev_info.default_rxportconf.nb_queues; 1400 if (nb_rx_q == 0) 1401 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES; 1402 nb_tx_q = dev_info.default_txportconf.nb_queues; 1403 if (nb_tx_q == 0) 1404 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES; 1405 } 1406 1407 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) { 1408 RTE_ETHDEV_LOG(ERR, 1409 "Number of RX queues requested (%u) is greater than max supported(%d)\n", 1410 nb_rx_q, RTE_MAX_QUEUES_PER_PORT); 1411 ret = -EINVAL; 1412 goto rollback; 1413 } 1414 1415 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) { 1416 RTE_ETHDEV_LOG(ERR, 1417 "Number of TX queues requested (%u) is greater than max supported(%d)\n", 1418 nb_tx_q, RTE_MAX_QUEUES_PER_PORT); 1419 ret = -EINVAL; 1420 goto rollback; 1421 } 1422 1423 /* 1424 * Check that the numbers of RX and TX queues are not greater 1425 * than the maximum number of RX and TX queues supported by the 1426 * configured device. 1427 */ 1428 if (nb_rx_q > dev_info.max_rx_queues) { 1429 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n", 1430 port_id, nb_rx_q, dev_info.max_rx_queues); 1431 ret = -EINVAL; 1432 goto rollback; 1433 } 1434 1435 if (nb_tx_q > dev_info.max_tx_queues) { 1436 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n", 1437 port_id, nb_tx_q, dev_info.max_tx_queues); 1438 ret = -EINVAL; 1439 goto rollback; 1440 } 1441 1442 /* Check that the device supports requested interrupts */ 1443 if ((dev_conf->intr_conf.lsc == 1) && 1444 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) { 1445 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n", 1446 dev->device->driver->name); 1447 ret = -EINVAL; 1448 goto rollback; 1449 } 1450 if ((dev_conf->intr_conf.rmv == 1) && 1451 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) { 1452 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n", 1453 dev->device->driver->name); 1454 ret = -EINVAL; 1455 goto rollback; 1456 } 1457 1458 /* 1459 * Check that the maximum RX packet length is supported by the 1460 * configured device. 1461 */ 1462 if (dev_conf->rxmode.mtu == 0) 1463 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU; 1464 max_rx_pktlen = dev->data->dev_conf.rxmode.mtu + overhead_len; 1465 if (max_rx_pktlen > dev_info.max_rx_pktlen) { 1466 RTE_ETHDEV_LOG(ERR, 1467 "Ethdev port_id=%u max_rx_pktlen %u > max valid value %u\n", 1468 port_id, max_rx_pktlen, dev_info.max_rx_pktlen); 1469 ret = -EINVAL; 1470 goto rollback; 1471 } else if (max_rx_pktlen < RTE_ETHER_MIN_LEN) { 1472 RTE_ETHDEV_LOG(ERR, 1473 "Ethdev port_id=%u max_rx_pktlen %u < min valid value %u\n", 1474 port_id, max_rx_pktlen, RTE_ETHER_MIN_LEN); 1475 ret = -EINVAL; 1476 goto rollback; 1477 } 1478 1479 if ((dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) == 0) { 1480 if (dev->data->dev_conf.rxmode.mtu < RTE_ETHER_MIN_MTU || 1481 dev->data->dev_conf.rxmode.mtu > RTE_ETHER_MTU) 1482 /* Use default value */ 1483 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU; 1484 } 1485 1486 dev->data->mtu = dev->data->dev_conf.rxmode.mtu; 1487 1488 /* 1489 * If LRO is enabled, check that the maximum aggregated packet 1490 * size is supported by the configured device. 1491 */ 1492 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) { 1493 if (dev_conf->rxmode.max_lro_pkt_size == 0) 1494 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen; 1495 ret = eth_dev_check_lro_pkt_size(port_id, 1496 dev->data->dev_conf.rxmode.max_lro_pkt_size, 1497 max_rx_pktlen, 1498 dev_info.max_lro_pkt_size); 1499 if (ret != 0) 1500 goto rollback; 1501 } 1502 1503 /* Any requested offloading must be within its device capabilities */ 1504 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) != 1505 dev_conf->rxmode.offloads) { 1506 RTE_ETHDEV_LOG(ERR, 1507 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads " 1508 "capabilities 0x%"PRIx64" in %s()\n", 1509 port_id, dev_conf->rxmode.offloads, 1510 dev_info.rx_offload_capa, 1511 __func__); 1512 ret = -EINVAL; 1513 goto rollback; 1514 } 1515 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) != 1516 dev_conf->txmode.offloads) { 1517 RTE_ETHDEV_LOG(ERR, 1518 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads " 1519 "capabilities 0x%"PRIx64" in %s()\n", 1520 port_id, dev_conf->txmode.offloads, 1521 dev_info.tx_offload_capa, 1522 __func__); 1523 ret = -EINVAL; 1524 goto rollback; 1525 } 1526 1527 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf = 1528 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf); 1529 1530 /* Check that device supports requested rss hash functions. */ 1531 if ((dev_info.flow_type_rss_offloads | 1532 dev_conf->rx_adv_conf.rss_conf.rss_hf) != 1533 dev_info.flow_type_rss_offloads) { 1534 RTE_ETHDEV_LOG(ERR, 1535 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n", 1536 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf, 1537 dev_info.flow_type_rss_offloads); 1538 ret = -EINVAL; 1539 goto rollback; 1540 } 1541 1542 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */ 1543 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) && 1544 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) { 1545 RTE_ETHDEV_LOG(ERR, 1546 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n", 1547 port_id, 1548 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH)); 1549 ret = -EINVAL; 1550 goto rollback; 1551 } 1552 1553 /* 1554 * Setup new number of RX/TX queues and reconfigure device. 1555 */ 1556 diag = eth_dev_rx_queue_config(dev, nb_rx_q); 1557 if (diag != 0) { 1558 RTE_ETHDEV_LOG(ERR, 1559 "Port%u eth_dev_rx_queue_config = %d\n", 1560 port_id, diag); 1561 ret = diag; 1562 goto rollback; 1563 } 1564 1565 diag = eth_dev_tx_queue_config(dev, nb_tx_q); 1566 if (diag != 0) { 1567 RTE_ETHDEV_LOG(ERR, 1568 "Port%u eth_dev_tx_queue_config = %d\n", 1569 port_id, diag); 1570 eth_dev_rx_queue_config(dev, 0); 1571 ret = diag; 1572 goto rollback; 1573 } 1574 1575 diag = (*dev->dev_ops->dev_configure)(dev); 1576 if (diag != 0) { 1577 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n", 1578 port_id, diag); 1579 ret = eth_err(port_id, diag); 1580 goto reset_queues; 1581 } 1582 1583 /* Initialize Rx profiling if enabled at compilation time. */ 1584 diag = __rte_eth_dev_profile_init(port_id, dev); 1585 if (diag != 0) { 1586 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n", 1587 port_id, diag); 1588 ret = eth_err(port_id, diag); 1589 goto reset_queues; 1590 } 1591 1592 /* Validate Rx offloads. */ 1593 diag = eth_dev_validate_offloads(port_id, 1594 dev_conf->rxmode.offloads, 1595 dev->data->dev_conf.rxmode.offloads, "Rx", 1596 rte_eth_dev_rx_offload_name); 1597 if (diag != 0) { 1598 ret = diag; 1599 goto reset_queues; 1600 } 1601 1602 /* Validate Tx offloads. */ 1603 diag = eth_dev_validate_offloads(port_id, 1604 dev_conf->txmode.offloads, 1605 dev->data->dev_conf.txmode.offloads, "Tx", 1606 rte_eth_dev_tx_offload_name); 1607 if (diag != 0) { 1608 ret = diag; 1609 goto reset_queues; 1610 } 1611 1612 dev->data->dev_configured = 1; 1613 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0); 1614 return 0; 1615 reset_queues: 1616 eth_dev_rx_queue_config(dev, 0); 1617 eth_dev_tx_queue_config(dev, 0); 1618 rollback: 1619 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf)); 1620 if (old_mtu != dev->data->mtu) 1621 dev->data->mtu = old_mtu; 1622 1623 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret); 1624 return ret; 1625 } 1626 1627 void 1628 rte_eth_dev_internal_reset(struct rte_eth_dev *dev) 1629 { 1630 if (dev->data->dev_started) { 1631 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n", 1632 dev->data->port_id); 1633 return; 1634 } 1635 1636 eth_dev_rx_queue_config(dev, 0); 1637 eth_dev_tx_queue_config(dev, 0); 1638 1639 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf)); 1640 } 1641 1642 static void 1643 eth_dev_mac_restore(struct rte_eth_dev *dev, 1644 struct rte_eth_dev_info *dev_info) 1645 { 1646 struct rte_ether_addr *addr; 1647 uint16_t i; 1648 uint32_t pool = 0; 1649 uint64_t pool_mask; 1650 1651 /* replay MAC address configuration including default MAC */ 1652 addr = &dev->data->mac_addrs[0]; 1653 if (*dev->dev_ops->mac_addr_set != NULL) 1654 (*dev->dev_ops->mac_addr_set)(dev, addr); 1655 else if (*dev->dev_ops->mac_addr_add != NULL) 1656 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool); 1657 1658 if (*dev->dev_ops->mac_addr_add != NULL) { 1659 for (i = 1; i < dev_info->max_mac_addrs; i++) { 1660 addr = &dev->data->mac_addrs[i]; 1661 1662 /* skip zero address */ 1663 if (rte_is_zero_ether_addr(addr)) 1664 continue; 1665 1666 pool = 0; 1667 pool_mask = dev->data->mac_pool_sel[i]; 1668 1669 do { 1670 if (pool_mask & 1ULL) 1671 (*dev->dev_ops->mac_addr_add)(dev, 1672 addr, i, pool); 1673 pool_mask >>= 1; 1674 pool++; 1675 } while (pool_mask); 1676 } 1677 } 1678 } 1679 1680 static int 1681 eth_dev_config_restore(struct rte_eth_dev *dev, 1682 struct rte_eth_dev_info *dev_info, uint16_t port_id) 1683 { 1684 int ret; 1685 1686 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)) 1687 eth_dev_mac_restore(dev, dev_info); 1688 1689 /* replay promiscuous configuration */ 1690 /* 1691 * use callbacks directly since we don't need port_id check and 1692 * would like to bypass the same value set 1693 */ 1694 if (rte_eth_promiscuous_get(port_id) == 1 && 1695 *dev->dev_ops->promiscuous_enable != NULL) { 1696 ret = eth_err(port_id, 1697 (*dev->dev_ops->promiscuous_enable)(dev)); 1698 if (ret != 0 && ret != -ENOTSUP) { 1699 RTE_ETHDEV_LOG(ERR, 1700 "Failed to enable promiscuous mode for device (port %u): %s\n", 1701 port_id, rte_strerror(-ret)); 1702 return ret; 1703 } 1704 } else if (rte_eth_promiscuous_get(port_id) == 0 && 1705 *dev->dev_ops->promiscuous_disable != NULL) { 1706 ret = eth_err(port_id, 1707 (*dev->dev_ops->promiscuous_disable)(dev)); 1708 if (ret != 0 && ret != -ENOTSUP) { 1709 RTE_ETHDEV_LOG(ERR, 1710 "Failed to disable promiscuous mode for device (port %u): %s\n", 1711 port_id, rte_strerror(-ret)); 1712 return ret; 1713 } 1714 } 1715 1716 /* replay all multicast configuration */ 1717 /* 1718 * use callbacks directly since we don't need port_id check and 1719 * would like to bypass the same value set 1720 */ 1721 if (rte_eth_allmulticast_get(port_id) == 1 && 1722 *dev->dev_ops->allmulticast_enable != NULL) { 1723 ret = eth_err(port_id, 1724 (*dev->dev_ops->allmulticast_enable)(dev)); 1725 if (ret != 0 && ret != -ENOTSUP) { 1726 RTE_ETHDEV_LOG(ERR, 1727 "Failed to enable allmulticast mode for device (port %u): %s\n", 1728 port_id, rte_strerror(-ret)); 1729 return ret; 1730 } 1731 } else if (rte_eth_allmulticast_get(port_id) == 0 && 1732 *dev->dev_ops->allmulticast_disable != NULL) { 1733 ret = eth_err(port_id, 1734 (*dev->dev_ops->allmulticast_disable)(dev)); 1735 if (ret != 0 && ret != -ENOTSUP) { 1736 RTE_ETHDEV_LOG(ERR, 1737 "Failed to disable allmulticast mode for device (port %u): %s\n", 1738 port_id, rte_strerror(-ret)); 1739 return ret; 1740 } 1741 } 1742 1743 return 0; 1744 } 1745 1746 int 1747 rte_eth_dev_start(uint16_t port_id) 1748 { 1749 struct rte_eth_dev *dev; 1750 struct rte_eth_dev_info dev_info; 1751 int diag; 1752 int ret, ret_stop; 1753 1754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1755 dev = &rte_eth_devices[port_id]; 1756 1757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP); 1758 1759 if (dev->data->dev_configured == 0) { 1760 RTE_ETHDEV_LOG(INFO, 1761 "Device with port_id=%"PRIu16" is not configured.\n", 1762 port_id); 1763 return -EINVAL; 1764 } 1765 1766 if (dev->data->dev_started != 0) { 1767 RTE_ETHDEV_LOG(INFO, 1768 "Device with port_id=%"PRIu16" already started\n", 1769 port_id); 1770 return 0; 1771 } 1772 1773 ret = rte_eth_dev_info_get(port_id, &dev_info); 1774 if (ret != 0) 1775 return ret; 1776 1777 /* Lets restore MAC now if device does not support live change */ 1778 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR) 1779 eth_dev_mac_restore(dev, &dev_info); 1780 1781 diag = (*dev->dev_ops->dev_start)(dev); 1782 if (diag == 0) 1783 dev->data->dev_started = 1; 1784 else 1785 return eth_err(port_id, diag); 1786 1787 ret = eth_dev_config_restore(dev, &dev_info, port_id); 1788 if (ret != 0) { 1789 RTE_ETHDEV_LOG(ERR, 1790 "Error during restoring configuration for device (port %u): %s\n", 1791 port_id, rte_strerror(-ret)); 1792 ret_stop = rte_eth_dev_stop(port_id); 1793 if (ret_stop != 0) { 1794 RTE_ETHDEV_LOG(ERR, 1795 "Failed to stop device (port %u): %s\n", 1796 port_id, rte_strerror(-ret_stop)); 1797 } 1798 1799 return ret; 1800 } 1801 1802 if (dev->data->dev_conf.intr_conf.lsc == 0) { 1803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP); 1804 (*dev->dev_ops->link_update)(dev, 0); 1805 } 1806 1807 /* expose selection of PMD fast-path functions */ 1808 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev); 1809 1810 rte_ethdev_trace_start(port_id); 1811 return 0; 1812 } 1813 1814 int 1815 rte_eth_dev_stop(uint16_t port_id) 1816 { 1817 struct rte_eth_dev *dev; 1818 int ret; 1819 1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1821 dev = &rte_eth_devices[port_id]; 1822 1823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP); 1824 1825 if (dev->data->dev_started == 0) { 1826 RTE_ETHDEV_LOG(INFO, 1827 "Device with port_id=%"PRIu16" already stopped\n", 1828 port_id); 1829 return 0; 1830 } 1831 1832 /* point fast-path functions to dummy ones */ 1833 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id); 1834 1835 dev->data->dev_started = 0; 1836 ret = (*dev->dev_ops->dev_stop)(dev); 1837 rte_ethdev_trace_stop(port_id, ret); 1838 1839 return ret; 1840 } 1841 1842 int 1843 rte_eth_dev_set_link_up(uint16_t port_id) 1844 { 1845 struct rte_eth_dev *dev; 1846 1847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1848 dev = &rte_eth_devices[port_id]; 1849 1850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP); 1851 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev)); 1852 } 1853 1854 int 1855 rte_eth_dev_set_link_down(uint16_t port_id) 1856 { 1857 struct rte_eth_dev *dev; 1858 1859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1860 dev = &rte_eth_devices[port_id]; 1861 1862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP); 1863 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev)); 1864 } 1865 1866 int 1867 rte_eth_dev_close(uint16_t port_id) 1868 { 1869 struct rte_eth_dev *dev; 1870 int firsterr, binerr; 1871 int *lasterr = &firsterr; 1872 1873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1874 dev = &rte_eth_devices[port_id]; 1875 1876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP); 1877 *lasterr = (*dev->dev_ops->dev_close)(dev); 1878 if (*lasterr != 0) 1879 lasterr = &binerr; 1880 1881 rte_ethdev_trace_close(port_id); 1882 *lasterr = rte_eth_dev_release_port(dev); 1883 1884 return firsterr; 1885 } 1886 1887 int 1888 rte_eth_dev_reset(uint16_t port_id) 1889 { 1890 struct rte_eth_dev *dev; 1891 int ret; 1892 1893 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 1894 dev = &rte_eth_devices[port_id]; 1895 1896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP); 1897 1898 ret = rte_eth_dev_stop(port_id); 1899 if (ret != 0) { 1900 RTE_ETHDEV_LOG(ERR, 1901 "Failed to stop device (port %u) before reset: %s - ignore\n", 1902 port_id, rte_strerror(-ret)); 1903 } 1904 ret = dev->dev_ops->dev_reset(dev); 1905 1906 return eth_err(port_id, ret); 1907 } 1908 1909 int 1910 rte_eth_dev_is_removed(uint16_t port_id) 1911 { 1912 struct rte_eth_dev *dev; 1913 int ret; 1914 1915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0); 1916 dev = &rte_eth_devices[port_id]; 1917 1918 if (dev->state == RTE_ETH_DEV_REMOVED) 1919 return 1; 1920 1921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0); 1922 1923 ret = dev->dev_ops->is_removed(dev); 1924 if (ret != 0) 1925 /* Device is physically removed. */ 1926 dev->state = RTE_ETH_DEV_REMOVED; 1927 1928 return ret; 1929 } 1930 1931 static int 1932 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg, 1933 uint16_t n_seg, uint32_t *mbp_buf_size, 1934 const struct rte_eth_dev_info *dev_info) 1935 { 1936 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa; 1937 struct rte_mempool *mp_first; 1938 uint32_t offset_mask; 1939 uint16_t seg_idx; 1940 1941 if (n_seg > seg_capa->max_nseg) { 1942 RTE_ETHDEV_LOG(ERR, 1943 "Requested Rx segments %u exceed supported %u\n", 1944 n_seg, seg_capa->max_nseg); 1945 return -EINVAL; 1946 } 1947 /* 1948 * Check the sizes and offsets against buffer sizes 1949 * for each segment specified in extended configuration. 1950 */ 1951 mp_first = rx_seg[0].mp; 1952 offset_mask = (1u << seg_capa->offset_align_log2) - 1; 1953 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) { 1954 struct rte_mempool *mpl = rx_seg[seg_idx].mp; 1955 uint32_t length = rx_seg[seg_idx].length; 1956 uint32_t offset = rx_seg[seg_idx].offset; 1957 1958 if (mpl == NULL) { 1959 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n"); 1960 return -EINVAL; 1961 } 1962 if (seg_idx != 0 && mp_first != mpl && 1963 seg_capa->multi_pools == 0) { 1964 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n"); 1965 return -ENOTSUP; 1966 } 1967 if (offset != 0) { 1968 if (seg_capa->offset_allowed == 0) { 1969 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n"); 1970 return -ENOTSUP; 1971 } 1972 if (offset & offset_mask) { 1973 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n", 1974 offset, 1975 seg_capa->offset_align_log2); 1976 return -EINVAL; 1977 } 1978 } 1979 if (mpl->private_data_size < 1980 sizeof(struct rte_pktmbuf_pool_private)) { 1981 RTE_ETHDEV_LOG(ERR, 1982 "%s private_data_size %u < %u\n", 1983 mpl->name, mpl->private_data_size, 1984 (unsigned int)sizeof 1985 (struct rte_pktmbuf_pool_private)); 1986 return -ENOSPC; 1987 } 1988 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM; 1989 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl); 1990 length = length != 0 ? length : *mbp_buf_size; 1991 if (*mbp_buf_size < length + offset) { 1992 RTE_ETHDEV_LOG(ERR, 1993 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n", 1994 mpl->name, *mbp_buf_size, 1995 length + offset, length, offset); 1996 return -EINVAL; 1997 } 1998 } 1999 return 0; 2000 } 2001 2002 int 2003 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, 2004 uint16_t nb_rx_desc, unsigned int socket_id, 2005 const struct rte_eth_rxconf *rx_conf, 2006 struct rte_mempool *mp) 2007 { 2008 int ret; 2009 uint32_t mbp_buf_size; 2010 struct rte_eth_dev *dev; 2011 struct rte_eth_dev_info dev_info; 2012 struct rte_eth_rxconf local_conf; 2013 2014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2015 dev = &rte_eth_devices[port_id]; 2016 2017 if (rx_queue_id >= dev->data->nb_rx_queues) { 2018 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id); 2019 return -EINVAL; 2020 } 2021 2022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP); 2023 2024 ret = rte_eth_dev_info_get(port_id, &dev_info); 2025 if (ret != 0) 2026 return ret; 2027 2028 if (mp != NULL) { 2029 /* Single pool configuration check. */ 2030 if (rx_conf != NULL && rx_conf->rx_nseg != 0) { 2031 RTE_ETHDEV_LOG(ERR, 2032 "Ambiguous segment configuration\n"); 2033 return -EINVAL; 2034 } 2035 /* 2036 * Check the size of the mbuf data buffer, this value 2037 * must be provided in the private data of the memory pool. 2038 * First check that the memory pool(s) has a valid private data. 2039 */ 2040 if (mp->private_data_size < 2041 sizeof(struct rte_pktmbuf_pool_private)) { 2042 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n", 2043 mp->name, mp->private_data_size, 2044 (unsigned int) 2045 sizeof(struct rte_pktmbuf_pool_private)); 2046 return -ENOSPC; 2047 } 2048 mbp_buf_size = rte_pktmbuf_data_room_size(mp); 2049 if (mbp_buf_size < dev_info.min_rx_bufsize + 2050 RTE_PKTMBUF_HEADROOM) { 2051 RTE_ETHDEV_LOG(ERR, 2052 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n", 2053 mp->name, mbp_buf_size, 2054 RTE_PKTMBUF_HEADROOM + 2055 dev_info.min_rx_bufsize, 2056 RTE_PKTMBUF_HEADROOM, 2057 dev_info.min_rx_bufsize); 2058 return -EINVAL; 2059 } 2060 } else { 2061 const struct rte_eth_rxseg_split *rx_seg; 2062 uint16_t n_seg; 2063 2064 /* Extended multi-segment configuration check. */ 2065 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) { 2066 RTE_ETHDEV_LOG(ERR, 2067 "Memory pool is null and no extended configuration provided\n"); 2068 return -EINVAL; 2069 } 2070 2071 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg; 2072 n_seg = rx_conf->rx_nseg; 2073 2074 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) { 2075 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg, 2076 &mbp_buf_size, 2077 &dev_info); 2078 if (ret != 0) 2079 return ret; 2080 } else { 2081 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n"); 2082 return -EINVAL; 2083 } 2084 } 2085 2086 /* Use default specified by driver, if nb_rx_desc is zero */ 2087 if (nb_rx_desc == 0) { 2088 nb_rx_desc = dev_info.default_rxportconf.ring_size; 2089 /* If driver default is also zero, fall back on EAL default */ 2090 if (nb_rx_desc == 0) 2091 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE; 2092 } 2093 2094 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max || 2095 nb_rx_desc < dev_info.rx_desc_lim.nb_min || 2096 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) { 2097 2098 RTE_ETHDEV_LOG(ERR, 2099 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n", 2100 nb_rx_desc, dev_info.rx_desc_lim.nb_max, 2101 dev_info.rx_desc_lim.nb_min, 2102 dev_info.rx_desc_lim.nb_align); 2103 return -EINVAL; 2104 } 2105 2106 if (dev->data->dev_started && 2107 !(dev_info.dev_capa & 2108 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP)) 2109 return -EBUSY; 2110 2111 if (dev->data->dev_started && 2112 (dev->data->rx_queue_state[rx_queue_id] != 2113 RTE_ETH_QUEUE_STATE_STOPPED)) 2114 return -EBUSY; 2115 2116 eth_dev_rxq_release(dev, rx_queue_id); 2117 2118 if (rx_conf == NULL) 2119 rx_conf = &dev_info.default_rxconf; 2120 2121 local_conf = *rx_conf; 2122 2123 /* 2124 * If an offloading has already been enabled in 2125 * rte_eth_dev_configure(), it has been enabled on all queues, 2126 * so there is no need to enable it in this queue again. 2127 * The local_conf.offloads input to underlying PMD only carries 2128 * those offloadings which are only enabled on this queue and 2129 * not enabled on all queues. 2130 */ 2131 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads; 2132 2133 /* 2134 * New added offloadings for this queue are those not enabled in 2135 * rte_eth_dev_configure() and they must be per-queue type. 2136 * A pure per-port offloading can't be enabled on a queue while 2137 * disabled on another queue. A pure per-port offloading can't 2138 * be enabled for any queue as new added one if it hasn't been 2139 * enabled in rte_eth_dev_configure(). 2140 */ 2141 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) != 2142 local_conf.offloads) { 2143 RTE_ETHDEV_LOG(ERR, 2144 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be " 2145 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n", 2146 port_id, rx_queue_id, local_conf.offloads, 2147 dev_info.rx_queue_offload_capa, 2148 __func__); 2149 return -EINVAL; 2150 } 2151 2152 /* 2153 * If LRO is enabled, check that the maximum aggregated packet 2154 * size is supported by the configured device. 2155 */ 2156 /* Get the real Ethernet overhead length */ 2157 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) { 2158 uint32_t overhead_len; 2159 uint32_t max_rx_pktlen; 2160 int ret; 2161 2162 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen, 2163 dev_info.max_mtu); 2164 max_rx_pktlen = dev->data->mtu + overhead_len; 2165 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0) 2166 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen; 2167 ret = eth_dev_check_lro_pkt_size(port_id, 2168 dev->data->dev_conf.rxmode.max_lro_pkt_size, 2169 max_rx_pktlen, 2170 dev_info.max_lro_pkt_size); 2171 if (ret != 0) 2172 return ret; 2173 } 2174 2175 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc, 2176 socket_id, &local_conf, mp); 2177 if (!ret) { 2178 if (!dev->data->min_rx_buf_size || 2179 dev->data->min_rx_buf_size > mbp_buf_size) 2180 dev->data->min_rx_buf_size = mbp_buf_size; 2181 } 2182 2183 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp, 2184 rx_conf, ret); 2185 return eth_err(port_id, ret); 2186 } 2187 2188 int 2189 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, 2190 uint16_t nb_rx_desc, 2191 const struct rte_eth_hairpin_conf *conf) 2192 { 2193 int ret; 2194 struct rte_eth_dev *dev; 2195 struct rte_eth_hairpin_cap cap; 2196 int i; 2197 int count; 2198 2199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2200 dev = &rte_eth_devices[port_id]; 2201 2202 if (rx_queue_id >= dev->data->nb_rx_queues) { 2203 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id); 2204 return -EINVAL; 2205 } 2206 2207 if (conf == NULL) { 2208 RTE_ETHDEV_LOG(ERR, 2209 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n", 2210 port_id); 2211 return -EINVAL; 2212 } 2213 2214 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap); 2215 if (ret != 0) 2216 return ret; 2217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup, 2218 -ENOTSUP); 2219 /* if nb_rx_desc is zero use max number of desc from the driver. */ 2220 if (nb_rx_desc == 0) 2221 nb_rx_desc = cap.max_nb_desc; 2222 if (nb_rx_desc > cap.max_nb_desc) { 2223 RTE_ETHDEV_LOG(ERR, 2224 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu", 2225 nb_rx_desc, cap.max_nb_desc); 2226 return -EINVAL; 2227 } 2228 if (conf->peer_count > cap.max_rx_2_tx) { 2229 RTE_ETHDEV_LOG(ERR, 2230 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu", 2231 conf->peer_count, cap.max_rx_2_tx); 2232 return -EINVAL; 2233 } 2234 if (conf->peer_count == 0) { 2235 RTE_ETHDEV_LOG(ERR, 2236 "Invalid value for number of peers for Rx queue(=%u), should be: > 0", 2237 conf->peer_count); 2238 return -EINVAL; 2239 } 2240 for (i = 0, count = 0; i < dev->data->nb_rx_queues && 2241 cap.max_nb_queues != UINT16_MAX; i++) { 2242 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i)) 2243 count++; 2244 } 2245 if (count > cap.max_nb_queues) { 2246 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d", 2247 cap.max_nb_queues); 2248 return -EINVAL; 2249 } 2250 if (dev->data->dev_started) 2251 return -EBUSY; 2252 eth_dev_rxq_release(dev, rx_queue_id); 2253 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id, 2254 nb_rx_desc, conf); 2255 if (ret == 0) 2256 dev->data->rx_queue_state[rx_queue_id] = 2257 RTE_ETH_QUEUE_STATE_HAIRPIN; 2258 return eth_err(port_id, ret); 2259 } 2260 2261 int 2262 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, 2263 uint16_t nb_tx_desc, unsigned int socket_id, 2264 const struct rte_eth_txconf *tx_conf) 2265 { 2266 struct rte_eth_dev *dev; 2267 struct rte_eth_dev_info dev_info; 2268 struct rte_eth_txconf local_conf; 2269 int ret; 2270 2271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2272 dev = &rte_eth_devices[port_id]; 2273 2274 if (tx_queue_id >= dev->data->nb_tx_queues) { 2275 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id); 2276 return -EINVAL; 2277 } 2278 2279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP); 2280 2281 ret = rte_eth_dev_info_get(port_id, &dev_info); 2282 if (ret != 0) 2283 return ret; 2284 2285 /* Use default specified by driver, if nb_tx_desc is zero */ 2286 if (nb_tx_desc == 0) { 2287 nb_tx_desc = dev_info.default_txportconf.ring_size; 2288 /* If driver default is zero, fall back on EAL default */ 2289 if (nb_tx_desc == 0) 2290 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE; 2291 } 2292 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max || 2293 nb_tx_desc < dev_info.tx_desc_lim.nb_min || 2294 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) { 2295 RTE_ETHDEV_LOG(ERR, 2296 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n", 2297 nb_tx_desc, dev_info.tx_desc_lim.nb_max, 2298 dev_info.tx_desc_lim.nb_min, 2299 dev_info.tx_desc_lim.nb_align); 2300 return -EINVAL; 2301 } 2302 2303 if (dev->data->dev_started && 2304 !(dev_info.dev_capa & 2305 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP)) 2306 return -EBUSY; 2307 2308 if (dev->data->dev_started && 2309 (dev->data->tx_queue_state[tx_queue_id] != 2310 RTE_ETH_QUEUE_STATE_STOPPED)) 2311 return -EBUSY; 2312 2313 eth_dev_txq_release(dev, tx_queue_id); 2314 2315 if (tx_conf == NULL) 2316 tx_conf = &dev_info.default_txconf; 2317 2318 local_conf = *tx_conf; 2319 2320 /* 2321 * If an offloading has already been enabled in 2322 * rte_eth_dev_configure(), it has been enabled on all queues, 2323 * so there is no need to enable it in this queue again. 2324 * The local_conf.offloads input to underlying PMD only carries 2325 * those offloadings which are only enabled on this queue and 2326 * not enabled on all queues. 2327 */ 2328 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads; 2329 2330 /* 2331 * New added offloadings for this queue are those not enabled in 2332 * rte_eth_dev_configure() and they must be per-queue type. 2333 * A pure per-port offloading can't be enabled on a queue while 2334 * disabled on another queue. A pure per-port offloading can't 2335 * be enabled for any queue as new added one if it hasn't been 2336 * enabled in rte_eth_dev_configure(). 2337 */ 2338 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) != 2339 local_conf.offloads) { 2340 RTE_ETHDEV_LOG(ERR, 2341 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be " 2342 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n", 2343 port_id, tx_queue_id, local_conf.offloads, 2344 dev_info.tx_queue_offload_capa, 2345 __func__); 2346 return -EINVAL; 2347 } 2348 2349 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf); 2350 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev, 2351 tx_queue_id, nb_tx_desc, socket_id, &local_conf)); 2352 } 2353 2354 int 2355 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, 2356 uint16_t nb_tx_desc, 2357 const struct rte_eth_hairpin_conf *conf) 2358 { 2359 struct rte_eth_dev *dev; 2360 struct rte_eth_hairpin_cap cap; 2361 int i; 2362 int count; 2363 int ret; 2364 2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2366 dev = &rte_eth_devices[port_id]; 2367 2368 if (tx_queue_id >= dev->data->nb_tx_queues) { 2369 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id); 2370 return -EINVAL; 2371 } 2372 2373 if (conf == NULL) { 2374 RTE_ETHDEV_LOG(ERR, 2375 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n", 2376 port_id); 2377 return -EINVAL; 2378 } 2379 2380 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap); 2381 if (ret != 0) 2382 return ret; 2383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup, 2384 -ENOTSUP); 2385 /* if nb_rx_desc is zero use max number of desc from the driver. */ 2386 if (nb_tx_desc == 0) 2387 nb_tx_desc = cap.max_nb_desc; 2388 if (nb_tx_desc > cap.max_nb_desc) { 2389 RTE_ETHDEV_LOG(ERR, 2390 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu", 2391 nb_tx_desc, cap.max_nb_desc); 2392 return -EINVAL; 2393 } 2394 if (conf->peer_count > cap.max_tx_2_rx) { 2395 RTE_ETHDEV_LOG(ERR, 2396 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu", 2397 conf->peer_count, cap.max_tx_2_rx); 2398 return -EINVAL; 2399 } 2400 if (conf->peer_count == 0) { 2401 RTE_ETHDEV_LOG(ERR, 2402 "Invalid value for number of peers for Tx queue(=%u), should be: > 0", 2403 conf->peer_count); 2404 return -EINVAL; 2405 } 2406 for (i = 0, count = 0; i < dev->data->nb_tx_queues && 2407 cap.max_nb_queues != UINT16_MAX; i++) { 2408 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i)) 2409 count++; 2410 } 2411 if (count > cap.max_nb_queues) { 2412 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d", 2413 cap.max_nb_queues); 2414 return -EINVAL; 2415 } 2416 if (dev->data->dev_started) 2417 return -EBUSY; 2418 eth_dev_txq_release(dev, tx_queue_id); 2419 ret = (*dev->dev_ops->tx_hairpin_queue_setup) 2420 (dev, tx_queue_id, nb_tx_desc, conf); 2421 if (ret == 0) 2422 dev->data->tx_queue_state[tx_queue_id] = 2423 RTE_ETH_QUEUE_STATE_HAIRPIN; 2424 return eth_err(port_id, ret); 2425 } 2426 2427 int 2428 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port) 2429 { 2430 struct rte_eth_dev *dev; 2431 int ret; 2432 2433 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV); 2434 dev = &rte_eth_devices[tx_port]; 2435 2436 if (dev->data->dev_started == 0) { 2437 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port); 2438 return -EBUSY; 2439 } 2440 2441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP); 2442 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port); 2443 if (ret != 0) 2444 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d" 2445 " to Rx %d (%d - all ports)\n", 2446 tx_port, rx_port, RTE_MAX_ETHPORTS); 2447 2448 return ret; 2449 } 2450 2451 int 2452 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port) 2453 { 2454 struct rte_eth_dev *dev; 2455 int ret; 2456 2457 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV); 2458 dev = &rte_eth_devices[tx_port]; 2459 2460 if (dev->data->dev_started == 0) { 2461 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port); 2462 return -EBUSY; 2463 } 2464 2465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP); 2466 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port); 2467 if (ret != 0) 2468 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d" 2469 " from Rx %d (%d - all ports)\n", 2470 tx_port, rx_port, RTE_MAX_ETHPORTS); 2471 2472 return ret; 2473 } 2474 2475 int 2476 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, 2477 size_t len, uint32_t direction) 2478 { 2479 struct rte_eth_dev *dev; 2480 int ret; 2481 2482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2483 dev = &rte_eth_devices[port_id]; 2484 2485 if (peer_ports == NULL) { 2486 RTE_ETHDEV_LOG(ERR, 2487 "Cannot get ethdev port %u hairpin peer ports to NULL\n", 2488 port_id); 2489 return -EINVAL; 2490 } 2491 2492 if (len == 0) { 2493 RTE_ETHDEV_LOG(ERR, 2494 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n", 2495 port_id); 2496 return -EINVAL; 2497 } 2498 2499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports, 2500 -ENOTSUP); 2501 2502 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports, 2503 len, direction); 2504 if (ret < 0) 2505 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n", 2506 port_id, direction ? "Rx" : "Tx"); 2507 2508 return ret; 2509 } 2510 2511 void 2512 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, 2513 void *userdata __rte_unused) 2514 { 2515 rte_pktmbuf_free_bulk(pkts, unsent); 2516 } 2517 2518 void 2519 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, 2520 void *userdata) 2521 { 2522 uint64_t *count = userdata; 2523 2524 rte_pktmbuf_free_bulk(pkts, unsent); 2525 *count += unsent; 2526 } 2527 2528 int 2529 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, 2530 buffer_tx_error_fn cbfn, void *userdata) 2531 { 2532 if (buffer == NULL) { 2533 RTE_ETHDEV_LOG(ERR, 2534 "Cannot set Tx buffer error callback to NULL buffer\n"); 2535 return -EINVAL; 2536 } 2537 2538 buffer->error_callback = cbfn; 2539 buffer->error_userdata = userdata; 2540 return 0; 2541 } 2542 2543 int 2544 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size) 2545 { 2546 int ret = 0; 2547 2548 if (buffer == NULL) { 2549 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n"); 2550 return -EINVAL; 2551 } 2552 2553 buffer->size = size; 2554 if (buffer->error_callback == NULL) { 2555 ret = rte_eth_tx_buffer_set_err_callback( 2556 buffer, rte_eth_tx_buffer_drop_callback, NULL); 2557 } 2558 2559 return ret; 2560 } 2561 2562 int 2563 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt) 2564 { 2565 struct rte_eth_dev *dev; 2566 int ret; 2567 2568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2569 dev = &rte_eth_devices[port_id]; 2570 2571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP); 2572 2573 /* Call driver to free pending mbufs. */ 2574 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id], 2575 free_cnt); 2576 return eth_err(port_id, ret); 2577 } 2578 2579 int 2580 rte_eth_promiscuous_enable(uint16_t port_id) 2581 { 2582 struct rte_eth_dev *dev; 2583 int diag = 0; 2584 2585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2586 dev = &rte_eth_devices[port_id]; 2587 2588 if (dev->data->promiscuous == 1) 2589 return 0; 2590 2591 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP); 2592 2593 diag = (*dev->dev_ops->promiscuous_enable)(dev); 2594 dev->data->promiscuous = (diag == 0) ? 1 : 0; 2595 2596 return eth_err(port_id, diag); 2597 } 2598 2599 int 2600 rte_eth_promiscuous_disable(uint16_t port_id) 2601 { 2602 struct rte_eth_dev *dev; 2603 int diag = 0; 2604 2605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2606 dev = &rte_eth_devices[port_id]; 2607 2608 if (dev->data->promiscuous == 0) 2609 return 0; 2610 2611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP); 2612 2613 dev->data->promiscuous = 0; 2614 diag = (*dev->dev_ops->promiscuous_disable)(dev); 2615 if (diag != 0) 2616 dev->data->promiscuous = 1; 2617 2618 return eth_err(port_id, diag); 2619 } 2620 2621 int 2622 rte_eth_promiscuous_get(uint16_t port_id) 2623 { 2624 struct rte_eth_dev *dev; 2625 2626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2627 dev = &rte_eth_devices[port_id]; 2628 2629 return dev->data->promiscuous; 2630 } 2631 2632 int 2633 rte_eth_allmulticast_enable(uint16_t port_id) 2634 { 2635 struct rte_eth_dev *dev; 2636 int diag; 2637 2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2639 dev = &rte_eth_devices[port_id]; 2640 2641 if (dev->data->all_multicast == 1) 2642 return 0; 2643 2644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP); 2645 diag = (*dev->dev_ops->allmulticast_enable)(dev); 2646 dev->data->all_multicast = (diag == 0) ? 1 : 0; 2647 2648 return eth_err(port_id, diag); 2649 } 2650 2651 int 2652 rte_eth_allmulticast_disable(uint16_t port_id) 2653 { 2654 struct rte_eth_dev *dev; 2655 int diag; 2656 2657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2658 dev = &rte_eth_devices[port_id]; 2659 2660 if (dev->data->all_multicast == 0) 2661 return 0; 2662 2663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP); 2664 dev->data->all_multicast = 0; 2665 diag = (*dev->dev_ops->allmulticast_disable)(dev); 2666 if (diag != 0) 2667 dev->data->all_multicast = 1; 2668 2669 return eth_err(port_id, diag); 2670 } 2671 2672 int 2673 rte_eth_allmulticast_get(uint16_t port_id) 2674 { 2675 struct rte_eth_dev *dev; 2676 2677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2678 dev = &rte_eth_devices[port_id]; 2679 2680 return dev->data->all_multicast; 2681 } 2682 2683 int 2684 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link) 2685 { 2686 struct rte_eth_dev *dev; 2687 2688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2689 dev = &rte_eth_devices[port_id]; 2690 2691 if (eth_link == NULL) { 2692 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n", 2693 port_id); 2694 return -EINVAL; 2695 } 2696 2697 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started) 2698 rte_eth_linkstatus_get(dev, eth_link); 2699 else { 2700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP); 2701 (*dev->dev_ops->link_update)(dev, 1); 2702 *eth_link = dev->data->dev_link; 2703 } 2704 2705 return 0; 2706 } 2707 2708 int 2709 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link) 2710 { 2711 struct rte_eth_dev *dev; 2712 2713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2714 dev = &rte_eth_devices[port_id]; 2715 2716 if (eth_link == NULL) { 2717 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n", 2718 port_id); 2719 return -EINVAL; 2720 } 2721 2722 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started) 2723 rte_eth_linkstatus_get(dev, eth_link); 2724 else { 2725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP); 2726 (*dev->dev_ops->link_update)(dev, 0); 2727 *eth_link = dev->data->dev_link; 2728 } 2729 2730 return 0; 2731 } 2732 2733 const char * 2734 rte_eth_link_speed_to_str(uint32_t link_speed) 2735 { 2736 switch (link_speed) { 2737 case ETH_SPEED_NUM_NONE: return "None"; 2738 case ETH_SPEED_NUM_10M: return "10 Mbps"; 2739 case ETH_SPEED_NUM_100M: return "100 Mbps"; 2740 case ETH_SPEED_NUM_1G: return "1 Gbps"; 2741 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps"; 2742 case ETH_SPEED_NUM_5G: return "5 Gbps"; 2743 case ETH_SPEED_NUM_10G: return "10 Gbps"; 2744 case ETH_SPEED_NUM_20G: return "20 Gbps"; 2745 case ETH_SPEED_NUM_25G: return "25 Gbps"; 2746 case ETH_SPEED_NUM_40G: return "40 Gbps"; 2747 case ETH_SPEED_NUM_50G: return "50 Gbps"; 2748 case ETH_SPEED_NUM_56G: return "56 Gbps"; 2749 case ETH_SPEED_NUM_100G: return "100 Gbps"; 2750 case ETH_SPEED_NUM_200G: return "200 Gbps"; 2751 case ETH_SPEED_NUM_UNKNOWN: return "Unknown"; 2752 default: return "Invalid"; 2753 } 2754 } 2755 2756 int 2757 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link) 2758 { 2759 if (str == NULL) { 2760 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n"); 2761 return -EINVAL; 2762 } 2763 2764 if (len == 0) { 2765 RTE_ETHDEV_LOG(ERR, 2766 "Cannot convert link to string with zero size\n"); 2767 return -EINVAL; 2768 } 2769 2770 if (eth_link == NULL) { 2771 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n"); 2772 return -EINVAL; 2773 } 2774 2775 if (eth_link->link_status == ETH_LINK_DOWN) 2776 return snprintf(str, len, "Link down"); 2777 else 2778 return snprintf(str, len, "Link up at %s %s %s", 2779 rte_eth_link_speed_to_str(eth_link->link_speed), 2780 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ? 2781 "FDX" : "HDX", 2782 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ? 2783 "Autoneg" : "Fixed"); 2784 } 2785 2786 int 2787 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats) 2788 { 2789 struct rte_eth_dev *dev; 2790 2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2792 dev = &rte_eth_devices[port_id]; 2793 2794 if (stats == NULL) { 2795 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n", 2796 port_id); 2797 return -EINVAL; 2798 } 2799 2800 memset(stats, 0, sizeof(*stats)); 2801 2802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP); 2803 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed; 2804 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats)); 2805 } 2806 2807 int 2808 rte_eth_stats_reset(uint16_t port_id) 2809 { 2810 struct rte_eth_dev *dev; 2811 int ret; 2812 2813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2814 dev = &rte_eth_devices[port_id]; 2815 2816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP); 2817 ret = (*dev->dev_ops->stats_reset)(dev); 2818 if (ret != 0) 2819 return eth_err(port_id, ret); 2820 2821 dev->data->rx_mbuf_alloc_failed = 0; 2822 2823 return 0; 2824 } 2825 2826 static inline int 2827 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev) 2828 { 2829 uint16_t nb_rxqs, nb_txqs; 2830 int count; 2831 2832 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 2833 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 2834 2835 count = RTE_NB_STATS; 2836 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) { 2837 count += nb_rxqs * RTE_NB_RXQ_STATS; 2838 count += nb_txqs * RTE_NB_TXQ_STATS; 2839 } 2840 2841 return count; 2842 } 2843 2844 static int 2845 eth_dev_get_xstats_count(uint16_t port_id) 2846 { 2847 struct rte_eth_dev *dev; 2848 int count; 2849 2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2851 dev = &rte_eth_devices[port_id]; 2852 if (dev->dev_ops->xstats_get_names != NULL) { 2853 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0); 2854 if (count < 0) 2855 return eth_err(port_id, count); 2856 } else 2857 count = 0; 2858 2859 2860 count += eth_dev_get_xstats_basic_count(dev); 2861 2862 return count; 2863 } 2864 2865 int 2866 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, 2867 uint64_t *id) 2868 { 2869 int cnt_xstats, idx_xstat; 2870 2871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2872 2873 if (xstat_name == NULL) { 2874 RTE_ETHDEV_LOG(ERR, 2875 "Cannot get ethdev port %u xstats ID from NULL xstat name\n", 2876 port_id); 2877 return -ENOMEM; 2878 } 2879 2880 if (id == NULL) { 2881 RTE_ETHDEV_LOG(ERR, 2882 "Cannot get ethdev port %u xstats ID to NULL\n", 2883 port_id); 2884 return -ENOMEM; 2885 } 2886 2887 /* Get count */ 2888 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL); 2889 if (cnt_xstats < 0) { 2890 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n"); 2891 return -ENODEV; 2892 } 2893 2894 /* Get id-name lookup table */ 2895 struct rte_eth_xstat_name xstats_names[cnt_xstats]; 2896 2897 if (cnt_xstats != rte_eth_xstats_get_names_by_id( 2898 port_id, xstats_names, cnt_xstats, NULL)) { 2899 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n"); 2900 return -1; 2901 } 2902 2903 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) { 2904 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) { 2905 *id = idx_xstat; 2906 return 0; 2907 }; 2908 } 2909 2910 return -EINVAL; 2911 } 2912 2913 /* retrieve basic stats names */ 2914 static int 2915 eth_basic_stats_get_names(struct rte_eth_dev *dev, 2916 struct rte_eth_xstat_name *xstats_names) 2917 { 2918 int cnt_used_entries = 0; 2919 uint32_t idx, id_queue; 2920 uint16_t num_q; 2921 2922 for (idx = 0; idx < RTE_NB_STATS; idx++) { 2923 strlcpy(xstats_names[cnt_used_entries].name, 2924 eth_dev_stats_strings[idx].name, 2925 sizeof(xstats_names[0].name)); 2926 cnt_used_entries++; 2927 } 2928 2929 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0) 2930 return cnt_used_entries; 2931 2932 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 2933 for (id_queue = 0; id_queue < num_q; id_queue++) { 2934 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) { 2935 snprintf(xstats_names[cnt_used_entries].name, 2936 sizeof(xstats_names[0].name), 2937 "rx_q%u_%s", 2938 id_queue, eth_dev_rxq_stats_strings[idx].name); 2939 cnt_used_entries++; 2940 } 2941 2942 } 2943 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 2944 for (id_queue = 0; id_queue < num_q; id_queue++) { 2945 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) { 2946 snprintf(xstats_names[cnt_used_entries].name, 2947 sizeof(xstats_names[0].name), 2948 "tx_q%u_%s", 2949 id_queue, eth_dev_txq_stats_strings[idx].name); 2950 cnt_used_entries++; 2951 } 2952 } 2953 return cnt_used_entries; 2954 } 2955 2956 /* retrieve ethdev extended statistics names */ 2957 int 2958 rte_eth_xstats_get_names_by_id(uint16_t port_id, 2959 struct rte_eth_xstat_name *xstats_names, unsigned int size, 2960 uint64_t *ids) 2961 { 2962 struct rte_eth_xstat_name *xstats_names_copy; 2963 unsigned int no_basic_stat_requested = 1; 2964 unsigned int no_ext_stat_requested = 1; 2965 unsigned int expected_entries; 2966 unsigned int basic_count; 2967 struct rte_eth_dev *dev; 2968 unsigned int i; 2969 int ret; 2970 2971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 2972 dev = &rte_eth_devices[port_id]; 2973 2974 basic_count = eth_dev_get_xstats_basic_count(dev); 2975 ret = eth_dev_get_xstats_count(port_id); 2976 if (ret < 0) 2977 return ret; 2978 expected_entries = (unsigned int)ret; 2979 2980 /* Return max number of stats if no ids given */ 2981 if (!ids) { 2982 if (!xstats_names) 2983 return expected_entries; 2984 else if (xstats_names && size < expected_entries) 2985 return expected_entries; 2986 } 2987 2988 if (ids && !xstats_names) 2989 return -EINVAL; 2990 2991 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) { 2992 uint64_t ids_copy[size]; 2993 2994 for (i = 0; i < size; i++) { 2995 if (ids[i] < basic_count) { 2996 no_basic_stat_requested = 0; 2997 break; 2998 } 2999 3000 /* 3001 * Convert ids to xstats ids that PMD knows. 3002 * ids known by user are basic + extended stats. 3003 */ 3004 ids_copy[i] = ids[i] - basic_count; 3005 } 3006 3007 if (no_basic_stat_requested) 3008 return (*dev->dev_ops->xstats_get_names_by_id)(dev, 3009 ids_copy, xstats_names, size); 3010 } 3011 3012 /* Retrieve all stats */ 3013 if (!ids) { 3014 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names, 3015 expected_entries); 3016 if (num_stats < 0 || num_stats > (int)expected_entries) 3017 return num_stats; 3018 else 3019 return expected_entries; 3020 } 3021 3022 xstats_names_copy = calloc(expected_entries, 3023 sizeof(struct rte_eth_xstat_name)); 3024 3025 if (!xstats_names_copy) { 3026 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n"); 3027 return -ENOMEM; 3028 } 3029 3030 if (ids) { 3031 for (i = 0; i < size; i++) { 3032 if (ids[i] >= basic_count) { 3033 no_ext_stat_requested = 0; 3034 break; 3035 } 3036 } 3037 } 3038 3039 /* Fill xstats_names_copy structure */ 3040 if (ids && no_ext_stat_requested) { 3041 eth_basic_stats_get_names(dev, xstats_names_copy); 3042 } else { 3043 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy, 3044 expected_entries); 3045 if (ret < 0) { 3046 free(xstats_names_copy); 3047 return ret; 3048 } 3049 } 3050 3051 /* Filter stats */ 3052 for (i = 0; i < size; i++) { 3053 if (ids[i] >= expected_entries) { 3054 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n"); 3055 free(xstats_names_copy); 3056 return -1; 3057 } 3058 xstats_names[i] = xstats_names_copy[ids[i]]; 3059 } 3060 3061 free(xstats_names_copy); 3062 return size; 3063 } 3064 3065 int 3066 rte_eth_xstats_get_names(uint16_t port_id, 3067 struct rte_eth_xstat_name *xstats_names, 3068 unsigned int size) 3069 { 3070 struct rte_eth_dev *dev; 3071 int cnt_used_entries; 3072 int cnt_expected_entries; 3073 int cnt_driver_entries; 3074 3075 cnt_expected_entries = eth_dev_get_xstats_count(port_id); 3076 if (xstats_names == NULL || cnt_expected_entries < 0 || 3077 (int)size < cnt_expected_entries) 3078 return cnt_expected_entries; 3079 3080 /* port_id checked in eth_dev_get_xstats_count() */ 3081 dev = &rte_eth_devices[port_id]; 3082 3083 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names); 3084 3085 if (dev->dev_ops->xstats_get_names != NULL) { 3086 /* If there are any driver-specific xstats, append them 3087 * to end of list. 3088 */ 3089 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)( 3090 dev, 3091 xstats_names + cnt_used_entries, 3092 size - cnt_used_entries); 3093 if (cnt_driver_entries < 0) 3094 return eth_err(port_id, cnt_driver_entries); 3095 cnt_used_entries += cnt_driver_entries; 3096 } 3097 3098 return cnt_used_entries; 3099 } 3100 3101 3102 static int 3103 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats) 3104 { 3105 struct rte_eth_dev *dev; 3106 struct rte_eth_stats eth_stats; 3107 unsigned int count = 0, i, q; 3108 uint64_t val, *stats_ptr; 3109 uint16_t nb_rxqs, nb_txqs; 3110 int ret; 3111 3112 ret = rte_eth_stats_get(port_id, ð_stats); 3113 if (ret < 0) 3114 return ret; 3115 3116 dev = &rte_eth_devices[port_id]; 3117 3118 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 3119 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 3120 3121 /* global stats */ 3122 for (i = 0; i < RTE_NB_STATS; i++) { 3123 stats_ptr = RTE_PTR_ADD(ð_stats, 3124 eth_dev_stats_strings[i].offset); 3125 val = *stats_ptr; 3126 xstats[count++].value = val; 3127 } 3128 3129 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0) 3130 return count; 3131 3132 /* per-rxq stats */ 3133 for (q = 0; q < nb_rxqs; q++) { 3134 for (i = 0; i < RTE_NB_RXQ_STATS; i++) { 3135 stats_ptr = RTE_PTR_ADD(ð_stats, 3136 eth_dev_rxq_stats_strings[i].offset + 3137 q * sizeof(uint64_t)); 3138 val = *stats_ptr; 3139 xstats[count++].value = val; 3140 } 3141 } 3142 3143 /* per-txq stats */ 3144 for (q = 0; q < nb_txqs; q++) { 3145 for (i = 0; i < RTE_NB_TXQ_STATS; i++) { 3146 stats_ptr = RTE_PTR_ADD(ð_stats, 3147 eth_dev_txq_stats_strings[i].offset + 3148 q * sizeof(uint64_t)); 3149 val = *stats_ptr; 3150 xstats[count++].value = val; 3151 } 3152 } 3153 return count; 3154 } 3155 3156 /* retrieve ethdev extended statistics */ 3157 int 3158 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, 3159 uint64_t *values, unsigned int size) 3160 { 3161 unsigned int no_basic_stat_requested = 1; 3162 unsigned int no_ext_stat_requested = 1; 3163 unsigned int num_xstats_filled; 3164 unsigned int basic_count; 3165 uint16_t expected_entries; 3166 struct rte_eth_dev *dev; 3167 unsigned int i; 3168 int ret; 3169 3170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3171 dev = &rte_eth_devices[port_id]; 3172 3173 ret = eth_dev_get_xstats_count(port_id); 3174 if (ret < 0) 3175 return ret; 3176 expected_entries = (uint16_t)ret; 3177 struct rte_eth_xstat xstats[expected_entries]; 3178 basic_count = eth_dev_get_xstats_basic_count(dev); 3179 3180 /* Return max number of stats if no ids given */ 3181 if (!ids) { 3182 if (!values) 3183 return expected_entries; 3184 else if (values && size < expected_entries) 3185 return expected_entries; 3186 } 3187 3188 if (ids && !values) 3189 return -EINVAL; 3190 3191 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) { 3192 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev); 3193 uint64_t ids_copy[size]; 3194 3195 for (i = 0; i < size; i++) { 3196 if (ids[i] < basic_count) { 3197 no_basic_stat_requested = 0; 3198 break; 3199 } 3200 3201 /* 3202 * Convert ids to xstats ids that PMD knows. 3203 * ids known by user are basic + extended stats. 3204 */ 3205 ids_copy[i] = ids[i] - basic_count; 3206 } 3207 3208 if (no_basic_stat_requested) 3209 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy, 3210 values, size); 3211 } 3212 3213 if (ids) { 3214 for (i = 0; i < size; i++) { 3215 if (ids[i] >= basic_count) { 3216 no_ext_stat_requested = 0; 3217 break; 3218 } 3219 } 3220 } 3221 3222 /* Fill the xstats structure */ 3223 if (ids && no_ext_stat_requested) 3224 ret = eth_basic_stats_get(port_id, xstats); 3225 else 3226 ret = rte_eth_xstats_get(port_id, xstats, expected_entries); 3227 3228 if (ret < 0) 3229 return ret; 3230 num_xstats_filled = (unsigned int)ret; 3231 3232 /* Return all stats */ 3233 if (!ids) { 3234 for (i = 0; i < num_xstats_filled; i++) 3235 values[i] = xstats[i].value; 3236 return expected_entries; 3237 } 3238 3239 /* Filter stats */ 3240 for (i = 0; i < size; i++) { 3241 if (ids[i] >= expected_entries) { 3242 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n"); 3243 return -1; 3244 } 3245 values[i] = xstats[ids[i]].value; 3246 } 3247 return size; 3248 } 3249 3250 int 3251 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, 3252 unsigned int n) 3253 { 3254 struct rte_eth_dev *dev; 3255 unsigned int count = 0, i; 3256 signed int xcount = 0; 3257 uint16_t nb_rxqs, nb_txqs; 3258 int ret; 3259 3260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3261 dev = &rte_eth_devices[port_id]; 3262 3263 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 3264 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); 3265 3266 /* Return generic statistics */ 3267 count = RTE_NB_STATS; 3268 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) 3269 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS); 3270 3271 /* implemented by the driver */ 3272 if (dev->dev_ops->xstats_get != NULL) { 3273 /* Retrieve the xstats from the driver at the end of the 3274 * xstats struct. 3275 */ 3276 xcount = (*dev->dev_ops->xstats_get)(dev, 3277 xstats ? xstats + count : NULL, 3278 (n > count) ? n - count : 0); 3279 3280 if (xcount < 0) 3281 return eth_err(port_id, xcount); 3282 } 3283 3284 if (n < count + xcount || xstats == NULL) 3285 return count + xcount; 3286 3287 /* now fill the xstats structure */ 3288 ret = eth_basic_stats_get(port_id, xstats); 3289 if (ret < 0) 3290 return ret; 3291 count = ret; 3292 3293 for (i = 0; i < count; i++) 3294 xstats[i].id = i; 3295 /* add an offset to driver-specific stats */ 3296 for ( ; i < count + xcount; i++) 3297 xstats[i].id += count; 3298 3299 return count + xcount; 3300 } 3301 3302 /* reset ethdev extended statistics */ 3303 int 3304 rte_eth_xstats_reset(uint16_t port_id) 3305 { 3306 struct rte_eth_dev *dev; 3307 3308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3309 dev = &rte_eth_devices[port_id]; 3310 3311 /* implemented by the driver */ 3312 if (dev->dev_ops->xstats_reset != NULL) 3313 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev)); 3314 3315 /* fallback to default */ 3316 return rte_eth_stats_reset(port_id); 3317 } 3318 3319 static int 3320 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, 3321 uint8_t stat_idx, uint8_t is_rx) 3322 { 3323 struct rte_eth_dev *dev; 3324 3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3326 dev = &rte_eth_devices[port_id]; 3327 3328 if (is_rx && (queue_id >= dev->data->nb_rx_queues)) 3329 return -EINVAL; 3330 3331 if (!is_rx && (queue_id >= dev->data->nb_tx_queues)) 3332 return -EINVAL; 3333 3334 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS) 3335 return -EINVAL; 3336 3337 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP); 3338 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx); 3339 } 3340 3341 int 3342 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, 3343 uint8_t stat_idx) 3344 { 3345 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id, 3346 tx_queue_id, 3347 stat_idx, STAT_QMAP_TX)); 3348 } 3349 3350 int 3351 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, 3352 uint8_t stat_idx) 3353 { 3354 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id, 3355 rx_queue_id, 3356 stat_idx, STAT_QMAP_RX)); 3357 } 3358 3359 int 3360 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size) 3361 { 3362 struct rte_eth_dev *dev; 3363 3364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3365 dev = &rte_eth_devices[port_id]; 3366 3367 if (fw_version == NULL && fw_size > 0) { 3368 RTE_ETHDEV_LOG(ERR, 3369 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n", 3370 port_id); 3371 return -EINVAL; 3372 } 3373 3374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP); 3375 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev, 3376 fw_version, fw_size)); 3377 } 3378 3379 int 3380 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info) 3381 { 3382 struct rte_eth_dev *dev; 3383 const struct rte_eth_desc_lim lim = { 3384 .nb_max = UINT16_MAX, 3385 .nb_min = 0, 3386 .nb_align = 1, 3387 .nb_seg_max = UINT16_MAX, 3388 .nb_mtu_seg_max = UINT16_MAX, 3389 }; 3390 int diag; 3391 3392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3393 dev = &rte_eth_devices[port_id]; 3394 3395 if (dev_info == NULL) { 3396 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n", 3397 port_id); 3398 return -EINVAL; 3399 } 3400 3401 /* 3402 * Init dev_info before port_id check since caller does not have 3403 * return status and does not know if get is successful or not. 3404 */ 3405 memset(dev_info, 0, sizeof(struct rte_eth_dev_info)); 3406 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 3407 3408 dev_info->rx_desc_lim = lim; 3409 dev_info->tx_desc_lim = lim; 3410 dev_info->device = dev->device; 3411 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 3412 dev_info->max_mtu = UINT16_MAX; 3413 3414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP); 3415 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info); 3416 if (diag != 0) { 3417 /* Cleanup already filled in device information */ 3418 memset(dev_info, 0, sizeof(struct rte_eth_dev_info)); 3419 return eth_err(port_id, diag); 3420 } 3421 3422 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */ 3423 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues, 3424 RTE_MAX_QUEUES_PER_PORT); 3425 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues, 3426 RTE_MAX_QUEUES_PER_PORT); 3427 3428 dev_info->driver_name = dev->device->driver->name; 3429 dev_info->nb_rx_queues = dev->data->nb_rx_queues; 3430 dev_info->nb_tx_queues = dev->data->nb_tx_queues; 3431 3432 dev_info->dev_flags = &dev->data->dev_flags; 3433 3434 return 0; 3435 } 3436 3437 int 3438 rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf) 3439 { 3440 struct rte_eth_dev *dev; 3441 3442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3443 dev = &rte_eth_devices[port_id]; 3444 3445 if (dev_conf == NULL) { 3446 RTE_ETHDEV_LOG(ERR, 3447 "Cannot get ethdev port %u configuration to NULL\n", 3448 port_id); 3449 return -EINVAL; 3450 } 3451 3452 memcpy(dev_conf, &dev->data->dev_conf, sizeof(struct rte_eth_conf)); 3453 3454 return 0; 3455 } 3456 3457 int 3458 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, 3459 uint32_t *ptypes, int num) 3460 { 3461 int i, j; 3462 struct rte_eth_dev *dev; 3463 const uint32_t *all_ptypes; 3464 3465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3466 dev = &rte_eth_devices[port_id]; 3467 3468 if (ptypes == NULL && num > 0) { 3469 RTE_ETHDEV_LOG(ERR, 3470 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n", 3471 port_id); 3472 return -EINVAL; 3473 } 3474 3475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0); 3476 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev); 3477 3478 if (!all_ptypes) 3479 return 0; 3480 3481 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i) 3482 if (all_ptypes[i] & ptype_mask) { 3483 if (j < num) 3484 ptypes[j] = all_ptypes[i]; 3485 j++; 3486 } 3487 3488 return j; 3489 } 3490 3491 int 3492 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, 3493 uint32_t *set_ptypes, unsigned int num) 3494 { 3495 const uint32_t valid_ptype_masks[] = { 3496 RTE_PTYPE_L2_MASK, 3497 RTE_PTYPE_L3_MASK, 3498 RTE_PTYPE_L4_MASK, 3499 RTE_PTYPE_TUNNEL_MASK, 3500 RTE_PTYPE_INNER_L2_MASK, 3501 RTE_PTYPE_INNER_L3_MASK, 3502 RTE_PTYPE_INNER_L4_MASK, 3503 }; 3504 const uint32_t *all_ptypes; 3505 struct rte_eth_dev *dev; 3506 uint32_t unused_mask; 3507 unsigned int i, j; 3508 int ret; 3509 3510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3511 dev = &rte_eth_devices[port_id]; 3512 3513 if (num > 0 && set_ptypes == NULL) { 3514 RTE_ETHDEV_LOG(ERR, 3515 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n", 3516 port_id); 3517 return -EINVAL; 3518 } 3519 3520 if (*dev->dev_ops->dev_supported_ptypes_get == NULL || 3521 *dev->dev_ops->dev_ptypes_set == NULL) { 3522 ret = 0; 3523 goto ptype_unknown; 3524 } 3525 3526 if (ptype_mask == 0) { 3527 ret = (*dev->dev_ops->dev_ptypes_set)(dev, 3528 ptype_mask); 3529 goto ptype_unknown; 3530 } 3531 3532 unused_mask = ptype_mask; 3533 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) { 3534 uint32_t mask = ptype_mask & valid_ptype_masks[i]; 3535 if (mask && mask != valid_ptype_masks[i]) { 3536 ret = -EINVAL; 3537 goto ptype_unknown; 3538 } 3539 unused_mask &= ~valid_ptype_masks[i]; 3540 } 3541 3542 if (unused_mask) { 3543 ret = -EINVAL; 3544 goto ptype_unknown; 3545 } 3546 3547 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev); 3548 if (all_ptypes == NULL) { 3549 ret = 0; 3550 goto ptype_unknown; 3551 } 3552 3553 /* 3554 * Accommodate as many set_ptypes as possible. If the supplied 3555 * set_ptypes array is insufficient fill it partially. 3556 */ 3557 for (i = 0, j = 0; set_ptypes != NULL && 3558 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) { 3559 if (ptype_mask & all_ptypes[i]) { 3560 if (j < num - 1) { 3561 set_ptypes[j] = all_ptypes[i]; 3562 j++; 3563 continue; 3564 } 3565 break; 3566 } 3567 } 3568 3569 if (set_ptypes != NULL && j < num) 3570 set_ptypes[j] = RTE_PTYPE_UNKNOWN; 3571 3572 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask); 3573 3574 ptype_unknown: 3575 if (num > 0) 3576 set_ptypes[0] = RTE_PTYPE_UNKNOWN; 3577 3578 return ret; 3579 } 3580 3581 int 3582 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma, 3583 unsigned int num) 3584 { 3585 int32_t ret; 3586 struct rte_eth_dev *dev; 3587 struct rte_eth_dev_info dev_info; 3588 3589 if (ma == NULL) { 3590 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__); 3591 return -EINVAL; 3592 } 3593 3594 /* will check for us that port_id is a valid one */ 3595 ret = rte_eth_dev_info_get(port_id, &dev_info); 3596 if (ret != 0) 3597 return ret; 3598 3599 dev = &rte_eth_devices[port_id]; 3600 num = RTE_MIN(dev_info.max_mac_addrs, num); 3601 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0])); 3602 3603 return num; 3604 } 3605 3606 int 3607 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr) 3608 { 3609 struct rte_eth_dev *dev; 3610 3611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3612 dev = &rte_eth_devices[port_id]; 3613 3614 if (mac_addr == NULL) { 3615 RTE_ETHDEV_LOG(ERR, 3616 "Cannot get ethdev port %u MAC address to NULL\n", 3617 port_id); 3618 return -EINVAL; 3619 } 3620 3621 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr); 3622 3623 return 0; 3624 } 3625 3626 int 3627 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu) 3628 { 3629 struct rte_eth_dev *dev; 3630 3631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3632 dev = &rte_eth_devices[port_id]; 3633 3634 if (mtu == NULL) { 3635 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n", 3636 port_id); 3637 return -EINVAL; 3638 } 3639 3640 *mtu = dev->data->mtu; 3641 return 0; 3642 } 3643 3644 int 3645 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu) 3646 { 3647 int ret; 3648 struct rte_eth_dev_info dev_info; 3649 struct rte_eth_dev *dev; 3650 int is_jumbo_frame_capable = 0; 3651 3652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3653 dev = &rte_eth_devices[port_id]; 3654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP); 3655 3656 /* 3657 * Check if the device supports dev_infos_get, if it does not 3658 * skip min_mtu/max_mtu validation here as this requires values 3659 * that are populated within the call to rte_eth_dev_info_get() 3660 * which relies on dev->dev_ops->dev_infos_get. 3661 */ 3662 if (*dev->dev_ops->dev_infos_get != NULL) { 3663 ret = rte_eth_dev_info_get(port_id, &dev_info); 3664 if (ret != 0) 3665 return ret; 3666 3667 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu) 3668 return -EINVAL; 3669 3670 if ((dev_info.rx_offload_capa & DEV_RX_OFFLOAD_JUMBO_FRAME) != 0) 3671 is_jumbo_frame_capable = 1; 3672 } 3673 3674 if (mtu > RTE_ETHER_MTU && is_jumbo_frame_capable == 0) 3675 return -EINVAL; 3676 3677 ret = (*dev->dev_ops->mtu_set)(dev, mtu); 3678 if (ret == 0) { 3679 dev->data->mtu = mtu; 3680 3681 /* switch to jumbo mode if needed */ 3682 if (mtu > RTE_ETHER_MTU) 3683 dev->data->dev_conf.rxmode.offloads |= 3684 DEV_RX_OFFLOAD_JUMBO_FRAME; 3685 else 3686 dev->data->dev_conf.rxmode.offloads &= 3687 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 3688 } 3689 3690 return eth_err(port_id, ret); 3691 } 3692 3693 int 3694 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on) 3695 { 3696 struct rte_eth_dev *dev; 3697 int ret; 3698 3699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3700 dev = &rte_eth_devices[port_id]; 3701 3702 if (!(dev->data->dev_conf.rxmode.offloads & 3703 DEV_RX_OFFLOAD_VLAN_FILTER)) { 3704 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n", 3705 port_id); 3706 return -ENOSYS; 3707 } 3708 3709 if (vlan_id > 4095) { 3710 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n", 3711 port_id, vlan_id); 3712 return -EINVAL; 3713 } 3714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP); 3715 3716 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on); 3717 if (ret == 0) { 3718 struct rte_vlan_filter_conf *vfc; 3719 int vidx; 3720 int vbit; 3721 3722 vfc = &dev->data->vlan_filter_conf; 3723 vidx = vlan_id / 64; 3724 vbit = vlan_id % 64; 3725 3726 if (on) 3727 vfc->ids[vidx] |= UINT64_C(1) << vbit; 3728 else 3729 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit); 3730 } 3731 3732 return eth_err(port_id, ret); 3733 } 3734 3735 int 3736 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, 3737 int on) 3738 { 3739 struct rte_eth_dev *dev; 3740 3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3742 dev = &rte_eth_devices[port_id]; 3743 3744 if (rx_queue_id >= dev->data->nb_rx_queues) { 3745 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id); 3746 return -EINVAL; 3747 } 3748 3749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP); 3750 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on); 3751 3752 return 0; 3753 } 3754 3755 int 3756 rte_eth_dev_set_vlan_ether_type(uint16_t port_id, 3757 enum rte_vlan_type vlan_type, 3758 uint16_t tpid) 3759 { 3760 struct rte_eth_dev *dev; 3761 3762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3763 dev = &rte_eth_devices[port_id]; 3764 3765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP); 3766 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, 3767 tpid)); 3768 } 3769 3770 int 3771 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask) 3772 { 3773 struct rte_eth_dev_info dev_info; 3774 struct rte_eth_dev *dev; 3775 int ret = 0; 3776 int mask = 0; 3777 int cur, org = 0; 3778 uint64_t orig_offloads; 3779 uint64_t dev_offloads; 3780 uint64_t new_offloads; 3781 3782 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3783 dev = &rte_eth_devices[port_id]; 3784 3785 /* save original values in case of failure */ 3786 orig_offloads = dev->data->dev_conf.rxmode.offloads; 3787 dev_offloads = orig_offloads; 3788 3789 /* check which option changed by application */ 3790 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD); 3791 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 3792 if (cur != org) { 3793 if (cur) 3794 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; 3795 else 3796 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP; 3797 mask |= ETH_VLAN_STRIP_MASK; 3798 } 3799 3800 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD); 3801 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER); 3802 if (cur != org) { 3803 if (cur) 3804 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER; 3805 else 3806 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER; 3807 mask |= ETH_VLAN_FILTER_MASK; 3808 } 3809 3810 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD); 3811 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND); 3812 if (cur != org) { 3813 if (cur) 3814 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND; 3815 else 3816 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND; 3817 mask |= ETH_VLAN_EXTEND_MASK; 3818 } 3819 3820 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD); 3821 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP); 3822 if (cur != org) { 3823 if (cur) 3824 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP; 3825 else 3826 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP; 3827 mask |= ETH_QINQ_STRIP_MASK; 3828 } 3829 3830 /*no change*/ 3831 if (mask == 0) 3832 return ret; 3833 3834 ret = rte_eth_dev_info_get(port_id, &dev_info); 3835 if (ret != 0) 3836 return ret; 3837 3838 /* Rx VLAN offloading must be within its device capabilities */ 3839 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) { 3840 new_offloads = dev_offloads & ~orig_offloads; 3841 RTE_ETHDEV_LOG(ERR, 3842 "Ethdev port_id=%u requested new added VLAN offloads " 3843 "0x%" PRIx64 " must be within Rx offloads capabilities " 3844 "0x%" PRIx64 " in %s()\n", 3845 port_id, new_offloads, dev_info.rx_offload_capa, 3846 __func__); 3847 return -EINVAL; 3848 } 3849 3850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP); 3851 dev->data->dev_conf.rxmode.offloads = dev_offloads; 3852 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask); 3853 if (ret) { 3854 /* hit an error restore original values */ 3855 dev->data->dev_conf.rxmode.offloads = orig_offloads; 3856 } 3857 3858 return eth_err(port_id, ret); 3859 } 3860 3861 int 3862 rte_eth_dev_get_vlan_offload(uint16_t port_id) 3863 { 3864 struct rte_eth_dev *dev; 3865 uint64_t *dev_offloads; 3866 int ret = 0; 3867 3868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3869 dev = &rte_eth_devices[port_id]; 3870 dev_offloads = &dev->data->dev_conf.rxmode.offloads; 3871 3872 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 3873 ret |= ETH_VLAN_STRIP_OFFLOAD; 3874 3875 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER) 3876 ret |= ETH_VLAN_FILTER_OFFLOAD; 3877 3878 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) 3879 ret |= ETH_VLAN_EXTEND_OFFLOAD; 3880 3881 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP) 3882 ret |= ETH_QINQ_STRIP_OFFLOAD; 3883 3884 return ret; 3885 } 3886 3887 int 3888 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on) 3889 { 3890 struct rte_eth_dev *dev; 3891 3892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3893 dev = &rte_eth_devices[port_id]; 3894 3895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP); 3896 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on)); 3897 } 3898 3899 int 3900 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf) 3901 { 3902 struct rte_eth_dev *dev; 3903 3904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3905 dev = &rte_eth_devices[port_id]; 3906 3907 if (fc_conf == NULL) { 3908 RTE_ETHDEV_LOG(ERR, 3909 "Cannot get ethdev port %u flow control config to NULL\n", 3910 port_id); 3911 return -EINVAL; 3912 } 3913 3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP); 3915 memset(fc_conf, 0, sizeof(*fc_conf)); 3916 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf)); 3917 } 3918 3919 int 3920 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf) 3921 { 3922 struct rte_eth_dev *dev; 3923 3924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3925 dev = &rte_eth_devices[port_id]; 3926 3927 if (fc_conf == NULL) { 3928 RTE_ETHDEV_LOG(ERR, 3929 "Cannot set ethdev port %u flow control from NULL config\n", 3930 port_id); 3931 return -EINVAL; 3932 } 3933 3934 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) { 3935 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n"); 3936 return -EINVAL; 3937 } 3938 3939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP); 3940 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf)); 3941 } 3942 3943 int 3944 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, 3945 struct rte_eth_pfc_conf *pfc_conf) 3946 { 3947 struct rte_eth_dev *dev; 3948 3949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 3950 dev = &rte_eth_devices[port_id]; 3951 3952 if (pfc_conf == NULL) { 3953 RTE_ETHDEV_LOG(ERR, 3954 "Cannot set ethdev port %u priority flow control from NULL config\n", 3955 port_id); 3956 return -EINVAL; 3957 } 3958 3959 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) { 3960 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n"); 3961 return -EINVAL; 3962 } 3963 3964 /* High water, low water validation are device specific */ 3965 if (*dev->dev_ops->priority_flow_ctrl_set) 3966 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set) 3967 (dev, pfc_conf)); 3968 return -ENOTSUP; 3969 } 3970 3971 static int 3972 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf, 3973 uint16_t reta_size) 3974 { 3975 uint16_t i, num; 3976 3977 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE; 3978 for (i = 0; i < num; i++) { 3979 if (reta_conf[i].mask) 3980 return 0; 3981 } 3982 3983 return -EINVAL; 3984 } 3985 3986 static int 3987 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf, 3988 uint16_t reta_size, 3989 uint16_t max_rxq) 3990 { 3991 uint16_t i, idx, shift; 3992 3993 if (max_rxq == 0) { 3994 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n"); 3995 return -EINVAL; 3996 } 3997 3998 for (i = 0; i < reta_size; i++) { 3999 idx = i / RTE_RETA_GROUP_SIZE; 4000 shift = i % RTE_RETA_GROUP_SIZE; 4001 if ((reta_conf[idx].mask & (1ULL << shift)) && 4002 (reta_conf[idx].reta[shift] >= max_rxq)) { 4003 RTE_ETHDEV_LOG(ERR, 4004 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n", 4005 idx, shift, 4006 reta_conf[idx].reta[shift], max_rxq); 4007 return -EINVAL; 4008 } 4009 } 4010 4011 return 0; 4012 } 4013 4014 int 4015 rte_eth_dev_rss_reta_update(uint16_t port_id, 4016 struct rte_eth_rss_reta_entry64 *reta_conf, 4017 uint16_t reta_size) 4018 { 4019 struct rte_eth_dev *dev; 4020 int ret; 4021 4022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4023 dev = &rte_eth_devices[port_id]; 4024 4025 if (reta_conf == NULL) { 4026 RTE_ETHDEV_LOG(ERR, 4027 "Cannot update ethdev port %u RSS RETA to NULL\n", 4028 port_id); 4029 return -EINVAL; 4030 } 4031 4032 if (reta_size == 0) { 4033 RTE_ETHDEV_LOG(ERR, 4034 "Cannot update ethdev port %u RSS RETA with zero size\n", 4035 port_id); 4036 return -EINVAL; 4037 } 4038 4039 /* Check mask bits */ 4040 ret = eth_check_reta_mask(reta_conf, reta_size); 4041 if (ret < 0) 4042 return ret; 4043 4044 /* Check entry value */ 4045 ret = eth_check_reta_entry(reta_conf, reta_size, 4046 dev->data->nb_rx_queues); 4047 if (ret < 0) 4048 return ret; 4049 4050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP); 4051 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf, 4052 reta_size)); 4053 } 4054 4055 int 4056 rte_eth_dev_rss_reta_query(uint16_t port_id, 4057 struct rte_eth_rss_reta_entry64 *reta_conf, 4058 uint16_t reta_size) 4059 { 4060 struct rte_eth_dev *dev; 4061 int ret; 4062 4063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4064 dev = &rte_eth_devices[port_id]; 4065 4066 if (reta_conf == NULL) { 4067 RTE_ETHDEV_LOG(ERR, 4068 "Cannot query ethdev port %u RSS RETA from NULL config\n", 4069 port_id); 4070 return -EINVAL; 4071 } 4072 4073 /* Check mask bits */ 4074 ret = eth_check_reta_mask(reta_conf, reta_size); 4075 if (ret < 0) 4076 return ret; 4077 4078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP); 4079 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf, 4080 reta_size)); 4081 } 4082 4083 int 4084 rte_eth_dev_rss_hash_update(uint16_t port_id, 4085 struct rte_eth_rss_conf *rss_conf) 4086 { 4087 struct rte_eth_dev *dev; 4088 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, }; 4089 int ret; 4090 4091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4092 dev = &rte_eth_devices[port_id]; 4093 4094 if (rss_conf == NULL) { 4095 RTE_ETHDEV_LOG(ERR, 4096 "Cannot update ethdev port %u RSS hash from NULL config\n", 4097 port_id); 4098 return -EINVAL; 4099 } 4100 4101 ret = rte_eth_dev_info_get(port_id, &dev_info); 4102 if (ret != 0) 4103 return ret; 4104 4105 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf); 4106 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) != 4107 dev_info.flow_type_rss_offloads) { 4108 RTE_ETHDEV_LOG(ERR, 4109 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n", 4110 port_id, rss_conf->rss_hf, 4111 dev_info.flow_type_rss_offloads); 4112 return -EINVAL; 4113 } 4114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP); 4115 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev, 4116 rss_conf)); 4117 } 4118 4119 int 4120 rte_eth_dev_rss_hash_conf_get(uint16_t port_id, 4121 struct rte_eth_rss_conf *rss_conf) 4122 { 4123 struct rte_eth_dev *dev; 4124 4125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4126 dev = &rte_eth_devices[port_id]; 4127 4128 if (rss_conf == NULL) { 4129 RTE_ETHDEV_LOG(ERR, 4130 "Cannot get ethdev port %u RSS hash config to NULL\n", 4131 port_id); 4132 return -EINVAL; 4133 } 4134 4135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP); 4136 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev, 4137 rss_conf)); 4138 } 4139 4140 int 4141 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, 4142 struct rte_eth_udp_tunnel *udp_tunnel) 4143 { 4144 struct rte_eth_dev *dev; 4145 4146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4147 dev = &rte_eth_devices[port_id]; 4148 4149 if (udp_tunnel == NULL) { 4150 RTE_ETHDEV_LOG(ERR, 4151 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n", 4152 port_id); 4153 return -EINVAL; 4154 } 4155 4156 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) { 4157 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n"); 4158 return -EINVAL; 4159 } 4160 4161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP); 4162 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev, 4163 udp_tunnel)); 4164 } 4165 4166 int 4167 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, 4168 struct rte_eth_udp_tunnel *udp_tunnel) 4169 { 4170 struct rte_eth_dev *dev; 4171 4172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4173 dev = &rte_eth_devices[port_id]; 4174 4175 if (udp_tunnel == NULL) { 4176 RTE_ETHDEV_LOG(ERR, 4177 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n", 4178 port_id); 4179 return -EINVAL; 4180 } 4181 4182 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) { 4183 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n"); 4184 return -EINVAL; 4185 } 4186 4187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP); 4188 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev, 4189 udp_tunnel)); 4190 } 4191 4192 int 4193 rte_eth_led_on(uint16_t port_id) 4194 { 4195 struct rte_eth_dev *dev; 4196 4197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4198 dev = &rte_eth_devices[port_id]; 4199 4200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP); 4201 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev)); 4202 } 4203 4204 int 4205 rte_eth_led_off(uint16_t port_id) 4206 { 4207 struct rte_eth_dev *dev; 4208 4209 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4210 dev = &rte_eth_devices[port_id]; 4211 4212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP); 4213 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev)); 4214 } 4215 4216 int 4217 rte_eth_fec_get_capability(uint16_t port_id, 4218 struct rte_eth_fec_capa *speed_fec_capa, 4219 unsigned int num) 4220 { 4221 struct rte_eth_dev *dev; 4222 int ret; 4223 4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4225 dev = &rte_eth_devices[port_id]; 4226 4227 if (speed_fec_capa == NULL && num > 0) { 4228 RTE_ETHDEV_LOG(ERR, 4229 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n", 4230 port_id); 4231 return -EINVAL; 4232 } 4233 4234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP); 4235 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num); 4236 4237 return ret; 4238 } 4239 4240 int 4241 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa) 4242 { 4243 struct rte_eth_dev *dev; 4244 4245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4246 dev = &rte_eth_devices[port_id]; 4247 4248 if (fec_capa == NULL) { 4249 RTE_ETHDEV_LOG(ERR, 4250 "Cannot get ethdev port %u current FEC mode to NULL\n", 4251 port_id); 4252 return -EINVAL; 4253 } 4254 4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP); 4256 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa)); 4257 } 4258 4259 int 4260 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa) 4261 { 4262 struct rte_eth_dev *dev; 4263 4264 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4265 dev = &rte_eth_devices[port_id]; 4266 4267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP); 4268 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa)); 4269 } 4270 4271 /* 4272 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find 4273 * an empty spot. 4274 */ 4275 static int 4276 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr) 4277 { 4278 struct rte_eth_dev_info dev_info; 4279 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 4280 unsigned i; 4281 int ret; 4282 4283 ret = rte_eth_dev_info_get(port_id, &dev_info); 4284 if (ret != 0) 4285 return -1; 4286 4287 for (i = 0; i < dev_info.max_mac_addrs; i++) 4288 if (memcmp(addr, &dev->data->mac_addrs[i], 4289 RTE_ETHER_ADDR_LEN) == 0) 4290 return i; 4291 4292 return -1; 4293 } 4294 4295 static const struct rte_ether_addr null_mac_addr; 4296 4297 int 4298 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr, 4299 uint32_t pool) 4300 { 4301 struct rte_eth_dev *dev; 4302 int index; 4303 uint64_t pool_mask; 4304 int ret; 4305 4306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4307 dev = &rte_eth_devices[port_id]; 4308 4309 if (addr == NULL) { 4310 RTE_ETHDEV_LOG(ERR, 4311 "Cannot add ethdev port %u MAC address from NULL address\n", 4312 port_id); 4313 return -EINVAL; 4314 } 4315 4316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP); 4317 4318 if (rte_is_zero_ether_addr(addr)) { 4319 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n", 4320 port_id); 4321 return -EINVAL; 4322 } 4323 if (pool >= ETH_64_POOLS) { 4324 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1); 4325 return -EINVAL; 4326 } 4327 4328 index = eth_dev_get_mac_addr_index(port_id, addr); 4329 if (index < 0) { 4330 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr); 4331 if (index < 0) { 4332 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n", 4333 port_id); 4334 return -ENOSPC; 4335 } 4336 } else { 4337 pool_mask = dev->data->mac_pool_sel[index]; 4338 4339 /* Check if both MAC address and pool is already there, and do nothing */ 4340 if (pool_mask & (1ULL << pool)) 4341 return 0; 4342 } 4343 4344 /* Update NIC */ 4345 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool); 4346 4347 if (ret == 0) { 4348 /* Update address in NIC data structure */ 4349 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]); 4350 4351 /* Update pool bitmap in NIC data structure */ 4352 dev->data->mac_pool_sel[index] |= (1ULL << pool); 4353 } 4354 4355 return eth_err(port_id, ret); 4356 } 4357 4358 int 4359 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr) 4360 { 4361 struct rte_eth_dev *dev; 4362 int index; 4363 4364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4365 dev = &rte_eth_devices[port_id]; 4366 4367 if (addr == NULL) { 4368 RTE_ETHDEV_LOG(ERR, 4369 "Cannot remove ethdev port %u MAC address from NULL address\n", 4370 port_id); 4371 return -EINVAL; 4372 } 4373 4374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP); 4375 4376 index = eth_dev_get_mac_addr_index(port_id, addr); 4377 if (index == 0) { 4378 RTE_ETHDEV_LOG(ERR, 4379 "Port %u: Cannot remove default MAC address\n", 4380 port_id); 4381 return -EADDRINUSE; 4382 } else if (index < 0) 4383 return 0; /* Do nothing if address wasn't found */ 4384 4385 /* Update NIC */ 4386 (*dev->dev_ops->mac_addr_remove)(dev, index); 4387 4388 /* Update address in NIC data structure */ 4389 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]); 4390 4391 /* reset pool bitmap */ 4392 dev->data->mac_pool_sel[index] = 0; 4393 4394 return 0; 4395 } 4396 4397 int 4398 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr) 4399 { 4400 struct rte_eth_dev *dev; 4401 int ret; 4402 4403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4404 dev = &rte_eth_devices[port_id]; 4405 4406 if (addr == NULL) { 4407 RTE_ETHDEV_LOG(ERR, 4408 "Cannot set ethdev port %u default MAC address from NULL address\n", 4409 port_id); 4410 return -EINVAL; 4411 } 4412 4413 if (!rte_is_valid_assigned_ether_addr(addr)) 4414 return -EINVAL; 4415 4416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP); 4417 4418 ret = (*dev->dev_ops->mac_addr_set)(dev, addr); 4419 if (ret < 0) 4420 return ret; 4421 4422 /* Update default address in NIC data structure */ 4423 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]); 4424 4425 return 0; 4426 } 4427 4428 4429 /* 4430 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find 4431 * an empty spot. 4432 */ 4433 static int 4434 eth_dev_get_hash_mac_addr_index(uint16_t port_id, 4435 const struct rte_ether_addr *addr) 4436 { 4437 struct rte_eth_dev_info dev_info; 4438 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 4439 unsigned i; 4440 int ret; 4441 4442 ret = rte_eth_dev_info_get(port_id, &dev_info); 4443 if (ret != 0) 4444 return -1; 4445 4446 if (!dev->data->hash_mac_addrs) 4447 return -1; 4448 4449 for (i = 0; i < dev_info.max_hash_mac_addrs; i++) 4450 if (memcmp(addr, &dev->data->hash_mac_addrs[i], 4451 RTE_ETHER_ADDR_LEN) == 0) 4452 return i; 4453 4454 return -1; 4455 } 4456 4457 int 4458 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, 4459 uint8_t on) 4460 { 4461 int index; 4462 int ret; 4463 struct rte_eth_dev *dev; 4464 4465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4466 dev = &rte_eth_devices[port_id]; 4467 4468 if (addr == NULL) { 4469 RTE_ETHDEV_LOG(ERR, 4470 "Cannot set ethdev port %u unicast hash table from NULL address\n", 4471 port_id); 4472 return -EINVAL; 4473 } 4474 4475 if (rte_is_zero_ether_addr(addr)) { 4476 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n", 4477 port_id); 4478 return -EINVAL; 4479 } 4480 4481 index = eth_dev_get_hash_mac_addr_index(port_id, addr); 4482 /* Check if it's already there, and do nothing */ 4483 if ((index >= 0) && on) 4484 return 0; 4485 4486 if (index < 0) { 4487 if (!on) { 4488 RTE_ETHDEV_LOG(ERR, 4489 "Port %u: the MAC address was not set in UTA\n", 4490 port_id); 4491 return -EINVAL; 4492 } 4493 4494 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr); 4495 if (index < 0) { 4496 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n", 4497 port_id); 4498 return -ENOSPC; 4499 } 4500 } 4501 4502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP); 4503 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on); 4504 if (ret == 0) { 4505 /* Update address in NIC data structure */ 4506 if (on) 4507 rte_ether_addr_copy(addr, 4508 &dev->data->hash_mac_addrs[index]); 4509 else 4510 rte_ether_addr_copy(&null_mac_addr, 4511 &dev->data->hash_mac_addrs[index]); 4512 } 4513 4514 return eth_err(port_id, ret); 4515 } 4516 4517 int 4518 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on) 4519 { 4520 struct rte_eth_dev *dev; 4521 4522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4523 dev = &rte_eth_devices[port_id]; 4524 4525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP); 4526 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev, 4527 on)); 4528 } 4529 4530 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, 4531 uint16_t tx_rate) 4532 { 4533 struct rte_eth_dev *dev; 4534 struct rte_eth_dev_info dev_info; 4535 struct rte_eth_link link; 4536 int ret; 4537 4538 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4539 dev = &rte_eth_devices[port_id]; 4540 4541 ret = rte_eth_dev_info_get(port_id, &dev_info); 4542 if (ret != 0) 4543 return ret; 4544 4545 link = dev->data->dev_link; 4546 4547 if (queue_idx > dev_info.max_tx_queues) { 4548 RTE_ETHDEV_LOG(ERR, 4549 "Set queue rate limit:port %u: invalid queue id=%u\n", 4550 port_id, queue_idx); 4551 return -EINVAL; 4552 } 4553 4554 if (tx_rate > link.link_speed) { 4555 RTE_ETHDEV_LOG(ERR, 4556 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n", 4557 tx_rate, link.link_speed); 4558 return -EINVAL; 4559 } 4560 4561 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP); 4562 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev, 4563 queue_idx, tx_rate)); 4564 } 4565 4566 RTE_INIT(eth_dev_init_fp_ops) 4567 { 4568 uint32_t i; 4569 4570 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++) 4571 eth_dev_fp_ops_reset(rte_eth_fp_ops + i); 4572 } 4573 4574 RTE_INIT(eth_dev_init_cb_lists) 4575 { 4576 uint16_t i; 4577 4578 for (i = 0; i < RTE_MAX_ETHPORTS; i++) 4579 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs); 4580 } 4581 4582 int 4583 rte_eth_dev_callback_register(uint16_t port_id, 4584 enum rte_eth_event_type event, 4585 rte_eth_dev_cb_fn cb_fn, void *cb_arg) 4586 { 4587 struct rte_eth_dev *dev; 4588 struct rte_eth_dev_callback *user_cb; 4589 uint16_t next_port; 4590 uint16_t last_port; 4591 4592 if (cb_fn == NULL) { 4593 RTE_ETHDEV_LOG(ERR, 4594 "Cannot register ethdev port %u callback from NULL\n", 4595 port_id); 4596 return -EINVAL; 4597 } 4598 4599 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) { 4600 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id); 4601 return -EINVAL; 4602 } 4603 4604 if (port_id == RTE_ETH_ALL) { 4605 next_port = 0; 4606 last_port = RTE_MAX_ETHPORTS - 1; 4607 } else { 4608 next_port = last_port = port_id; 4609 } 4610 4611 rte_spinlock_lock(ð_dev_cb_lock); 4612 4613 do { 4614 dev = &rte_eth_devices[next_port]; 4615 4616 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) { 4617 if (user_cb->cb_fn == cb_fn && 4618 user_cb->cb_arg == cb_arg && 4619 user_cb->event == event) { 4620 break; 4621 } 4622 } 4623 4624 /* create a new callback. */ 4625 if (user_cb == NULL) { 4626 user_cb = rte_zmalloc("INTR_USER_CALLBACK", 4627 sizeof(struct rte_eth_dev_callback), 0); 4628 if (user_cb != NULL) { 4629 user_cb->cb_fn = cb_fn; 4630 user_cb->cb_arg = cb_arg; 4631 user_cb->event = event; 4632 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), 4633 user_cb, next); 4634 } else { 4635 rte_spinlock_unlock(ð_dev_cb_lock); 4636 rte_eth_dev_callback_unregister(port_id, event, 4637 cb_fn, cb_arg); 4638 return -ENOMEM; 4639 } 4640 4641 } 4642 } while (++next_port <= last_port); 4643 4644 rte_spinlock_unlock(ð_dev_cb_lock); 4645 return 0; 4646 } 4647 4648 int 4649 rte_eth_dev_callback_unregister(uint16_t port_id, 4650 enum rte_eth_event_type event, 4651 rte_eth_dev_cb_fn cb_fn, void *cb_arg) 4652 { 4653 int ret; 4654 struct rte_eth_dev *dev; 4655 struct rte_eth_dev_callback *cb, *next; 4656 uint16_t next_port; 4657 uint16_t last_port; 4658 4659 if (cb_fn == NULL) { 4660 RTE_ETHDEV_LOG(ERR, 4661 "Cannot unregister ethdev port %u callback from NULL\n", 4662 port_id); 4663 return -EINVAL; 4664 } 4665 4666 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) { 4667 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id); 4668 return -EINVAL; 4669 } 4670 4671 if (port_id == RTE_ETH_ALL) { 4672 next_port = 0; 4673 last_port = RTE_MAX_ETHPORTS - 1; 4674 } else { 4675 next_port = last_port = port_id; 4676 } 4677 4678 rte_spinlock_lock(ð_dev_cb_lock); 4679 4680 do { 4681 dev = &rte_eth_devices[next_port]; 4682 ret = 0; 4683 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; 4684 cb = next) { 4685 4686 next = TAILQ_NEXT(cb, next); 4687 4688 if (cb->cb_fn != cb_fn || cb->event != event || 4689 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg)) 4690 continue; 4691 4692 /* 4693 * if this callback is not executing right now, 4694 * then remove it. 4695 */ 4696 if (cb->active == 0) { 4697 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next); 4698 rte_free(cb); 4699 } else { 4700 ret = -EAGAIN; 4701 } 4702 } 4703 } while (++next_port <= last_port); 4704 4705 rte_spinlock_unlock(ð_dev_cb_lock); 4706 return ret; 4707 } 4708 4709 int 4710 rte_eth_dev_callback_process(struct rte_eth_dev *dev, 4711 enum rte_eth_event_type event, void *ret_param) 4712 { 4713 struct rte_eth_dev_callback *cb_lst; 4714 struct rte_eth_dev_callback dev_cb; 4715 int rc = 0; 4716 4717 rte_spinlock_lock(ð_dev_cb_lock); 4718 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) { 4719 if (cb_lst->cb_fn == NULL || cb_lst->event != event) 4720 continue; 4721 dev_cb = *cb_lst; 4722 cb_lst->active = 1; 4723 if (ret_param != NULL) 4724 dev_cb.ret_param = ret_param; 4725 4726 rte_spinlock_unlock(ð_dev_cb_lock); 4727 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event, 4728 dev_cb.cb_arg, dev_cb.ret_param); 4729 rte_spinlock_lock(ð_dev_cb_lock); 4730 cb_lst->active = 0; 4731 } 4732 rte_spinlock_unlock(ð_dev_cb_lock); 4733 return rc; 4734 } 4735 4736 void 4737 rte_eth_dev_probing_finish(struct rte_eth_dev *dev) 4738 { 4739 if (dev == NULL) 4740 return; 4741 4742 /* 4743 * for secondary process, at that point we expect device 4744 * to be already 'usable', so shared data and all function pointers 4745 * for fast-path devops have to be setup properly inside rte_eth_dev. 4746 */ 4747 if (rte_eal_process_type() == RTE_PROC_SECONDARY) 4748 eth_dev_fp_ops_setup(rte_eth_fp_ops + dev->data->port_id, dev); 4749 4750 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL); 4751 4752 dev->state = RTE_ETH_DEV_ATTACHED; 4753 } 4754 4755 int 4756 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data) 4757 { 4758 uint32_t vec; 4759 struct rte_eth_dev *dev; 4760 struct rte_intr_handle *intr_handle; 4761 uint16_t qid; 4762 int rc; 4763 4764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4765 dev = &rte_eth_devices[port_id]; 4766 4767 if (!dev->intr_handle) { 4768 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n"); 4769 return -ENOTSUP; 4770 } 4771 4772 intr_handle = dev->intr_handle; 4773 if (!intr_handle->intr_vec) { 4774 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n"); 4775 return -EPERM; 4776 } 4777 4778 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) { 4779 vec = intr_handle->intr_vec[qid]; 4780 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data); 4781 if (rc && rc != -EEXIST) { 4782 RTE_ETHDEV_LOG(ERR, 4783 "p %u q %u rx ctl error op %d epfd %d vec %u\n", 4784 port_id, qid, op, epfd, vec); 4785 } 4786 } 4787 4788 return 0; 4789 } 4790 4791 int 4792 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id) 4793 { 4794 struct rte_intr_handle *intr_handle; 4795 struct rte_eth_dev *dev; 4796 unsigned int efd_idx; 4797 uint32_t vec; 4798 int fd; 4799 4800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1); 4801 dev = &rte_eth_devices[port_id]; 4802 4803 if (queue_id >= dev->data->nb_rx_queues) { 4804 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id); 4805 return -1; 4806 } 4807 4808 if (!dev->intr_handle) { 4809 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n"); 4810 return -1; 4811 } 4812 4813 intr_handle = dev->intr_handle; 4814 if (!intr_handle->intr_vec) { 4815 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n"); 4816 return -1; 4817 } 4818 4819 vec = intr_handle->intr_vec[queue_id]; 4820 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ? 4821 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec; 4822 fd = intr_handle->efds[efd_idx]; 4823 4824 return fd; 4825 } 4826 4827 static inline int 4828 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id, 4829 const char *ring_name) 4830 { 4831 return snprintf(name, len, "eth_p%d_q%d_%s", 4832 port_id, queue_id, ring_name); 4833 } 4834 4835 const struct rte_memzone * 4836 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name, 4837 uint16_t queue_id, size_t size, unsigned align, 4838 int socket_id) 4839 { 4840 char z_name[RTE_MEMZONE_NAMESIZE]; 4841 const struct rte_memzone *mz; 4842 int rc; 4843 4844 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id, 4845 queue_id, ring_name); 4846 if (rc >= RTE_MEMZONE_NAMESIZE) { 4847 RTE_ETHDEV_LOG(ERR, "ring name too long\n"); 4848 rte_errno = ENAMETOOLONG; 4849 return NULL; 4850 } 4851 4852 mz = rte_memzone_lookup(z_name); 4853 if (mz) { 4854 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) || 4855 size > mz->len || 4856 ((uintptr_t)mz->addr & (align - 1)) != 0) { 4857 RTE_ETHDEV_LOG(ERR, 4858 "memzone %s does not justify the requested attributes\n", 4859 mz->name); 4860 return NULL; 4861 } 4862 4863 return mz; 4864 } 4865 4866 return rte_memzone_reserve_aligned(z_name, size, socket_id, 4867 RTE_MEMZONE_IOVA_CONTIG, align); 4868 } 4869 4870 int 4871 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name, 4872 uint16_t queue_id) 4873 { 4874 char z_name[RTE_MEMZONE_NAMESIZE]; 4875 const struct rte_memzone *mz; 4876 int rc = 0; 4877 4878 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id, 4879 queue_id, ring_name); 4880 if (rc >= RTE_MEMZONE_NAMESIZE) { 4881 RTE_ETHDEV_LOG(ERR, "ring name too long\n"); 4882 return -ENAMETOOLONG; 4883 } 4884 4885 mz = rte_memzone_lookup(z_name); 4886 if (mz) 4887 rc = rte_memzone_free(mz); 4888 else 4889 rc = -ENOENT; 4890 4891 return rc; 4892 } 4893 4894 int 4895 rte_eth_dev_create(struct rte_device *device, const char *name, 4896 size_t priv_data_size, 4897 ethdev_bus_specific_init ethdev_bus_specific_init, 4898 void *bus_init_params, 4899 ethdev_init_t ethdev_init, void *init_params) 4900 { 4901 struct rte_eth_dev *ethdev; 4902 int retval; 4903 4904 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL); 4905 4906 if (rte_eal_process_type() == RTE_PROC_PRIMARY) { 4907 ethdev = rte_eth_dev_allocate(name); 4908 if (!ethdev) 4909 return -ENODEV; 4910 4911 if (priv_data_size) { 4912 ethdev->data->dev_private = rte_zmalloc_socket( 4913 name, priv_data_size, RTE_CACHE_LINE_SIZE, 4914 device->numa_node); 4915 4916 if (!ethdev->data->dev_private) { 4917 RTE_ETHDEV_LOG(ERR, 4918 "failed to allocate private data\n"); 4919 retval = -ENOMEM; 4920 goto probe_failed; 4921 } 4922 } 4923 } else { 4924 ethdev = rte_eth_dev_attach_secondary(name); 4925 if (!ethdev) { 4926 RTE_ETHDEV_LOG(ERR, 4927 "secondary process attach failed, ethdev doesn't exist\n"); 4928 return -ENODEV; 4929 } 4930 } 4931 4932 ethdev->device = device; 4933 4934 if (ethdev_bus_specific_init) { 4935 retval = ethdev_bus_specific_init(ethdev, bus_init_params); 4936 if (retval) { 4937 RTE_ETHDEV_LOG(ERR, 4938 "ethdev bus specific initialisation failed\n"); 4939 goto probe_failed; 4940 } 4941 } 4942 4943 retval = ethdev_init(ethdev, init_params); 4944 if (retval) { 4945 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n"); 4946 goto probe_failed; 4947 } 4948 4949 rte_eth_dev_probing_finish(ethdev); 4950 4951 return retval; 4952 4953 probe_failed: 4954 rte_eth_dev_release_port(ethdev); 4955 return retval; 4956 } 4957 4958 int 4959 rte_eth_dev_destroy(struct rte_eth_dev *ethdev, 4960 ethdev_uninit_t ethdev_uninit) 4961 { 4962 int ret; 4963 4964 ethdev = rte_eth_dev_allocated(ethdev->data->name); 4965 if (!ethdev) 4966 return -ENODEV; 4967 4968 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL); 4969 4970 ret = ethdev_uninit(ethdev); 4971 if (ret) 4972 return ret; 4973 4974 return rte_eth_dev_release_port(ethdev); 4975 } 4976 4977 int 4978 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, 4979 int epfd, int op, void *data) 4980 { 4981 uint32_t vec; 4982 struct rte_eth_dev *dev; 4983 struct rte_intr_handle *intr_handle; 4984 int rc; 4985 4986 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 4987 dev = &rte_eth_devices[port_id]; 4988 4989 if (queue_id >= dev->data->nb_rx_queues) { 4990 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id); 4991 return -EINVAL; 4992 } 4993 4994 if (!dev->intr_handle) { 4995 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n"); 4996 return -ENOTSUP; 4997 } 4998 4999 intr_handle = dev->intr_handle; 5000 if (!intr_handle->intr_vec) { 5001 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n"); 5002 return -EPERM; 5003 } 5004 5005 vec = intr_handle->intr_vec[queue_id]; 5006 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data); 5007 if (rc && rc != -EEXIST) { 5008 RTE_ETHDEV_LOG(ERR, 5009 "p %u q %u rx ctl error op %d epfd %d vec %u\n", 5010 port_id, queue_id, op, epfd, vec); 5011 return rc; 5012 } 5013 5014 return 0; 5015 } 5016 5017 int 5018 rte_eth_dev_rx_intr_enable(uint16_t port_id, 5019 uint16_t queue_id) 5020 { 5021 struct rte_eth_dev *dev; 5022 int ret; 5023 5024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5025 dev = &rte_eth_devices[port_id]; 5026 5027 ret = eth_dev_validate_rx_queue(dev, queue_id); 5028 if (ret != 0) 5029 return ret; 5030 5031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP); 5032 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id)); 5033 } 5034 5035 int 5036 rte_eth_dev_rx_intr_disable(uint16_t port_id, 5037 uint16_t queue_id) 5038 { 5039 struct rte_eth_dev *dev; 5040 int ret; 5041 5042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5043 dev = &rte_eth_devices[port_id]; 5044 5045 ret = eth_dev_validate_rx_queue(dev, queue_id); 5046 if (ret != 0) 5047 return ret; 5048 5049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP); 5050 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id)); 5051 } 5052 5053 5054 const struct rte_eth_rxtx_callback * 5055 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, 5056 rte_rx_callback_fn fn, void *user_param) 5057 { 5058 #ifndef RTE_ETHDEV_RXTX_CALLBACKS 5059 rte_errno = ENOTSUP; 5060 return NULL; 5061 #endif 5062 struct rte_eth_dev *dev; 5063 5064 /* check input parameters */ 5065 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL || 5066 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) { 5067 rte_errno = EINVAL; 5068 return NULL; 5069 } 5070 dev = &rte_eth_devices[port_id]; 5071 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) { 5072 rte_errno = EINVAL; 5073 return NULL; 5074 } 5075 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0); 5076 5077 if (cb == NULL) { 5078 rte_errno = ENOMEM; 5079 return NULL; 5080 } 5081 5082 cb->fn.rx = fn; 5083 cb->param = user_param; 5084 5085 rte_spinlock_lock(ð_dev_rx_cb_lock); 5086 /* Add the callbacks in fifo order. */ 5087 struct rte_eth_rxtx_callback *tail = 5088 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id]; 5089 5090 if (!tail) { 5091 /* Stores to cb->fn and cb->param should complete before 5092 * cb is visible to data plane. 5093 */ 5094 __atomic_store_n( 5095 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id], 5096 cb, __ATOMIC_RELEASE); 5097 5098 } else { 5099 while (tail->next) 5100 tail = tail->next; 5101 /* Stores to cb->fn and cb->param should complete before 5102 * cb is visible to data plane. 5103 */ 5104 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE); 5105 } 5106 rte_spinlock_unlock(ð_dev_rx_cb_lock); 5107 5108 return cb; 5109 } 5110 5111 const struct rte_eth_rxtx_callback * 5112 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, 5113 rte_rx_callback_fn fn, void *user_param) 5114 { 5115 #ifndef RTE_ETHDEV_RXTX_CALLBACKS 5116 rte_errno = ENOTSUP; 5117 return NULL; 5118 #endif 5119 /* check input parameters */ 5120 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL || 5121 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) { 5122 rte_errno = EINVAL; 5123 return NULL; 5124 } 5125 5126 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0); 5127 5128 if (cb == NULL) { 5129 rte_errno = ENOMEM; 5130 return NULL; 5131 } 5132 5133 cb->fn.rx = fn; 5134 cb->param = user_param; 5135 5136 rte_spinlock_lock(ð_dev_rx_cb_lock); 5137 /* Add the callbacks at first position */ 5138 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id]; 5139 /* Stores to cb->fn, cb->param and cb->next should complete before 5140 * cb is visible to data plane threads. 5141 */ 5142 __atomic_store_n( 5143 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id], 5144 cb, __ATOMIC_RELEASE); 5145 rte_spinlock_unlock(ð_dev_rx_cb_lock); 5146 5147 return cb; 5148 } 5149 5150 const struct rte_eth_rxtx_callback * 5151 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, 5152 rte_tx_callback_fn fn, void *user_param) 5153 { 5154 #ifndef RTE_ETHDEV_RXTX_CALLBACKS 5155 rte_errno = ENOTSUP; 5156 return NULL; 5157 #endif 5158 struct rte_eth_dev *dev; 5159 5160 /* check input parameters */ 5161 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL || 5162 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) { 5163 rte_errno = EINVAL; 5164 return NULL; 5165 } 5166 5167 dev = &rte_eth_devices[port_id]; 5168 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) { 5169 rte_errno = EINVAL; 5170 return NULL; 5171 } 5172 5173 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0); 5174 5175 if (cb == NULL) { 5176 rte_errno = ENOMEM; 5177 return NULL; 5178 } 5179 5180 cb->fn.tx = fn; 5181 cb->param = user_param; 5182 5183 rte_spinlock_lock(ð_dev_tx_cb_lock); 5184 /* Add the callbacks in fifo order. */ 5185 struct rte_eth_rxtx_callback *tail = 5186 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id]; 5187 5188 if (!tail) { 5189 /* Stores to cb->fn and cb->param should complete before 5190 * cb is visible to data plane. 5191 */ 5192 __atomic_store_n( 5193 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id], 5194 cb, __ATOMIC_RELEASE); 5195 5196 } else { 5197 while (tail->next) 5198 tail = tail->next; 5199 /* Stores to cb->fn and cb->param should complete before 5200 * cb is visible to data plane. 5201 */ 5202 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE); 5203 } 5204 rte_spinlock_unlock(ð_dev_tx_cb_lock); 5205 5206 return cb; 5207 } 5208 5209 int 5210 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, 5211 const struct rte_eth_rxtx_callback *user_cb) 5212 { 5213 #ifndef RTE_ETHDEV_RXTX_CALLBACKS 5214 return -ENOTSUP; 5215 #endif 5216 /* Check input parameters. */ 5217 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5218 if (user_cb == NULL || 5219 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) 5220 return -EINVAL; 5221 5222 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 5223 struct rte_eth_rxtx_callback *cb; 5224 struct rte_eth_rxtx_callback **prev_cb; 5225 int ret = -EINVAL; 5226 5227 rte_spinlock_lock(ð_dev_rx_cb_lock); 5228 prev_cb = &dev->post_rx_burst_cbs[queue_id]; 5229 for (; *prev_cb != NULL; prev_cb = &cb->next) { 5230 cb = *prev_cb; 5231 if (cb == user_cb) { 5232 /* Remove the user cb from the callback list. */ 5233 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED); 5234 ret = 0; 5235 break; 5236 } 5237 } 5238 rte_spinlock_unlock(ð_dev_rx_cb_lock); 5239 5240 return ret; 5241 } 5242 5243 int 5244 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, 5245 const struct rte_eth_rxtx_callback *user_cb) 5246 { 5247 #ifndef RTE_ETHDEV_RXTX_CALLBACKS 5248 return -ENOTSUP; 5249 #endif 5250 /* Check input parameters. */ 5251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5252 if (user_cb == NULL || 5253 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) 5254 return -EINVAL; 5255 5256 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 5257 int ret = -EINVAL; 5258 struct rte_eth_rxtx_callback *cb; 5259 struct rte_eth_rxtx_callback **prev_cb; 5260 5261 rte_spinlock_lock(ð_dev_tx_cb_lock); 5262 prev_cb = &dev->pre_tx_burst_cbs[queue_id]; 5263 for (; *prev_cb != NULL; prev_cb = &cb->next) { 5264 cb = *prev_cb; 5265 if (cb == user_cb) { 5266 /* Remove the user cb from the callback list. */ 5267 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED); 5268 ret = 0; 5269 break; 5270 } 5271 } 5272 rte_spinlock_unlock(ð_dev_tx_cb_lock); 5273 5274 return ret; 5275 } 5276 5277 int 5278 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, 5279 struct rte_eth_rxq_info *qinfo) 5280 { 5281 struct rte_eth_dev *dev; 5282 5283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5284 dev = &rte_eth_devices[port_id]; 5285 5286 if (queue_id >= dev->data->nb_rx_queues) { 5287 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id); 5288 return -EINVAL; 5289 } 5290 5291 if (qinfo == NULL) { 5292 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n", 5293 port_id, queue_id); 5294 return -EINVAL; 5295 } 5296 5297 if (dev->data->rx_queues == NULL || 5298 dev->data->rx_queues[queue_id] == NULL) { 5299 RTE_ETHDEV_LOG(ERR, 5300 "Rx queue %"PRIu16" of device with port_id=%" 5301 PRIu16" has not been setup\n", 5302 queue_id, port_id); 5303 return -EINVAL; 5304 } 5305 5306 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) { 5307 RTE_ETHDEV_LOG(INFO, 5308 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n", 5309 queue_id, port_id); 5310 return -EINVAL; 5311 } 5312 5313 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP); 5314 5315 memset(qinfo, 0, sizeof(*qinfo)); 5316 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo); 5317 qinfo->queue_state = dev->data->rx_queue_state[queue_id]; 5318 5319 return 0; 5320 } 5321 5322 int 5323 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, 5324 struct rte_eth_txq_info *qinfo) 5325 { 5326 struct rte_eth_dev *dev; 5327 5328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5329 dev = &rte_eth_devices[port_id]; 5330 5331 if (queue_id >= dev->data->nb_tx_queues) { 5332 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id); 5333 return -EINVAL; 5334 } 5335 5336 if (qinfo == NULL) { 5337 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n", 5338 port_id, queue_id); 5339 return -EINVAL; 5340 } 5341 5342 if (dev->data->tx_queues == NULL || 5343 dev->data->tx_queues[queue_id] == NULL) { 5344 RTE_ETHDEV_LOG(ERR, 5345 "Tx queue %"PRIu16" of device with port_id=%" 5346 PRIu16" has not been setup\n", 5347 queue_id, port_id); 5348 return -EINVAL; 5349 } 5350 5351 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) { 5352 RTE_ETHDEV_LOG(INFO, 5353 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n", 5354 queue_id, port_id); 5355 return -EINVAL; 5356 } 5357 5358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP); 5359 5360 memset(qinfo, 0, sizeof(*qinfo)); 5361 dev->dev_ops->txq_info_get(dev, queue_id, qinfo); 5362 qinfo->queue_state = dev->data->tx_queue_state[queue_id]; 5363 5364 return 0; 5365 } 5366 5367 int 5368 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, 5369 struct rte_eth_burst_mode *mode) 5370 { 5371 struct rte_eth_dev *dev; 5372 5373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5374 dev = &rte_eth_devices[port_id]; 5375 5376 if (queue_id >= dev->data->nb_rx_queues) { 5377 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id); 5378 return -EINVAL; 5379 } 5380 5381 if (mode == NULL) { 5382 RTE_ETHDEV_LOG(ERR, 5383 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n", 5384 port_id, queue_id); 5385 return -EINVAL; 5386 } 5387 5388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP); 5389 memset(mode, 0, sizeof(*mode)); 5390 return eth_err(port_id, 5391 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode)); 5392 } 5393 5394 int 5395 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, 5396 struct rte_eth_burst_mode *mode) 5397 { 5398 struct rte_eth_dev *dev; 5399 5400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5401 dev = &rte_eth_devices[port_id]; 5402 5403 if (queue_id >= dev->data->nb_tx_queues) { 5404 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id); 5405 return -EINVAL; 5406 } 5407 5408 if (mode == NULL) { 5409 RTE_ETHDEV_LOG(ERR, 5410 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n", 5411 port_id, queue_id); 5412 return -EINVAL; 5413 } 5414 5415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP); 5416 memset(mode, 0, sizeof(*mode)); 5417 return eth_err(port_id, 5418 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode)); 5419 } 5420 5421 int 5422 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id, 5423 struct rte_power_monitor_cond *pmc) 5424 { 5425 struct rte_eth_dev *dev; 5426 5427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5428 dev = &rte_eth_devices[port_id]; 5429 5430 if (queue_id >= dev->data->nb_rx_queues) { 5431 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id); 5432 return -EINVAL; 5433 } 5434 5435 if (pmc == NULL) { 5436 RTE_ETHDEV_LOG(ERR, 5437 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n", 5438 port_id, queue_id); 5439 return -EINVAL; 5440 } 5441 5442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP); 5443 return eth_err(port_id, 5444 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc)); 5445 } 5446 5447 int 5448 rte_eth_dev_set_mc_addr_list(uint16_t port_id, 5449 struct rte_ether_addr *mc_addr_set, 5450 uint32_t nb_mc_addr) 5451 { 5452 struct rte_eth_dev *dev; 5453 5454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5455 dev = &rte_eth_devices[port_id]; 5456 5457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP); 5458 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev, 5459 mc_addr_set, nb_mc_addr)); 5460 } 5461 5462 int 5463 rte_eth_timesync_enable(uint16_t port_id) 5464 { 5465 struct rte_eth_dev *dev; 5466 5467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5468 dev = &rte_eth_devices[port_id]; 5469 5470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP); 5471 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev)); 5472 } 5473 5474 int 5475 rte_eth_timesync_disable(uint16_t port_id) 5476 { 5477 struct rte_eth_dev *dev; 5478 5479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5480 dev = &rte_eth_devices[port_id]; 5481 5482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP); 5483 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev)); 5484 } 5485 5486 int 5487 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, 5488 uint32_t flags) 5489 { 5490 struct rte_eth_dev *dev; 5491 5492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5493 dev = &rte_eth_devices[port_id]; 5494 5495 if (timestamp == NULL) { 5496 RTE_ETHDEV_LOG(ERR, 5497 "Cannot read ethdev port %u Rx timestamp to NULL\n", 5498 port_id); 5499 return -EINVAL; 5500 } 5501 5502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP); 5503 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp) 5504 (dev, timestamp, flags)); 5505 } 5506 5507 int 5508 rte_eth_timesync_read_tx_timestamp(uint16_t port_id, 5509 struct timespec *timestamp) 5510 { 5511 struct rte_eth_dev *dev; 5512 5513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5514 dev = &rte_eth_devices[port_id]; 5515 5516 if (timestamp == NULL) { 5517 RTE_ETHDEV_LOG(ERR, 5518 "Cannot read ethdev port %u Tx timestamp to NULL\n", 5519 port_id); 5520 return -EINVAL; 5521 } 5522 5523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP); 5524 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp) 5525 (dev, timestamp)); 5526 } 5527 5528 int 5529 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta) 5530 { 5531 struct rte_eth_dev *dev; 5532 5533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5534 dev = &rte_eth_devices[port_id]; 5535 5536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP); 5537 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta)); 5538 } 5539 5540 int 5541 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp) 5542 { 5543 struct rte_eth_dev *dev; 5544 5545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5546 dev = &rte_eth_devices[port_id]; 5547 5548 if (timestamp == NULL) { 5549 RTE_ETHDEV_LOG(ERR, 5550 "Cannot read ethdev port %u timesync time to NULL\n", 5551 port_id); 5552 return -EINVAL; 5553 } 5554 5555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP); 5556 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev, 5557 timestamp)); 5558 } 5559 5560 int 5561 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp) 5562 { 5563 struct rte_eth_dev *dev; 5564 5565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5566 dev = &rte_eth_devices[port_id]; 5567 5568 if (timestamp == NULL) { 5569 RTE_ETHDEV_LOG(ERR, 5570 "Cannot write ethdev port %u timesync from NULL time\n", 5571 port_id); 5572 return -EINVAL; 5573 } 5574 5575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP); 5576 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev, 5577 timestamp)); 5578 } 5579 5580 int 5581 rte_eth_read_clock(uint16_t port_id, uint64_t *clock) 5582 { 5583 struct rte_eth_dev *dev; 5584 5585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5586 dev = &rte_eth_devices[port_id]; 5587 5588 if (clock == NULL) { 5589 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n", 5590 port_id); 5591 return -EINVAL; 5592 } 5593 5594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP); 5595 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock)); 5596 } 5597 5598 int 5599 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info) 5600 { 5601 struct rte_eth_dev *dev; 5602 5603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5604 dev = &rte_eth_devices[port_id]; 5605 5606 if (info == NULL) { 5607 RTE_ETHDEV_LOG(ERR, 5608 "Cannot get ethdev port %u register info to NULL\n", 5609 port_id); 5610 return -EINVAL; 5611 } 5612 5613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP); 5614 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info)); 5615 } 5616 5617 int 5618 rte_eth_dev_get_eeprom_length(uint16_t port_id) 5619 { 5620 struct rte_eth_dev *dev; 5621 5622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5623 dev = &rte_eth_devices[port_id]; 5624 5625 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP); 5626 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev)); 5627 } 5628 5629 int 5630 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info) 5631 { 5632 struct rte_eth_dev *dev; 5633 5634 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5635 dev = &rte_eth_devices[port_id]; 5636 5637 if (info == NULL) { 5638 RTE_ETHDEV_LOG(ERR, 5639 "Cannot get ethdev port %u EEPROM info to NULL\n", 5640 port_id); 5641 return -EINVAL; 5642 } 5643 5644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP); 5645 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info)); 5646 } 5647 5648 int 5649 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info) 5650 { 5651 struct rte_eth_dev *dev; 5652 5653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5654 dev = &rte_eth_devices[port_id]; 5655 5656 if (info == NULL) { 5657 RTE_ETHDEV_LOG(ERR, 5658 "Cannot set ethdev port %u EEPROM from NULL info\n", 5659 port_id); 5660 return -EINVAL; 5661 } 5662 5663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP); 5664 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info)); 5665 } 5666 5667 int 5668 rte_eth_dev_get_module_info(uint16_t port_id, 5669 struct rte_eth_dev_module_info *modinfo) 5670 { 5671 struct rte_eth_dev *dev; 5672 5673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5674 dev = &rte_eth_devices[port_id]; 5675 5676 if (modinfo == NULL) { 5677 RTE_ETHDEV_LOG(ERR, 5678 "Cannot get ethdev port %u EEPROM module info to NULL\n", 5679 port_id); 5680 return -EINVAL; 5681 } 5682 5683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP); 5684 return (*dev->dev_ops->get_module_info)(dev, modinfo); 5685 } 5686 5687 int 5688 rte_eth_dev_get_module_eeprom(uint16_t port_id, 5689 struct rte_dev_eeprom_info *info) 5690 { 5691 struct rte_eth_dev *dev; 5692 5693 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5694 dev = &rte_eth_devices[port_id]; 5695 5696 if (info == NULL) { 5697 RTE_ETHDEV_LOG(ERR, 5698 "Cannot get ethdev port %u module EEPROM info to NULL\n", 5699 port_id); 5700 return -EINVAL; 5701 } 5702 5703 if (info->data == NULL) { 5704 RTE_ETHDEV_LOG(ERR, 5705 "Cannot get ethdev port %u module EEPROM data to NULL\n", 5706 port_id); 5707 return -EINVAL; 5708 } 5709 5710 if (info->length == 0) { 5711 RTE_ETHDEV_LOG(ERR, 5712 "Cannot get ethdev port %u module EEPROM to data with zero size\n", 5713 port_id); 5714 return -EINVAL; 5715 } 5716 5717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP); 5718 return (*dev->dev_ops->get_module_eeprom)(dev, info); 5719 } 5720 5721 int 5722 rte_eth_dev_get_dcb_info(uint16_t port_id, 5723 struct rte_eth_dcb_info *dcb_info) 5724 { 5725 struct rte_eth_dev *dev; 5726 5727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5728 dev = &rte_eth_devices[port_id]; 5729 5730 if (dcb_info == NULL) { 5731 RTE_ETHDEV_LOG(ERR, 5732 "Cannot get ethdev port %u DCB info to NULL\n", 5733 port_id); 5734 return -EINVAL; 5735 } 5736 5737 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info)); 5738 5739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP); 5740 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info)); 5741 } 5742 5743 static void 5744 eth_dev_adjust_nb_desc(uint16_t *nb_desc, 5745 const struct rte_eth_desc_lim *desc_lim) 5746 { 5747 if (desc_lim->nb_align != 0) 5748 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align); 5749 5750 if (desc_lim->nb_max != 0) 5751 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max); 5752 5753 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min); 5754 } 5755 5756 int 5757 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, 5758 uint16_t *nb_rx_desc, 5759 uint16_t *nb_tx_desc) 5760 { 5761 struct rte_eth_dev_info dev_info; 5762 int ret; 5763 5764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5765 5766 ret = rte_eth_dev_info_get(port_id, &dev_info); 5767 if (ret != 0) 5768 return ret; 5769 5770 if (nb_rx_desc != NULL) 5771 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim); 5772 5773 if (nb_tx_desc != NULL) 5774 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim); 5775 5776 return 0; 5777 } 5778 5779 int 5780 rte_eth_dev_hairpin_capability_get(uint16_t port_id, 5781 struct rte_eth_hairpin_cap *cap) 5782 { 5783 struct rte_eth_dev *dev; 5784 5785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5786 dev = &rte_eth_devices[port_id]; 5787 5788 if (cap == NULL) { 5789 RTE_ETHDEV_LOG(ERR, 5790 "Cannot get ethdev port %u hairpin capability to NULL\n", 5791 port_id); 5792 return -EINVAL; 5793 } 5794 5795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP); 5796 memset(cap, 0, sizeof(*cap)); 5797 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap)); 5798 } 5799 5800 int 5801 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id) 5802 { 5803 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN) 5804 return 1; 5805 return 0; 5806 } 5807 5808 int 5809 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id) 5810 { 5811 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN) 5812 return 1; 5813 return 0; 5814 } 5815 5816 int 5817 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool) 5818 { 5819 struct rte_eth_dev *dev; 5820 5821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 5822 dev = &rte_eth_devices[port_id]; 5823 5824 if (pool == NULL) { 5825 RTE_ETHDEV_LOG(ERR, 5826 "Cannot test ethdev port %u mempool operation from NULL pool\n", 5827 port_id); 5828 return -EINVAL; 5829 } 5830 5831 if (*dev->dev_ops->pool_ops_supported == NULL) 5832 return 1; /* all pools are supported */ 5833 5834 return (*dev->dev_ops->pool_ops_supported)(dev, pool); 5835 } 5836 5837 /** 5838 * A set of values to describe the possible states of a switch domain. 5839 */ 5840 enum rte_eth_switch_domain_state { 5841 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0, 5842 RTE_ETH_SWITCH_DOMAIN_ALLOCATED 5843 }; 5844 5845 /** 5846 * Array of switch domains available for allocation. Array is sized to 5847 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than 5848 * ethdev ports in a single process. 5849 */ 5850 static struct rte_eth_dev_switch { 5851 enum rte_eth_switch_domain_state state; 5852 } eth_dev_switch_domains[RTE_MAX_ETHPORTS]; 5853 5854 int 5855 rte_eth_switch_domain_alloc(uint16_t *domain_id) 5856 { 5857 uint16_t i; 5858 5859 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID; 5860 5861 for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 5862 if (eth_dev_switch_domains[i].state == 5863 RTE_ETH_SWITCH_DOMAIN_UNUSED) { 5864 eth_dev_switch_domains[i].state = 5865 RTE_ETH_SWITCH_DOMAIN_ALLOCATED; 5866 *domain_id = i; 5867 return 0; 5868 } 5869 } 5870 5871 return -ENOSPC; 5872 } 5873 5874 int 5875 rte_eth_switch_domain_free(uint16_t domain_id) 5876 { 5877 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID || 5878 domain_id >= RTE_MAX_ETHPORTS) 5879 return -EINVAL; 5880 5881 if (eth_dev_switch_domains[domain_id].state != 5882 RTE_ETH_SWITCH_DOMAIN_ALLOCATED) 5883 return -EINVAL; 5884 5885 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED; 5886 5887 return 0; 5888 } 5889 5890 static int 5891 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in) 5892 { 5893 int state; 5894 struct rte_kvargs_pair *pair; 5895 char *letter; 5896 5897 arglist->str = strdup(str_in); 5898 if (arglist->str == NULL) 5899 return -ENOMEM; 5900 5901 letter = arglist->str; 5902 state = 0; 5903 arglist->count = 0; 5904 pair = &arglist->pairs[0]; 5905 while (1) { 5906 switch (state) { 5907 case 0: /* Initial */ 5908 if (*letter == '=') 5909 return -EINVAL; 5910 else if (*letter == '\0') 5911 return 0; 5912 5913 state = 1; 5914 pair->key = letter; 5915 /* fall-thru */ 5916 5917 case 1: /* Parsing key */ 5918 if (*letter == '=') { 5919 *letter = '\0'; 5920 pair->value = letter + 1; 5921 state = 2; 5922 } else if (*letter == ',' || *letter == '\0') 5923 return -EINVAL; 5924 break; 5925 5926 5927 case 2: /* Parsing value */ 5928 if (*letter == '[') 5929 state = 3; 5930 else if (*letter == ',') { 5931 *letter = '\0'; 5932 arglist->count++; 5933 pair = &arglist->pairs[arglist->count]; 5934 state = 0; 5935 } else if (*letter == '\0') { 5936 letter--; 5937 arglist->count++; 5938 pair = &arglist->pairs[arglist->count]; 5939 state = 0; 5940 } 5941 break; 5942 5943 case 3: /* Parsing list */ 5944 if (*letter == ']') 5945 state = 2; 5946 else if (*letter == '\0') 5947 return -EINVAL; 5948 break; 5949 } 5950 letter++; 5951 } 5952 } 5953 5954 int 5955 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da) 5956 { 5957 struct rte_kvargs args; 5958 struct rte_kvargs_pair *pair; 5959 unsigned int i; 5960 int result = 0; 5961 5962 memset(eth_da, 0, sizeof(*eth_da)); 5963 5964 result = eth_dev_devargs_tokenise(&args, dargs); 5965 if (result < 0) 5966 goto parse_cleanup; 5967 5968 for (i = 0; i < args.count; i++) { 5969 pair = &args.pairs[i]; 5970 if (strcmp("representor", pair->key) == 0) { 5971 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) { 5972 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n", 5973 dargs); 5974 result = -1; 5975 goto parse_cleanup; 5976 } 5977 result = rte_eth_devargs_parse_representor_ports( 5978 pair->value, eth_da); 5979 if (result < 0) 5980 goto parse_cleanup; 5981 } 5982 } 5983 5984 parse_cleanup: 5985 if (args.str) 5986 free(args.str); 5987 5988 return result; 5989 } 5990 5991 int 5992 rte_eth_representor_id_get(uint16_t port_id, 5993 enum rte_eth_representor_type type, 5994 int controller, int pf, int representor_port, 5995 uint16_t *repr_id) 5996 { 5997 int ret, n, count; 5998 uint32_t i; 5999 struct rte_eth_representor_info *info = NULL; 6000 size_t size; 6001 6002 if (type == RTE_ETH_REPRESENTOR_NONE) 6003 return 0; 6004 if (repr_id == NULL) 6005 return -EINVAL; 6006 6007 /* Get PMD representor range info. */ 6008 ret = rte_eth_representor_info_get(port_id, NULL); 6009 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF && 6010 controller == -1 && pf == -1) { 6011 /* Direct mapping for legacy VF representor. */ 6012 *repr_id = representor_port; 6013 return 0; 6014 } else if (ret < 0) { 6015 return ret; 6016 } 6017 n = ret; 6018 size = sizeof(*info) + n * sizeof(info->ranges[0]); 6019 info = calloc(1, size); 6020 if (info == NULL) 6021 return -ENOMEM; 6022 info->nb_ranges_alloc = n; 6023 ret = rte_eth_representor_info_get(port_id, info); 6024 if (ret < 0) 6025 goto out; 6026 6027 /* Default controller and pf to caller. */ 6028 if (controller == -1) 6029 controller = info->controller; 6030 if (pf == -1) 6031 pf = info->pf; 6032 6033 /* Locate representor ID. */ 6034 ret = -ENOENT; 6035 for (i = 0; i < info->nb_ranges; ++i) { 6036 if (info->ranges[i].type != type) 6037 continue; 6038 if (info->ranges[i].controller != controller) 6039 continue; 6040 if (info->ranges[i].id_end < info->ranges[i].id_base) { 6041 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n", 6042 port_id, info->ranges[i].id_base, 6043 info->ranges[i].id_end, i); 6044 continue; 6045 6046 } 6047 count = info->ranges[i].id_end - info->ranges[i].id_base + 1; 6048 switch (info->ranges[i].type) { 6049 case RTE_ETH_REPRESENTOR_PF: 6050 if (pf < info->ranges[i].pf || 6051 pf >= info->ranges[i].pf + count) 6052 continue; 6053 *repr_id = info->ranges[i].id_base + 6054 (pf - info->ranges[i].pf); 6055 ret = 0; 6056 goto out; 6057 case RTE_ETH_REPRESENTOR_VF: 6058 if (info->ranges[i].pf != pf) 6059 continue; 6060 if (representor_port < info->ranges[i].vf || 6061 representor_port >= info->ranges[i].vf + count) 6062 continue; 6063 *repr_id = info->ranges[i].id_base + 6064 (representor_port - info->ranges[i].vf); 6065 ret = 0; 6066 goto out; 6067 case RTE_ETH_REPRESENTOR_SF: 6068 if (info->ranges[i].pf != pf) 6069 continue; 6070 if (representor_port < info->ranges[i].sf || 6071 representor_port >= info->ranges[i].sf + count) 6072 continue; 6073 *repr_id = info->ranges[i].id_base + 6074 (representor_port - info->ranges[i].sf); 6075 ret = 0; 6076 goto out; 6077 default: 6078 break; 6079 } 6080 } 6081 out: 6082 free(info); 6083 return ret; 6084 } 6085 6086 static int 6087 eth_dev_handle_port_list(const char *cmd __rte_unused, 6088 const char *params __rte_unused, 6089 struct rte_tel_data *d) 6090 { 6091 int port_id; 6092 6093 rte_tel_data_start_array(d, RTE_TEL_INT_VAL); 6094 RTE_ETH_FOREACH_DEV(port_id) 6095 rte_tel_data_add_array_int(d, port_id); 6096 return 0; 6097 } 6098 6099 static void 6100 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats, 6101 const char *stat_name) 6102 { 6103 int q; 6104 struct rte_tel_data *q_data = rte_tel_data_alloc(); 6105 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL); 6106 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++) 6107 rte_tel_data_add_array_u64(q_data, q_stats[q]); 6108 rte_tel_data_add_dict_container(d, stat_name, q_data, 0); 6109 } 6110 6111 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s) 6112 6113 static int 6114 eth_dev_handle_port_stats(const char *cmd __rte_unused, 6115 const char *params, 6116 struct rte_tel_data *d) 6117 { 6118 struct rte_eth_stats stats; 6119 int port_id, ret; 6120 6121 if (params == NULL || strlen(params) == 0 || !isdigit(*params)) 6122 return -1; 6123 6124 port_id = atoi(params); 6125 if (!rte_eth_dev_is_valid_port(port_id)) 6126 return -1; 6127 6128 ret = rte_eth_stats_get(port_id, &stats); 6129 if (ret < 0) 6130 return -1; 6131 6132 rte_tel_data_start_dict(d); 6133 ADD_DICT_STAT(stats, ipackets); 6134 ADD_DICT_STAT(stats, opackets); 6135 ADD_DICT_STAT(stats, ibytes); 6136 ADD_DICT_STAT(stats, obytes); 6137 ADD_DICT_STAT(stats, imissed); 6138 ADD_DICT_STAT(stats, ierrors); 6139 ADD_DICT_STAT(stats, oerrors); 6140 ADD_DICT_STAT(stats, rx_nombuf); 6141 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets"); 6142 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets"); 6143 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes"); 6144 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes"); 6145 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors"); 6146 6147 return 0; 6148 } 6149 6150 static int 6151 eth_dev_handle_port_xstats(const char *cmd __rte_unused, 6152 const char *params, 6153 struct rte_tel_data *d) 6154 { 6155 struct rte_eth_xstat *eth_xstats; 6156 struct rte_eth_xstat_name *xstat_names; 6157 int port_id, num_xstats; 6158 int i, ret; 6159 char *end_param; 6160 6161 if (params == NULL || strlen(params) == 0 || !isdigit(*params)) 6162 return -1; 6163 6164 port_id = strtoul(params, &end_param, 0); 6165 if (*end_param != '\0') 6166 RTE_ETHDEV_LOG(NOTICE, 6167 "Extra parameters passed to ethdev telemetry command, ignoring"); 6168 if (!rte_eth_dev_is_valid_port(port_id)) 6169 return -1; 6170 6171 num_xstats = rte_eth_xstats_get(port_id, NULL, 0); 6172 if (num_xstats < 0) 6173 return -1; 6174 6175 /* use one malloc for both names and stats */ 6176 eth_xstats = malloc((sizeof(struct rte_eth_xstat) + 6177 sizeof(struct rte_eth_xstat_name)) * num_xstats); 6178 if (eth_xstats == NULL) 6179 return -1; 6180 xstat_names = (void *)ð_xstats[num_xstats]; 6181 6182 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats); 6183 if (ret < 0 || ret > num_xstats) { 6184 free(eth_xstats); 6185 return -1; 6186 } 6187 6188 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats); 6189 if (ret < 0 || ret > num_xstats) { 6190 free(eth_xstats); 6191 return -1; 6192 } 6193 6194 rte_tel_data_start_dict(d); 6195 for (i = 0; i < num_xstats; i++) 6196 rte_tel_data_add_dict_u64(d, xstat_names[i].name, 6197 eth_xstats[i].value); 6198 return 0; 6199 } 6200 6201 static int 6202 eth_dev_handle_port_link_status(const char *cmd __rte_unused, 6203 const char *params, 6204 struct rte_tel_data *d) 6205 { 6206 static const char *status_str = "status"; 6207 int ret, port_id; 6208 struct rte_eth_link link; 6209 char *end_param; 6210 6211 if (params == NULL || strlen(params) == 0 || !isdigit(*params)) 6212 return -1; 6213 6214 port_id = strtoul(params, &end_param, 0); 6215 if (*end_param != '\0') 6216 RTE_ETHDEV_LOG(NOTICE, 6217 "Extra parameters passed to ethdev telemetry command, ignoring"); 6218 if (!rte_eth_dev_is_valid_port(port_id)) 6219 return -1; 6220 6221 ret = rte_eth_link_get_nowait(port_id, &link); 6222 if (ret < 0) 6223 return -1; 6224 6225 rte_tel_data_start_dict(d); 6226 if (!link.link_status) { 6227 rte_tel_data_add_dict_string(d, status_str, "DOWN"); 6228 return 0; 6229 } 6230 rte_tel_data_add_dict_string(d, status_str, "UP"); 6231 rte_tel_data_add_dict_u64(d, "speed", link.link_speed); 6232 rte_tel_data_add_dict_string(d, "duplex", 6233 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ? 6234 "full-duplex" : "half-duplex"); 6235 return 0; 6236 } 6237 6238 static int 6239 eth_dev_handle_port_info(const char *cmd __rte_unused, 6240 const char *params, 6241 struct rte_tel_data *d) 6242 { 6243 struct rte_tel_data *rxq_state, *txq_state; 6244 char mac_addr[RTE_ETHER_ADDR_LEN]; 6245 struct rte_eth_dev *eth_dev; 6246 char *end_param; 6247 int port_id, i; 6248 6249 if (params == NULL || strlen(params) == 0 || !isdigit(*params)) 6250 return -1; 6251 6252 port_id = strtoul(params, &end_param, 0); 6253 if (*end_param != '\0') 6254 RTE_ETHDEV_LOG(NOTICE, 6255 "Extra parameters passed to ethdev telemetry command, ignoring"); 6256 6257 if (!rte_eth_dev_is_valid_port(port_id)) 6258 return -EINVAL; 6259 6260 eth_dev = &rte_eth_devices[port_id]; 6261 if (!eth_dev) 6262 return -EINVAL; 6263 6264 rxq_state = rte_tel_data_alloc(); 6265 if (!rxq_state) 6266 return -ENOMEM; 6267 6268 txq_state = rte_tel_data_alloc(); 6269 if (!txq_state) 6270 return -ENOMEM; 6271 6272 rte_tel_data_start_dict(d); 6273 rte_tel_data_add_dict_string(d, "name", eth_dev->data->name); 6274 rte_tel_data_add_dict_int(d, "state", eth_dev->state); 6275 rte_tel_data_add_dict_int(d, "nb_rx_queues", 6276 eth_dev->data->nb_rx_queues); 6277 rte_tel_data_add_dict_int(d, "nb_tx_queues", 6278 eth_dev->data->nb_tx_queues); 6279 rte_tel_data_add_dict_int(d, "port_id", eth_dev->data->port_id); 6280 rte_tel_data_add_dict_int(d, "mtu", eth_dev->data->mtu); 6281 rte_tel_data_add_dict_int(d, "rx_mbuf_size_min", 6282 eth_dev->data->min_rx_buf_size); 6283 rte_tel_data_add_dict_int(d, "rx_mbuf_alloc_fail", 6284 eth_dev->data->rx_mbuf_alloc_failed); 6285 snprintf(mac_addr, RTE_ETHER_ADDR_LEN, "%02x:%02x:%02x:%02x:%02x:%02x", 6286 eth_dev->data->mac_addrs->addr_bytes[0], 6287 eth_dev->data->mac_addrs->addr_bytes[1], 6288 eth_dev->data->mac_addrs->addr_bytes[2], 6289 eth_dev->data->mac_addrs->addr_bytes[3], 6290 eth_dev->data->mac_addrs->addr_bytes[4], 6291 eth_dev->data->mac_addrs->addr_bytes[5]); 6292 rte_tel_data_add_dict_string(d, "mac_addr", mac_addr); 6293 rte_tel_data_add_dict_int(d, "promiscuous", 6294 eth_dev->data->promiscuous); 6295 rte_tel_data_add_dict_int(d, "scattered_rx", 6296 eth_dev->data->scattered_rx); 6297 rte_tel_data_add_dict_int(d, "all_multicast", 6298 eth_dev->data->all_multicast); 6299 rte_tel_data_add_dict_int(d, "dev_started", eth_dev->data->dev_started); 6300 rte_tel_data_add_dict_int(d, "lro", eth_dev->data->lro); 6301 rte_tel_data_add_dict_int(d, "dev_configured", 6302 eth_dev->data->dev_configured); 6303 6304 rte_tel_data_start_array(rxq_state, RTE_TEL_INT_VAL); 6305 for (i = 0; i < eth_dev->data->nb_rx_queues; i++) 6306 rte_tel_data_add_array_int(rxq_state, 6307 eth_dev->data->rx_queue_state[i]); 6308 6309 rte_tel_data_start_array(txq_state, RTE_TEL_INT_VAL); 6310 for (i = 0; i < eth_dev->data->nb_tx_queues; i++) 6311 rte_tel_data_add_array_int(txq_state, 6312 eth_dev->data->tx_queue_state[i]); 6313 6314 rte_tel_data_add_dict_container(d, "rxq_state", rxq_state, 0); 6315 rte_tel_data_add_dict_container(d, "txq_state", txq_state, 0); 6316 rte_tel_data_add_dict_int(d, "numa_node", eth_dev->data->numa_node); 6317 rte_tel_data_add_dict_int(d, "dev_flags", eth_dev->data->dev_flags); 6318 rte_tel_data_add_dict_int(d, "rx_offloads", 6319 eth_dev->data->dev_conf.rxmode.offloads); 6320 rte_tel_data_add_dict_int(d, "tx_offloads", 6321 eth_dev->data->dev_conf.txmode.offloads); 6322 rte_tel_data_add_dict_int(d, "ethdev_rss_hf", 6323 eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf); 6324 6325 return 0; 6326 } 6327 6328 int 6329 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue, 6330 struct rte_hairpin_peer_info *cur_info, 6331 struct rte_hairpin_peer_info *peer_info, 6332 uint32_t direction) 6333 { 6334 struct rte_eth_dev *dev; 6335 6336 /* Current queue information is not mandatory. */ 6337 if (peer_info == NULL) 6338 return -EINVAL; 6339 6340 /* No need to check the validity again. */ 6341 dev = &rte_eth_devices[peer_port]; 6342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update, 6343 -ENOTSUP); 6344 6345 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue, 6346 cur_info, peer_info, direction); 6347 } 6348 6349 int 6350 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue, 6351 struct rte_hairpin_peer_info *peer_info, 6352 uint32_t direction) 6353 { 6354 struct rte_eth_dev *dev; 6355 6356 if (peer_info == NULL) 6357 return -EINVAL; 6358 6359 /* No need to check the validity again. */ 6360 dev = &rte_eth_devices[cur_port]; 6361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind, 6362 -ENOTSUP); 6363 6364 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue, 6365 peer_info, direction); 6366 } 6367 6368 int 6369 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue, 6370 uint32_t direction) 6371 { 6372 struct rte_eth_dev *dev; 6373 6374 /* No need to check the validity again. */ 6375 dev = &rte_eth_devices[cur_port]; 6376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind, 6377 -ENOTSUP); 6378 6379 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue, 6380 direction); 6381 } 6382 6383 int 6384 rte_eth_representor_info_get(uint16_t port_id, 6385 struct rte_eth_representor_info *info) 6386 { 6387 struct rte_eth_dev *dev; 6388 6389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 6390 dev = &rte_eth_devices[port_id]; 6391 6392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP); 6393 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info)); 6394 } 6395 6396 int 6397 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features) 6398 { 6399 struct rte_eth_dev *dev; 6400 6401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV); 6402 dev = &rte_eth_devices[port_id]; 6403 6404 if (dev->data->dev_configured != 0) { 6405 RTE_ETHDEV_LOG(ERR, 6406 "The port (id=%"PRIu16") is already configured\n", 6407 port_id); 6408 return -EBUSY; 6409 } 6410 6411 if (features == NULL) { 6412 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n"); 6413 return -EINVAL; 6414 } 6415 6416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP); 6417 return eth_err(port_id, 6418 (*dev->dev_ops->rx_metadata_negotiate)(dev, features)); 6419 } 6420 6421 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO); 6422 6423 RTE_INIT(ethdev_init_telemetry) 6424 { 6425 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list, 6426 "Returns list of available ethdev ports. Takes no parameters"); 6427 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats, 6428 "Returns the common stats for a port. Parameters: int port_id"); 6429 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats, 6430 "Returns the extended stats for a port. Parameters: int port_id"); 6431 rte_telemetry_register_cmd("/ethdev/link_status", 6432 eth_dev_handle_port_link_status, 6433 "Returns the link status for a port. Parameters: int port_id"); 6434 rte_telemetry_register_cmd("/ethdev/info", eth_dev_handle_port_info, 6435 "Returns the device info for a port. Parameters: int port_id"); 6436 } 6437