1*99a2dd95SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
2*99a2dd95SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation.
3*99a2dd95SBruce Richardson * Copyright(c) 2012-2013 6WIND S.A.
4*99a2dd95SBruce Richardson */
5*99a2dd95SBruce Richardson
6*99a2dd95SBruce Richardson #include <stdio.h>
7*99a2dd95SBruce Richardson #include <stdint.h>
8*99a2dd95SBruce Richardson
9*99a2dd95SBruce Richardson #include <rte_common.h>
10*99a2dd95SBruce Richardson #include <rte_cycles.h>
11*99a2dd95SBruce Richardson
12*99a2dd95SBruce Richardson #include "eal_private.h"
13*99a2dd95SBruce Richardson
14*99a2dd95SBruce Richardson enum timer_source eal_timer_source = EAL_TIMER_HPET;
15*99a2dd95SBruce Richardson
16*99a2dd95SBruce Richardson #ifdef RTE_LIBEAL_USE_HPET
17*99a2dd95SBruce Richardson
18*99a2dd95SBruce Richardson #define DEV_HPET "/dev/hpet"
19*99a2dd95SBruce Richardson
20*99a2dd95SBruce Richardson /* Maximum number of counters. */
21*99a2dd95SBruce Richardson #define HPET_TIMER_NUM 3
22*99a2dd95SBruce Richardson
23*99a2dd95SBruce Richardson /* General capabilities register */
24*99a2dd95SBruce Richardson #define CLK_PERIOD_SHIFT 32 /* Clock period shift. */
25*99a2dd95SBruce Richardson #define CLK_PERIOD_MASK 0xffffffff00000000ULL /* Clock period mask. */
26*99a2dd95SBruce Richardson
27*99a2dd95SBruce Richardson /**
28*99a2dd95SBruce Richardson * HPET timer registers. From the Intel IA-PC HPET (High Precision Event
29*99a2dd95SBruce Richardson * Timers) Specification.
30*99a2dd95SBruce Richardson */
31*99a2dd95SBruce Richardson struct eal_hpet_regs {
32*99a2dd95SBruce Richardson /* Memory-mapped, software visible registers */
33*99a2dd95SBruce Richardson uint64_t capabilities; /**< RO General Capabilities Register. */
34*99a2dd95SBruce Richardson uint64_t reserved0; /**< Reserved for future use. */
35*99a2dd95SBruce Richardson uint64_t config; /**< RW General Configuration Register. */
36*99a2dd95SBruce Richardson uint64_t reserved1; /**< Reserved for future use. */
37*99a2dd95SBruce Richardson uint64_t isr; /**< RW Clear General Interrupt Status. */
38*99a2dd95SBruce Richardson uint64_t reserved2[25]; /**< Reserved for future use. */
39*99a2dd95SBruce Richardson union {
40*99a2dd95SBruce Richardson uint64_t counter; /**< RW Main Counter Value Register. */
41*99a2dd95SBruce Richardson struct {
42*99a2dd95SBruce Richardson uint32_t counter_l; /**< RW Main Counter Low. */
43*99a2dd95SBruce Richardson uint32_t counter_h; /**< RW Main Counter High. */
44*99a2dd95SBruce Richardson };
45*99a2dd95SBruce Richardson };
46*99a2dd95SBruce Richardson uint64_t reserved3; /**< Reserved for future use. */
47*99a2dd95SBruce Richardson struct {
48*99a2dd95SBruce Richardson uint64_t config; /**< RW Timer Config and Capability Reg. */
49*99a2dd95SBruce Richardson uint64_t comp; /**< RW Timer Comparator Value Register. */
50*99a2dd95SBruce Richardson uint64_t fsb; /**< RW FSB Interrupt Route Register. */
51*99a2dd95SBruce Richardson uint64_t reserved4; /**< Reserved for future use. */
52*99a2dd95SBruce Richardson } timers[HPET_TIMER_NUM]; /**< Set of HPET timers. */
53*99a2dd95SBruce Richardson };
54*99a2dd95SBruce Richardson
55*99a2dd95SBruce Richardson /* Mmap'd hpet registers */
56*99a2dd95SBruce Richardson static volatile struct eal_hpet_regs *eal_hpet = NULL;
57*99a2dd95SBruce Richardson
58*99a2dd95SBruce Richardson /* Period at which the HPET counter increments in
59*99a2dd95SBruce Richardson * femtoseconds (10^-15 seconds). */
60*99a2dd95SBruce Richardson static uint32_t eal_hpet_resolution_fs = 0;
61*99a2dd95SBruce Richardson
62*99a2dd95SBruce Richardson /* Frequency of the HPET counter in Hz */
63*99a2dd95SBruce Richardson static uint64_t eal_hpet_resolution_hz = 0;
64*99a2dd95SBruce Richardson
65*99a2dd95SBruce Richardson /* Incremented 4 times during one 32bits hpet full count */
66*99a2dd95SBruce Richardson static uint32_t eal_hpet_msb;
67*99a2dd95SBruce Richardson
68*99a2dd95SBruce Richardson static pthread_t msb_inc_thread_id;
69*99a2dd95SBruce Richardson
70*99a2dd95SBruce Richardson /*
71*99a2dd95SBruce Richardson * This function runs on a specific thread to update a global variable
72*99a2dd95SBruce Richardson * containing used to process MSB of the HPET (unfortunately, we need
73*99a2dd95SBruce Richardson * this because hpet is 32 bits by default under linux).
74*99a2dd95SBruce Richardson */
75*99a2dd95SBruce Richardson static void *
hpet_msb_inc(__rte_unused void * arg)76*99a2dd95SBruce Richardson hpet_msb_inc(__rte_unused void *arg)
77*99a2dd95SBruce Richardson {
78*99a2dd95SBruce Richardson uint32_t t;
79*99a2dd95SBruce Richardson
80*99a2dd95SBruce Richardson while (1) {
81*99a2dd95SBruce Richardson t = (eal_hpet->counter_l >> 30);
82*99a2dd95SBruce Richardson if (t != (eal_hpet_msb & 3))
83*99a2dd95SBruce Richardson eal_hpet_msb ++;
84*99a2dd95SBruce Richardson sleep(10);
85*99a2dd95SBruce Richardson }
86*99a2dd95SBruce Richardson return NULL;
87*99a2dd95SBruce Richardson }
88*99a2dd95SBruce Richardson
89*99a2dd95SBruce Richardson uint64_t
rte_get_hpet_hz(void)90*99a2dd95SBruce Richardson rte_get_hpet_hz(void)
91*99a2dd95SBruce Richardson {
92*99a2dd95SBruce Richardson const struct internal_config *internal_conf =
93*99a2dd95SBruce Richardson eal_get_internal_configuration();
94*99a2dd95SBruce Richardson
95*99a2dd95SBruce Richardson if (internal_conf->no_hpet)
96*99a2dd95SBruce Richardson rte_panic("Error, HPET called, but no HPET present\n");
97*99a2dd95SBruce Richardson
98*99a2dd95SBruce Richardson return eal_hpet_resolution_hz;
99*99a2dd95SBruce Richardson }
100*99a2dd95SBruce Richardson
101*99a2dd95SBruce Richardson uint64_t
rte_get_hpet_cycles(void)102*99a2dd95SBruce Richardson rte_get_hpet_cycles(void)
103*99a2dd95SBruce Richardson {
104*99a2dd95SBruce Richardson uint32_t t, msb;
105*99a2dd95SBruce Richardson uint64_t ret;
106*99a2dd95SBruce Richardson const struct internal_config *internal_conf =
107*99a2dd95SBruce Richardson eal_get_internal_configuration();
108*99a2dd95SBruce Richardson
109*99a2dd95SBruce Richardson if (internal_conf->no_hpet)
110*99a2dd95SBruce Richardson rte_panic("Error, HPET called, but no HPET present\n");
111*99a2dd95SBruce Richardson
112*99a2dd95SBruce Richardson t = eal_hpet->counter_l;
113*99a2dd95SBruce Richardson msb = eal_hpet_msb;
114*99a2dd95SBruce Richardson ret = (msb + 2 - (t >> 30)) / 4;
115*99a2dd95SBruce Richardson ret <<= 32;
116*99a2dd95SBruce Richardson ret += t;
117*99a2dd95SBruce Richardson return ret;
118*99a2dd95SBruce Richardson }
119*99a2dd95SBruce Richardson
120*99a2dd95SBruce Richardson #endif
121*99a2dd95SBruce Richardson
122*99a2dd95SBruce Richardson #ifdef RTE_LIBEAL_USE_HPET
123*99a2dd95SBruce Richardson /*
124*99a2dd95SBruce Richardson * Open and mmap /dev/hpet (high precision event timer) that will
125*99a2dd95SBruce Richardson * provide our time reference.
126*99a2dd95SBruce Richardson */
127*99a2dd95SBruce Richardson int
rte_eal_hpet_init(int make_default)128*99a2dd95SBruce Richardson rte_eal_hpet_init(int make_default)
129*99a2dd95SBruce Richardson {
130*99a2dd95SBruce Richardson int fd, ret;
131*99a2dd95SBruce Richardson struct internal_config *internal_conf =
132*99a2dd95SBruce Richardson eal_get_internal_configuration();
133*99a2dd95SBruce Richardson
134*99a2dd95SBruce Richardson if (internal_conf->no_hpet) {
135*99a2dd95SBruce Richardson RTE_LOG(NOTICE, EAL, "HPET is disabled\n");
136*99a2dd95SBruce Richardson return -1;
137*99a2dd95SBruce Richardson }
138*99a2dd95SBruce Richardson
139*99a2dd95SBruce Richardson fd = open(DEV_HPET, O_RDONLY);
140*99a2dd95SBruce Richardson if (fd < 0) {
141*99a2dd95SBruce Richardson RTE_LOG(ERR, EAL, "ERROR: Cannot open "DEV_HPET": %s!\n",
142*99a2dd95SBruce Richardson strerror(errno));
143*99a2dd95SBruce Richardson internal_conf->no_hpet = 1;
144*99a2dd95SBruce Richardson return -1;
145*99a2dd95SBruce Richardson }
146*99a2dd95SBruce Richardson eal_hpet = mmap(NULL, 1024, PROT_READ, MAP_SHARED, fd, 0);
147*99a2dd95SBruce Richardson if (eal_hpet == MAP_FAILED) {
148*99a2dd95SBruce Richardson RTE_LOG(ERR, EAL, "ERROR: Cannot mmap "DEV_HPET"!\n"
149*99a2dd95SBruce Richardson "Please enable CONFIG_HPET_MMAP in your kernel configuration "
150*99a2dd95SBruce Richardson "to allow HPET support.\n"
151*99a2dd95SBruce Richardson "To run without using HPET, unset RTE_LIBEAL_USE_HPET "
152*99a2dd95SBruce Richardson "in your build configuration or use '--no-hpet' EAL flag.\n");
153*99a2dd95SBruce Richardson close(fd);
154*99a2dd95SBruce Richardson internal_conf->no_hpet = 1;
155*99a2dd95SBruce Richardson return -1;
156*99a2dd95SBruce Richardson }
157*99a2dd95SBruce Richardson close(fd);
158*99a2dd95SBruce Richardson
159*99a2dd95SBruce Richardson eal_hpet_resolution_fs = (uint32_t)((eal_hpet->capabilities &
160*99a2dd95SBruce Richardson CLK_PERIOD_MASK) >>
161*99a2dd95SBruce Richardson CLK_PERIOD_SHIFT);
162*99a2dd95SBruce Richardson
163*99a2dd95SBruce Richardson eal_hpet_resolution_hz = (1000ULL*1000ULL*1000ULL*1000ULL*1000ULL) /
164*99a2dd95SBruce Richardson (uint64_t)eal_hpet_resolution_fs;
165*99a2dd95SBruce Richardson
166*99a2dd95SBruce Richardson RTE_LOG(INFO, EAL, "HPET frequency is ~%"PRIu64" kHz\n",
167*99a2dd95SBruce Richardson eal_hpet_resolution_hz/1000);
168*99a2dd95SBruce Richardson
169*99a2dd95SBruce Richardson eal_hpet_msb = (eal_hpet->counter_l >> 30);
170*99a2dd95SBruce Richardson
171*99a2dd95SBruce Richardson /* create a thread that will increment a global variable for
172*99a2dd95SBruce Richardson * msb (hpet is 32 bits by default under linux) */
173*99a2dd95SBruce Richardson ret = rte_ctrl_thread_create(&msb_inc_thread_id, "hpet-msb-inc", NULL,
174*99a2dd95SBruce Richardson hpet_msb_inc, NULL);
175*99a2dd95SBruce Richardson if (ret != 0) {
176*99a2dd95SBruce Richardson RTE_LOG(ERR, EAL, "ERROR: Cannot create HPET timer thread!\n");
177*99a2dd95SBruce Richardson internal_conf->no_hpet = 1;
178*99a2dd95SBruce Richardson return -1;
179*99a2dd95SBruce Richardson }
180*99a2dd95SBruce Richardson
181*99a2dd95SBruce Richardson if (make_default)
182*99a2dd95SBruce Richardson eal_timer_source = EAL_TIMER_HPET;
183*99a2dd95SBruce Richardson return 0;
184*99a2dd95SBruce Richardson }
185*99a2dd95SBruce Richardson #endif
186*99a2dd95SBruce Richardson
187*99a2dd95SBruce Richardson uint64_t
get_tsc_freq(void)188*99a2dd95SBruce Richardson get_tsc_freq(void)
189*99a2dd95SBruce Richardson {
190*99a2dd95SBruce Richardson #ifdef CLOCK_MONOTONIC_RAW
191*99a2dd95SBruce Richardson #define NS_PER_SEC 1E9
192*99a2dd95SBruce Richardson #define CYC_PER_10MHZ 1E7
193*99a2dd95SBruce Richardson
194*99a2dd95SBruce Richardson struct timespec sleeptime = {.tv_nsec = NS_PER_SEC / 10 }; /* 1/10 second */
195*99a2dd95SBruce Richardson
196*99a2dd95SBruce Richardson struct timespec t_start, t_end;
197*99a2dd95SBruce Richardson uint64_t tsc_hz;
198*99a2dd95SBruce Richardson
199*99a2dd95SBruce Richardson if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
200*99a2dd95SBruce Richardson uint64_t ns, end, start = rte_rdtsc();
201*99a2dd95SBruce Richardson nanosleep(&sleeptime,NULL);
202*99a2dd95SBruce Richardson clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
203*99a2dd95SBruce Richardson end = rte_rdtsc();
204*99a2dd95SBruce Richardson ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
205*99a2dd95SBruce Richardson ns += (t_end.tv_nsec - t_start.tv_nsec);
206*99a2dd95SBruce Richardson
207*99a2dd95SBruce Richardson double secs = (double)ns/NS_PER_SEC;
208*99a2dd95SBruce Richardson tsc_hz = (uint64_t)((end - start)/secs);
209*99a2dd95SBruce Richardson /* Round up to 10Mhz. 1E7 ~ 10Mhz */
210*99a2dd95SBruce Richardson return RTE_ALIGN_MUL_NEAR(tsc_hz, CYC_PER_10MHZ);
211*99a2dd95SBruce Richardson }
212*99a2dd95SBruce Richardson #endif
213*99a2dd95SBruce Richardson return 0;
214*99a2dd95SBruce Richardson }
215*99a2dd95SBruce Richardson
216*99a2dd95SBruce Richardson int
rte_eal_timer_init(void)217*99a2dd95SBruce Richardson rte_eal_timer_init(void)
218*99a2dd95SBruce Richardson {
219*99a2dd95SBruce Richardson
220*99a2dd95SBruce Richardson eal_timer_source = EAL_TIMER_TSC;
221*99a2dd95SBruce Richardson
222*99a2dd95SBruce Richardson set_tsc_freq();
223*99a2dd95SBruce Richardson return 0;
224*99a2dd95SBruce Richardson }
225