1*ed2a80fdSPablo de Lara /*- 2*ed2a80fdSPablo de Lara * BSD LICENSE 3*ed2a80fdSPablo de Lara * 4*ed2a80fdSPablo de Lara * Copyright(c) 2016-2017 Intel Corporation. All rights reserved. 5*ed2a80fdSPablo de Lara * All rights reserved. 6*ed2a80fdSPablo de Lara * 7*ed2a80fdSPablo de Lara * Redistribution and use in source and binary forms, with or without 8*ed2a80fdSPablo de Lara * modification, are permitted provided that the following conditions 9*ed2a80fdSPablo de Lara * are met: 10*ed2a80fdSPablo de Lara * 11*ed2a80fdSPablo de Lara * * Redistributions of source code must retain the above copyright 12*ed2a80fdSPablo de Lara * notice, this list of conditions and the following disclaimer. 13*ed2a80fdSPablo de Lara * * Redistributions in binary form must reproduce the above copyright 14*ed2a80fdSPablo de Lara * notice, this list of conditions and the following disclaimer in 15*ed2a80fdSPablo de Lara * the documentation and/or other materials provided with the 16*ed2a80fdSPablo de Lara * distribution. 17*ed2a80fdSPablo de Lara * * Neither the name of Intel Corporation nor the names of its 18*ed2a80fdSPablo de Lara * contributors may be used to endorse or promote products derived 19*ed2a80fdSPablo de Lara * from this software without specific prior written permission. 20*ed2a80fdSPablo de Lara * 21*ed2a80fdSPablo de Lara * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22*ed2a80fdSPablo de Lara * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23*ed2a80fdSPablo de Lara * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24*ed2a80fdSPablo de Lara * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25*ed2a80fdSPablo de Lara * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26*ed2a80fdSPablo de Lara * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27*ed2a80fdSPablo de Lara * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28*ed2a80fdSPablo de Lara * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29*ed2a80fdSPablo de Lara * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30*ed2a80fdSPablo de Lara * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31*ed2a80fdSPablo de Lara * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32*ed2a80fdSPablo de Lara */ 33*ed2a80fdSPablo de Lara 34*ed2a80fdSPablo de Lara #ifndef _COMMON_H_ 35*ed2a80fdSPablo de Lara #define _COMMON_H_ 36*ed2a80fdSPablo de Lara 37*ed2a80fdSPablo de Lara #include <rte_hash_crc.h> 38*ed2a80fdSPablo de Lara #include <rte_hash.h> 39*ed2a80fdSPablo de Lara 40*ed2a80fdSPablo de Lara #define MAX_NODES 16 41*ed2a80fdSPablo de Lara /* 42*ed2a80fdSPablo de Lara * Shared port info, including statistics information for display by server. 43*ed2a80fdSPablo de Lara * Structure will be put in a memzone. 44*ed2a80fdSPablo de Lara * - All port id values share one cache line as this data will be read-only 45*ed2a80fdSPablo de Lara * during operation. 46*ed2a80fdSPablo de Lara * - All rx statistic values share cache lines, as this data is written only 47*ed2a80fdSPablo de Lara * by the server process. (rare reads by stats display) 48*ed2a80fdSPablo de Lara * - The tx statistics have values for all ports per cache line, but the stats 49*ed2a80fdSPablo de Lara * themselves are written by the nodes, so we have a distinct set, on different 50*ed2a80fdSPablo de Lara * cache lines for each node to use. 51*ed2a80fdSPablo de Lara */ 52*ed2a80fdSPablo de Lara struct rx_stats { 53*ed2a80fdSPablo de Lara uint64_t rx[RTE_MAX_ETHPORTS]; 54*ed2a80fdSPablo de Lara } __rte_cache_aligned; 55*ed2a80fdSPablo de Lara 56*ed2a80fdSPablo de Lara struct tx_stats { 57*ed2a80fdSPablo de Lara uint64_t tx[RTE_MAX_ETHPORTS]; 58*ed2a80fdSPablo de Lara uint64_t tx_drop[RTE_MAX_ETHPORTS]; 59*ed2a80fdSPablo de Lara } __rte_cache_aligned; 60*ed2a80fdSPablo de Lara 61*ed2a80fdSPablo de Lara struct filter_stats { 62*ed2a80fdSPablo de Lara uint64_t drop; 63*ed2a80fdSPablo de Lara uint64_t passed; 64*ed2a80fdSPablo de Lara } __rte_cache_aligned; 65*ed2a80fdSPablo de Lara 66*ed2a80fdSPablo de Lara struct shared_info { 67*ed2a80fdSPablo de Lara uint8_t num_nodes; 68*ed2a80fdSPablo de Lara uint8_t num_ports; 69*ed2a80fdSPablo de Lara uint32_t num_flows; 70*ed2a80fdSPablo de Lara uint8_t id[RTE_MAX_ETHPORTS]; 71*ed2a80fdSPablo de Lara struct rx_stats rx_stats; 72*ed2a80fdSPablo de Lara struct tx_stats tx_stats[MAX_NODES]; 73*ed2a80fdSPablo de Lara struct filter_stats filter_stats[MAX_NODES]; 74*ed2a80fdSPablo de Lara }; 75*ed2a80fdSPablo de Lara 76*ed2a80fdSPablo de Lara /* define common names for structures shared between server and node */ 77*ed2a80fdSPablo de Lara #define MP_NODE_RXQ_NAME "MProc_Node_%u_RX" 78*ed2a80fdSPablo de Lara #define PKTMBUF_POOL_NAME "MProc_pktmbuf_pool" 79*ed2a80fdSPablo de Lara #define MZ_SHARED_INFO "MProc_shared_info" 80*ed2a80fdSPablo de Lara 81*ed2a80fdSPablo de Lara /* 82*ed2a80fdSPablo de Lara * Given the rx queue name template above, get the queue name 83*ed2a80fdSPablo de Lara */ 84*ed2a80fdSPablo de Lara static inline const char * 85*ed2a80fdSPablo de Lara get_rx_queue_name(unsigned int id) 86*ed2a80fdSPablo de Lara { 87*ed2a80fdSPablo de Lara /* 88*ed2a80fdSPablo de Lara * Buffer for return value. Size calculated by %u being replaced 89*ed2a80fdSPablo de Lara * by maximum 3 digits (plus an extra byte for safety) 90*ed2a80fdSPablo de Lara */ 91*ed2a80fdSPablo de Lara static char buffer[sizeof(MP_NODE_RXQ_NAME) + 2]; 92*ed2a80fdSPablo de Lara 93*ed2a80fdSPablo de Lara snprintf(buffer, sizeof(buffer) - 1, MP_NODE_RXQ_NAME, id); 94*ed2a80fdSPablo de Lara return buffer; 95*ed2a80fdSPablo de Lara } 96*ed2a80fdSPablo de Lara 97*ed2a80fdSPablo de Lara #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1 98*ed2a80fdSPablo de Lara 99*ed2a80fdSPablo de Lara #endif 100