1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 4*e9d48c00SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel */ 33af75078fSIntel 34af75078fSIntel #include <stdio.h> 35af75078fSIntel #include <string.h> 36af75078fSIntel #include <stdint.h> 37af75078fSIntel #include <errno.h> 38af75078fSIntel #include <sys/queue.h> 39af75078fSIntel 40af75078fSIntel #include <rte_memory.h> 41af75078fSIntel #include <rte_memzone.h> 42af75078fSIntel #include <rte_launch.h> 43af75078fSIntel #include <rte_tailq.h> 44af75078fSIntel #include <rte_eal.h> 45af75078fSIntel #include <rte_per_lcore.h> 46af75078fSIntel #include <rte_lcore.h> 47af75078fSIntel #include <rte_debug.h> 48af75078fSIntel 49af75078fSIntel #include "main.h" 50af75078fSIntel 51af75078fSIntel static int 52af75078fSIntel lcore_hello(__attribute__((unused)) void *arg) 53af75078fSIntel { 54af75078fSIntel unsigned lcore_id; 55af75078fSIntel lcore_id = rte_lcore_id(); 56af75078fSIntel printf("hello from core %u\n", lcore_id); 57af75078fSIntel return 0; 58af75078fSIntel } 59af75078fSIntel 60af75078fSIntel int 61af75078fSIntel MAIN(int argc, char **argv) 62af75078fSIntel { 63af75078fSIntel int ret; 64af75078fSIntel unsigned lcore_id; 65af75078fSIntel 66af75078fSIntel ret = rte_eal_init(argc, argv); 67af75078fSIntel if (ret < 0) 68af75078fSIntel rte_panic("Cannot init EAL\n"); 69af75078fSIntel 70af75078fSIntel /* call lcore_hello() on every slave lcore */ 71af75078fSIntel RTE_LCORE_FOREACH_SLAVE(lcore_id) { 72af75078fSIntel rte_eal_remote_launch(lcore_hello, NULL, lcore_id); 73af75078fSIntel } 74af75078fSIntel 75af75078fSIntel /* call it on master lcore too */ 76af75078fSIntel lcore_hello(NULL); 77af75078fSIntel 78af75078fSIntel rte_eal_mp_wait_lcore(); 79af75078fSIntel return 0; 80af75078fSIntel } 81