1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2019-2021 Xilinx, Inc. 4 * Copyright(c) 2019 Solarflare Communications Inc. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 #include <stdbool.h> 11 12 #include <rte_common.h> 13 14 #include "efx.h" 15 16 #include "sfc.h" 17 #include "sfc_log.h" 18 #include "sfc_switch.h" 19 20 static int 21 sfc_mae_assign_entity_mport(struct sfc_adapter *sa, 22 efx_mport_sel_t *mportp) 23 { 24 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 25 26 return efx_mae_mport_by_pcie_function(encp->enc_pf, encp->enc_vf, 27 mportp); 28 } 29 30 int 31 sfc_mae_attach(struct sfc_adapter *sa) 32 { 33 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 34 struct sfc_mae_switch_port_request switch_port_request = {0}; 35 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 36 efx_mport_sel_t entity_mport; 37 struct sfc_mae *mae = &sa->mae; 38 efx_mae_limits_t limits; 39 int rc; 40 41 sfc_log_init(sa, "entry"); 42 43 if (!encp->enc_mae_supported) { 44 mae->status = SFC_MAE_STATUS_UNSUPPORTED; 45 return 0; 46 } 47 48 sfc_log_init(sa, "init MAE"); 49 rc = efx_mae_init(sa->nic); 50 if (rc != 0) 51 goto fail_mae_init; 52 53 sfc_log_init(sa, "get MAE limits"); 54 rc = efx_mae_get_limits(sa->nic, &limits); 55 if (rc != 0) 56 goto fail_mae_get_limits; 57 58 sfc_log_init(sa, "assign entity MPORT"); 59 rc = sfc_mae_assign_entity_mport(sa, &entity_mport); 60 if (rc != 0) 61 goto fail_mae_assign_entity_mport; 62 63 sfc_log_init(sa, "assign RTE switch domain"); 64 rc = sfc_mae_assign_switch_domain(sa, &mae->switch_domain_id); 65 if (rc != 0) 66 goto fail_mae_assign_switch_domain; 67 68 sfc_log_init(sa, "assign RTE switch port"); 69 switch_port_request.type = SFC_MAE_SWITCH_PORT_INDEPENDENT; 70 switch_port_request.entity_mportp = &entity_mport; 71 /* 72 * As of now, the driver does not support representors, so 73 * RTE ethdev MPORT simply matches that of the entity. 74 */ 75 switch_port_request.ethdev_mportp = &entity_mport; 76 switch_port_request.ethdev_port_id = sas->port_id; 77 rc = sfc_mae_assign_switch_port(mae->switch_domain_id, 78 &switch_port_request, 79 &mae->switch_port_id); 80 if (rc != 0) 81 goto fail_mae_assign_switch_port; 82 83 mae->status = SFC_MAE_STATUS_SUPPORTED; 84 mae->nb_outer_rule_prios_max = limits.eml_max_n_outer_prios; 85 mae->nb_action_rule_prios_max = limits.eml_max_n_action_prios; 86 mae->encap_types_supported = limits.eml_encap_types_supported; 87 TAILQ_INIT(&mae->outer_rules); 88 TAILQ_INIT(&mae->action_sets); 89 90 sfc_log_init(sa, "done"); 91 92 return 0; 93 94 fail_mae_assign_switch_port: 95 fail_mae_assign_switch_domain: 96 fail_mae_assign_entity_mport: 97 fail_mae_get_limits: 98 efx_mae_fini(sa->nic); 99 100 fail_mae_init: 101 sfc_log_init(sa, "failed %d", rc); 102 103 return rc; 104 } 105 106 void 107 sfc_mae_detach(struct sfc_adapter *sa) 108 { 109 struct sfc_mae *mae = &sa->mae; 110 enum sfc_mae_status status_prev = mae->status; 111 112 sfc_log_init(sa, "entry"); 113 114 mae->nb_action_rule_prios_max = 0; 115 mae->status = SFC_MAE_STATUS_UNKNOWN; 116 117 if (status_prev != SFC_MAE_STATUS_SUPPORTED) 118 return; 119 120 efx_mae_fini(sa->nic); 121 122 sfc_log_init(sa, "done"); 123 } 124 125 static struct sfc_mae_outer_rule * 126 sfc_mae_outer_rule_attach(struct sfc_adapter *sa, 127 const efx_mae_match_spec_t *match_spec, 128 efx_tunnel_protocol_t encap_type) 129 { 130 struct sfc_mae_outer_rule *rule; 131 struct sfc_mae *mae = &sa->mae; 132 133 SFC_ASSERT(sfc_adapter_is_locked(sa)); 134 135 TAILQ_FOREACH(rule, &mae->outer_rules, entries) { 136 if (efx_mae_match_specs_equal(rule->match_spec, match_spec) && 137 rule->encap_type == encap_type) { 138 ++(rule->refcnt); 139 return rule; 140 } 141 } 142 143 return NULL; 144 } 145 146 static int 147 sfc_mae_outer_rule_add(struct sfc_adapter *sa, 148 efx_mae_match_spec_t *match_spec, 149 efx_tunnel_protocol_t encap_type, 150 struct sfc_mae_outer_rule **rulep) 151 { 152 struct sfc_mae_outer_rule *rule; 153 struct sfc_mae *mae = &sa->mae; 154 155 SFC_ASSERT(sfc_adapter_is_locked(sa)); 156 157 rule = rte_zmalloc("sfc_mae_outer_rule", sizeof(*rule), 0); 158 if (rule == NULL) 159 return ENOMEM; 160 161 rule->refcnt = 1; 162 rule->match_spec = match_spec; 163 rule->encap_type = encap_type; 164 165 rule->fw_rsrc.rule_id.id = EFX_MAE_RSRC_ID_INVALID; 166 167 TAILQ_INSERT_TAIL(&mae->outer_rules, rule, entries); 168 169 *rulep = rule; 170 171 return 0; 172 } 173 174 static void 175 sfc_mae_outer_rule_del(struct sfc_adapter *sa, 176 struct sfc_mae_outer_rule *rule) 177 { 178 struct sfc_mae *mae = &sa->mae; 179 180 SFC_ASSERT(sfc_adapter_is_locked(sa)); 181 SFC_ASSERT(rule->refcnt != 0); 182 183 --(rule->refcnt); 184 185 if (rule->refcnt != 0) 186 return; 187 188 SFC_ASSERT(rule->fw_rsrc.rule_id.id == EFX_MAE_RSRC_ID_INVALID); 189 SFC_ASSERT(rule->fw_rsrc.refcnt == 0); 190 191 efx_mae_match_spec_fini(sa->nic, rule->match_spec); 192 193 TAILQ_REMOVE(&mae->outer_rules, rule, entries); 194 rte_free(rule); 195 } 196 197 static int 198 sfc_mae_outer_rule_enable(struct sfc_adapter *sa, 199 struct sfc_mae_outer_rule *rule, 200 efx_mae_match_spec_t *match_spec_action) 201 { 202 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc; 203 int rc; 204 205 SFC_ASSERT(sfc_adapter_is_locked(sa)); 206 207 if (fw_rsrc->refcnt == 0) { 208 SFC_ASSERT(fw_rsrc->rule_id.id == EFX_MAE_RSRC_ID_INVALID); 209 SFC_ASSERT(rule->match_spec != NULL); 210 211 rc = efx_mae_outer_rule_insert(sa->nic, rule->match_spec, 212 rule->encap_type, 213 &fw_rsrc->rule_id); 214 if (rc != 0) 215 return rc; 216 } 217 218 rc = efx_mae_match_spec_outer_rule_id_set(match_spec_action, 219 &fw_rsrc->rule_id); 220 if (rc != 0) { 221 if (fw_rsrc->refcnt == 0) { 222 (void)efx_mae_outer_rule_remove(sa->nic, 223 &fw_rsrc->rule_id); 224 } 225 return rc; 226 } 227 228 ++(fw_rsrc->refcnt); 229 230 return 0; 231 } 232 233 static int 234 sfc_mae_outer_rule_disable(struct sfc_adapter *sa, 235 struct sfc_mae_outer_rule *rule) 236 { 237 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc; 238 int rc; 239 240 SFC_ASSERT(sfc_adapter_is_locked(sa)); 241 SFC_ASSERT(fw_rsrc->rule_id.id != EFX_MAE_RSRC_ID_INVALID); 242 SFC_ASSERT(fw_rsrc->refcnt != 0); 243 244 if (fw_rsrc->refcnt == 1) { 245 rc = efx_mae_outer_rule_remove(sa->nic, &fw_rsrc->rule_id); 246 if (rc != 0) 247 return rc; 248 249 fw_rsrc->rule_id.id = EFX_MAE_RSRC_ID_INVALID; 250 } 251 252 --(fw_rsrc->refcnt); 253 254 return 0; 255 } 256 257 static struct sfc_mae_action_set * 258 sfc_mae_action_set_attach(struct sfc_adapter *sa, 259 const efx_mae_actions_t *spec) 260 { 261 struct sfc_mae_action_set *action_set; 262 struct sfc_mae *mae = &sa->mae; 263 264 SFC_ASSERT(sfc_adapter_is_locked(sa)); 265 266 TAILQ_FOREACH(action_set, &mae->action_sets, entries) { 267 if (efx_mae_action_set_specs_equal(action_set->spec, spec)) { 268 ++(action_set->refcnt); 269 return action_set; 270 } 271 } 272 273 return NULL; 274 } 275 276 static int 277 sfc_mae_action_set_add(struct sfc_adapter *sa, 278 efx_mae_actions_t *spec, 279 struct sfc_mae_action_set **action_setp) 280 { 281 struct sfc_mae_action_set *action_set; 282 struct sfc_mae *mae = &sa->mae; 283 284 SFC_ASSERT(sfc_adapter_is_locked(sa)); 285 286 action_set = rte_zmalloc("sfc_mae_action_set", sizeof(*action_set), 0); 287 if (action_set == NULL) 288 return ENOMEM; 289 290 action_set->refcnt = 1; 291 action_set->spec = spec; 292 293 action_set->fw_rsrc.aset_id.id = EFX_MAE_RSRC_ID_INVALID; 294 295 TAILQ_INSERT_TAIL(&mae->action_sets, action_set, entries); 296 297 *action_setp = action_set; 298 299 return 0; 300 } 301 302 static void 303 sfc_mae_action_set_del(struct sfc_adapter *sa, 304 struct sfc_mae_action_set *action_set) 305 { 306 struct sfc_mae *mae = &sa->mae; 307 308 SFC_ASSERT(sfc_adapter_is_locked(sa)); 309 SFC_ASSERT(action_set->refcnt != 0); 310 311 --(action_set->refcnt); 312 313 if (action_set->refcnt != 0) 314 return; 315 316 SFC_ASSERT(action_set->fw_rsrc.aset_id.id == EFX_MAE_RSRC_ID_INVALID); 317 SFC_ASSERT(action_set->fw_rsrc.refcnt == 0); 318 319 efx_mae_action_set_spec_fini(sa->nic, action_set->spec); 320 TAILQ_REMOVE(&mae->action_sets, action_set, entries); 321 rte_free(action_set); 322 } 323 324 static int 325 sfc_mae_action_set_enable(struct sfc_adapter *sa, 326 struct sfc_mae_action_set *action_set) 327 { 328 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc; 329 int rc; 330 331 SFC_ASSERT(sfc_adapter_is_locked(sa)); 332 333 if (fw_rsrc->refcnt == 0) { 334 SFC_ASSERT(fw_rsrc->aset_id.id == EFX_MAE_RSRC_ID_INVALID); 335 SFC_ASSERT(action_set->spec != NULL); 336 337 rc = efx_mae_action_set_alloc(sa->nic, action_set->spec, 338 &fw_rsrc->aset_id); 339 if (rc != 0) 340 return rc; 341 } 342 343 ++(fw_rsrc->refcnt); 344 345 return 0; 346 } 347 348 static int 349 sfc_mae_action_set_disable(struct sfc_adapter *sa, 350 struct sfc_mae_action_set *action_set) 351 { 352 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc; 353 int rc; 354 355 SFC_ASSERT(sfc_adapter_is_locked(sa)); 356 SFC_ASSERT(fw_rsrc->aset_id.id != EFX_MAE_RSRC_ID_INVALID); 357 SFC_ASSERT(fw_rsrc->refcnt != 0); 358 359 if (fw_rsrc->refcnt == 1) { 360 rc = efx_mae_action_set_free(sa->nic, &fw_rsrc->aset_id); 361 if (rc != 0) 362 return rc; 363 364 fw_rsrc->aset_id.id = EFX_MAE_RSRC_ID_INVALID; 365 } 366 367 --(fw_rsrc->refcnt); 368 369 return 0; 370 } 371 372 void 373 sfc_mae_flow_cleanup(struct sfc_adapter *sa, 374 struct rte_flow *flow) 375 { 376 struct sfc_flow_spec *spec; 377 struct sfc_flow_spec_mae *spec_mae; 378 379 if (flow == NULL) 380 return; 381 382 spec = &flow->spec; 383 384 if (spec == NULL) 385 return; 386 387 spec_mae = &spec->mae; 388 389 SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID); 390 391 if (spec_mae->outer_rule != NULL) 392 sfc_mae_outer_rule_del(sa, spec_mae->outer_rule); 393 394 if (spec_mae->action_set != NULL) 395 sfc_mae_action_set_del(sa, spec_mae->action_set); 396 397 if (spec_mae->match_spec != NULL) 398 efx_mae_match_spec_fini(sa->nic, spec_mae->match_spec); 399 } 400 401 static int 402 sfc_mae_set_ethertypes(struct sfc_mae_parse_ctx *ctx) 403 { 404 struct sfc_mae_pattern_data *pdata = &ctx->pattern_data; 405 const efx_mae_field_id_t *fremap = ctx->field_ids_remap; 406 const efx_mae_field_id_t field_ids[] = { 407 EFX_MAE_FIELD_VLAN0_PROTO_BE, 408 EFX_MAE_FIELD_VLAN1_PROTO_BE, 409 }; 410 const struct sfc_mae_ethertype *et; 411 unsigned int i; 412 int rc; 413 414 /* 415 * In accordance with RTE flow API convention, the innermost L2 416 * item's "type" ("inner_type") is a L3 EtherType. If there is 417 * no L3 item, it's 0x0000/0x0000. 418 */ 419 et = &pdata->ethertypes[pdata->nb_vlan_tags]; 420 rc = efx_mae_match_spec_field_set(ctx->match_spec, 421 fremap[EFX_MAE_FIELD_ETHER_TYPE_BE], 422 sizeof(et->value), 423 (const uint8_t *)&et->value, 424 sizeof(et->mask), 425 (const uint8_t *)&et->mask); 426 if (rc != 0) 427 return rc; 428 429 /* 430 * sfc_mae_rule_parse_item_vlan() has already made sure 431 * that pdata->nb_vlan_tags does not exceed this figure. 432 */ 433 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2); 434 435 for (i = 0; i < pdata->nb_vlan_tags; ++i) { 436 et = &pdata->ethertypes[i]; 437 438 rc = efx_mae_match_spec_field_set(ctx->match_spec, 439 fremap[field_ids[i]], 440 sizeof(et->value), 441 (const uint8_t *)&et->value, 442 sizeof(et->mask), 443 (const uint8_t *)&et->mask); 444 if (rc != 0) 445 return rc; 446 } 447 448 return 0; 449 } 450 451 static int 452 sfc_mae_rule_process_pattern_data(struct sfc_mae_parse_ctx *ctx, 453 struct rte_flow_error *error) 454 { 455 const efx_mae_field_id_t *fremap = ctx->field_ids_remap; 456 struct sfc_mae_pattern_data *pdata = &ctx->pattern_data; 457 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes; 458 const rte_be16_t supported_tpids[] = { 459 /* VLAN standard TPID (always the first element) */ 460 RTE_BE16(RTE_ETHER_TYPE_VLAN), 461 462 /* Double-tagging TPIDs */ 463 RTE_BE16(RTE_ETHER_TYPE_QINQ), 464 RTE_BE16(RTE_ETHER_TYPE_QINQ1), 465 RTE_BE16(RTE_ETHER_TYPE_QINQ2), 466 RTE_BE16(RTE_ETHER_TYPE_QINQ3), 467 }; 468 unsigned int nb_supported_tpids = RTE_DIM(supported_tpids); 469 unsigned int ethertype_idx; 470 const uint8_t *valuep; 471 const uint8_t *maskp; 472 int rc; 473 474 if (pdata->innermost_ethertype_restriction.mask != 0 && 475 pdata->nb_vlan_tags < SFC_MAE_MATCH_VLAN_MAX_NTAGS) { 476 /* 477 * If a single item VLAN is followed by a L3 item, value 478 * of "type" in item ETH can't be a double-tagging TPID. 479 */ 480 nb_supported_tpids = 1; 481 } 482 483 /* 484 * sfc_mae_rule_parse_item_vlan() has already made sure 485 * that pdata->nb_vlan_tags does not exceed this figure. 486 */ 487 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2); 488 489 for (ethertype_idx = 0; 490 ethertype_idx < pdata->nb_vlan_tags; ++ethertype_idx) { 491 unsigned int tpid_idx; 492 493 /* Exact match is supported only. */ 494 if (ethertypes[ethertype_idx].mask != RTE_BE16(0xffff)) { 495 rc = EINVAL; 496 goto fail; 497 } 498 499 for (tpid_idx = pdata->nb_vlan_tags - ethertype_idx - 1; 500 tpid_idx < nb_supported_tpids; ++tpid_idx) { 501 if (ethertypes[ethertype_idx].value == 502 supported_tpids[tpid_idx]) 503 break; 504 } 505 506 if (tpid_idx == nb_supported_tpids) { 507 rc = EINVAL; 508 goto fail; 509 } 510 511 nb_supported_tpids = 1; 512 } 513 514 if (pdata->innermost_ethertype_restriction.mask == RTE_BE16(0xffff)) { 515 struct sfc_mae_ethertype *et = ðertypes[ethertype_idx]; 516 517 if (et->mask == 0) { 518 et->mask = RTE_BE16(0xffff); 519 et->value = 520 pdata->innermost_ethertype_restriction.value; 521 } else if (et->mask != RTE_BE16(0xffff) || 522 et->value != 523 pdata->innermost_ethertype_restriction.value) { 524 rc = EINVAL; 525 goto fail; 526 } 527 } 528 529 /* 530 * Now, when the number of VLAN tags is known, set fields 531 * ETHER_TYPE, VLAN0_PROTO and VLAN1_PROTO so that the first 532 * one is either a valid L3 EtherType (or 0x0000/0x0000), 533 * and the last two are valid TPIDs (or 0x0000/0x0000). 534 */ 535 rc = sfc_mae_set_ethertypes(ctx); 536 if (rc != 0) 537 goto fail; 538 539 if (pdata->l3_next_proto_restriction_mask == 0xff) { 540 if (pdata->l3_next_proto_mask == 0) { 541 pdata->l3_next_proto_mask = 0xff; 542 pdata->l3_next_proto_value = 543 pdata->l3_next_proto_restriction_value; 544 } else if (pdata->l3_next_proto_mask != 0xff || 545 pdata->l3_next_proto_value != 546 pdata->l3_next_proto_restriction_value) { 547 rc = EINVAL; 548 goto fail; 549 } 550 } 551 552 valuep = (const uint8_t *)&pdata->l3_next_proto_value; 553 maskp = (const uint8_t *)&pdata->l3_next_proto_mask; 554 rc = efx_mae_match_spec_field_set(ctx->match_spec, 555 fremap[EFX_MAE_FIELD_IP_PROTO], 556 sizeof(pdata->l3_next_proto_value), 557 valuep, 558 sizeof(pdata->l3_next_proto_mask), 559 maskp); 560 if (rc != 0) 561 goto fail; 562 563 return 0; 564 565 fail: 566 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, NULL, 567 "Failed to process pattern data"); 568 } 569 570 static int 571 sfc_mae_rule_parse_item_port_id(const struct rte_flow_item *item, 572 struct sfc_flow_parse_ctx *ctx, 573 struct rte_flow_error *error) 574 { 575 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 576 const struct rte_flow_item_port_id supp_mask = { 577 .id = 0xffffffff, 578 }; 579 const void *def_mask = &rte_flow_item_port_id_mask; 580 const struct rte_flow_item_port_id *spec = NULL; 581 const struct rte_flow_item_port_id *mask = NULL; 582 efx_mport_sel_t mport_sel; 583 int rc; 584 585 if (ctx_mae->match_mport_set) { 586 return rte_flow_error_set(error, ENOTSUP, 587 RTE_FLOW_ERROR_TYPE_ITEM, item, 588 "Can't handle multiple traffic source items"); 589 } 590 591 rc = sfc_flow_parse_init(item, 592 (const void **)&spec, (const void **)&mask, 593 (const void *)&supp_mask, def_mask, 594 sizeof(struct rte_flow_item_port_id), error); 595 if (rc != 0) 596 return rc; 597 598 if (mask->id != supp_mask.id) { 599 return rte_flow_error_set(error, EINVAL, 600 RTE_FLOW_ERROR_TYPE_ITEM, item, 601 "Bad mask in the PORT_ID pattern item"); 602 } 603 604 /* If "spec" is not set, could be any port ID */ 605 if (spec == NULL) 606 return 0; 607 608 if (spec->id > UINT16_MAX) { 609 return rte_flow_error_set(error, EOVERFLOW, 610 RTE_FLOW_ERROR_TYPE_ITEM, item, 611 "The port ID is too large"); 612 } 613 614 rc = sfc_mae_switch_port_by_ethdev(ctx_mae->sa->mae.switch_domain_id, 615 spec->id, &mport_sel); 616 if (rc != 0) { 617 return rte_flow_error_set(error, rc, 618 RTE_FLOW_ERROR_TYPE_ITEM, item, 619 "Can't find RTE ethdev by the port ID"); 620 } 621 622 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, 623 &mport_sel, NULL); 624 if (rc != 0) { 625 return rte_flow_error_set(error, rc, 626 RTE_FLOW_ERROR_TYPE_ITEM, item, 627 "Failed to set MPORT for the port ID"); 628 } 629 630 ctx_mae->match_mport_set = B_TRUE; 631 632 return 0; 633 } 634 635 static int 636 sfc_mae_rule_parse_item_phy_port(const struct rte_flow_item *item, 637 struct sfc_flow_parse_ctx *ctx, 638 struct rte_flow_error *error) 639 { 640 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 641 const struct rte_flow_item_phy_port supp_mask = { 642 .index = 0xffffffff, 643 }; 644 const void *def_mask = &rte_flow_item_phy_port_mask; 645 const struct rte_flow_item_phy_port *spec = NULL; 646 const struct rte_flow_item_phy_port *mask = NULL; 647 efx_mport_sel_t mport_v; 648 int rc; 649 650 if (ctx_mae->match_mport_set) { 651 return rte_flow_error_set(error, ENOTSUP, 652 RTE_FLOW_ERROR_TYPE_ITEM, item, 653 "Can't handle multiple traffic source items"); 654 } 655 656 rc = sfc_flow_parse_init(item, 657 (const void **)&spec, (const void **)&mask, 658 (const void *)&supp_mask, def_mask, 659 sizeof(struct rte_flow_item_phy_port), error); 660 if (rc != 0) 661 return rc; 662 663 if (mask->index != supp_mask.index) { 664 return rte_flow_error_set(error, EINVAL, 665 RTE_FLOW_ERROR_TYPE_ITEM, item, 666 "Bad mask in the PHY_PORT pattern item"); 667 } 668 669 /* If "spec" is not set, could be any physical port */ 670 if (spec == NULL) 671 return 0; 672 673 rc = efx_mae_mport_by_phy_port(spec->index, &mport_v); 674 if (rc != 0) { 675 return rte_flow_error_set(error, rc, 676 RTE_FLOW_ERROR_TYPE_ITEM, item, 677 "Failed to convert the PHY_PORT index"); 678 } 679 680 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL); 681 if (rc != 0) { 682 return rte_flow_error_set(error, rc, 683 RTE_FLOW_ERROR_TYPE_ITEM, item, 684 "Failed to set MPORT for the PHY_PORT"); 685 } 686 687 ctx_mae->match_mport_set = B_TRUE; 688 689 return 0; 690 } 691 692 static int 693 sfc_mae_rule_parse_item_pf(const struct rte_flow_item *item, 694 struct sfc_flow_parse_ctx *ctx, 695 struct rte_flow_error *error) 696 { 697 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 698 const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic); 699 efx_mport_sel_t mport_v; 700 int rc; 701 702 if (ctx_mae->match_mport_set) { 703 return rte_flow_error_set(error, ENOTSUP, 704 RTE_FLOW_ERROR_TYPE_ITEM, item, 705 "Can't handle multiple traffic source items"); 706 } 707 708 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, EFX_PCI_VF_INVALID, 709 &mport_v); 710 if (rc != 0) { 711 return rte_flow_error_set(error, rc, 712 RTE_FLOW_ERROR_TYPE_ITEM, item, 713 "Failed to convert the PF ID"); 714 } 715 716 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL); 717 if (rc != 0) { 718 return rte_flow_error_set(error, rc, 719 RTE_FLOW_ERROR_TYPE_ITEM, item, 720 "Failed to set MPORT for the PF"); 721 } 722 723 ctx_mae->match_mport_set = B_TRUE; 724 725 return 0; 726 } 727 728 static int 729 sfc_mae_rule_parse_item_vf(const struct rte_flow_item *item, 730 struct sfc_flow_parse_ctx *ctx, 731 struct rte_flow_error *error) 732 { 733 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 734 const efx_nic_cfg_t *encp = efx_nic_cfg_get(ctx_mae->sa->nic); 735 const struct rte_flow_item_vf supp_mask = { 736 .id = 0xffffffff, 737 }; 738 const void *def_mask = &rte_flow_item_vf_mask; 739 const struct rte_flow_item_vf *spec = NULL; 740 const struct rte_flow_item_vf *mask = NULL; 741 efx_mport_sel_t mport_v; 742 int rc; 743 744 if (ctx_mae->match_mport_set) { 745 return rte_flow_error_set(error, ENOTSUP, 746 RTE_FLOW_ERROR_TYPE_ITEM, item, 747 "Can't handle multiple traffic source items"); 748 } 749 750 rc = sfc_flow_parse_init(item, 751 (const void **)&spec, (const void **)&mask, 752 (const void *)&supp_mask, def_mask, 753 sizeof(struct rte_flow_item_vf), error); 754 if (rc != 0) 755 return rc; 756 757 if (mask->id != supp_mask.id) { 758 return rte_flow_error_set(error, EINVAL, 759 RTE_FLOW_ERROR_TYPE_ITEM, item, 760 "Bad mask in the VF pattern item"); 761 } 762 763 /* 764 * If "spec" is not set, the item requests any VF related to the 765 * PF of the current DPDK port (but not the PF itself). 766 * Reject this match criterion as unsupported. 767 */ 768 if (spec == NULL) { 769 return rte_flow_error_set(error, EINVAL, 770 RTE_FLOW_ERROR_TYPE_ITEM, item, 771 "Bad spec in the VF pattern item"); 772 } 773 774 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, spec->id, &mport_v); 775 if (rc != 0) { 776 return rte_flow_error_set(error, rc, 777 RTE_FLOW_ERROR_TYPE_ITEM, item, 778 "Failed to convert the PF + VF IDs"); 779 } 780 781 rc = efx_mae_match_spec_mport_set(ctx_mae->match_spec, &mport_v, NULL); 782 if (rc != 0) { 783 return rte_flow_error_set(error, rc, 784 RTE_FLOW_ERROR_TYPE_ITEM, item, 785 "Failed to set MPORT for the PF + VF"); 786 } 787 788 ctx_mae->match_mport_set = B_TRUE; 789 790 return 0; 791 } 792 793 /* 794 * Having this field ID in a field locator means that this 795 * locator cannot be used to actually set the field at the 796 * time when the corresponding item gets encountered. Such 797 * fields get stashed in the parsing context instead. This 798 * is required to resolve dependencies between the stashed 799 * fields. See sfc_mae_rule_process_pattern_data(). 800 */ 801 #define SFC_MAE_FIELD_HANDLING_DEFERRED EFX_MAE_FIELD_NIDS 802 803 struct sfc_mae_field_locator { 804 efx_mae_field_id_t field_id; 805 size_t size; 806 /* Field offset in the corresponding rte_flow_item_ struct */ 807 size_t ofst; 808 }; 809 810 static void 811 sfc_mae_item_build_supp_mask(const struct sfc_mae_field_locator *field_locators, 812 unsigned int nb_field_locators, void *mask_ptr, 813 size_t mask_size) 814 { 815 unsigned int i; 816 817 memset(mask_ptr, 0, mask_size); 818 819 for (i = 0; i < nb_field_locators; ++i) { 820 const struct sfc_mae_field_locator *fl = &field_locators[i]; 821 822 SFC_ASSERT(fl->ofst + fl->size <= mask_size); 823 memset(RTE_PTR_ADD(mask_ptr, fl->ofst), 0xff, fl->size); 824 } 825 } 826 827 static int 828 sfc_mae_parse_item(const struct sfc_mae_field_locator *field_locators, 829 unsigned int nb_field_locators, const uint8_t *spec, 830 const uint8_t *mask, struct sfc_mae_parse_ctx *ctx, 831 struct rte_flow_error *error) 832 { 833 const efx_mae_field_id_t *fremap = ctx->field_ids_remap; 834 unsigned int i; 835 int rc = 0; 836 837 for (i = 0; i < nb_field_locators; ++i) { 838 const struct sfc_mae_field_locator *fl = &field_locators[i]; 839 840 if (fl->field_id == SFC_MAE_FIELD_HANDLING_DEFERRED) 841 continue; 842 843 rc = efx_mae_match_spec_field_set(ctx->match_spec, 844 fremap[fl->field_id], 845 fl->size, spec + fl->ofst, 846 fl->size, mask + fl->ofst); 847 if (rc != 0) 848 break; 849 } 850 851 if (rc != 0) { 852 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, 853 NULL, "Failed to process item fields"); 854 } 855 856 return rc; 857 } 858 859 static const struct sfc_mae_field_locator flocs_eth[] = { 860 { 861 /* 862 * This locator is used only for building supported fields mask. 863 * The field is handled by sfc_mae_rule_process_pattern_data(). 864 */ 865 SFC_MAE_FIELD_HANDLING_DEFERRED, 866 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, type), 867 offsetof(struct rte_flow_item_eth, type), 868 }, 869 { 870 EFX_MAE_FIELD_ETH_DADDR_BE, 871 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, dst), 872 offsetof(struct rte_flow_item_eth, dst), 873 }, 874 { 875 EFX_MAE_FIELD_ETH_SADDR_BE, 876 RTE_SIZEOF_FIELD(struct rte_flow_item_eth, src), 877 offsetof(struct rte_flow_item_eth, src), 878 }, 879 }; 880 881 static int 882 sfc_mae_rule_parse_item_eth(const struct rte_flow_item *item, 883 struct sfc_flow_parse_ctx *ctx, 884 struct rte_flow_error *error) 885 { 886 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 887 struct rte_flow_item_eth supp_mask; 888 const uint8_t *spec = NULL; 889 const uint8_t *mask = NULL; 890 int rc; 891 892 sfc_mae_item_build_supp_mask(flocs_eth, RTE_DIM(flocs_eth), 893 &supp_mask, sizeof(supp_mask)); 894 895 rc = sfc_flow_parse_init(item, 896 (const void **)&spec, (const void **)&mask, 897 (const void *)&supp_mask, 898 &rte_flow_item_eth_mask, 899 sizeof(struct rte_flow_item_eth), error); 900 if (rc != 0) 901 return rc; 902 903 if (spec != NULL) { 904 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; 905 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes; 906 const struct rte_flow_item_eth *item_spec; 907 const struct rte_flow_item_eth *item_mask; 908 909 item_spec = (const struct rte_flow_item_eth *)spec; 910 item_mask = (const struct rte_flow_item_eth *)mask; 911 912 ethertypes[0].value = item_spec->type; 913 ethertypes[0].mask = item_mask->type; 914 } else { 915 /* 916 * The specification is empty. This is wrong in the case 917 * when there are more network patterns in line. Other 918 * than that, any Ethernet can match. All of that is 919 * checked at the end of parsing. 920 */ 921 return 0; 922 } 923 924 return sfc_mae_parse_item(flocs_eth, RTE_DIM(flocs_eth), spec, mask, 925 ctx_mae, error); 926 } 927 928 static const struct sfc_mae_field_locator flocs_vlan[] = { 929 /* Outermost tag */ 930 { 931 EFX_MAE_FIELD_VLAN0_TCI_BE, 932 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci), 933 offsetof(struct rte_flow_item_vlan, tci), 934 }, 935 { 936 /* 937 * This locator is used only for building supported fields mask. 938 * The field is handled by sfc_mae_rule_process_pattern_data(). 939 */ 940 SFC_MAE_FIELD_HANDLING_DEFERRED, 941 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type), 942 offsetof(struct rte_flow_item_vlan, inner_type), 943 }, 944 945 /* Innermost tag */ 946 { 947 EFX_MAE_FIELD_VLAN1_TCI_BE, 948 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, tci), 949 offsetof(struct rte_flow_item_vlan, tci), 950 }, 951 { 952 /* 953 * This locator is used only for building supported fields mask. 954 * The field is handled by sfc_mae_rule_process_pattern_data(). 955 */ 956 SFC_MAE_FIELD_HANDLING_DEFERRED, 957 RTE_SIZEOF_FIELD(struct rte_flow_item_vlan, inner_type), 958 offsetof(struct rte_flow_item_vlan, inner_type), 959 }, 960 }; 961 962 static int 963 sfc_mae_rule_parse_item_vlan(const struct rte_flow_item *item, 964 struct sfc_flow_parse_ctx *ctx, 965 struct rte_flow_error *error) 966 { 967 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 968 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; 969 const struct sfc_mae_field_locator *flocs; 970 struct rte_flow_item_vlan supp_mask; 971 const uint8_t *spec = NULL; 972 const uint8_t *mask = NULL; 973 unsigned int nb_flocs; 974 int rc; 975 976 RTE_BUILD_BUG_ON(SFC_MAE_MATCH_VLAN_MAX_NTAGS != 2); 977 978 if (pdata->nb_vlan_tags == SFC_MAE_MATCH_VLAN_MAX_NTAGS) { 979 return rte_flow_error_set(error, ENOTSUP, 980 RTE_FLOW_ERROR_TYPE_ITEM, item, 981 "Can't match that many VLAN tags"); 982 } 983 984 nb_flocs = RTE_DIM(flocs_vlan) / SFC_MAE_MATCH_VLAN_MAX_NTAGS; 985 flocs = flocs_vlan + pdata->nb_vlan_tags * nb_flocs; 986 987 /* If parsing fails, this can remain incremented. */ 988 ++pdata->nb_vlan_tags; 989 990 sfc_mae_item_build_supp_mask(flocs, nb_flocs, 991 &supp_mask, sizeof(supp_mask)); 992 993 rc = sfc_flow_parse_init(item, 994 (const void **)&spec, (const void **)&mask, 995 (const void *)&supp_mask, 996 &rte_flow_item_vlan_mask, 997 sizeof(struct rte_flow_item_vlan), error); 998 if (rc != 0) 999 return rc; 1000 1001 if (spec != NULL) { 1002 struct sfc_mae_ethertype *ethertypes = pdata->ethertypes; 1003 const struct rte_flow_item_vlan *item_spec; 1004 const struct rte_flow_item_vlan *item_mask; 1005 1006 item_spec = (const struct rte_flow_item_vlan *)spec; 1007 item_mask = (const struct rte_flow_item_vlan *)mask; 1008 1009 ethertypes[pdata->nb_vlan_tags].value = item_spec->inner_type; 1010 ethertypes[pdata->nb_vlan_tags].mask = item_mask->inner_type; 1011 } else { 1012 /* 1013 * The specification is empty. This is wrong in the case 1014 * when there are more network patterns in line. Other 1015 * than that, any Ethernet can match. All of that is 1016 * checked at the end of parsing. 1017 */ 1018 return 0; 1019 } 1020 1021 return sfc_mae_parse_item(flocs, nb_flocs, spec, mask, ctx_mae, error); 1022 } 1023 1024 static const struct sfc_mae_field_locator flocs_ipv4[] = { 1025 { 1026 EFX_MAE_FIELD_SRC_IP4_BE, 1027 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.src_addr), 1028 offsetof(struct rte_flow_item_ipv4, hdr.src_addr), 1029 }, 1030 { 1031 EFX_MAE_FIELD_DST_IP4_BE, 1032 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.dst_addr), 1033 offsetof(struct rte_flow_item_ipv4, hdr.dst_addr), 1034 }, 1035 { 1036 /* 1037 * This locator is used only for building supported fields mask. 1038 * The field is handled by sfc_mae_rule_process_pattern_data(). 1039 */ 1040 SFC_MAE_FIELD_HANDLING_DEFERRED, 1041 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.next_proto_id), 1042 offsetof(struct rte_flow_item_ipv4, hdr.next_proto_id), 1043 }, 1044 { 1045 EFX_MAE_FIELD_IP_TOS, 1046 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, 1047 hdr.type_of_service), 1048 offsetof(struct rte_flow_item_ipv4, hdr.type_of_service), 1049 }, 1050 { 1051 EFX_MAE_FIELD_IP_TTL, 1052 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv4, hdr.time_to_live), 1053 offsetof(struct rte_flow_item_ipv4, hdr.time_to_live), 1054 }, 1055 }; 1056 1057 static int 1058 sfc_mae_rule_parse_item_ipv4(const struct rte_flow_item *item, 1059 struct sfc_flow_parse_ctx *ctx, 1060 struct rte_flow_error *error) 1061 { 1062 rte_be16_t ethertype_ipv4_be = RTE_BE16(RTE_ETHER_TYPE_IPV4); 1063 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 1064 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; 1065 struct rte_flow_item_ipv4 supp_mask; 1066 const uint8_t *spec = NULL; 1067 const uint8_t *mask = NULL; 1068 int rc; 1069 1070 sfc_mae_item_build_supp_mask(flocs_ipv4, RTE_DIM(flocs_ipv4), 1071 &supp_mask, sizeof(supp_mask)); 1072 1073 rc = sfc_flow_parse_init(item, 1074 (const void **)&spec, (const void **)&mask, 1075 (const void *)&supp_mask, 1076 &rte_flow_item_ipv4_mask, 1077 sizeof(struct rte_flow_item_ipv4), error); 1078 if (rc != 0) 1079 return rc; 1080 1081 pdata->innermost_ethertype_restriction.value = ethertype_ipv4_be; 1082 pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff); 1083 1084 if (spec != NULL) { 1085 const struct rte_flow_item_ipv4 *item_spec; 1086 const struct rte_flow_item_ipv4 *item_mask; 1087 1088 item_spec = (const struct rte_flow_item_ipv4 *)spec; 1089 item_mask = (const struct rte_flow_item_ipv4 *)mask; 1090 1091 pdata->l3_next_proto_value = item_spec->hdr.next_proto_id; 1092 pdata->l3_next_proto_mask = item_mask->hdr.next_proto_id; 1093 } else { 1094 return 0; 1095 } 1096 1097 return sfc_mae_parse_item(flocs_ipv4, RTE_DIM(flocs_ipv4), spec, mask, 1098 ctx_mae, error); 1099 } 1100 1101 static const struct sfc_mae_field_locator flocs_ipv6[] = { 1102 { 1103 EFX_MAE_FIELD_SRC_IP6_BE, 1104 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.src_addr), 1105 offsetof(struct rte_flow_item_ipv6, hdr.src_addr), 1106 }, 1107 { 1108 EFX_MAE_FIELD_DST_IP6_BE, 1109 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.dst_addr), 1110 offsetof(struct rte_flow_item_ipv6, hdr.dst_addr), 1111 }, 1112 { 1113 /* 1114 * This locator is used only for building supported fields mask. 1115 * The field is handled by sfc_mae_rule_process_pattern_data(). 1116 */ 1117 SFC_MAE_FIELD_HANDLING_DEFERRED, 1118 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.proto), 1119 offsetof(struct rte_flow_item_ipv6, hdr.proto), 1120 }, 1121 { 1122 EFX_MAE_FIELD_IP_TTL, 1123 RTE_SIZEOF_FIELD(struct rte_flow_item_ipv6, hdr.hop_limits), 1124 offsetof(struct rte_flow_item_ipv6, hdr.hop_limits), 1125 }, 1126 }; 1127 1128 static int 1129 sfc_mae_rule_parse_item_ipv6(const struct rte_flow_item *item, 1130 struct sfc_flow_parse_ctx *ctx, 1131 struct rte_flow_error *error) 1132 { 1133 rte_be16_t ethertype_ipv6_be = RTE_BE16(RTE_ETHER_TYPE_IPV6); 1134 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 1135 const efx_mae_field_id_t *fremap = ctx_mae->field_ids_remap; 1136 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; 1137 struct rte_flow_item_ipv6 supp_mask; 1138 const uint8_t *spec = NULL; 1139 const uint8_t *mask = NULL; 1140 rte_be32_t vtc_flow_be; 1141 uint32_t vtc_flow; 1142 uint8_t tc_value; 1143 uint8_t tc_mask; 1144 int rc; 1145 1146 sfc_mae_item_build_supp_mask(flocs_ipv6, RTE_DIM(flocs_ipv6), 1147 &supp_mask, sizeof(supp_mask)); 1148 1149 vtc_flow_be = RTE_BE32(RTE_IPV6_HDR_TC_MASK); 1150 memcpy(&supp_mask, &vtc_flow_be, sizeof(vtc_flow_be)); 1151 1152 rc = sfc_flow_parse_init(item, 1153 (const void **)&spec, (const void **)&mask, 1154 (const void *)&supp_mask, 1155 &rte_flow_item_ipv6_mask, 1156 sizeof(struct rte_flow_item_ipv6), error); 1157 if (rc != 0) 1158 return rc; 1159 1160 pdata->innermost_ethertype_restriction.value = ethertype_ipv6_be; 1161 pdata->innermost_ethertype_restriction.mask = RTE_BE16(0xffff); 1162 1163 if (spec != NULL) { 1164 const struct rte_flow_item_ipv6 *item_spec; 1165 const struct rte_flow_item_ipv6 *item_mask; 1166 1167 item_spec = (const struct rte_flow_item_ipv6 *)spec; 1168 item_mask = (const struct rte_flow_item_ipv6 *)mask; 1169 1170 pdata->l3_next_proto_value = item_spec->hdr.proto; 1171 pdata->l3_next_proto_mask = item_mask->hdr.proto; 1172 } else { 1173 return 0; 1174 } 1175 1176 rc = sfc_mae_parse_item(flocs_ipv6, RTE_DIM(flocs_ipv6), spec, mask, 1177 ctx_mae, error); 1178 if (rc != 0) 1179 return rc; 1180 1181 memcpy(&vtc_flow_be, spec, sizeof(vtc_flow_be)); 1182 vtc_flow = rte_be_to_cpu_32(vtc_flow_be); 1183 tc_value = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT; 1184 1185 memcpy(&vtc_flow_be, mask, sizeof(vtc_flow_be)); 1186 vtc_flow = rte_be_to_cpu_32(vtc_flow_be); 1187 tc_mask = (vtc_flow & RTE_IPV6_HDR_TC_MASK) >> RTE_IPV6_HDR_TC_SHIFT; 1188 1189 rc = efx_mae_match_spec_field_set(ctx_mae->match_spec, 1190 fremap[EFX_MAE_FIELD_IP_TOS], 1191 sizeof(tc_value), &tc_value, 1192 sizeof(tc_mask), &tc_mask); 1193 if (rc != 0) { 1194 return rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, 1195 NULL, "Failed to process item fields"); 1196 } 1197 1198 return 0; 1199 } 1200 1201 static const struct sfc_mae_field_locator flocs_tcp[] = { 1202 { 1203 EFX_MAE_FIELD_L4_SPORT_BE, 1204 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.src_port), 1205 offsetof(struct rte_flow_item_tcp, hdr.src_port), 1206 }, 1207 { 1208 EFX_MAE_FIELD_L4_DPORT_BE, 1209 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.dst_port), 1210 offsetof(struct rte_flow_item_tcp, hdr.dst_port), 1211 }, 1212 { 1213 EFX_MAE_FIELD_TCP_FLAGS_BE, 1214 /* 1215 * The values have been picked intentionally since the 1216 * target MAE field is oversize (16 bit). This mapping 1217 * relies on the fact that the MAE field is big-endian. 1218 */ 1219 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.data_off) + 1220 RTE_SIZEOF_FIELD(struct rte_flow_item_tcp, hdr.tcp_flags), 1221 offsetof(struct rte_flow_item_tcp, hdr.data_off), 1222 }, 1223 }; 1224 1225 static int 1226 sfc_mae_rule_parse_item_tcp(const struct rte_flow_item *item, 1227 struct sfc_flow_parse_ctx *ctx, 1228 struct rte_flow_error *error) 1229 { 1230 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 1231 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; 1232 struct rte_flow_item_tcp supp_mask; 1233 const uint8_t *spec = NULL; 1234 const uint8_t *mask = NULL; 1235 int rc; 1236 1237 /* 1238 * When encountered among outermost items, item TCP is invalid. 1239 * Check which match specification is being constructed now. 1240 */ 1241 if (ctx_mae->match_spec != ctx_mae->match_spec_action) { 1242 return rte_flow_error_set(error, EINVAL, 1243 RTE_FLOW_ERROR_TYPE_ITEM, item, 1244 "TCP in outer frame is invalid"); 1245 } 1246 1247 sfc_mae_item_build_supp_mask(flocs_tcp, RTE_DIM(flocs_tcp), 1248 &supp_mask, sizeof(supp_mask)); 1249 1250 rc = sfc_flow_parse_init(item, 1251 (const void **)&spec, (const void **)&mask, 1252 (const void *)&supp_mask, 1253 &rte_flow_item_tcp_mask, 1254 sizeof(struct rte_flow_item_tcp), error); 1255 if (rc != 0) 1256 return rc; 1257 1258 pdata->l3_next_proto_restriction_value = IPPROTO_TCP; 1259 pdata->l3_next_proto_restriction_mask = 0xff; 1260 1261 if (spec == NULL) 1262 return 0; 1263 1264 return sfc_mae_parse_item(flocs_tcp, RTE_DIM(flocs_tcp), spec, mask, 1265 ctx_mae, error); 1266 } 1267 1268 static const struct sfc_mae_field_locator flocs_udp[] = { 1269 { 1270 EFX_MAE_FIELD_L4_SPORT_BE, 1271 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.src_port), 1272 offsetof(struct rte_flow_item_udp, hdr.src_port), 1273 }, 1274 { 1275 EFX_MAE_FIELD_L4_DPORT_BE, 1276 RTE_SIZEOF_FIELD(struct rte_flow_item_udp, hdr.dst_port), 1277 offsetof(struct rte_flow_item_udp, hdr.dst_port), 1278 }, 1279 }; 1280 1281 static int 1282 sfc_mae_rule_parse_item_udp(const struct rte_flow_item *item, 1283 struct sfc_flow_parse_ctx *ctx, 1284 struct rte_flow_error *error) 1285 { 1286 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 1287 struct sfc_mae_pattern_data *pdata = &ctx_mae->pattern_data; 1288 struct rte_flow_item_udp supp_mask; 1289 const uint8_t *spec = NULL; 1290 const uint8_t *mask = NULL; 1291 int rc; 1292 1293 sfc_mae_item_build_supp_mask(flocs_udp, RTE_DIM(flocs_udp), 1294 &supp_mask, sizeof(supp_mask)); 1295 1296 rc = sfc_flow_parse_init(item, 1297 (const void **)&spec, (const void **)&mask, 1298 (const void *)&supp_mask, 1299 &rte_flow_item_udp_mask, 1300 sizeof(struct rte_flow_item_udp), error); 1301 if (rc != 0) 1302 return rc; 1303 1304 pdata->l3_next_proto_restriction_value = IPPROTO_UDP; 1305 pdata->l3_next_proto_restriction_mask = 0xff; 1306 1307 if (spec == NULL) 1308 return 0; 1309 1310 return sfc_mae_parse_item(flocs_udp, RTE_DIM(flocs_udp), spec, mask, 1311 ctx_mae, error); 1312 } 1313 1314 static const struct sfc_mae_field_locator flocs_tunnel[] = { 1315 { 1316 /* 1317 * The size and offset values are relevant 1318 * for Geneve and NVGRE, too. 1319 */ 1320 .size = RTE_SIZEOF_FIELD(struct rte_flow_item_vxlan, vni), 1321 .ofst = offsetof(struct rte_flow_item_vxlan, vni), 1322 }, 1323 }; 1324 1325 /* 1326 * An auxiliary registry which allows using non-encap. field IDs 1327 * directly when building a match specification of type ACTION. 1328 * 1329 * See sfc_mae_rule_parse_pattern() and sfc_mae_rule_parse_item_tunnel(). 1330 */ 1331 static const efx_mae_field_id_t field_ids_no_remap[] = { 1332 #define FIELD_ID_NO_REMAP(_field) \ 1333 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_##_field 1334 1335 FIELD_ID_NO_REMAP(ETHER_TYPE_BE), 1336 FIELD_ID_NO_REMAP(ETH_SADDR_BE), 1337 FIELD_ID_NO_REMAP(ETH_DADDR_BE), 1338 FIELD_ID_NO_REMAP(VLAN0_TCI_BE), 1339 FIELD_ID_NO_REMAP(VLAN0_PROTO_BE), 1340 FIELD_ID_NO_REMAP(VLAN1_TCI_BE), 1341 FIELD_ID_NO_REMAP(VLAN1_PROTO_BE), 1342 FIELD_ID_NO_REMAP(SRC_IP4_BE), 1343 FIELD_ID_NO_REMAP(DST_IP4_BE), 1344 FIELD_ID_NO_REMAP(IP_PROTO), 1345 FIELD_ID_NO_REMAP(IP_TOS), 1346 FIELD_ID_NO_REMAP(IP_TTL), 1347 FIELD_ID_NO_REMAP(SRC_IP6_BE), 1348 FIELD_ID_NO_REMAP(DST_IP6_BE), 1349 FIELD_ID_NO_REMAP(L4_SPORT_BE), 1350 FIELD_ID_NO_REMAP(L4_DPORT_BE), 1351 FIELD_ID_NO_REMAP(TCP_FLAGS_BE), 1352 1353 #undef FIELD_ID_NO_REMAP 1354 }; 1355 1356 /* 1357 * An auxiliary registry which allows using "ENC" field IDs 1358 * when building a match specification of type OUTER. 1359 * 1360 * See sfc_mae_rule_encap_parse_init(). 1361 */ 1362 static const efx_mae_field_id_t field_ids_remap_to_encap[] = { 1363 #define FIELD_ID_REMAP_TO_ENCAP(_field) \ 1364 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_ENC_##_field 1365 1366 FIELD_ID_REMAP_TO_ENCAP(ETHER_TYPE_BE), 1367 FIELD_ID_REMAP_TO_ENCAP(ETH_SADDR_BE), 1368 FIELD_ID_REMAP_TO_ENCAP(ETH_DADDR_BE), 1369 FIELD_ID_REMAP_TO_ENCAP(VLAN0_TCI_BE), 1370 FIELD_ID_REMAP_TO_ENCAP(VLAN0_PROTO_BE), 1371 FIELD_ID_REMAP_TO_ENCAP(VLAN1_TCI_BE), 1372 FIELD_ID_REMAP_TO_ENCAP(VLAN1_PROTO_BE), 1373 FIELD_ID_REMAP_TO_ENCAP(SRC_IP4_BE), 1374 FIELD_ID_REMAP_TO_ENCAP(DST_IP4_BE), 1375 FIELD_ID_REMAP_TO_ENCAP(IP_PROTO), 1376 FIELD_ID_REMAP_TO_ENCAP(IP_TOS), 1377 FIELD_ID_REMAP_TO_ENCAP(IP_TTL), 1378 FIELD_ID_REMAP_TO_ENCAP(SRC_IP6_BE), 1379 FIELD_ID_REMAP_TO_ENCAP(DST_IP6_BE), 1380 FIELD_ID_REMAP_TO_ENCAP(L4_SPORT_BE), 1381 FIELD_ID_REMAP_TO_ENCAP(L4_DPORT_BE), 1382 1383 #undef FIELD_ID_REMAP_TO_ENCAP 1384 }; 1385 1386 static int 1387 sfc_mae_rule_parse_item_tunnel(const struct rte_flow_item *item, 1388 struct sfc_flow_parse_ctx *ctx, 1389 struct rte_flow_error *error) 1390 { 1391 struct sfc_mae_parse_ctx *ctx_mae = ctx->mae; 1392 uint8_t vnet_id_v[sizeof(uint32_t)] = {0}; 1393 uint8_t vnet_id_m[sizeof(uint32_t)] = {0}; 1394 const struct rte_flow_item_vxlan *vxp; 1395 uint8_t supp_mask[sizeof(uint64_t)]; 1396 const uint8_t *spec = NULL; 1397 const uint8_t *mask = NULL; 1398 int rc; 1399 1400 /* 1401 * We're about to start processing inner frame items. 1402 * Process pattern data that has been deferred so far 1403 * and reset pattern data storage. 1404 */ 1405 rc = sfc_mae_rule_process_pattern_data(ctx_mae, error); 1406 if (rc != 0) 1407 return rc; 1408 1409 memset(&ctx_mae->pattern_data, 0, sizeof(ctx_mae->pattern_data)); 1410 1411 sfc_mae_item_build_supp_mask(flocs_tunnel, RTE_DIM(flocs_tunnel), 1412 &supp_mask, sizeof(supp_mask)); 1413 1414 /* 1415 * This tunnel item was preliminarily detected by 1416 * sfc_mae_rule_encap_parse_init(). Default mask 1417 * was also picked by that helper. Use it here. 1418 */ 1419 rc = sfc_flow_parse_init(item, 1420 (const void **)&spec, (const void **)&mask, 1421 (const void *)&supp_mask, 1422 ctx_mae->tunnel_def_mask, 1423 ctx_mae->tunnel_def_mask_size, error); 1424 if (rc != 0) 1425 return rc; 1426 1427 /* 1428 * This item and later ones comprise a 1429 * match specification of type ACTION. 1430 */ 1431 ctx_mae->match_spec = ctx_mae->match_spec_action; 1432 1433 /* This item and later ones use non-encap. EFX MAE field IDs. */ 1434 ctx_mae->field_ids_remap = field_ids_no_remap; 1435 1436 if (spec == NULL) 1437 return 0; 1438 1439 /* 1440 * Field EFX_MAE_FIELD_ENC_VNET_ID_BE is a 32-bit one. 1441 * Copy 24-bit VNI, which is BE, at offset 1 in it. 1442 * The extra byte is 0 both in the mask and in the value. 1443 */ 1444 vxp = (const struct rte_flow_item_vxlan *)spec; 1445 memcpy(vnet_id_v + 1, &vxp->vni, sizeof(vxp->vni)); 1446 1447 vxp = (const struct rte_flow_item_vxlan *)mask; 1448 memcpy(vnet_id_m + 1, &vxp->vni, sizeof(vxp->vni)); 1449 1450 rc = efx_mae_match_spec_field_set(ctx_mae->match_spec, 1451 EFX_MAE_FIELD_ENC_VNET_ID_BE, 1452 sizeof(vnet_id_v), vnet_id_v, 1453 sizeof(vnet_id_m), vnet_id_m); 1454 if (rc != 0) { 1455 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ITEM, 1456 item, "Failed to set VXLAN VNI"); 1457 } 1458 1459 return rc; 1460 } 1461 1462 static const struct sfc_flow_item sfc_flow_items[] = { 1463 { 1464 .type = RTE_FLOW_ITEM_TYPE_PORT_ID, 1465 /* 1466 * In terms of RTE flow, this item is a META one, 1467 * and its position in the pattern is don't care. 1468 */ 1469 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER, 1470 .layer = SFC_FLOW_ITEM_ANY_LAYER, 1471 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1472 .parse = sfc_mae_rule_parse_item_port_id, 1473 }, 1474 { 1475 .type = RTE_FLOW_ITEM_TYPE_PHY_PORT, 1476 /* 1477 * In terms of RTE flow, this item is a META one, 1478 * and its position in the pattern is don't care. 1479 */ 1480 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER, 1481 .layer = SFC_FLOW_ITEM_ANY_LAYER, 1482 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1483 .parse = sfc_mae_rule_parse_item_phy_port, 1484 }, 1485 { 1486 .type = RTE_FLOW_ITEM_TYPE_PF, 1487 /* 1488 * In terms of RTE flow, this item is a META one, 1489 * and its position in the pattern is don't care. 1490 */ 1491 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER, 1492 .layer = SFC_FLOW_ITEM_ANY_LAYER, 1493 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1494 .parse = sfc_mae_rule_parse_item_pf, 1495 }, 1496 { 1497 .type = RTE_FLOW_ITEM_TYPE_VF, 1498 /* 1499 * In terms of RTE flow, this item is a META one, 1500 * and its position in the pattern is don't care. 1501 */ 1502 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER, 1503 .layer = SFC_FLOW_ITEM_ANY_LAYER, 1504 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1505 .parse = sfc_mae_rule_parse_item_vf, 1506 }, 1507 { 1508 .type = RTE_FLOW_ITEM_TYPE_ETH, 1509 .prev_layer = SFC_FLOW_ITEM_START_LAYER, 1510 .layer = SFC_FLOW_ITEM_L2, 1511 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1512 .parse = sfc_mae_rule_parse_item_eth, 1513 }, 1514 { 1515 .type = RTE_FLOW_ITEM_TYPE_VLAN, 1516 .prev_layer = SFC_FLOW_ITEM_L2, 1517 .layer = SFC_FLOW_ITEM_L2, 1518 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1519 .parse = sfc_mae_rule_parse_item_vlan, 1520 }, 1521 { 1522 .type = RTE_FLOW_ITEM_TYPE_IPV4, 1523 .prev_layer = SFC_FLOW_ITEM_L2, 1524 .layer = SFC_FLOW_ITEM_L3, 1525 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1526 .parse = sfc_mae_rule_parse_item_ipv4, 1527 }, 1528 { 1529 .type = RTE_FLOW_ITEM_TYPE_IPV6, 1530 .prev_layer = SFC_FLOW_ITEM_L2, 1531 .layer = SFC_FLOW_ITEM_L3, 1532 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1533 .parse = sfc_mae_rule_parse_item_ipv6, 1534 }, 1535 { 1536 .type = RTE_FLOW_ITEM_TYPE_TCP, 1537 .prev_layer = SFC_FLOW_ITEM_L3, 1538 .layer = SFC_FLOW_ITEM_L4, 1539 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1540 .parse = sfc_mae_rule_parse_item_tcp, 1541 }, 1542 { 1543 .type = RTE_FLOW_ITEM_TYPE_UDP, 1544 .prev_layer = SFC_FLOW_ITEM_L3, 1545 .layer = SFC_FLOW_ITEM_L4, 1546 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1547 .parse = sfc_mae_rule_parse_item_udp, 1548 }, 1549 { 1550 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 1551 .prev_layer = SFC_FLOW_ITEM_L4, 1552 .layer = SFC_FLOW_ITEM_START_LAYER, 1553 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1554 .parse = sfc_mae_rule_parse_item_tunnel, 1555 }, 1556 { 1557 .type = RTE_FLOW_ITEM_TYPE_GENEVE, 1558 .prev_layer = SFC_FLOW_ITEM_L4, 1559 .layer = SFC_FLOW_ITEM_START_LAYER, 1560 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1561 .parse = sfc_mae_rule_parse_item_tunnel, 1562 }, 1563 { 1564 .type = RTE_FLOW_ITEM_TYPE_NVGRE, 1565 .prev_layer = SFC_FLOW_ITEM_L3, 1566 .layer = SFC_FLOW_ITEM_START_LAYER, 1567 .ctx_type = SFC_FLOW_PARSE_CTX_MAE, 1568 .parse = sfc_mae_rule_parse_item_tunnel, 1569 }, 1570 }; 1571 1572 static int 1573 sfc_mae_rule_process_outer(struct sfc_adapter *sa, 1574 struct sfc_mae_parse_ctx *ctx, 1575 struct sfc_mae_outer_rule **rulep, 1576 struct rte_flow_error *error) 1577 { 1578 struct sfc_mae_outer_rule *rule; 1579 int rc; 1580 1581 if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE) { 1582 *rulep = NULL; 1583 return 0; 1584 } 1585 1586 SFC_ASSERT(ctx->match_spec_outer != NULL); 1587 1588 if (!efx_mae_match_spec_is_valid(sa->nic, ctx->match_spec_outer)) { 1589 return rte_flow_error_set(error, ENOTSUP, 1590 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1591 "Inconsistent pattern (outer)"); 1592 } 1593 1594 *rulep = sfc_mae_outer_rule_attach(sa, ctx->match_spec_outer, 1595 ctx->encap_type); 1596 if (*rulep != NULL) { 1597 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer); 1598 } else { 1599 rc = sfc_mae_outer_rule_add(sa, ctx->match_spec_outer, 1600 ctx->encap_type, rulep); 1601 if (rc != 0) { 1602 return rte_flow_error_set(error, rc, 1603 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1604 "Failed to process the pattern"); 1605 } 1606 } 1607 1608 /* The spec has now been tracked by the outer rule entry. */ 1609 ctx->match_spec_outer = NULL; 1610 1611 /* 1612 * Depending on whether we reuse an existing outer rule or create a 1613 * new one (see above), outer rule ID is either a valid value or 1614 * EFX_MAE_RSRC_ID_INVALID. Set it in the action rule match 1615 * specification (and the full mask, too) in order to have correct 1616 * class comparisons of the new rule with existing ones. 1617 * Also, action rule match specification will be validated shortly, 1618 * and having the full mask set for outer rule ID indicates that we 1619 * will use this field, and support for this field has to be checked. 1620 */ 1621 rule = *rulep; 1622 rc = efx_mae_match_spec_outer_rule_id_set(ctx->match_spec_action, 1623 &rule->fw_rsrc.rule_id); 1624 if (rc != 0) { 1625 sfc_mae_outer_rule_del(sa, *rulep); 1626 *rulep = NULL; 1627 1628 return rte_flow_error_set(error, rc, 1629 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1630 "Failed to process the pattern"); 1631 } 1632 1633 return 0; 1634 } 1635 1636 static int 1637 sfc_mae_rule_encap_parse_init(struct sfc_adapter *sa, 1638 const struct rte_flow_item pattern[], 1639 struct sfc_mae_parse_ctx *ctx, 1640 struct rte_flow_error *error) 1641 { 1642 struct sfc_mae *mae = &sa->mae; 1643 int rc; 1644 1645 if (pattern == NULL) { 1646 rte_flow_error_set(error, EINVAL, 1647 RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL, 1648 "NULL pattern"); 1649 return -rte_errno; 1650 } 1651 1652 for (;;) { 1653 switch (pattern->type) { 1654 case RTE_FLOW_ITEM_TYPE_VXLAN: 1655 ctx->encap_type = EFX_TUNNEL_PROTOCOL_VXLAN; 1656 ctx->tunnel_def_mask = &rte_flow_item_vxlan_mask; 1657 ctx->tunnel_def_mask_size = 1658 sizeof(rte_flow_item_vxlan_mask); 1659 break; 1660 case RTE_FLOW_ITEM_TYPE_GENEVE: 1661 ctx->encap_type = EFX_TUNNEL_PROTOCOL_GENEVE; 1662 ctx->tunnel_def_mask = &rte_flow_item_geneve_mask; 1663 ctx->tunnel_def_mask_size = 1664 sizeof(rte_flow_item_geneve_mask); 1665 break; 1666 case RTE_FLOW_ITEM_TYPE_NVGRE: 1667 ctx->encap_type = EFX_TUNNEL_PROTOCOL_NVGRE; 1668 ctx->tunnel_def_mask = &rte_flow_item_nvgre_mask; 1669 ctx->tunnel_def_mask_size = 1670 sizeof(rte_flow_item_nvgre_mask); 1671 break; 1672 case RTE_FLOW_ITEM_TYPE_END: 1673 break; 1674 default: 1675 ++pattern; 1676 continue; 1677 }; 1678 1679 break; 1680 } 1681 1682 if (pattern->type == RTE_FLOW_ITEM_TYPE_END) 1683 return 0; 1684 1685 if ((mae->encap_types_supported & (1U << ctx->encap_type)) == 0) { 1686 return rte_flow_error_set(error, ENOTSUP, 1687 RTE_FLOW_ERROR_TYPE_ITEM, 1688 pattern, "Unsupported tunnel item"); 1689 } 1690 1691 if (ctx->priority >= mae->nb_outer_rule_prios_max) { 1692 return rte_flow_error_set(error, ENOTSUP, 1693 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1694 NULL, "Unsupported priority level"); 1695 } 1696 1697 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_OUTER, ctx->priority, 1698 &ctx->match_spec_outer); 1699 if (rc != 0) { 1700 return rte_flow_error_set(error, rc, 1701 RTE_FLOW_ERROR_TYPE_ITEM, pattern, 1702 "Failed to initialise outer rule match specification"); 1703 } 1704 1705 /* Outermost items comprise a match specification of type OUTER. */ 1706 ctx->match_spec = ctx->match_spec_outer; 1707 1708 /* Outermost items use "ENC" EFX MAE field IDs. */ 1709 ctx->field_ids_remap = field_ids_remap_to_encap; 1710 1711 return 0; 1712 } 1713 1714 static void 1715 sfc_mae_rule_encap_parse_fini(struct sfc_adapter *sa, 1716 struct sfc_mae_parse_ctx *ctx) 1717 { 1718 if (ctx->encap_type == EFX_TUNNEL_PROTOCOL_NONE) 1719 return; 1720 1721 if (ctx->match_spec_outer != NULL) 1722 efx_mae_match_spec_fini(sa->nic, ctx->match_spec_outer); 1723 } 1724 1725 int 1726 sfc_mae_rule_parse_pattern(struct sfc_adapter *sa, 1727 const struct rte_flow_item pattern[], 1728 struct sfc_flow_spec_mae *spec, 1729 struct rte_flow_error *error) 1730 { 1731 struct sfc_mae_parse_ctx ctx_mae; 1732 struct sfc_flow_parse_ctx ctx; 1733 int rc; 1734 1735 memset(&ctx_mae, 0, sizeof(ctx_mae)); 1736 ctx_mae.priority = spec->priority; 1737 ctx_mae.sa = sa; 1738 1739 rc = efx_mae_match_spec_init(sa->nic, EFX_MAE_RULE_ACTION, 1740 spec->priority, 1741 &ctx_mae.match_spec_action); 1742 if (rc != 0) { 1743 rc = rte_flow_error_set(error, rc, 1744 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 1745 "Failed to initialise action rule match specification"); 1746 goto fail_init_match_spec_action; 1747 } 1748 1749 /* 1750 * As a preliminary setting, assume that there is no encapsulation 1751 * in the pattern. That is, pattern items are about to comprise a 1752 * match specification of type ACTION and use non-encap. field IDs. 1753 * 1754 * sfc_mae_rule_encap_parse_init() below may override this. 1755 */ 1756 ctx_mae.encap_type = EFX_TUNNEL_PROTOCOL_NONE; 1757 ctx_mae.match_spec = ctx_mae.match_spec_action; 1758 ctx_mae.field_ids_remap = field_ids_no_remap; 1759 1760 ctx.type = SFC_FLOW_PARSE_CTX_MAE; 1761 ctx.mae = &ctx_mae; 1762 1763 rc = sfc_mae_rule_encap_parse_init(sa, pattern, &ctx_mae, error); 1764 if (rc != 0) 1765 goto fail_encap_parse_init; 1766 1767 rc = sfc_flow_parse_pattern(sfc_flow_items, RTE_DIM(sfc_flow_items), 1768 pattern, &ctx, error); 1769 if (rc != 0) 1770 goto fail_parse_pattern; 1771 1772 rc = sfc_mae_rule_process_pattern_data(&ctx_mae, error); 1773 if (rc != 0) 1774 goto fail_process_pattern_data; 1775 1776 rc = sfc_mae_rule_process_outer(sa, &ctx_mae, &spec->outer_rule, error); 1777 if (rc != 0) 1778 goto fail_process_outer; 1779 1780 if (!efx_mae_match_spec_is_valid(sa->nic, ctx_mae.match_spec_action)) { 1781 rc = rte_flow_error_set(error, ENOTSUP, 1782 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1783 "Inconsistent pattern"); 1784 goto fail_validate_match_spec_action; 1785 } 1786 1787 spec->match_spec = ctx_mae.match_spec_action; 1788 1789 return 0; 1790 1791 fail_validate_match_spec_action: 1792 fail_process_outer: 1793 fail_process_pattern_data: 1794 fail_parse_pattern: 1795 sfc_mae_rule_encap_parse_fini(sa, &ctx_mae); 1796 1797 fail_encap_parse_init: 1798 efx_mae_match_spec_fini(sa->nic, ctx_mae.match_spec_action); 1799 1800 fail_init_match_spec_action: 1801 return rc; 1802 } 1803 1804 /* 1805 * An action supported by MAE may correspond to a bundle of RTE flow actions, 1806 * in example, VLAN_PUSH = OF_PUSH_VLAN + OF_VLAN_SET_VID + OF_VLAN_SET_PCP. 1807 * That is, related RTE flow actions need to be tracked as parts of a whole 1808 * so that they can be combined into a single action and submitted to MAE 1809 * representation of a given rule's action set. 1810 * 1811 * Each RTE flow action provided by an application gets classified as 1812 * one belonging to some bundle type. If an action is not supposed to 1813 * belong to any bundle, or if this action is END, it is described as 1814 * one belonging to a dummy bundle of type EMPTY. 1815 * 1816 * A currently tracked bundle will be submitted if a repeating 1817 * action or an action of different bundle type follows. 1818 */ 1819 1820 enum sfc_mae_actions_bundle_type { 1821 SFC_MAE_ACTIONS_BUNDLE_EMPTY = 0, 1822 SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH, 1823 }; 1824 1825 struct sfc_mae_actions_bundle { 1826 enum sfc_mae_actions_bundle_type type; 1827 1828 /* Indicates actions already tracked by the current bundle */ 1829 uint64_t actions_mask; 1830 1831 /* Parameters used by SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH */ 1832 rte_be16_t vlan_push_tpid; 1833 rte_be16_t vlan_push_tci; 1834 }; 1835 1836 /* 1837 * Combine configuration of RTE flow actions tracked by the bundle into a 1838 * single action and submit the result to MAE action set specification. 1839 * Do nothing in the case of dummy action bundle. 1840 */ 1841 static int 1842 sfc_mae_actions_bundle_submit(const struct sfc_mae_actions_bundle *bundle, 1843 efx_mae_actions_t *spec) 1844 { 1845 int rc = 0; 1846 1847 switch (bundle->type) { 1848 case SFC_MAE_ACTIONS_BUNDLE_EMPTY: 1849 break; 1850 case SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH: 1851 rc = efx_mae_action_set_populate_vlan_push( 1852 spec, bundle->vlan_push_tpid, bundle->vlan_push_tci); 1853 break; 1854 default: 1855 SFC_ASSERT(B_FALSE); 1856 break; 1857 } 1858 1859 return rc; 1860 } 1861 1862 /* 1863 * Given the type of the next RTE flow action in the line, decide 1864 * whether a new bundle is about to start, and, if this is the case, 1865 * submit and reset the current bundle. 1866 */ 1867 static int 1868 sfc_mae_actions_bundle_sync(const struct rte_flow_action *action, 1869 struct sfc_mae_actions_bundle *bundle, 1870 efx_mae_actions_t *spec, 1871 struct rte_flow_error *error) 1872 { 1873 enum sfc_mae_actions_bundle_type bundle_type_new; 1874 int rc; 1875 1876 switch (action->type) { 1877 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 1878 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 1879 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 1880 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_VLAN_PUSH; 1881 break; 1882 default: 1883 /* 1884 * Self-sufficient actions, including END, are handled in this 1885 * case. No checks for unsupported actions are needed here 1886 * because parsing doesn't occur at this point. 1887 */ 1888 bundle_type_new = SFC_MAE_ACTIONS_BUNDLE_EMPTY; 1889 break; 1890 } 1891 1892 if (bundle_type_new != bundle->type || 1893 (bundle->actions_mask & (1ULL << action->type)) != 0) { 1894 rc = sfc_mae_actions_bundle_submit(bundle, spec); 1895 if (rc != 0) 1896 goto fail_submit; 1897 1898 memset(bundle, 0, sizeof(*bundle)); 1899 } 1900 1901 bundle->type = bundle_type_new; 1902 1903 return 0; 1904 1905 fail_submit: 1906 return rte_flow_error_set(error, rc, 1907 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1908 "Failed to request the (group of) action(s)"); 1909 } 1910 1911 static void 1912 sfc_mae_rule_parse_action_of_push_vlan( 1913 const struct rte_flow_action_of_push_vlan *conf, 1914 struct sfc_mae_actions_bundle *bundle) 1915 { 1916 bundle->vlan_push_tpid = conf->ethertype; 1917 } 1918 1919 static void 1920 sfc_mae_rule_parse_action_of_set_vlan_vid( 1921 const struct rte_flow_action_of_set_vlan_vid *conf, 1922 struct sfc_mae_actions_bundle *bundle) 1923 { 1924 bundle->vlan_push_tci |= (conf->vlan_vid & 1925 rte_cpu_to_be_16(RTE_LEN2MASK(12, uint16_t))); 1926 } 1927 1928 static void 1929 sfc_mae_rule_parse_action_of_set_vlan_pcp( 1930 const struct rte_flow_action_of_set_vlan_pcp *conf, 1931 struct sfc_mae_actions_bundle *bundle) 1932 { 1933 uint16_t vlan_tci_pcp = (uint16_t)(conf->vlan_pcp & 1934 RTE_LEN2MASK(3, uint8_t)) << 13; 1935 1936 bundle->vlan_push_tci |= rte_cpu_to_be_16(vlan_tci_pcp); 1937 } 1938 1939 static int 1940 sfc_mae_rule_parse_action_mark(const struct rte_flow_action_mark *conf, 1941 efx_mae_actions_t *spec) 1942 { 1943 return efx_mae_action_set_populate_mark(spec, conf->id); 1944 } 1945 1946 static int 1947 sfc_mae_rule_parse_action_phy_port(struct sfc_adapter *sa, 1948 const struct rte_flow_action_phy_port *conf, 1949 efx_mae_actions_t *spec) 1950 { 1951 efx_mport_sel_t mport; 1952 uint32_t phy_port; 1953 int rc; 1954 1955 if (conf->original != 0) 1956 phy_port = efx_nic_cfg_get(sa->nic)->enc_assigned_port; 1957 else 1958 phy_port = conf->index; 1959 1960 rc = efx_mae_mport_by_phy_port(phy_port, &mport); 1961 if (rc != 0) 1962 return rc; 1963 1964 return efx_mae_action_set_populate_deliver(spec, &mport); 1965 } 1966 1967 static int 1968 sfc_mae_rule_parse_action_pf_vf(struct sfc_adapter *sa, 1969 const struct rte_flow_action_vf *vf_conf, 1970 efx_mae_actions_t *spec) 1971 { 1972 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 1973 efx_mport_sel_t mport; 1974 uint32_t vf; 1975 int rc; 1976 1977 if (vf_conf == NULL) 1978 vf = EFX_PCI_VF_INVALID; 1979 else if (vf_conf->original != 0) 1980 vf = encp->enc_vf; 1981 else 1982 vf = vf_conf->id; 1983 1984 rc = efx_mae_mport_by_pcie_function(encp->enc_pf, vf, &mport); 1985 if (rc != 0) 1986 return rc; 1987 1988 return efx_mae_action_set_populate_deliver(spec, &mport); 1989 } 1990 1991 static int 1992 sfc_mae_rule_parse_action_port_id(struct sfc_adapter *sa, 1993 const struct rte_flow_action_port_id *conf, 1994 efx_mae_actions_t *spec) 1995 { 1996 struct sfc_adapter_shared * const sas = sfc_sa2shared(sa); 1997 struct sfc_mae *mae = &sa->mae; 1998 efx_mport_sel_t mport; 1999 uint16_t port_id; 2000 int rc; 2001 2002 port_id = (conf->original != 0) ? sas->port_id : conf->id; 2003 2004 rc = sfc_mae_switch_port_by_ethdev(mae->switch_domain_id, 2005 port_id, &mport); 2006 if (rc != 0) 2007 return rc; 2008 2009 return efx_mae_action_set_populate_deliver(spec, &mport); 2010 } 2011 2012 static int 2013 sfc_mae_rule_parse_action(struct sfc_adapter *sa, 2014 const struct rte_flow_action *action, 2015 struct sfc_mae_actions_bundle *bundle, 2016 efx_mae_actions_t *spec, 2017 struct rte_flow_error *error) 2018 { 2019 int rc = 0; 2020 2021 switch (action->type) { 2022 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 2023 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_POP_VLAN, 2024 bundle->actions_mask); 2025 rc = efx_mae_action_set_populate_vlan_pop(spec); 2026 break; 2027 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 2028 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN, 2029 bundle->actions_mask); 2030 sfc_mae_rule_parse_action_of_push_vlan(action->conf, bundle); 2031 break; 2032 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 2033 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID, 2034 bundle->actions_mask); 2035 sfc_mae_rule_parse_action_of_set_vlan_vid(action->conf, bundle); 2036 break; 2037 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 2038 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP, 2039 bundle->actions_mask); 2040 sfc_mae_rule_parse_action_of_set_vlan_pcp(action->conf, bundle); 2041 break; 2042 case RTE_FLOW_ACTION_TYPE_FLAG: 2043 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_FLAG, 2044 bundle->actions_mask); 2045 rc = efx_mae_action_set_populate_flag(spec); 2046 break; 2047 case RTE_FLOW_ACTION_TYPE_MARK: 2048 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_MARK, 2049 bundle->actions_mask); 2050 rc = sfc_mae_rule_parse_action_mark(action->conf, spec); 2051 break; 2052 case RTE_FLOW_ACTION_TYPE_PHY_PORT: 2053 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PHY_PORT, 2054 bundle->actions_mask); 2055 rc = sfc_mae_rule_parse_action_phy_port(sa, action->conf, spec); 2056 break; 2057 case RTE_FLOW_ACTION_TYPE_PF: 2058 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PF, 2059 bundle->actions_mask); 2060 rc = sfc_mae_rule_parse_action_pf_vf(sa, NULL, spec); 2061 break; 2062 case RTE_FLOW_ACTION_TYPE_VF: 2063 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_VF, 2064 bundle->actions_mask); 2065 rc = sfc_mae_rule_parse_action_pf_vf(sa, action->conf, spec); 2066 break; 2067 case RTE_FLOW_ACTION_TYPE_PORT_ID: 2068 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_PORT_ID, 2069 bundle->actions_mask); 2070 rc = sfc_mae_rule_parse_action_port_id(sa, action->conf, spec); 2071 break; 2072 case RTE_FLOW_ACTION_TYPE_DROP: 2073 SFC_BUILD_SET_OVERFLOW(RTE_FLOW_ACTION_TYPE_DROP, 2074 bundle->actions_mask); 2075 rc = efx_mae_action_set_populate_drop(spec); 2076 break; 2077 default: 2078 return rte_flow_error_set(error, ENOTSUP, 2079 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 2080 "Unsupported action"); 2081 } 2082 2083 if (rc != 0) { 2084 rc = rte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_ACTION, 2085 NULL, "Failed to request the action"); 2086 } else { 2087 bundle->actions_mask |= (1ULL << action->type); 2088 } 2089 2090 return rc; 2091 } 2092 2093 int 2094 sfc_mae_rule_parse_actions(struct sfc_adapter *sa, 2095 const struct rte_flow_action actions[], 2096 struct sfc_mae_action_set **action_setp, 2097 struct rte_flow_error *error) 2098 { 2099 struct sfc_mae_actions_bundle bundle = {0}; 2100 const struct rte_flow_action *action; 2101 efx_mae_actions_t *spec; 2102 int rc; 2103 2104 if (actions == NULL) { 2105 return rte_flow_error_set(error, EINVAL, 2106 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL, 2107 "NULL actions"); 2108 } 2109 2110 rc = efx_mae_action_set_spec_init(sa->nic, &spec); 2111 if (rc != 0) 2112 goto fail_action_set_spec_init; 2113 2114 for (action = actions; 2115 action->type != RTE_FLOW_ACTION_TYPE_END; ++action) { 2116 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error); 2117 if (rc != 0) 2118 goto fail_rule_parse_action; 2119 2120 rc = sfc_mae_rule_parse_action(sa, action, &bundle, spec, 2121 error); 2122 if (rc != 0) 2123 goto fail_rule_parse_action; 2124 } 2125 2126 rc = sfc_mae_actions_bundle_sync(action, &bundle, spec, error); 2127 if (rc != 0) 2128 goto fail_rule_parse_action; 2129 2130 *action_setp = sfc_mae_action_set_attach(sa, spec); 2131 if (*action_setp != NULL) { 2132 efx_mae_action_set_spec_fini(sa->nic, spec); 2133 return 0; 2134 } 2135 2136 rc = sfc_mae_action_set_add(sa, spec, action_setp); 2137 if (rc != 0) 2138 goto fail_action_set_add; 2139 2140 return 0; 2141 2142 fail_action_set_add: 2143 fail_rule_parse_action: 2144 efx_mae_action_set_spec_fini(sa->nic, spec); 2145 2146 fail_action_set_spec_init: 2147 if (rc > 0) { 2148 rc = rte_flow_error_set(error, rc, 2149 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 2150 NULL, "Failed to process the action"); 2151 } 2152 return rc; 2153 } 2154 2155 static bool 2156 sfc_mae_rules_class_cmp(struct sfc_adapter *sa, 2157 const efx_mae_match_spec_t *left, 2158 const efx_mae_match_spec_t *right) 2159 { 2160 bool have_same_class; 2161 int rc; 2162 2163 rc = efx_mae_match_specs_class_cmp(sa->nic, left, right, 2164 &have_same_class); 2165 2166 return (rc == 0) ? have_same_class : false; 2167 } 2168 2169 static int 2170 sfc_mae_outer_rule_class_verify(struct sfc_adapter *sa, 2171 struct sfc_mae_outer_rule *rule) 2172 { 2173 struct sfc_mae_fw_rsrc *fw_rsrc = &rule->fw_rsrc; 2174 struct sfc_mae_outer_rule *entry; 2175 struct sfc_mae *mae = &sa->mae; 2176 2177 if (fw_rsrc->rule_id.id != EFX_MAE_RSRC_ID_INVALID) { 2178 /* An active rule is reused. It's class is wittingly valid. */ 2179 return 0; 2180 } 2181 2182 TAILQ_FOREACH_REVERSE(entry, &mae->outer_rules, 2183 sfc_mae_outer_rules, entries) { 2184 const efx_mae_match_spec_t *left = entry->match_spec; 2185 const efx_mae_match_spec_t *right = rule->match_spec; 2186 2187 if (entry == rule) 2188 continue; 2189 2190 if (sfc_mae_rules_class_cmp(sa, left, right)) 2191 return 0; 2192 } 2193 2194 sfc_info(sa, "for now, the HW doesn't support rule validation, and HW " 2195 "support for outer frame pattern items is not guaranteed; " 2196 "other than that, the items are valid from SW standpoint"); 2197 return 0; 2198 } 2199 2200 static int 2201 sfc_mae_action_rule_class_verify(struct sfc_adapter *sa, 2202 struct sfc_flow_spec_mae *spec) 2203 { 2204 const struct rte_flow *entry; 2205 2206 TAILQ_FOREACH_REVERSE(entry, &sa->flow_list, sfc_flow_list, entries) { 2207 const struct sfc_flow_spec *entry_spec = &entry->spec; 2208 const struct sfc_flow_spec_mae *es_mae = &entry_spec->mae; 2209 const efx_mae_match_spec_t *left = es_mae->match_spec; 2210 const efx_mae_match_spec_t *right = spec->match_spec; 2211 2212 switch (entry_spec->type) { 2213 case SFC_FLOW_SPEC_FILTER: 2214 /* Ignore VNIC-level flows */ 2215 break; 2216 case SFC_FLOW_SPEC_MAE: 2217 if (sfc_mae_rules_class_cmp(sa, left, right)) 2218 return 0; 2219 break; 2220 default: 2221 SFC_ASSERT(false); 2222 } 2223 } 2224 2225 sfc_info(sa, "for now, the HW doesn't support rule validation, and HW " 2226 "support for inner frame pattern items is not guaranteed; " 2227 "other than that, the items are valid from SW standpoint"); 2228 return 0; 2229 } 2230 2231 /** 2232 * Confirm that a given flow can be accepted by the FW. 2233 * 2234 * @param sa 2235 * Software adapter context 2236 * @param flow 2237 * Flow to be verified 2238 * @return 2239 * Zero on success and non-zero in the case of error. 2240 * A special value of EAGAIN indicates that the adapter is 2241 * not in started state. This state is compulsory because 2242 * it only makes sense to compare the rule class of the flow 2243 * being validated with classes of the active rules. 2244 * Such classes are wittingly supported by the FW. 2245 */ 2246 int 2247 sfc_mae_flow_verify(struct sfc_adapter *sa, 2248 struct rte_flow *flow) 2249 { 2250 struct sfc_flow_spec *spec = &flow->spec; 2251 struct sfc_flow_spec_mae *spec_mae = &spec->mae; 2252 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule; 2253 int rc; 2254 2255 SFC_ASSERT(sfc_adapter_is_locked(sa)); 2256 2257 if (sa->state != SFC_ADAPTER_STARTED) 2258 return EAGAIN; 2259 2260 if (outer_rule != NULL) { 2261 rc = sfc_mae_outer_rule_class_verify(sa, outer_rule); 2262 if (rc != 0) 2263 return rc; 2264 } 2265 2266 return sfc_mae_action_rule_class_verify(sa, spec_mae); 2267 } 2268 2269 int 2270 sfc_mae_flow_insert(struct sfc_adapter *sa, 2271 struct rte_flow *flow) 2272 { 2273 struct sfc_flow_spec *spec = &flow->spec; 2274 struct sfc_flow_spec_mae *spec_mae = &spec->mae; 2275 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule; 2276 struct sfc_mae_action_set *action_set = spec_mae->action_set; 2277 struct sfc_mae_fw_rsrc *fw_rsrc = &action_set->fw_rsrc; 2278 int rc; 2279 2280 SFC_ASSERT(spec_mae->rule_id.id == EFX_MAE_RSRC_ID_INVALID); 2281 SFC_ASSERT(action_set != NULL); 2282 2283 if (outer_rule != NULL) { 2284 rc = sfc_mae_outer_rule_enable(sa, outer_rule, 2285 spec_mae->match_spec); 2286 if (rc != 0) 2287 goto fail_outer_rule_enable; 2288 } 2289 2290 rc = sfc_mae_action_set_enable(sa, action_set); 2291 if (rc != 0) 2292 goto fail_action_set_enable; 2293 2294 rc = efx_mae_action_rule_insert(sa->nic, spec_mae->match_spec, 2295 NULL, &fw_rsrc->aset_id, 2296 &spec_mae->rule_id); 2297 if (rc != 0) 2298 goto fail_action_rule_insert; 2299 2300 return 0; 2301 2302 fail_action_rule_insert: 2303 (void)sfc_mae_action_set_disable(sa, action_set); 2304 2305 fail_action_set_enable: 2306 if (outer_rule != NULL) 2307 (void)sfc_mae_outer_rule_disable(sa, outer_rule); 2308 2309 fail_outer_rule_enable: 2310 return rc; 2311 } 2312 2313 int 2314 sfc_mae_flow_remove(struct sfc_adapter *sa, 2315 struct rte_flow *flow) 2316 { 2317 struct sfc_flow_spec *spec = &flow->spec; 2318 struct sfc_flow_spec_mae *spec_mae = &spec->mae; 2319 struct sfc_mae_action_set *action_set = spec_mae->action_set; 2320 struct sfc_mae_outer_rule *outer_rule = spec_mae->outer_rule; 2321 int rc; 2322 2323 SFC_ASSERT(spec_mae->rule_id.id != EFX_MAE_RSRC_ID_INVALID); 2324 SFC_ASSERT(action_set != NULL); 2325 2326 rc = efx_mae_action_rule_remove(sa->nic, &spec_mae->rule_id); 2327 if (rc != 0) 2328 return rc; 2329 2330 spec_mae->rule_id.id = EFX_MAE_RSRC_ID_INVALID; 2331 2332 rc = sfc_mae_action_set_disable(sa, action_set); 2333 if (rc != 0) { 2334 sfc_err(sa, "failed to disable the action set (rc = %d)", rc); 2335 /* Despite the error, proceed with outer rule removal. */ 2336 } 2337 2338 if (outer_rule != NULL) 2339 return sfc_mae_outer_rule_disable(sa, outer_rule); 2340 2341 return 0; 2342 } 2343