1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright (c) 2016-2018 Solarflare Communications Inc. 4 * All rights reserved. 5 * 6 * This software was jointly developed between OKTET Labs (under contract 7 * for Solarflare) and Solarflare Communications, Inc. 8 */ 9 10 /* sysconf() */ 11 #include <unistd.h> 12 13 #include <rte_errno.h> 14 #include <rte_alarm.h> 15 16 #include "efx.h" 17 18 #include "sfc.h" 19 #include "sfc_log.h" 20 #include "sfc_ev.h" 21 #include "sfc_rx.h" 22 #include "sfc_tx.h" 23 #include "sfc_kvargs.h" 24 25 26 int 27 sfc_dma_alloc(const struct sfc_adapter *sa, const char *name, uint16_t id, 28 size_t len, int socket_id, efsys_mem_t *esmp) 29 { 30 const struct rte_memzone *mz; 31 32 sfc_log_init(sa, "name=%s id=%u len=%lu socket_id=%d", 33 name, id, len, socket_id); 34 35 mz = rte_eth_dma_zone_reserve(sa->eth_dev, name, id, len, 36 sysconf(_SC_PAGESIZE), socket_id); 37 if (mz == NULL) { 38 sfc_err(sa, "cannot reserve DMA zone for %s:%u %#x@%d: %s", 39 name, (unsigned int)id, (unsigned int)len, socket_id, 40 rte_strerror(rte_errno)); 41 return ENOMEM; 42 } 43 44 esmp->esm_addr = mz->iova; 45 if (esmp->esm_addr == RTE_BAD_IOVA) { 46 (void)rte_memzone_free(mz); 47 return EFAULT; 48 } 49 50 esmp->esm_mz = mz; 51 esmp->esm_base = mz->addr; 52 53 return 0; 54 } 55 56 void 57 sfc_dma_free(const struct sfc_adapter *sa, efsys_mem_t *esmp) 58 { 59 int rc; 60 61 sfc_log_init(sa, "name=%s", esmp->esm_mz->name); 62 63 rc = rte_memzone_free(esmp->esm_mz); 64 if (rc != 0) 65 sfc_err(sa, "rte_memzone_free(() failed: %d", rc); 66 67 memset(esmp, 0, sizeof(*esmp)); 68 } 69 70 static uint32_t 71 sfc_phy_cap_from_link_speeds(uint32_t speeds) 72 { 73 uint32_t phy_caps = 0; 74 75 if (~speeds & ETH_LINK_SPEED_FIXED) { 76 phy_caps |= (1 << EFX_PHY_CAP_AN); 77 /* 78 * If no speeds are specified in the mask, any supported 79 * may be negotiated 80 */ 81 if (speeds == ETH_LINK_SPEED_AUTONEG) 82 phy_caps |= 83 (1 << EFX_PHY_CAP_1000FDX) | 84 (1 << EFX_PHY_CAP_10000FDX) | 85 (1 << EFX_PHY_CAP_25000FDX) | 86 (1 << EFX_PHY_CAP_40000FDX) | 87 (1 << EFX_PHY_CAP_50000FDX) | 88 (1 << EFX_PHY_CAP_100000FDX); 89 } 90 if (speeds & ETH_LINK_SPEED_1G) 91 phy_caps |= (1 << EFX_PHY_CAP_1000FDX); 92 if (speeds & ETH_LINK_SPEED_10G) 93 phy_caps |= (1 << EFX_PHY_CAP_10000FDX); 94 if (speeds & ETH_LINK_SPEED_25G) 95 phy_caps |= (1 << EFX_PHY_CAP_25000FDX); 96 if (speeds & ETH_LINK_SPEED_40G) 97 phy_caps |= (1 << EFX_PHY_CAP_40000FDX); 98 if (speeds & ETH_LINK_SPEED_50G) 99 phy_caps |= (1 << EFX_PHY_CAP_50000FDX); 100 if (speeds & ETH_LINK_SPEED_100G) 101 phy_caps |= (1 << EFX_PHY_CAP_100000FDX); 102 103 return phy_caps; 104 } 105 106 /* 107 * Check requested device level configuration. 108 * Receive and transmit configuration is checked in corresponding 109 * modules. 110 */ 111 static int 112 sfc_check_conf(struct sfc_adapter *sa) 113 { 114 const struct rte_eth_conf *conf = &sa->eth_dev->data->dev_conf; 115 int rc = 0; 116 117 sa->port.phy_adv_cap = 118 sfc_phy_cap_from_link_speeds(conf->link_speeds) & 119 sa->port.phy_adv_cap_mask; 120 if ((sa->port.phy_adv_cap & ~(1 << EFX_PHY_CAP_AN)) == 0) { 121 sfc_err(sa, "No link speeds from mask %#x are supported", 122 conf->link_speeds); 123 rc = EINVAL; 124 } 125 126 if (conf->lpbk_mode != 0) { 127 sfc_err(sa, "Loopback not supported"); 128 rc = EINVAL; 129 } 130 131 if (conf->dcb_capability_en != 0) { 132 sfc_err(sa, "Priority-based flow control not supported"); 133 rc = EINVAL; 134 } 135 136 if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) { 137 sfc_err(sa, "Flow Director not supported"); 138 rc = EINVAL; 139 } 140 141 if ((conf->intr_conf.lsc != 0) && 142 (sa->intr.type != EFX_INTR_LINE) && 143 (sa->intr.type != EFX_INTR_MESSAGE)) { 144 sfc_err(sa, "Link status change interrupt not supported"); 145 rc = EINVAL; 146 } 147 148 if (conf->intr_conf.rxq != 0) { 149 sfc_err(sa, "Receive queue interrupt not supported"); 150 rc = EINVAL; 151 } 152 153 return rc; 154 } 155 156 /* 157 * Find out maximum number of receive and transmit queues which could be 158 * advertised. 159 * 160 * NIC is kept initialized on success to allow other modules acquire 161 * defaults and capabilities. 162 */ 163 static int 164 sfc_estimate_resource_limits(struct sfc_adapter *sa) 165 { 166 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sa->nic); 167 efx_drv_limits_t limits; 168 int rc; 169 uint32_t evq_allocated; 170 uint32_t rxq_allocated; 171 uint32_t txq_allocated; 172 173 memset(&limits, 0, sizeof(limits)); 174 175 /* Request at least one Rx and Tx queue */ 176 limits.edl_min_rxq_count = 1; 177 limits.edl_min_txq_count = 1; 178 /* Management event queue plus event queue for each Tx and Rx queue */ 179 limits.edl_min_evq_count = 180 1 + limits.edl_min_rxq_count + limits.edl_min_txq_count; 181 182 /* Divide by number of functions to guarantee that all functions 183 * will get promised resources 184 */ 185 /* FIXME Divide by number of functions (not 2) below */ 186 limits.edl_max_evq_count = encp->enc_evq_limit / 2; 187 SFC_ASSERT(limits.edl_max_evq_count >= limits.edl_min_rxq_count); 188 189 /* Split equally between receive and transmit */ 190 limits.edl_max_rxq_count = 191 MIN(encp->enc_rxq_limit, (limits.edl_max_evq_count - 1) / 2); 192 SFC_ASSERT(limits.edl_max_rxq_count >= limits.edl_min_rxq_count); 193 194 limits.edl_max_txq_count = 195 MIN(encp->enc_txq_limit, 196 limits.edl_max_evq_count - 1 - limits.edl_max_rxq_count); 197 198 if (sa->tso) 199 limits.edl_max_txq_count = 200 MIN(limits.edl_max_txq_count, 201 encp->enc_fw_assisted_tso_v2_n_contexts / 202 encp->enc_hw_pf_count); 203 204 SFC_ASSERT(limits.edl_max_txq_count >= limits.edl_min_rxq_count); 205 206 /* Configure the minimum required resources needed for the 207 * driver to operate, and the maximum desired resources that the 208 * driver is capable of using. 209 */ 210 efx_nic_set_drv_limits(sa->nic, &limits); 211 212 sfc_log_init(sa, "init nic"); 213 rc = efx_nic_init(sa->nic); 214 if (rc != 0) 215 goto fail_nic_init; 216 217 /* Find resource dimensions assigned by firmware to this function */ 218 rc = efx_nic_get_vi_pool(sa->nic, &evq_allocated, &rxq_allocated, 219 &txq_allocated); 220 if (rc != 0) 221 goto fail_get_vi_pool; 222 223 /* It still may allocate more than maximum, ensure limit */ 224 evq_allocated = MIN(evq_allocated, limits.edl_max_evq_count); 225 rxq_allocated = MIN(rxq_allocated, limits.edl_max_rxq_count); 226 txq_allocated = MIN(txq_allocated, limits.edl_max_txq_count); 227 228 /* Subtract management EVQ not used for traffic */ 229 SFC_ASSERT(evq_allocated > 0); 230 evq_allocated--; 231 232 /* Right now we use separate EVQ for Rx and Tx */ 233 sa->rxq_max = MIN(rxq_allocated, evq_allocated / 2); 234 sa->txq_max = MIN(txq_allocated, evq_allocated - sa->rxq_max); 235 236 /* Keep NIC initialized */ 237 return 0; 238 239 fail_get_vi_pool: 240 fail_nic_init: 241 efx_nic_fini(sa->nic); 242 return rc; 243 } 244 245 static int 246 sfc_set_drv_limits(struct sfc_adapter *sa) 247 { 248 const struct rte_eth_dev_data *data = sa->eth_dev->data; 249 efx_drv_limits_t lim; 250 251 memset(&lim, 0, sizeof(lim)); 252 253 /* Limits are strict since take into account initial estimation */ 254 lim.edl_min_evq_count = lim.edl_max_evq_count = 255 1 + data->nb_rx_queues + data->nb_tx_queues; 256 lim.edl_min_rxq_count = lim.edl_max_rxq_count = data->nb_rx_queues; 257 lim.edl_min_txq_count = lim.edl_max_txq_count = data->nb_tx_queues; 258 259 return efx_nic_set_drv_limits(sa->nic, &lim); 260 } 261 262 static int 263 sfc_try_start(struct sfc_adapter *sa) 264 { 265 const efx_nic_cfg_t *encp; 266 int rc; 267 268 sfc_log_init(sa, "entry"); 269 270 SFC_ASSERT(sfc_adapter_is_locked(sa)); 271 SFC_ASSERT(sa->state == SFC_ADAPTER_STARTING); 272 273 sfc_log_init(sa, "set resource limits"); 274 rc = sfc_set_drv_limits(sa); 275 if (rc != 0) 276 goto fail_set_drv_limits; 277 278 sfc_log_init(sa, "init nic"); 279 rc = efx_nic_init(sa->nic); 280 if (rc != 0) 281 goto fail_nic_init; 282 283 encp = efx_nic_cfg_get(sa->nic); 284 if (encp->enc_tunnel_encapsulations_supported != 0) { 285 sfc_log_init(sa, "apply tunnel config"); 286 rc = efx_tunnel_reconfigure(sa->nic); 287 if (rc != 0) 288 goto fail_tunnel_reconfigure; 289 } 290 291 rc = sfc_intr_start(sa); 292 if (rc != 0) 293 goto fail_intr_start; 294 295 rc = sfc_ev_start(sa); 296 if (rc != 0) 297 goto fail_ev_start; 298 299 rc = sfc_port_start(sa); 300 if (rc != 0) 301 goto fail_port_start; 302 303 rc = sfc_rx_start(sa); 304 if (rc != 0) 305 goto fail_rx_start; 306 307 rc = sfc_tx_start(sa); 308 if (rc != 0) 309 goto fail_tx_start; 310 311 rc = sfc_flow_start(sa); 312 if (rc != 0) 313 goto fail_flows_insert; 314 315 sfc_log_init(sa, "done"); 316 return 0; 317 318 fail_flows_insert: 319 sfc_tx_stop(sa); 320 321 fail_tx_start: 322 sfc_rx_stop(sa); 323 324 fail_rx_start: 325 sfc_port_stop(sa); 326 327 fail_port_start: 328 sfc_ev_stop(sa); 329 330 fail_ev_start: 331 sfc_intr_stop(sa); 332 333 fail_intr_start: 334 fail_tunnel_reconfigure: 335 efx_nic_fini(sa->nic); 336 337 fail_nic_init: 338 fail_set_drv_limits: 339 sfc_log_init(sa, "failed %d", rc); 340 return rc; 341 } 342 343 int 344 sfc_start(struct sfc_adapter *sa) 345 { 346 unsigned int start_tries = 3; 347 int rc; 348 349 sfc_log_init(sa, "entry"); 350 351 SFC_ASSERT(sfc_adapter_is_locked(sa)); 352 353 switch (sa->state) { 354 case SFC_ADAPTER_CONFIGURED: 355 break; 356 case SFC_ADAPTER_STARTED: 357 sfc_notice(sa, "already started"); 358 return 0; 359 default: 360 rc = EINVAL; 361 goto fail_bad_state; 362 } 363 364 sa->state = SFC_ADAPTER_STARTING; 365 366 do { 367 rc = sfc_try_start(sa); 368 } while ((--start_tries > 0) && 369 (rc == EIO || rc == EAGAIN || rc == ENOENT || rc == EINVAL)); 370 371 if (rc != 0) 372 goto fail_try_start; 373 374 sa->state = SFC_ADAPTER_STARTED; 375 sfc_log_init(sa, "done"); 376 return 0; 377 378 fail_try_start: 379 sa->state = SFC_ADAPTER_CONFIGURED; 380 fail_bad_state: 381 sfc_log_init(sa, "failed %d", rc); 382 return rc; 383 } 384 385 void 386 sfc_stop(struct sfc_adapter *sa) 387 { 388 sfc_log_init(sa, "entry"); 389 390 SFC_ASSERT(sfc_adapter_is_locked(sa)); 391 392 switch (sa->state) { 393 case SFC_ADAPTER_STARTED: 394 break; 395 case SFC_ADAPTER_CONFIGURED: 396 sfc_notice(sa, "already stopped"); 397 return; 398 default: 399 sfc_err(sa, "stop in unexpected state %u", sa->state); 400 SFC_ASSERT(B_FALSE); 401 return; 402 } 403 404 sa->state = SFC_ADAPTER_STOPPING; 405 406 sfc_flow_stop(sa); 407 sfc_tx_stop(sa); 408 sfc_rx_stop(sa); 409 sfc_port_stop(sa); 410 sfc_ev_stop(sa); 411 sfc_intr_stop(sa); 412 efx_nic_fini(sa->nic); 413 414 sa->state = SFC_ADAPTER_CONFIGURED; 415 sfc_log_init(sa, "done"); 416 } 417 418 static int 419 sfc_restart(struct sfc_adapter *sa) 420 { 421 int rc; 422 423 SFC_ASSERT(sfc_adapter_is_locked(sa)); 424 425 if (sa->state != SFC_ADAPTER_STARTED) 426 return EINVAL; 427 428 sfc_stop(sa); 429 430 rc = sfc_start(sa); 431 if (rc != 0) 432 sfc_err(sa, "restart failed"); 433 434 return rc; 435 } 436 437 static void 438 sfc_restart_if_required(void *arg) 439 { 440 struct sfc_adapter *sa = arg; 441 442 /* If restart is scheduled, clear the flag and do it */ 443 if (rte_atomic32_cmpset((volatile uint32_t *)&sa->restart_required, 444 1, 0)) { 445 sfc_adapter_lock(sa); 446 if (sa->state == SFC_ADAPTER_STARTED) 447 (void)sfc_restart(sa); 448 sfc_adapter_unlock(sa); 449 } 450 } 451 452 void 453 sfc_schedule_restart(struct sfc_adapter *sa) 454 { 455 int rc; 456 457 /* Schedule restart alarm if it is not scheduled yet */ 458 if (!rte_atomic32_test_and_set(&sa->restart_required)) 459 return; 460 461 rc = rte_eal_alarm_set(1, sfc_restart_if_required, sa); 462 if (rc == -ENOTSUP) 463 sfc_warn(sa, "alarms are not supported, restart is pending"); 464 else if (rc != 0) 465 sfc_err(sa, "cannot arm restart alarm (rc=%d)", rc); 466 else 467 sfc_notice(sa, "restart scheduled"); 468 } 469 470 int 471 sfc_configure(struct sfc_adapter *sa) 472 { 473 int rc; 474 475 sfc_log_init(sa, "entry"); 476 477 SFC_ASSERT(sfc_adapter_is_locked(sa)); 478 479 SFC_ASSERT(sa->state == SFC_ADAPTER_INITIALIZED || 480 sa->state == SFC_ADAPTER_CONFIGURED); 481 sa->state = SFC_ADAPTER_CONFIGURING; 482 483 rc = sfc_check_conf(sa); 484 if (rc != 0) 485 goto fail_check_conf; 486 487 rc = sfc_intr_configure(sa); 488 if (rc != 0) 489 goto fail_intr_configure; 490 491 rc = sfc_port_configure(sa); 492 if (rc != 0) 493 goto fail_port_configure; 494 495 rc = sfc_rx_configure(sa); 496 if (rc != 0) 497 goto fail_rx_configure; 498 499 rc = sfc_tx_configure(sa); 500 if (rc != 0) 501 goto fail_tx_configure; 502 503 sa->state = SFC_ADAPTER_CONFIGURED; 504 sfc_log_init(sa, "done"); 505 return 0; 506 507 fail_tx_configure: 508 sfc_rx_close(sa); 509 510 fail_rx_configure: 511 sfc_port_close(sa); 512 513 fail_port_configure: 514 sfc_intr_close(sa); 515 516 fail_intr_configure: 517 fail_check_conf: 518 sa->state = SFC_ADAPTER_INITIALIZED; 519 sfc_log_init(sa, "failed %d", rc); 520 return rc; 521 } 522 523 void 524 sfc_close(struct sfc_adapter *sa) 525 { 526 sfc_log_init(sa, "entry"); 527 528 SFC_ASSERT(sfc_adapter_is_locked(sa)); 529 530 SFC_ASSERT(sa->state == SFC_ADAPTER_CONFIGURED); 531 sa->state = SFC_ADAPTER_CLOSING; 532 533 sfc_tx_close(sa); 534 sfc_rx_close(sa); 535 sfc_port_close(sa); 536 sfc_intr_close(sa); 537 538 sa->state = SFC_ADAPTER_INITIALIZED; 539 sfc_log_init(sa, "done"); 540 } 541 542 static int 543 sfc_mem_bar_init(struct sfc_adapter *sa, unsigned int membar) 544 { 545 struct rte_eth_dev *eth_dev = sa->eth_dev; 546 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 547 efsys_bar_t *ebp = &sa->mem_bar; 548 struct rte_mem_resource *res = &pci_dev->mem_resource[membar]; 549 550 SFC_BAR_LOCK_INIT(ebp, eth_dev->data->name); 551 ebp->esb_rid = membar; 552 ebp->esb_dev = pci_dev; 553 ebp->esb_base = res->addr; 554 return 0; 555 } 556 557 static void 558 sfc_mem_bar_fini(struct sfc_adapter *sa) 559 { 560 efsys_bar_t *ebp = &sa->mem_bar; 561 562 SFC_BAR_LOCK_DESTROY(ebp); 563 memset(ebp, 0, sizeof(*ebp)); 564 } 565 566 #if EFSYS_OPT_RX_SCALE 567 /* 568 * A fixed RSS key which has a property of being symmetric 569 * (symmetrical flows are distributed to the same CPU) 570 * and also known to give a uniform distribution 571 * (a good distribution of traffic between different CPUs) 572 */ 573 static const uint8_t default_rss_key[EFX_RSS_KEY_SIZE] = { 574 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 575 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 576 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 577 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 578 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 0x6d, 0x5a, 579 }; 580 #endif 581 582 #if EFSYS_OPT_RX_SCALE 583 static int 584 sfc_set_rss_defaults(struct sfc_adapter *sa) 585 { 586 int rc; 587 588 rc = efx_intr_init(sa->nic, sa->intr.type, NULL); 589 if (rc != 0) 590 goto fail_intr_init; 591 592 rc = efx_ev_init(sa->nic); 593 if (rc != 0) 594 goto fail_ev_init; 595 596 rc = efx_rx_init(sa->nic); 597 if (rc != 0) 598 goto fail_rx_init; 599 600 rc = efx_rx_scale_default_support_get(sa->nic, &sa->rss_support); 601 if (rc != 0) 602 goto fail_scale_support_get; 603 604 rc = efx_rx_hash_default_support_get(sa->nic, &sa->hash_support); 605 if (rc != 0) 606 goto fail_hash_support_get; 607 608 efx_rx_fini(sa->nic); 609 efx_ev_fini(sa->nic); 610 efx_intr_fini(sa->nic); 611 612 sa->rss_hash_types = sfc_rte_to_efx_hash_type(SFC_RSS_OFFLOADS); 613 614 rte_memcpy(sa->rss_key, default_rss_key, sizeof(sa->rss_key)); 615 616 return 0; 617 618 fail_hash_support_get: 619 fail_scale_support_get: 620 fail_rx_init: 621 efx_ev_fini(sa->nic); 622 623 fail_ev_init: 624 efx_intr_fini(sa->nic); 625 626 fail_intr_init: 627 return rc; 628 } 629 #else 630 static int 631 sfc_set_rss_defaults(__rte_unused struct sfc_adapter *sa) 632 { 633 return 0; 634 } 635 #endif 636 637 int 638 sfc_attach(struct sfc_adapter *sa) 639 { 640 const efx_nic_cfg_t *encp; 641 efx_nic_t *enp = sa->nic; 642 int rc; 643 644 sfc_log_init(sa, "entry"); 645 646 SFC_ASSERT(sfc_adapter_is_locked(sa)); 647 648 efx_mcdi_new_epoch(enp); 649 650 sfc_log_init(sa, "reset nic"); 651 rc = efx_nic_reset(enp); 652 if (rc != 0) 653 goto fail_nic_reset; 654 655 /* 656 * Probed NIC is sufficient for tunnel init. 657 * Initialize tunnel support to be able to use libefx 658 * efx_tunnel_config_udp_{add,remove}() in any state and 659 * efx_tunnel_reconfigure() on start up. 660 */ 661 rc = efx_tunnel_init(enp); 662 if (rc != 0) 663 goto fail_tunnel_init; 664 665 encp = efx_nic_cfg_get(sa->nic); 666 667 if (sa->dp_tx->features & SFC_DP_TX_FEAT_TSO) { 668 sa->tso = encp->enc_fw_assisted_tso_v2_enabled; 669 if (!sa->tso) 670 sfc_warn(sa, 671 "TSO support isn't available on this adapter"); 672 } 673 674 sfc_log_init(sa, "estimate resource limits"); 675 rc = sfc_estimate_resource_limits(sa); 676 if (rc != 0) 677 goto fail_estimate_rsrc_limits; 678 679 sa->txq_max_entries = encp->enc_txq_max_ndescs; 680 SFC_ASSERT(rte_is_power_of_2(sa->txq_max_entries)); 681 682 rc = sfc_intr_attach(sa); 683 if (rc != 0) 684 goto fail_intr_attach; 685 686 rc = sfc_ev_attach(sa); 687 if (rc != 0) 688 goto fail_ev_attach; 689 690 rc = sfc_port_attach(sa); 691 if (rc != 0) 692 goto fail_port_attach; 693 694 rc = sfc_set_rss_defaults(sa); 695 if (rc != 0) 696 goto fail_set_rss_defaults; 697 698 rc = sfc_filter_attach(sa); 699 if (rc != 0) 700 goto fail_filter_attach; 701 702 sfc_log_init(sa, "fini nic"); 703 efx_nic_fini(enp); 704 705 sfc_flow_init(sa); 706 707 sa->state = SFC_ADAPTER_INITIALIZED; 708 709 sfc_log_init(sa, "done"); 710 return 0; 711 712 fail_filter_attach: 713 fail_set_rss_defaults: 714 sfc_port_detach(sa); 715 716 fail_port_attach: 717 sfc_ev_detach(sa); 718 719 fail_ev_attach: 720 sfc_intr_detach(sa); 721 722 fail_intr_attach: 723 efx_nic_fini(sa->nic); 724 725 fail_estimate_rsrc_limits: 726 fail_tunnel_init: 727 efx_tunnel_fini(sa->nic); 728 729 fail_nic_reset: 730 731 sfc_log_init(sa, "failed %d", rc); 732 return rc; 733 } 734 735 void 736 sfc_detach(struct sfc_adapter *sa) 737 { 738 sfc_log_init(sa, "entry"); 739 740 SFC_ASSERT(sfc_adapter_is_locked(sa)); 741 742 sfc_flow_fini(sa); 743 744 sfc_filter_detach(sa); 745 sfc_port_detach(sa); 746 sfc_ev_detach(sa); 747 sfc_intr_detach(sa); 748 efx_tunnel_fini(sa->nic); 749 750 sa->state = SFC_ADAPTER_UNINITIALIZED; 751 } 752 753 static int 754 sfc_kvarg_fv_variant_handler(__rte_unused const char *key, 755 const char *value_str, void *opaque) 756 { 757 uint32_t *value = opaque; 758 759 if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_DONT_CARE) == 0) 760 *value = EFX_FW_VARIANT_DONT_CARE; 761 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_FULL_FEATURED) == 0) 762 *value = EFX_FW_VARIANT_FULL_FEATURED; 763 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_LOW_LATENCY) == 0) 764 *value = EFX_FW_VARIANT_LOW_LATENCY; 765 else if (strcasecmp(value_str, SFC_KVARG_FW_VARIANT_PACKED_STREAM) == 0) 766 *value = EFX_FW_VARIANT_PACKED_STREAM; 767 else 768 return -EINVAL; 769 770 return 0; 771 } 772 773 static int 774 sfc_get_fw_variant(struct sfc_adapter *sa, efx_fw_variant_t *efv) 775 { 776 efx_nic_fw_info_t enfi; 777 int rc; 778 779 rc = efx_nic_get_fw_version(sa->nic, &enfi); 780 if (rc != 0) 781 return rc; 782 else if (!enfi.enfi_dpcpu_fw_ids_valid) 783 return ENOTSUP; 784 785 /* 786 * Firmware variant can be uniquely identified by the RxDPCPU 787 * firmware id 788 */ 789 switch (enfi.enfi_rx_dpcpu_fw_id) { 790 case EFX_RXDP_FULL_FEATURED_FW_ID: 791 *efv = EFX_FW_VARIANT_FULL_FEATURED; 792 break; 793 794 case EFX_RXDP_LOW_LATENCY_FW_ID: 795 *efv = EFX_FW_VARIANT_LOW_LATENCY; 796 break; 797 798 case EFX_RXDP_PACKED_STREAM_FW_ID: 799 *efv = EFX_FW_VARIANT_PACKED_STREAM; 800 break; 801 802 default: 803 /* 804 * Other firmware variants are not considered, since they are 805 * not supported in the device parameters 806 */ 807 *efv = EFX_FW_VARIANT_DONT_CARE; 808 break; 809 } 810 811 return 0; 812 } 813 814 static const char * 815 sfc_fw_variant2str(efx_fw_variant_t efv) 816 { 817 switch (efv) { 818 case EFX_RXDP_FULL_FEATURED_FW_ID: 819 return SFC_KVARG_FW_VARIANT_FULL_FEATURED; 820 case EFX_RXDP_LOW_LATENCY_FW_ID: 821 return SFC_KVARG_FW_VARIANT_LOW_LATENCY; 822 case EFX_RXDP_PACKED_STREAM_FW_ID: 823 return SFC_KVARG_FW_VARIANT_PACKED_STREAM; 824 default: 825 return "unknown"; 826 } 827 } 828 829 static int 830 sfc_nic_probe(struct sfc_adapter *sa) 831 { 832 efx_nic_t *enp = sa->nic; 833 efx_fw_variant_t preferred_efv; 834 efx_fw_variant_t efv; 835 int rc; 836 837 preferred_efv = EFX_FW_VARIANT_DONT_CARE; 838 rc = sfc_kvargs_process(sa, SFC_KVARG_FW_VARIANT, 839 sfc_kvarg_fv_variant_handler, 840 &preferred_efv); 841 if (rc != 0) { 842 sfc_err(sa, "invalid %s parameter value", SFC_KVARG_FW_VARIANT); 843 return rc; 844 } 845 846 rc = efx_nic_probe(enp, preferred_efv); 847 if (rc == EACCES) { 848 /* Unprivileged functions cannot set FW variant */ 849 rc = efx_nic_probe(enp, EFX_FW_VARIANT_DONT_CARE); 850 } 851 if (rc != 0) 852 return rc; 853 854 rc = sfc_get_fw_variant(sa, &efv); 855 if (rc == ENOTSUP) { 856 sfc_warn(sa, "FW variant can not be obtained"); 857 return 0; 858 } 859 if (rc != 0) 860 return rc; 861 862 /* Check that firmware variant was changed to the requested one */ 863 if (preferred_efv != EFX_FW_VARIANT_DONT_CARE && preferred_efv != efv) { 864 sfc_warn(sa, "FW variant has not changed to the requested %s", 865 sfc_fw_variant2str(preferred_efv)); 866 } 867 868 sfc_notice(sa, "running FW variant is %s", sfc_fw_variant2str(efv)); 869 870 return 0; 871 } 872 873 int 874 sfc_probe(struct sfc_adapter *sa) 875 { 876 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(sa->eth_dev); 877 unsigned int membar; 878 efx_nic_t *enp; 879 int rc; 880 881 sfc_log_init(sa, "entry"); 882 883 SFC_ASSERT(sfc_adapter_is_locked(sa)); 884 885 sa->socket_id = rte_socket_id(); 886 rte_atomic32_init(&sa->restart_required); 887 888 sfc_log_init(sa, "get family"); 889 rc = efx_family(pci_dev->id.vendor_id, pci_dev->id.device_id, 890 &sa->family, &membar); 891 if (rc != 0) 892 goto fail_family; 893 sfc_log_init(sa, "family is %u, membar is %u", sa->family, membar); 894 895 sfc_log_init(sa, "init mem bar"); 896 rc = sfc_mem_bar_init(sa, membar); 897 if (rc != 0) 898 goto fail_mem_bar_init; 899 900 sfc_log_init(sa, "create nic"); 901 rte_spinlock_init(&sa->nic_lock); 902 rc = efx_nic_create(sa->family, (efsys_identifier_t *)sa, 903 &sa->mem_bar, &sa->nic_lock, &enp); 904 if (rc != 0) 905 goto fail_nic_create; 906 sa->nic = enp; 907 908 rc = sfc_mcdi_init(sa); 909 if (rc != 0) 910 goto fail_mcdi_init; 911 912 sfc_log_init(sa, "probe nic"); 913 rc = sfc_nic_probe(sa); 914 if (rc != 0) 915 goto fail_nic_probe; 916 917 sfc_log_init(sa, "done"); 918 return 0; 919 920 fail_nic_probe: 921 sfc_mcdi_fini(sa); 922 923 fail_mcdi_init: 924 sfc_log_init(sa, "destroy nic"); 925 sa->nic = NULL; 926 efx_nic_destroy(enp); 927 928 fail_nic_create: 929 sfc_mem_bar_fini(sa); 930 931 fail_mem_bar_init: 932 fail_family: 933 sfc_log_init(sa, "failed %d", rc); 934 return rc; 935 } 936 937 void 938 sfc_unprobe(struct sfc_adapter *sa) 939 { 940 efx_nic_t *enp = sa->nic; 941 942 sfc_log_init(sa, "entry"); 943 944 SFC_ASSERT(sfc_adapter_is_locked(sa)); 945 946 sfc_log_init(sa, "unprobe nic"); 947 efx_nic_unprobe(enp); 948 949 sfc_mcdi_fini(sa); 950 951 /* 952 * Make sure there is no pending alarm to restart since we are 953 * going to free device private which is passed as the callback 954 * opaque data. A new alarm cannot be scheduled since MCDI is 955 * shut down. 956 */ 957 rte_eal_alarm_cancel(sfc_restart_if_required, sa); 958 959 sfc_log_init(sa, "destroy nic"); 960 sa->nic = NULL; 961 efx_nic_destroy(enp); 962 963 sfc_mem_bar_fini(sa); 964 965 sfc_flow_fini(sa); 966 sa->state = SFC_ADAPTER_UNINITIALIZED; 967 } 968 969 uint32_t 970 sfc_register_logtype(struct sfc_adapter *sa, const char *lt_prefix_str, 971 uint32_t ll_default) 972 { 973 size_t lt_prefix_str_size = strlen(lt_prefix_str); 974 size_t lt_str_size_max; 975 char *lt_str = NULL; 976 int ret; 977 978 if (SIZE_MAX - PCI_PRI_STR_SIZE - 1 > lt_prefix_str_size) { 979 ++lt_prefix_str_size; /* Reserve space for prefix separator */ 980 lt_str_size_max = lt_prefix_str_size + PCI_PRI_STR_SIZE + 1; 981 } else { 982 return RTE_LOGTYPE_PMD; 983 } 984 985 lt_str = rte_zmalloc("logtype_str", lt_str_size_max, 0); 986 if (lt_str == NULL) 987 return RTE_LOGTYPE_PMD; 988 989 strncpy(lt_str, lt_prefix_str, lt_prefix_str_size); 990 lt_str[lt_prefix_str_size - 1] = '.'; 991 rte_pci_device_name(&sa->pci_addr, lt_str + lt_prefix_str_size, 992 lt_str_size_max - lt_prefix_str_size); 993 lt_str[lt_str_size_max - 1] = '\0'; 994 995 ret = rte_log_register_type_and_pick_level(lt_str, ll_default); 996 rte_free(lt_str); 997 998 return (ret < 0) ? RTE_LOGTYPE_PMD : ret; 999 } 1000