1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <stdalign.h> 7 #include <stdint.h> 8 #include <string.h> 9 #include <stdbool.h> 10 #include <sys/queue.h> 11 12 #include <rte_common.h> 13 #include <rte_ether.h> 14 #include <ethdev_driver.h> 15 #include <rte_eal_paging.h> 16 #include <rte_flow.h> 17 #include <rte_cycles.h> 18 #include <rte_flow_driver.h> 19 #include <rte_malloc.h> 20 #include <rte_ip.h> 21 22 #include <mlx5_glue.h> 23 #include <mlx5_devx_cmds.h> 24 #include <mlx5_prm.h> 25 #include <mlx5_malloc.h> 26 27 #include "mlx5_defs.h" 28 #include "mlx5.h" 29 #include "mlx5_flow.h" 30 #include "mlx5_flow_os.h" 31 #include "mlx5_rx.h" 32 #include "mlx5_tx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 struct tunnel_default_miss_ctx { 37 uint16_t *queue; 38 __extension__ 39 union { 40 struct rte_flow_action_rss action_rss; 41 struct rte_flow_action_queue miss_queue; 42 struct rte_flow_action_jump miss_jump; 43 uint8_t raw[0]; 44 }; 45 }; 46 47 static int 48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 49 struct rte_flow *flow, 50 const struct rte_flow_attr *attr, 51 const struct rte_flow_action *app_actions, 52 uint32_t flow_idx, 53 struct tunnel_default_miss_ctx *ctx, 54 struct rte_flow_error *error); 55 static struct mlx5_flow_tunnel * 56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 57 static void 58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 59 static uint32_t 60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 61 const struct mlx5_flow_tunnel *tunnel, 62 uint32_t group, uint32_t *table, 63 struct rte_flow_error *error); 64 65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void); 66 static void mlx5_flow_pop_thread_workspace(void); 67 68 69 /** Device flow drivers. */ 70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 71 72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 73 74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 75 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) 77 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 78 #endif 79 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 80 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 81 }; 82 83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 85 (const int []){ \ 86 __VA_ARGS__, 0, \ 87 } 88 89 /** Node object of input graph for mlx5_flow_expand_rss(). */ 90 struct mlx5_flow_expand_node { 91 const int *const next; 92 /**< 93 * List of next node indexes. Index 0 is interpreted as a terminator. 94 */ 95 const enum rte_flow_item_type type; 96 /**< Pattern item type of current node. */ 97 uint64_t rss_types; 98 /**< 99 * RSS types bit-field associated with this node 100 * (see ETH_RSS_* definitions). 101 */ 102 }; 103 104 /** Object returned by mlx5_flow_expand_rss(). */ 105 struct mlx5_flow_expand_rss { 106 uint32_t entries; 107 /**< Number of entries @p patterns and @p priorities. */ 108 struct { 109 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 110 uint32_t priority; /**< Priority offset for each expansion. */ 111 } entry[]; 112 }; 113 114 static enum rte_flow_item_type 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 116 { 117 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 118 uint16_t ether_type = 0; 119 uint16_t ether_type_m; 120 uint8_t ip_next_proto = 0; 121 uint8_t ip_next_proto_m; 122 123 if (item == NULL || item->spec == NULL) 124 return ret; 125 switch (item->type) { 126 case RTE_FLOW_ITEM_TYPE_ETH: 127 if (item->mask) 128 ether_type_m = ((const struct rte_flow_item_eth *) 129 (item->mask))->type; 130 else 131 ether_type_m = rte_flow_item_eth_mask.type; 132 if (ether_type_m != RTE_BE16(0xFFFF)) 133 break; 134 ether_type = ((const struct rte_flow_item_eth *) 135 (item->spec))->type; 136 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 137 ret = RTE_FLOW_ITEM_TYPE_IPV4; 138 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 139 ret = RTE_FLOW_ITEM_TYPE_IPV6; 140 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 141 ret = RTE_FLOW_ITEM_TYPE_VLAN; 142 else 143 ret = RTE_FLOW_ITEM_TYPE_END; 144 break; 145 case RTE_FLOW_ITEM_TYPE_VLAN: 146 if (item->mask) 147 ether_type_m = ((const struct rte_flow_item_vlan *) 148 (item->mask))->inner_type; 149 else 150 ether_type_m = rte_flow_item_vlan_mask.inner_type; 151 if (ether_type_m != RTE_BE16(0xFFFF)) 152 break; 153 ether_type = ((const struct rte_flow_item_vlan *) 154 (item->spec))->inner_type; 155 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 156 ret = RTE_FLOW_ITEM_TYPE_IPV4; 157 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 158 ret = RTE_FLOW_ITEM_TYPE_IPV6; 159 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 160 ret = RTE_FLOW_ITEM_TYPE_VLAN; 161 else 162 ret = RTE_FLOW_ITEM_TYPE_END; 163 break; 164 case RTE_FLOW_ITEM_TYPE_IPV4: 165 if (item->mask) 166 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 167 (item->mask))->hdr.next_proto_id; 168 else 169 ip_next_proto_m = 170 rte_flow_item_ipv4_mask.hdr.next_proto_id; 171 if (ip_next_proto_m != 0xFF) 172 break; 173 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 174 (item->spec))->hdr.next_proto_id; 175 if (ip_next_proto == IPPROTO_UDP) 176 ret = RTE_FLOW_ITEM_TYPE_UDP; 177 else if (ip_next_proto == IPPROTO_TCP) 178 ret = RTE_FLOW_ITEM_TYPE_TCP; 179 else if (ip_next_proto == IPPROTO_IP) 180 ret = RTE_FLOW_ITEM_TYPE_IPV4; 181 else if (ip_next_proto == IPPROTO_IPV6) 182 ret = RTE_FLOW_ITEM_TYPE_IPV6; 183 else 184 ret = RTE_FLOW_ITEM_TYPE_END; 185 break; 186 case RTE_FLOW_ITEM_TYPE_IPV6: 187 if (item->mask) 188 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 189 (item->mask))->hdr.proto; 190 else 191 ip_next_proto_m = 192 rte_flow_item_ipv6_mask.hdr.proto; 193 if (ip_next_proto_m != 0xFF) 194 break; 195 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 196 (item->spec))->hdr.proto; 197 if (ip_next_proto == IPPROTO_UDP) 198 ret = RTE_FLOW_ITEM_TYPE_UDP; 199 else if (ip_next_proto == IPPROTO_TCP) 200 ret = RTE_FLOW_ITEM_TYPE_TCP; 201 else if (ip_next_proto == IPPROTO_IP) 202 ret = RTE_FLOW_ITEM_TYPE_IPV4; 203 else if (ip_next_proto == IPPROTO_IPV6) 204 ret = RTE_FLOW_ITEM_TYPE_IPV6; 205 else 206 ret = RTE_FLOW_ITEM_TYPE_END; 207 break; 208 default: 209 ret = RTE_FLOW_ITEM_TYPE_VOID; 210 break; 211 } 212 return ret; 213 } 214 215 #define MLX5_RSS_EXP_ELT_N 8 216 217 /** 218 * Expand RSS flows into several possible flows according to the RSS hash 219 * fields requested and the driver capabilities. 220 * 221 * @param[out] buf 222 * Buffer to store the result expansion. 223 * @param[in] size 224 * Buffer size in bytes. If 0, @p buf can be NULL. 225 * @param[in] pattern 226 * User flow pattern. 227 * @param[in] types 228 * RSS types to expand (see ETH_RSS_* definitions). 229 * @param[in] graph 230 * Input graph to expand @p pattern according to @p types. 231 * @param[in] graph_root_index 232 * Index of root node in @p graph, typically 0. 233 * 234 * @return 235 * A positive value representing the size of @p buf in bytes regardless of 236 * @p size on success, a negative errno value otherwise and rte_errno is 237 * set, the following errors are defined: 238 * 239 * -E2BIG: graph-depth @p graph is too deep. 240 */ 241 static int 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 243 const struct rte_flow_item *pattern, uint64_t types, 244 const struct mlx5_flow_expand_node graph[], 245 int graph_root_index) 246 { 247 const struct rte_flow_item *item; 248 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 249 const int *next_node; 250 const int *stack[MLX5_RSS_EXP_ELT_N]; 251 int stack_pos = 0; 252 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; 253 unsigned int i; 254 size_t lsize; 255 size_t user_pattern_size = 0; 256 void *addr = NULL; 257 const struct mlx5_flow_expand_node *next = NULL; 258 struct rte_flow_item missed_item; 259 int missed = 0; 260 int elt = 0; 261 const struct rte_flow_item *last_item = NULL; 262 263 memset(&missed_item, 0, sizeof(missed_item)); 264 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 265 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); 266 if (lsize <= size) { 267 buf->entry[0].priority = 0; 268 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; 269 buf->entries = 0; 270 addr = buf->entry[0].pattern; 271 } 272 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 273 if (item->type != RTE_FLOW_ITEM_TYPE_VOID) 274 last_item = item; 275 for (i = 0; node->next && node->next[i]; ++i) { 276 next = &graph[node->next[i]]; 277 if (next->type == item->type) 278 break; 279 } 280 if (next) 281 node = next; 282 user_pattern_size += sizeof(*item); 283 } 284 user_pattern_size += sizeof(*item); /* Handle END item. */ 285 lsize += user_pattern_size; 286 /* Copy the user pattern in the first entry of the buffer. */ 287 if (lsize <= size) { 288 rte_memcpy(addr, pattern, user_pattern_size); 289 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 290 buf->entries = 1; 291 } 292 /* Start expanding. */ 293 memset(flow_items, 0, sizeof(flow_items)); 294 user_pattern_size -= sizeof(*item); 295 /* 296 * Check if the last valid item has spec set, need complete pattern, 297 * and the pattern can be used for expansion. 298 */ 299 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item); 300 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 301 /* Item type END indicates expansion is not required. */ 302 return lsize; 303 } 304 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 305 next = NULL; 306 missed = 1; 307 for (i = 0; node->next && node->next[i]; ++i) { 308 next = &graph[node->next[i]]; 309 if (next->type == missed_item.type) { 310 flow_items[0].type = missed_item.type; 311 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 312 break; 313 } 314 next = NULL; 315 } 316 } 317 if (next && missed) { 318 elt = 2; /* missed item + item end. */ 319 node = next; 320 lsize += elt * sizeof(*item) + user_pattern_size; 321 if ((node->rss_types & types) && lsize <= size) { 322 buf->entry[buf->entries].priority = 1; 323 buf->entry[buf->entries].pattern = addr; 324 buf->entries++; 325 rte_memcpy(addr, buf->entry[0].pattern, 326 user_pattern_size); 327 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 328 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 329 addr = (void *)(((uintptr_t)addr) + 330 elt * sizeof(*item)); 331 } 332 } 333 memset(flow_items, 0, sizeof(flow_items)); 334 next_node = node->next; 335 stack[stack_pos] = next_node; 336 node = next_node ? &graph[*next_node] : NULL; 337 while (node) { 338 flow_items[stack_pos].type = node->type; 339 if (node->rss_types & types) { 340 /* 341 * compute the number of items to copy from the 342 * expansion and copy it. 343 * When the stack_pos is 0, there are 1 element in it, 344 * plus the addition END item. 345 */ 346 elt = stack_pos + 2; 347 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 348 lsize += elt * sizeof(*item) + user_pattern_size; 349 if (lsize <= size) { 350 size_t n = elt * sizeof(*item); 351 352 buf->entry[buf->entries].priority = 353 stack_pos + 1 + missed; 354 buf->entry[buf->entries].pattern = addr; 355 buf->entries++; 356 rte_memcpy(addr, buf->entry[0].pattern, 357 user_pattern_size); 358 addr = (void *)(((uintptr_t)addr) + 359 user_pattern_size); 360 rte_memcpy(addr, &missed_item, 361 missed * sizeof(*item)); 362 addr = (void *)(((uintptr_t)addr) + 363 missed * sizeof(*item)); 364 rte_memcpy(addr, flow_items, n); 365 addr = (void *)(((uintptr_t)addr) + n); 366 } 367 } 368 /* Go deeper. */ 369 if (node->next) { 370 next_node = node->next; 371 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { 372 rte_errno = E2BIG; 373 return -rte_errno; 374 } 375 stack[stack_pos] = next_node; 376 } else if (*(next_node + 1)) { 377 /* Follow up with the next possibility. */ 378 ++next_node; 379 } else { 380 /* Move to the next path. */ 381 if (stack_pos) 382 next_node = stack[--stack_pos]; 383 next_node++; 384 stack[stack_pos] = next_node; 385 } 386 node = *next_node ? &graph[*next_node] : NULL; 387 }; 388 return lsize; 389 } 390 391 enum mlx5_expansion { 392 MLX5_EXPANSION_ROOT, 393 MLX5_EXPANSION_ROOT_OUTER, 394 MLX5_EXPANSION_ROOT_ETH_VLAN, 395 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 396 MLX5_EXPANSION_OUTER_ETH, 397 MLX5_EXPANSION_OUTER_ETH_VLAN, 398 MLX5_EXPANSION_OUTER_VLAN, 399 MLX5_EXPANSION_OUTER_IPV4, 400 MLX5_EXPANSION_OUTER_IPV4_UDP, 401 MLX5_EXPANSION_OUTER_IPV4_TCP, 402 MLX5_EXPANSION_OUTER_IPV6, 403 MLX5_EXPANSION_OUTER_IPV6_UDP, 404 MLX5_EXPANSION_OUTER_IPV6_TCP, 405 MLX5_EXPANSION_VXLAN, 406 MLX5_EXPANSION_VXLAN_GPE, 407 MLX5_EXPANSION_GRE, 408 MLX5_EXPANSION_MPLS, 409 MLX5_EXPANSION_ETH, 410 MLX5_EXPANSION_ETH_VLAN, 411 MLX5_EXPANSION_VLAN, 412 MLX5_EXPANSION_IPV4, 413 MLX5_EXPANSION_IPV4_UDP, 414 MLX5_EXPANSION_IPV4_TCP, 415 MLX5_EXPANSION_IPV6, 416 MLX5_EXPANSION_IPV6_UDP, 417 MLX5_EXPANSION_IPV6_TCP, 418 }; 419 420 /** Supported expansion of items. */ 421 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 422 [MLX5_EXPANSION_ROOT] = { 423 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 424 MLX5_EXPANSION_IPV4, 425 MLX5_EXPANSION_IPV6), 426 .type = RTE_FLOW_ITEM_TYPE_END, 427 }, 428 [MLX5_EXPANSION_ROOT_OUTER] = { 429 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 430 MLX5_EXPANSION_OUTER_IPV4, 431 MLX5_EXPANSION_OUTER_IPV6), 432 .type = RTE_FLOW_ITEM_TYPE_END, 433 }, 434 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 435 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 436 .type = RTE_FLOW_ITEM_TYPE_END, 437 }, 438 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 439 .next = MLX5_FLOW_EXPAND_RSS_NEXT 440 (MLX5_EXPANSION_OUTER_ETH_VLAN), 441 .type = RTE_FLOW_ITEM_TYPE_END, 442 }, 443 [MLX5_EXPANSION_OUTER_ETH] = { 444 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 445 MLX5_EXPANSION_OUTER_IPV6, 446 MLX5_EXPANSION_MPLS), 447 .type = RTE_FLOW_ITEM_TYPE_ETH, 448 .rss_types = 0, 449 }, 450 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 451 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 452 .type = RTE_FLOW_ITEM_TYPE_ETH, 453 .rss_types = 0, 454 }, 455 [MLX5_EXPANSION_OUTER_VLAN] = { 456 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 457 MLX5_EXPANSION_OUTER_IPV6), 458 .type = RTE_FLOW_ITEM_TYPE_VLAN, 459 }, 460 [MLX5_EXPANSION_OUTER_IPV4] = { 461 .next = MLX5_FLOW_EXPAND_RSS_NEXT 462 (MLX5_EXPANSION_OUTER_IPV4_UDP, 463 MLX5_EXPANSION_OUTER_IPV4_TCP, 464 MLX5_EXPANSION_GRE, 465 MLX5_EXPANSION_IPV4, 466 MLX5_EXPANSION_IPV6), 467 .type = RTE_FLOW_ITEM_TYPE_IPV4, 468 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 469 ETH_RSS_NONFRAG_IPV4_OTHER, 470 }, 471 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 472 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 473 MLX5_EXPANSION_VXLAN_GPE), 474 .type = RTE_FLOW_ITEM_TYPE_UDP, 475 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 476 }, 477 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 478 .type = RTE_FLOW_ITEM_TYPE_TCP, 479 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 480 }, 481 [MLX5_EXPANSION_OUTER_IPV6] = { 482 .next = MLX5_FLOW_EXPAND_RSS_NEXT 483 (MLX5_EXPANSION_OUTER_IPV6_UDP, 484 MLX5_EXPANSION_OUTER_IPV6_TCP, 485 MLX5_EXPANSION_IPV4, 486 MLX5_EXPANSION_IPV6, 487 MLX5_EXPANSION_GRE), 488 .type = RTE_FLOW_ITEM_TYPE_IPV6, 489 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 490 ETH_RSS_NONFRAG_IPV6_OTHER, 491 }, 492 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 493 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 494 MLX5_EXPANSION_VXLAN_GPE), 495 .type = RTE_FLOW_ITEM_TYPE_UDP, 496 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 497 }, 498 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 499 .type = RTE_FLOW_ITEM_TYPE_TCP, 500 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 501 }, 502 [MLX5_EXPANSION_VXLAN] = { 503 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 504 MLX5_EXPANSION_IPV4, 505 MLX5_EXPANSION_IPV6), 506 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 507 }, 508 [MLX5_EXPANSION_VXLAN_GPE] = { 509 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 510 MLX5_EXPANSION_IPV4, 511 MLX5_EXPANSION_IPV6), 512 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 513 }, 514 [MLX5_EXPANSION_GRE] = { 515 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 516 MLX5_EXPANSION_IPV6), 517 .type = RTE_FLOW_ITEM_TYPE_GRE, 518 }, 519 [MLX5_EXPANSION_MPLS] = { 520 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 521 MLX5_EXPANSION_IPV6), 522 .type = RTE_FLOW_ITEM_TYPE_MPLS, 523 }, 524 [MLX5_EXPANSION_ETH] = { 525 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 526 MLX5_EXPANSION_IPV6), 527 .type = RTE_FLOW_ITEM_TYPE_ETH, 528 }, 529 [MLX5_EXPANSION_ETH_VLAN] = { 530 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 531 .type = RTE_FLOW_ITEM_TYPE_ETH, 532 }, 533 [MLX5_EXPANSION_VLAN] = { 534 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 535 MLX5_EXPANSION_IPV6), 536 .type = RTE_FLOW_ITEM_TYPE_VLAN, 537 }, 538 [MLX5_EXPANSION_IPV4] = { 539 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 540 MLX5_EXPANSION_IPV4_TCP), 541 .type = RTE_FLOW_ITEM_TYPE_IPV4, 542 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 543 ETH_RSS_NONFRAG_IPV4_OTHER, 544 }, 545 [MLX5_EXPANSION_IPV4_UDP] = { 546 .type = RTE_FLOW_ITEM_TYPE_UDP, 547 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 548 }, 549 [MLX5_EXPANSION_IPV4_TCP] = { 550 .type = RTE_FLOW_ITEM_TYPE_TCP, 551 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 552 }, 553 [MLX5_EXPANSION_IPV6] = { 554 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 555 MLX5_EXPANSION_IPV6_TCP), 556 .type = RTE_FLOW_ITEM_TYPE_IPV6, 557 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 558 ETH_RSS_NONFRAG_IPV6_OTHER, 559 }, 560 [MLX5_EXPANSION_IPV6_UDP] = { 561 .type = RTE_FLOW_ITEM_TYPE_UDP, 562 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 563 }, 564 [MLX5_EXPANSION_IPV6_TCP] = { 565 .type = RTE_FLOW_ITEM_TYPE_TCP, 566 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 567 }, 568 }; 569 570 static struct rte_flow_action_handle * 571 mlx5_action_handle_create(struct rte_eth_dev *dev, 572 const struct rte_flow_indir_action_conf *conf, 573 const struct rte_flow_action *action, 574 struct rte_flow_error *error); 575 static int mlx5_action_handle_destroy 576 (struct rte_eth_dev *dev, 577 struct rte_flow_action_handle *handle, 578 struct rte_flow_error *error); 579 static int mlx5_action_handle_update 580 (struct rte_eth_dev *dev, 581 struct rte_flow_action_handle *handle, 582 const void *update, 583 struct rte_flow_error *error); 584 static int mlx5_action_handle_query 585 (struct rte_eth_dev *dev, 586 const struct rte_flow_action_handle *handle, 587 void *data, 588 struct rte_flow_error *error); 589 static int 590 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 591 struct rte_flow_tunnel *app_tunnel, 592 struct rte_flow_action **actions, 593 uint32_t *num_of_actions, 594 struct rte_flow_error *error); 595 static int 596 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 597 struct rte_flow_tunnel *app_tunnel, 598 struct rte_flow_item **items, 599 uint32_t *num_of_items, 600 struct rte_flow_error *error); 601 static int 602 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 603 struct rte_flow_item *pmd_items, 604 uint32_t num_items, struct rte_flow_error *err); 605 static int 606 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 607 struct rte_flow_action *pmd_actions, 608 uint32_t num_actions, 609 struct rte_flow_error *err); 610 static int 611 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 612 struct rte_mbuf *m, 613 struct rte_flow_restore_info *info, 614 struct rte_flow_error *err); 615 616 static const struct rte_flow_ops mlx5_flow_ops = { 617 .validate = mlx5_flow_validate, 618 .create = mlx5_flow_create, 619 .destroy = mlx5_flow_destroy, 620 .flush = mlx5_flow_flush, 621 .isolate = mlx5_flow_isolate, 622 .query = mlx5_flow_query, 623 .dev_dump = mlx5_flow_dev_dump, 624 .get_aged_flows = mlx5_flow_get_aged_flows, 625 .action_handle_create = mlx5_action_handle_create, 626 .action_handle_destroy = mlx5_action_handle_destroy, 627 .action_handle_update = mlx5_action_handle_update, 628 .action_handle_query = mlx5_action_handle_query, 629 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 630 .tunnel_match = mlx5_flow_tunnel_match, 631 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release, 632 .tunnel_item_release = mlx5_flow_tunnel_item_release, 633 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 634 }; 635 636 /* Tunnel information. */ 637 struct mlx5_flow_tunnel_info { 638 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 639 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 640 }; 641 642 static struct mlx5_flow_tunnel_info tunnels_info[] = { 643 { 644 .tunnel = MLX5_FLOW_LAYER_VXLAN, 645 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 646 }, 647 { 648 .tunnel = MLX5_FLOW_LAYER_GENEVE, 649 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 650 }, 651 { 652 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 653 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 654 }, 655 { 656 .tunnel = MLX5_FLOW_LAYER_GRE, 657 .ptype = RTE_PTYPE_TUNNEL_GRE, 658 }, 659 { 660 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 661 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 662 }, 663 { 664 .tunnel = MLX5_FLOW_LAYER_MPLS, 665 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 666 }, 667 { 668 .tunnel = MLX5_FLOW_LAYER_NVGRE, 669 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 670 }, 671 { 672 .tunnel = MLX5_FLOW_LAYER_IPIP, 673 .ptype = RTE_PTYPE_TUNNEL_IP, 674 }, 675 { 676 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 677 .ptype = RTE_PTYPE_TUNNEL_IP, 678 }, 679 { 680 .tunnel = MLX5_FLOW_LAYER_GTP, 681 .ptype = RTE_PTYPE_TUNNEL_GTPU, 682 }, 683 }; 684 685 686 687 /** 688 * Translate tag ID to register. 689 * 690 * @param[in] dev 691 * Pointer to the Ethernet device structure. 692 * @param[in] feature 693 * The feature that request the register. 694 * @param[in] id 695 * The request register ID. 696 * @param[out] error 697 * Error description in case of any. 698 * 699 * @return 700 * The request register on success, a negative errno 701 * value otherwise and rte_errno is set. 702 */ 703 int 704 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 705 enum mlx5_feature_name feature, 706 uint32_t id, 707 struct rte_flow_error *error) 708 { 709 struct mlx5_priv *priv = dev->data->dev_private; 710 struct mlx5_dev_config *config = &priv->config; 711 enum modify_reg start_reg; 712 bool skip_mtr_reg = false; 713 714 switch (feature) { 715 case MLX5_HAIRPIN_RX: 716 return REG_B; 717 case MLX5_HAIRPIN_TX: 718 return REG_A; 719 case MLX5_METADATA_RX: 720 switch (config->dv_xmeta_en) { 721 case MLX5_XMETA_MODE_LEGACY: 722 return REG_B; 723 case MLX5_XMETA_MODE_META16: 724 return REG_C_0; 725 case MLX5_XMETA_MODE_META32: 726 return REG_C_1; 727 } 728 break; 729 case MLX5_METADATA_TX: 730 return REG_A; 731 case MLX5_METADATA_FDB: 732 switch (config->dv_xmeta_en) { 733 case MLX5_XMETA_MODE_LEGACY: 734 return REG_NON; 735 case MLX5_XMETA_MODE_META16: 736 return REG_C_0; 737 case MLX5_XMETA_MODE_META32: 738 return REG_C_1; 739 } 740 break; 741 case MLX5_FLOW_MARK: 742 switch (config->dv_xmeta_en) { 743 case MLX5_XMETA_MODE_LEGACY: 744 return REG_NON; 745 case MLX5_XMETA_MODE_META16: 746 return REG_C_1; 747 case MLX5_XMETA_MODE_META32: 748 return REG_C_0; 749 } 750 break; 751 case MLX5_MTR_ID: 752 /* 753 * If meter color and meter id share one register, flow match 754 * should use the meter color register for match. 755 */ 756 if (priv->mtr_reg_share) 757 return priv->mtr_color_reg; 758 else 759 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 760 REG_C_3; 761 case MLX5_MTR_COLOR: 762 case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */ 763 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 764 return priv->mtr_color_reg; 765 case MLX5_COPY_MARK: 766 /* 767 * Metadata COPY_MARK register using is in meter suffix sub 768 * flow while with meter. It's safe to share the same register. 769 */ 770 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 771 case MLX5_APP_TAG: 772 /* 773 * If meter is enable, it will engage the register for color 774 * match and flow match. If meter color match is not using the 775 * REG_C_2, need to skip the REG_C_x be used by meter color 776 * match. 777 * If meter is disable, free to use all available registers. 778 */ 779 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 780 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 781 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 782 if (id > (uint32_t)(REG_C_7 - start_reg)) 783 return rte_flow_error_set(error, EINVAL, 784 RTE_FLOW_ERROR_TYPE_ITEM, 785 NULL, "invalid tag id"); 786 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 787 return rte_flow_error_set(error, ENOTSUP, 788 RTE_FLOW_ERROR_TYPE_ITEM, 789 NULL, "unsupported tag id"); 790 /* 791 * This case means meter is using the REG_C_x great than 2. 792 * Take care not to conflict with meter color REG_C_x. 793 * If the available index REG_C_y >= REG_C_x, skip the 794 * color register. 795 */ 796 if (skip_mtr_reg && config->flow_mreg_c 797 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 798 if (id >= (uint32_t)(REG_C_7 - start_reg)) 799 return rte_flow_error_set(error, EINVAL, 800 RTE_FLOW_ERROR_TYPE_ITEM, 801 NULL, "invalid tag id"); 802 if (config->flow_mreg_c 803 [id + 1 + start_reg - REG_C_0] != REG_NON) 804 return config->flow_mreg_c 805 [id + 1 + start_reg - REG_C_0]; 806 return rte_flow_error_set(error, ENOTSUP, 807 RTE_FLOW_ERROR_TYPE_ITEM, 808 NULL, "unsupported tag id"); 809 } 810 return config->flow_mreg_c[id + start_reg - REG_C_0]; 811 } 812 MLX5_ASSERT(false); 813 return rte_flow_error_set(error, EINVAL, 814 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 815 NULL, "invalid feature name"); 816 } 817 818 /** 819 * Check extensive flow metadata register support. 820 * 821 * @param dev 822 * Pointer to rte_eth_dev structure. 823 * 824 * @return 825 * True if device supports extensive flow metadata register, otherwise false. 826 */ 827 bool 828 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 829 { 830 struct mlx5_priv *priv = dev->data->dev_private; 831 struct mlx5_dev_config *config = &priv->config; 832 833 /* 834 * Having available reg_c can be regarded inclusively as supporting 835 * extensive flow metadata register, which could mean, 836 * - metadata register copy action by modify header. 837 * - 16 modify header actions is supported. 838 * - reg_c's are preserved across different domain (FDB and NIC) on 839 * packet loopback by flow lookup miss. 840 */ 841 return config->flow_mreg_c[2] != REG_NON; 842 } 843 844 /** 845 * Get the lowest priority. 846 * 847 * @param[in] dev 848 * Pointer to the Ethernet device structure. 849 * @param[in] attributes 850 * Pointer to device flow rule attributes. 851 * 852 * @return 853 * The value of lowest priority of flow. 854 */ 855 uint32_t 856 mlx5_get_lowest_priority(struct rte_eth_dev *dev, 857 const struct rte_flow_attr *attr) 858 { 859 struct mlx5_priv *priv = dev->data->dev_private; 860 861 if (!attr->group && !attr->transfer) 862 return priv->config.flow_prio - 2; 863 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1; 864 } 865 866 /** 867 * Calculate matcher priority of the flow. 868 * 869 * @param[in] dev 870 * Pointer to the Ethernet device structure. 871 * @param[in] attr 872 * Pointer to device flow rule attributes. 873 * @param[in] subpriority 874 * The priority based on the items. 875 * @return 876 * The matcher priority of the flow. 877 */ 878 uint16_t 879 mlx5_get_matcher_priority(struct rte_eth_dev *dev, 880 const struct rte_flow_attr *attr, 881 uint32_t subpriority) 882 { 883 uint16_t priority = (uint16_t)attr->priority; 884 struct mlx5_priv *priv = dev->data->dev_private; 885 886 if (!attr->group && !attr->transfer) { 887 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 888 priority = priv->config.flow_prio - 1; 889 return mlx5_os_flow_adjust_priority(dev, priority, subpriority); 890 } 891 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 892 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO; 893 return priority * 3 + subpriority; 894 } 895 896 /** 897 * Verify the @p item specifications (spec, last, mask) are compatible with the 898 * NIC capabilities. 899 * 900 * @param[in] item 901 * Item specification. 902 * @param[in] mask 903 * @p item->mask or flow default bit-masks. 904 * @param[in] nic_mask 905 * Bit-masks covering supported fields by the NIC to compare with user mask. 906 * @param[in] size 907 * Bit-masks size in bytes. 908 * @param[in] range_accepted 909 * True if range of values is accepted for specific fields, false otherwise. 910 * @param[out] error 911 * Pointer to error structure. 912 * 913 * @return 914 * 0 on success, a negative errno value otherwise and rte_errno is set. 915 */ 916 int 917 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 918 const uint8_t *mask, 919 const uint8_t *nic_mask, 920 unsigned int size, 921 bool range_accepted, 922 struct rte_flow_error *error) 923 { 924 unsigned int i; 925 926 MLX5_ASSERT(nic_mask); 927 for (i = 0; i < size; ++i) 928 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 929 return rte_flow_error_set(error, ENOTSUP, 930 RTE_FLOW_ERROR_TYPE_ITEM, 931 item, 932 "mask enables non supported" 933 " bits"); 934 if (!item->spec && (item->mask || item->last)) 935 return rte_flow_error_set(error, EINVAL, 936 RTE_FLOW_ERROR_TYPE_ITEM, item, 937 "mask/last without a spec is not" 938 " supported"); 939 if (item->spec && item->last && !range_accepted) { 940 uint8_t spec[size]; 941 uint8_t last[size]; 942 unsigned int i; 943 int ret; 944 945 for (i = 0; i < size; ++i) { 946 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 947 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 948 } 949 ret = memcmp(spec, last, size); 950 if (ret != 0) 951 return rte_flow_error_set(error, EINVAL, 952 RTE_FLOW_ERROR_TYPE_ITEM, 953 item, 954 "range is not valid"); 955 } 956 return 0; 957 } 958 959 /** 960 * Adjust the hash fields according to the @p flow information. 961 * 962 * @param[in] dev_flow. 963 * Pointer to the mlx5_flow. 964 * @param[in] tunnel 965 * 1 when the hash field is for a tunnel item. 966 * @param[in] layer_types 967 * ETH_RSS_* types. 968 * @param[in] hash_fields 969 * Item hash fields. 970 * 971 * @return 972 * The hash fields that should be used. 973 */ 974 uint64_t 975 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 976 int tunnel __rte_unused, uint64_t layer_types, 977 uint64_t hash_fields) 978 { 979 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 980 int rss_request_inner = rss_desc->level >= 2; 981 982 /* Check RSS hash level for tunnel. */ 983 if (tunnel && rss_request_inner) 984 hash_fields |= IBV_RX_HASH_INNER; 985 else if (tunnel || rss_request_inner) 986 return 0; 987 #endif 988 /* Check if requested layer matches RSS hash fields. */ 989 if (!(rss_desc->types & layer_types)) 990 return 0; 991 return hash_fields; 992 } 993 994 /** 995 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 996 * if several tunnel rules are used on this queue, the tunnel ptype will be 997 * cleared. 998 * 999 * @param rxq_ctrl 1000 * Rx queue to update. 1001 */ 1002 static void 1003 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1004 { 1005 unsigned int i; 1006 uint32_t tunnel_ptype = 0; 1007 1008 /* Look up for the ptype to use. */ 1009 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1010 if (!rxq_ctrl->flow_tunnels_n[i]) 1011 continue; 1012 if (!tunnel_ptype) { 1013 tunnel_ptype = tunnels_info[i].ptype; 1014 } else { 1015 tunnel_ptype = 0; 1016 break; 1017 } 1018 } 1019 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1020 } 1021 1022 /** 1023 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1024 * flow. 1025 * 1026 * @param[in] dev 1027 * Pointer to the Ethernet device structure. 1028 * @param[in] dev_handle 1029 * Pointer to device flow handle structure. 1030 */ 1031 void 1032 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1033 struct mlx5_flow_handle *dev_handle) 1034 { 1035 struct mlx5_priv *priv = dev->data->dev_private; 1036 const int mark = dev_handle->mark; 1037 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1038 struct mlx5_ind_table_obj *ind_tbl = NULL; 1039 unsigned int i; 1040 1041 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1042 struct mlx5_hrxq *hrxq; 1043 1044 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1045 dev_handle->rix_hrxq); 1046 if (hrxq) 1047 ind_tbl = hrxq->ind_table; 1048 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1049 struct mlx5_shared_action_rss *shared_rss; 1050 1051 shared_rss = mlx5_ipool_get 1052 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1053 dev_handle->rix_srss); 1054 if (shared_rss) 1055 ind_tbl = shared_rss->ind_tbl; 1056 } 1057 if (!ind_tbl) 1058 return; 1059 for (i = 0; i != ind_tbl->queues_n; ++i) { 1060 int idx = ind_tbl->queues[i]; 1061 struct mlx5_rxq_ctrl *rxq_ctrl = 1062 container_of((*priv->rxqs)[idx], 1063 struct mlx5_rxq_ctrl, rxq); 1064 1065 /* 1066 * To support metadata register copy on Tx loopback, 1067 * this must be always enabled (metadata may arive 1068 * from other port - not from local flows only. 1069 */ 1070 if (priv->config.dv_flow_en && 1071 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1072 mlx5_flow_ext_mreg_supported(dev)) { 1073 rxq_ctrl->rxq.mark = 1; 1074 rxq_ctrl->flow_mark_n = 1; 1075 } else if (mark) { 1076 rxq_ctrl->rxq.mark = 1; 1077 rxq_ctrl->flow_mark_n++; 1078 } 1079 if (tunnel) { 1080 unsigned int j; 1081 1082 /* Increase the counter matching the flow. */ 1083 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1084 if ((tunnels_info[j].tunnel & 1085 dev_handle->layers) == 1086 tunnels_info[j].tunnel) { 1087 rxq_ctrl->flow_tunnels_n[j]++; 1088 break; 1089 } 1090 } 1091 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1092 } 1093 } 1094 } 1095 1096 /** 1097 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1098 * 1099 * @param[in] dev 1100 * Pointer to the Ethernet device structure. 1101 * @param[in] flow 1102 * Pointer to flow structure. 1103 */ 1104 static void 1105 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1106 { 1107 struct mlx5_priv *priv = dev->data->dev_private; 1108 uint32_t handle_idx; 1109 struct mlx5_flow_handle *dev_handle; 1110 1111 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1112 handle_idx, dev_handle, next) 1113 flow_drv_rxq_flags_set(dev, dev_handle); 1114 } 1115 1116 /** 1117 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1118 * device flow if no other flow uses it with the same kind of request. 1119 * 1120 * @param dev 1121 * Pointer to Ethernet device. 1122 * @param[in] dev_handle 1123 * Pointer to the device flow handle structure. 1124 */ 1125 static void 1126 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1127 struct mlx5_flow_handle *dev_handle) 1128 { 1129 struct mlx5_priv *priv = dev->data->dev_private; 1130 const int mark = dev_handle->mark; 1131 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1132 struct mlx5_ind_table_obj *ind_tbl = NULL; 1133 unsigned int i; 1134 1135 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1136 struct mlx5_hrxq *hrxq; 1137 1138 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1139 dev_handle->rix_hrxq); 1140 if (hrxq) 1141 ind_tbl = hrxq->ind_table; 1142 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1143 struct mlx5_shared_action_rss *shared_rss; 1144 1145 shared_rss = mlx5_ipool_get 1146 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1147 dev_handle->rix_srss); 1148 if (shared_rss) 1149 ind_tbl = shared_rss->ind_tbl; 1150 } 1151 if (!ind_tbl) 1152 return; 1153 MLX5_ASSERT(dev->data->dev_started); 1154 for (i = 0; i != ind_tbl->queues_n; ++i) { 1155 int idx = ind_tbl->queues[i]; 1156 struct mlx5_rxq_ctrl *rxq_ctrl = 1157 container_of((*priv->rxqs)[idx], 1158 struct mlx5_rxq_ctrl, rxq); 1159 1160 if (priv->config.dv_flow_en && 1161 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1162 mlx5_flow_ext_mreg_supported(dev)) { 1163 rxq_ctrl->rxq.mark = 1; 1164 rxq_ctrl->flow_mark_n = 1; 1165 } else if (mark) { 1166 rxq_ctrl->flow_mark_n--; 1167 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1168 } 1169 if (tunnel) { 1170 unsigned int j; 1171 1172 /* Decrease the counter matching the flow. */ 1173 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1174 if ((tunnels_info[j].tunnel & 1175 dev_handle->layers) == 1176 tunnels_info[j].tunnel) { 1177 rxq_ctrl->flow_tunnels_n[j]--; 1178 break; 1179 } 1180 } 1181 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1182 } 1183 } 1184 } 1185 1186 /** 1187 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1188 * @p flow if no other flow uses it with the same kind of request. 1189 * 1190 * @param dev 1191 * Pointer to Ethernet device. 1192 * @param[in] flow 1193 * Pointer to the flow. 1194 */ 1195 static void 1196 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1197 { 1198 struct mlx5_priv *priv = dev->data->dev_private; 1199 uint32_t handle_idx; 1200 struct mlx5_flow_handle *dev_handle; 1201 1202 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1203 handle_idx, dev_handle, next) 1204 flow_drv_rxq_flags_trim(dev, dev_handle); 1205 } 1206 1207 /** 1208 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1209 * 1210 * @param dev 1211 * Pointer to Ethernet device. 1212 */ 1213 static void 1214 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1215 { 1216 struct mlx5_priv *priv = dev->data->dev_private; 1217 unsigned int i; 1218 1219 for (i = 0; i != priv->rxqs_n; ++i) { 1220 struct mlx5_rxq_ctrl *rxq_ctrl; 1221 unsigned int j; 1222 1223 if (!(*priv->rxqs)[i]) 1224 continue; 1225 rxq_ctrl = container_of((*priv->rxqs)[i], 1226 struct mlx5_rxq_ctrl, rxq); 1227 rxq_ctrl->flow_mark_n = 0; 1228 rxq_ctrl->rxq.mark = 0; 1229 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1230 rxq_ctrl->flow_tunnels_n[j] = 0; 1231 rxq_ctrl->rxq.tunnel = 0; 1232 } 1233 } 1234 1235 /** 1236 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1237 * 1238 * @param[in] dev 1239 * Pointer to the Ethernet device structure. 1240 */ 1241 void 1242 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1243 { 1244 struct mlx5_priv *priv = dev->data->dev_private; 1245 struct mlx5_rxq_data *data; 1246 unsigned int i; 1247 1248 for (i = 0; i != priv->rxqs_n; ++i) { 1249 if (!(*priv->rxqs)[i]) 1250 continue; 1251 data = (*priv->rxqs)[i]; 1252 if (!rte_flow_dynf_metadata_avail()) { 1253 data->dynf_meta = 0; 1254 data->flow_meta_mask = 0; 1255 data->flow_meta_offset = -1; 1256 data->flow_meta_port_mask = 0; 1257 } else { 1258 data->dynf_meta = 1; 1259 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1260 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1261 data->flow_meta_port_mask = (uint32_t)~0; 1262 if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16) 1263 data->flow_meta_port_mask >>= 16; 1264 } 1265 } 1266 } 1267 1268 /* 1269 * return a pointer to the desired action in the list of actions. 1270 * 1271 * @param[in] actions 1272 * The list of actions to search the action in. 1273 * @param[in] action 1274 * The action to find. 1275 * 1276 * @return 1277 * Pointer to the action in the list, if found. NULL otherwise. 1278 */ 1279 const struct rte_flow_action * 1280 mlx5_flow_find_action(const struct rte_flow_action *actions, 1281 enum rte_flow_action_type action) 1282 { 1283 if (actions == NULL) 1284 return NULL; 1285 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1286 if (actions->type == action) 1287 return actions; 1288 return NULL; 1289 } 1290 1291 /* 1292 * Validate the flag action. 1293 * 1294 * @param[in] action_flags 1295 * Bit-fields that holds the actions detected until now. 1296 * @param[in] attr 1297 * Attributes of flow that includes this action. 1298 * @param[out] error 1299 * Pointer to error structure. 1300 * 1301 * @return 1302 * 0 on success, a negative errno value otherwise and rte_errno is set. 1303 */ 1304 int 1305 mlx5_flow_validate_action_flag(uint64_t action_flags, 1306 const struct rte_flow_attr *attr, 1307 struct rte_flow_error *error) 1308 { 1309 if (action_flags & MLX5_FLOW_ACTION_MARK) 1310 return rte_flow_error_set(error, EINVAL, 1311 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1312 "can't mark and flag in same flow"); 1313 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1314 return rte_flow_error_set(error, EINVAL, 1315 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1316 "can't have 2 flag" 1317 " actions in same flow"); 1318 if (attr->egress) 1319 return rte_flow_error_set(error, ENOTSUP, 1320 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1321 "flag action not supported for " 1322 "egress"); 1323 return 0; 1324 } 1325 1326 /* 1327 * Validate the mark action. 1328 * 1329 * @param[in] action 1330 * Pointer to the queue action. 1331 * @param[in] action_flags 1332 * Bit-fields that holds the actions detected until now. 1333 * @param[in] attr 1334 * Attributes of flow that includes this action. 1335 * @param[out] error 1336 * Pointer to error structure. 1337 * 1338 * @return 1339 * 0 on success, a negative errno value otherwise and rte_errno is set. 1340 */ 1341 int 1342 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1343 uint64_t action_flags, 1344 const struct rte_flow_attr *attr, 1345 struct rte_flow_error *error) 1346 { 1347 const struct rte_flow_action_mark *mark = action->conf; 1348 1349 if (!mark) 1350 return rte_flow_error_set(error, EINVAL, 1351 RTE_FLOW_ERROR_TYPE_ACTION, 1352 action, 1353 "configuration cannot be null"); 1354 if (mark->id >= MLX5_FLOW_MARK_MAX) 1355 return rte_flow_error_set(error, EINVAL, 1356 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1357 &mark->id, 1358 "mark id must in 0 <= id < " 1359 RTE_STR(MLX5_FLOW_MARK_MAX)); 1360 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1361 return rte_flow_error_set(error, EINVAL, 1362 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1363 "can't flag and mark in same flow"); 1364 if (action_flags & MLX5_FLOW_ACTION_MARK) 1365 return rte_flow_error_set(error, EINVAL, 1366 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1367 "can't have 2 mark actions in same" 1368 " flow"); 1369 if (attr->egress) 1370 return rte_flow_error_set(error, ENOTSUP, 1371 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1372 "mark action not supported for " 1373 "egress"); 1374 return 0; 1375 } 1376 1377 /* 1378 * Validate the drop action. 1379 * 1380 * @param[in] action_flags 1381 * Bit-fields that holds the actions detected until now. 1382 * @param[in] attr 1383 * Attributes of flow that includes this action. 1384 * @param[out] error 1385 * Pointer to error structure. 1386 * 1387 * @return 1388 * 0 on success, a negative errno value otherwise and rte_errno is set. 1389 */ 1390 int 1391 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1392 const struct rte_flow_attr *attr, 1393 struct rte_flow_error *error) 1394 { 1395 if (attr->egress) 1396 return rte_flow_error_set(error, ENOTSUP, 1397 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1398 "drop action not supported for " 1399 "egress"); 1400 return 0; 1401 } 1402 1403 /* 1404 * Validate the queue action. 1405 * 1406 * @param[in] action 1407 * Pointer to the queue action. 1408 * @param[in] action_flags 1409 * Bit-fields that holds the actions detected until now. 1410 * @param[in] dev 1411 * Pointer to the Ethernet device structure. 1412 * @param[in] attr 1413 * Attributes of flow that includes this action. 1414 * @param[out] error 1415 * Pointer to error structure. 1416 * 1417 * @return 1418 * 0 on success, a negative errno value otherwise and rte_errno is set. 1419 */ 1420 int 1421 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1422 uint64_t action_flags, 1423 struct rte_eth_dev *dev, 1424 const struct rte_flow_attr *attr, 1425 struct rte_flow_error *error) 1426 { 1427 struct mlx5_priv *priv = dev->data->dev_private; 1428 const struct rte_flow_action_queue *queue = action->conf; 1429 1430 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1431 return rte_flow_error_set(error, EINVAL, 1432 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1433 "can't have 2 fate actions in" 1434 " same flow"); 1435 if (!priv->rxqs_n) 1436 return rte_flow_error_set(error, EINVAL, 1437 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1438 NULL, "No Rx queues configured"); 1439 if (queue->index >= priv->rxqs_n) 1440 return rte_flow_error_set(error, EINVAL, 1441 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1442 &queue->index, 1443 "queue index out of range"); 1444 if (!(*priv->rxqs)[queue->index]) 1445 return rte_flow_error_set(error, EINVAL, 1446 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1447 &queue->index, 1448 "queue is not configured"); 1449 if (attr->egress) 1450 return rte_flow_error_set(error, ENOTSUP, 1451 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1452 "queue action not supported for " 1453 "egress"); 1454 return 0; 1455 } 1456 1457 /* 1458 * Validate the rss action. 1459 * 1460 * @param[in] dev 1461 * Pointer to the Ethernet device structure. 1462 * @param[in] action 1463 * Pointer to the queue action. 1464 * @param[out] error 1465 * Pointer to error structure. 1466 * 1467 * @return 1468 * 0 on success, a negative errno value otherwise and rte_errno is set. 1469 */ 1470 int 1471 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1472 const struct rte_flow_action *action, 1473 struct rte_flow_error *error) 1474 { 1475 struct mlx5_priv *priv = dev->data->dev_private; 1476 const struct rte_flow_action_rss *rss = action->conf; 1477 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; 1478 unsigned int i; 1479 1480 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1481 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1482 return rte_flow_error_set(error, ENOTSUP, 1483 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1484 &rss->func, 1485 "RSS hash function not supported"); 1486 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1487 if (rss->level > 2) 1488 #else 1489 if (rss->level > 1) 1490 #endif 1491 return rte_flow_error_set(error, ENOTSUP, 1492 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1493 &rss->level, 1494 "tunnel RSS is not supported"); 1495 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1496 if (rss->key_len == 0 && rss->key != NULL) 1497 return rte_flow_error_set(error, ENOTSUP, 1498 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1499 &rss->key_len, 1500 "RSS hash key length 0"); 1501 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1502 return rte_flow_error_set(error, ENOTSUP, 1503 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1504 &rss->key_len, 1505 "RSS hash key too small"); 1506 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1507 return rte_flow_error_set(error, ENOTSUP, 1508 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1509 &rss->key_len, 1510 "RSS hash key too large"); 1511 if (rss->queue_num > priv->config.ind_table_max_size) 1512 return rte_flow_error_set(error, ENOTSUP, 1513 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1514 &rss->queue_num, 1515 "number of queues too large"); 1516 if (rss->types & MLX5_RSS_HF_MASK) 1517 return rte_flow_error_set(error, ENOTSUP, 1518 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1519 &rss->types, 1520 "some RSS protocols are not" 1521 " supported"); 1522 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) && 1523 !(rss->types & ETH_RSS_IP)) 1524 return rte_flow_error_set(error, EINVAL, 1525 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1526 "L3 partial RSS requested but L3 RSS" 1527 " type not specified"); 1528 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) && 1529 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP))) 1530 return rte_flow_error_set(error, EINVAL, 1531 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1532 "L4 partial RSS requested but L4 RSS" 1533 " type not specified"); 1534 if (!priv->rxqs_n) 1535 return rte_flow_error_set(error, EINVAL, 1536 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1537 NULL, "No Rx queues configured"); 1538 if (!rss->queue_num) 1539 return rte_flow_error_set(error, EINVAL, 1540 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1541 NULL, "No queues configured"); 1542 for (i = 0; i != rss->queue_num; ++i) { 1543 struct mlx5_rxq_ctrl *rxq_ctrl; 1544 1545 if (rss->queue[i] >= priv->rxqs_n) 1546 return rte_flow_error_set 1547 (error, EINVAL, 1548 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1549 &rss->queue[i], "queue index out of range"); 1550 if (!(*priv->rxqs)[rss->queue[i]]) 1551 return rte_flow_error_set 1552 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1553 &rss->queue[i], "queue is not configured"); 1554 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]], 1555 struct mlx5_rxq_ctrl, rxq); 1556 if (i == 0) 1557 rxq_type = rxq_ctrl->type; 1558 if (rxq_type != rxq_ctrl->type) 1559 return rte_flow_error_set 1560 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1561 &rss->queue[i], 1562 "combining hairpin and regular RSS queues is not supported"); 1563 } 1564 return 0; 1565 } 1566 1567 /* 1568 * Validate the rss action. 1569 * 1570 * @param[in] action 1571 * Pointer to the queue action. 1572 * @param[in] action_flags 1573 * Bit-fields that holds the actions detected until now. 1574 * @param[in] dev 1575 * Pointer to the Ethernet device structure. 1576 * @param[in] attr 1577 * Attributes of flow that includes this action. 1578 * @param[in] item_flags 1579 * Items that were detected. 1580 * @param[out] error 1581 * Pointer to error structure. 1582 * 1583 * @return 1584 * 0 on success, a negative errno value otherwise and rte_errno is set. 1585 */ 1586 int 1587 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1588 uint64_t action_flags, 1589 struct rte_eth_dev *dev, 1590 const struct rte_flow_attr *attr, 1591 uint64_t item_flags, 1592 struct rte_flow_error *error) 1593 { 1594 const struct rte_flow_action_rss *rss = action->conf; 1595 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1596 int ret; 1597 1598 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1599 return rte_flow_error_set(error, EINVAL, 1600 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1601 "can't have 2 fate actions" 1602 " in same flow"); 1603 ret = mlx5_validate_action_rss(dev, action, error); 1604 if (ret) 1605 return ret; 1606 if (attr->egress) 1607 return rte_flow_error_set(error, ENOTSUP, 1608 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1609 "rss action not supported for " 1610 "egress"); 1611 if (rss->level > 1 && !tunnel) 1612 return rte_flow_error_set(error, EINVAL, 1613 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1614 "inner RSS is not supported for " 1615 "non-tunnel flows"); 1616 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1617 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1618 return rte_flow_error_set(error, EINVAL, 1619 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1620 "RSS on eCPRI is not supported now"); 1621 } 1622 return 0; 1623 } 1624 1625 /* 1626 * Validate the default miss action. 1627 * 1628 * @param[in] action_flags 1629 * Bit-fields that holds the actions detected until now. 1630 * @param[out] error 1631 * Pointer to error structure. 1632 * 1633 * @return 1634 * 0 on success, a negative errno value otherwise and rte_errno is set. 1635 */ 1636 int 1637 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1638 const struct rte_flow_attr *attr, 1639 struct rte_flow_error *error) 1640 { 1641 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1642 return rte_flow_error_set(error, EINVAL, 1643 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1644 "can't have 2 fate actions in" 1645 " same flow"); 1646 if (attr->egress) 1647 return rte_flow_error_set(error, ENOTSUP, 1648 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1649 "default miss action not supported " 1650 "for egress"); 1651 if (attr->group) 1652 return rte_flow_error_set(error, ENOTSUP, 1653 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1654 "only group 0 is supported"); 1655 if (attr->transfer) 1656 return rte_flow_error_set(error, ENOTSUP, 1657 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1658 NULL, "transfer is not supported"); 1659 return 0; 1660 } 1661 1662 /* 1663 * Validate the count action. 1664 * 1665 * @param[in] dev 1666 * Pointer to the Ethernet device structure. 1667 * @param[in] attr 1668 * Attributes of flow that includes this action. 1669 * @param[out] error 1670 * Pointer to error structure. 1671 * 1672 * @return 1673 * 0 on success, a negative errno value otherwise and rte_errno is set. 1674 */ 1675 int 1676 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1677 const struct rte_flow_attr *attr, 1678 struct rte_flow_error *error) 1679 { 1680 if (attr->egress) 1681 return rte_flow_error_set(error, ENOTSUP, 1682 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1683 "count action not supported for " 1684 "egress"); 1685 return 0; 1686 } 1687 1688 /** 1689 * Verify the @p attributes will be correctly understood by the NIC and store 1690 * them in the @p flow if everything is correct. 1691 * 1692 * @param[in] dev 1693 * Pointer to the Ethernet device structure. 1694 * @param[in] attributes 1695 * Pointer to flow attributes 1696 * @param[out] error 1697 * Pointer to error structure. 1698 * 1699 * @return 1700 * 0 on success, a negative errno value otherwise and rte_errno is set. 1701 */ 1702 int 1703 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1704 const struct rte_flow_attr *attributes, 1705 struct rte_flow_error *error) 1706 { 1707 struct mlx5_priv *priv = dev->data->dev_private; 1708 uint32_t priority_max = priv->config.flow_prio - 1; 1709 1710 if (attributes->group) 1711 return rte_flow_error_set(error, ENOTSUP, 1712 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1713 NULL, "groups is not supported"); 1714 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR && 1715 attributes->priority >= priority_max) 1716 return rte_flow_error_set(error, ENOTSUP, 1717 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1718 NULL, "priority out of range"); 1719 if (attributes->egress) 1720 return rte_flow_error_set(error, ENOTSUP, 1721 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1722 "egress is not supported"); 1723 if (attributes->transfer && !priv->config.dv_esw_en) 1724 return rte_flow_error_set(error, ENOTSUP, 1725 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1726 NULL, "transfer is not supported"); 1727 if (!attributes->ingress) 1728 return rte_flow_error_set(error, EINVAL, 1729 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1730 NULL, 1731 "ingress attribute is mandatory"); 1732 return 0; 1733 } 1734 1735 /** 1736 * Validate ICMP6 item. 1737 * 1738 * @param[in] item 1739 * Item specification. 1740 * @param[in] item_flags 1741 * Bit-fields that holds the items detected until now. 1742 * @param[in] ext_vlan_sup 1743 * Whether extended VLAN features are supported or not. 1744 * @param[out] error 1745 * Pointer to error structure. 1746 * 1747 * @return 1748 * 0 on success, a negative errno value otherwise and rte_errno is set. 1749 */ 1750 int 1751 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1752 uint64_t item_flags, 1753 uint8_t target_protocol, 1754 struct rte_flow_error *error) 1755 { 1756 const struct rte_flow_item_icmp6 *mask = item->mask; 1757 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1758 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1759 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1760 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1761 MLX5_FLOW_LAYER_OUTER_L4; 1762 int ret; 1763 1764 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1765 return rte_flow_error_set(error, EINVAL, 1766 RTE_FLOW_ERROR_TYPE_ITEM, item, 1767 "protocol filtering not compatible" 1768 " with ICMP6 layer"); 1769 if (!(item_flags & l3m)) 1770 return rte_flow_error_set(error, EINVAL, 1771 RTE_FLOW_ERROR_TYPE_ITEM, item, 1772 "IPv6 is mandatory to filter on" 1773 " ICMP6"); 1774 if (item_flags & l4m) 1775 return rte_flow_error_set(error, EINVAL, 1776 RTE_FLOW_ERROR_TYPE_ITEM, item, 1777 "multiple L4 layers not supported"); 1778 if (!mask) 1779 mask = &rte_flow_item_icmp6_mask; 1780 ret = mlx5_flow_item_acceptable 1781 (item, (const uint8_t *)mask, 1782 (const uint8_t *)&rte_flow_item_icmp6_mask, 1783 sizeof(struct rte_flow_item_icmp6), 1784 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1785 if (ret < 0) 1786 return ret; 1787 return 0; 1788 } 1789 1790 /** 1791 * Validate ICMP item. 1792 * 1793 * @param[in] item 1794 * Item specification. 1795 * @param[in] item_flags 1796 * Bit-fields that holds the items detected until now. 1797 * @param[out] error 1798 * Pointer to error structure. 1799 * 1800 * @return 1801 * 0 on success, a negative errno value otherwise and rte_errno is set. 1802 */ 1803 int 1804 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1805 uint64_t item_flags, 1806 uint8_t target_protocol, 1807 struct rte_flow_error *error) 1808 { 1809 const struct rte_flow_item_icmp *mask = item->mask; 1810 const struct rte_flow_item_icmp nic_mask = { 1811 .hdr.icmp_type = 0xff, 1812 .hdr.icmp_code = 0xff, 1813 .hdr.icmp_ident = RTE_BE16(0xffff), 1814 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 1815 }; 1816 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1817 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1818 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1819 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1820 MLX5_FLOW_LAYER_OUTER_L4; 1821 int ret; 1822 1823 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1824 return rte_flow_error_set(error, EINVAL, 1825 RTE_FLOW_ERROR_TYPE_ITEM, item, 1826 "protocol filtering not compatible" 1827 " with ICMP layer"); 1828 if (!(item_flags & l3m)) 1829 return rte_flow_error_set(error, EINVAL, 1830 RTE_FLOW_ERROR_TYPE_ITEM, item, 1831 "IPv4 is mandatory to filter" 1832 " on ICMP"); 1833 if (item_flags & l4m) 1834 return rte_flow_error_set(error, EINVAL, 1835 RTE_FLOW_ERROR_TYPE_ITEM, item, 1836 "multiple L4 layers not supported"); 1837 if (!mask) 1838 mask = &nic_mask; 1839 ret = mlx5_flow_item_acceptable 1840 (item, (const uint8_t *)mask, 1841 (const uint8_t *)&nic_mask, 1842 sizeof(struct rte_flow_item_icmp), 1843 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1844 if (ret < 0) 1845 return ret; 1846 return 0; 1847 } 1848 1849 /** 1850 * Validate Ethernet item. 1851 * 1852 * @param[in] item 1853 * Item specification. 1854 * @param[in] item_flags 1855 * Bit-fields that holds the items detected until now. 1856 * @param[out] error 1857 * Pointer to error structure. 1858 * 1859 * @return 1860 * 0 on success, a negative errno value otherwise and rte_errno is set. 1861 */ 1862 int 1863 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1864 uint64_t item_flags, bool ext_vlan_sup, 1865 struct rte_flow_error *error) 1866 { 1867 const struct rte_flow_item_eth *mask = item->mask; 1868 const struct rte_flow_item_eth nic_mask = { 1869 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1870 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1871 .type = RTE_BE16(0xffff), 1872 .has_vlan = ext_vlan_sup ? 1 : 0, 1873 }; 1874 int ret; 1875 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1876 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1877 MLX5_FLOW_LAYER_OUTER_L2; 1878 1879 if (item_flags & ethm) 1880 return rte_flow_error_set(error, ENOTSUP, 1881 RTE_FLOW_ERROR_TYPE_ITEM, item, 1882 "multiple L2 layers not supported"); 1883 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1884 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1885 return rte_flow_error_set(error, EINVAL, 1886 RTE_FLOW_ERROR_TYPE_ITEM, item, 1887 "L2 layer should not follow " 1888 "L3 layers"); 1889 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1890 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1891 return rte_flow_error_set(error, EINVAL, 1892 RTE_FLOW_ERROR_TYPE_ITEM, item, 1893 "L2 layer should not follow VLAN"); 1894 if (!mask) 1895 mask = &rte_flow_item_eth_mask; 1896 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1897 (const uint8_t *)&nic_mask, 1898 sizeof(struct rte_flow_item_eth), 1899 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1900 return ret; 1901 } 1902 1903 /** 1904 * Validate VLAN item. 1905 * 1906 * @param[in] item 1907 * Item specification. 1908 * @param[in] item_flags 1909 * Bit-fields that holds the items detected until now. 1910 * @param[in] dev 1911 * Ethernet device flow is being created on. 1912 * @param[out] error 1913 * Pointer to error structure. 1914 * 1915 * @return 1916 * 0 on success, a negative errno value otherwise and rte_errno is set. 1917 */ 1918 int 1919 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 1920 uint64_t item_flags, 1921 struct rte_eth_dev *dev, 1922 struct rte_flow_error *error) 1923 { 1924 const struct rte_flow_item_vlan *spec = item->spec; 1925 const struct rte_flow_item_vlan *mask = item->mask; 1926 const struct rte_flow_item_vlan nic_mask = { 1927 .tci = RTE_BE16(UINT16_MAX), 1928 .inner_type = RTE_BE16(UINT16_MAX), 1929 }; 1930 uint16_t vlan_tag = 0; 1931 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1932 int ret; 1933 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 1934 MLX5_FLOW_LAYER_INNER_L4) : 1935 (MLX5_FLOW_LAYER_OUTER_L3 | 1936 MLX5_FLOW_LAYER_OUTER_L4); 1937 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 1938 MLX5_FLOW_LAYER_OUTER_VLAN; 1939 1940 if (item_flags & vlanm) 1941 return rte_flow_error_set(error, EINVAL, 1942 RTE_FLOW_ERROR_TYPE_ITEM, item, 1943 "multiple VLAN layers not supported"); 1944 else if ((item_flags & l34m) != 0) 1945 return rte_flow_error_set(error, EINVAL, 1946 RTE_FLOW_ERROR_TYPE_ITEM, item, 1947 "VLAN cannot follow L3/L4 layer"); 1948 if (!mask) 1949 mask = &rte_flow_item_vlan_mask; 1950 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1951 (const uint8_t *)&nic_mask, 1952 sizeof(struct rte_flow_item_vlan), 1953 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1954 if (ret) 1955 return ret; 1956 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 1957 struct mlx5_priv *priv = dev->data->dev_private; 1958 1959 if (priv->vmwa_context) { 1960 /* 1961 * Non-NULL context means we have a virtual machine 1962 * and SR-IOV enabled, we have to create VLAN interface 1963 * to make hypervisor to setup E-Switch vport 1964 * context correctly. We avoid creating the multiple 1965 * VLAN interfaces, so we cannot support VLAN tag mask. 1966 */ 1967 return rte_flow_error_set(error, EINVAL, 1968 RTE_FLOW_ERROR_TYPE_ITEM, 1969 item, 1970 "VLAN tag mask is not" 1971 " supported in virtual" 1972 " environment"); 1973 } 1974 } 1975 if (spec) { 1976 vlan_tag = spec->tci; 1977 vlan_tag &= mask->tci; 1978 } 1979 /* 1980 * From verbs perspective an empty VLAN is equivalent 1981 * to a packet without VLAN layer. 1982 */ 1983 if (!vlan_tag) 1984 return rte_flow_error_set(error, EINVAL, 1985 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 1986 item->spec, 1987 "VLAN cannot be empty"); 1988 return 0; 1989 } 1990 1991 /** 1992 * Validate IPV4 item. 1993 * 1994 * @param[in] item 1995 * Item specification. 1996 * @param[in] item_flags 1997 * Bit-fields that holds the items detected until now. 1998 * @param[in] last_item 1999 * Previous validated item in the pattern items. 2000 * @param[in] ether_type 2001 * Type in the ethernet layer header (including dot1q). 2002 * @param[in] acc_mask 2003 * Acceptable mask, if NULL default internal default mask 2004 * will be used to check whether item fields are supported. 2005 * @param[in] range_accepted 2006 * True if range of values is accepted for specific fields, false otherwise. 2007 * @param[out] error 2008 * Pointer to error structure. 2009 * 2010 * @return 2011 * 0 on success, a negative errno value otherwise and rte_errno is set. 2012 */ 2013 int 2014 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2015 uint64_t item_flags, 2016 uint64_t last_item, 2017 uint16_t ether_type, 2018 const struct rte_flow_item_ipv4 *acc_mask, 2019 bool range_accepted, 2020 struct rte_flow_error *error) 2021 { 2022 const struct rte_flow_item_ipv4 *mask = item->mask; 2023 const struct rte_flow_item_ipv4 *spec = item->spec; 2024 const struct rte_flow_item_ipv4 nic_mask = { 2025 .hdr = { 2026 .src_addr = RTE_BE32(0xffffffff), 2027 .dst_addr = RTE_BE32(0xffffffff), 2028 .type_of_service = 0xff, 2029 .next_proto_id = 0xff, 2030 }, 2031 }; 2032 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2033 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2034 MLX5_FLOW_LAYER_OUTER_L3; 2035 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2036 MLX5_FLOW_LAYER_OUTER_L4; 2037 int ret; 2038 uint8_t next_proto = 0xFF; 2039 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2040 MLX5_FLOW_LAYER_OUTER_VLAN | 2041 MLX5_FLOW_LAYER_INNER_VLAN); 2042 2043 if ((last_item & l2_vlan) && ether_type && 2044 ether_type != RTE_ETHER_TYPE_IPV4) 2045 return rte_flow_error_set(error, EINVAL, 2046 RTE_FLOW_ERROR_TYPE_ITEM, item, 2047 "IPv4 cannot follow L2/VLAN layer " 2048 "which ether type is not IPv4"); 2049 if (item_flags & MLX5_FLOW_LAYER_IPIP) { 2050 if (mask && spec) 2051 next_proto = mask->hdr.next_proto_id & 2052 spec->hdr.next_proto_id; 2053 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2054 return rte_flow_error_set(error, EINVAL, 2055 RTE_FLOW_ERROR_TYPE_ITEM, 2056 item, 2057 "multiple tunnel " 2058 "not supported"); 2059 } 2060 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2061 return rte_flow_error_set(error, EINVAL, 2062 RTE_FLOW_ERROR_TYPE_ITEM, item, 2063 "wrong tunnel type - IPv6 specified " 2064 "but IPv4 item provided"); 2065 if (item_flags & l3m) 2066 return rte_flow_error_set(error, ENOTSUP, 2067 RTE_FLOW_ERROR_TYPE_ITEM, item, 2068 "multiple L3 layers not supported"); 2069 else if (item_flags & l4m) 2070 return rte_flow_error_set(error, EINVAL, 2071 RTE_FLOW_ERROR_TYPE_ITEM, item, 2072 "L3 cannot follow an L4 layer."); 2073 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2074 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2075 return rte_flow_error_set(error, EINVAL, 2076 RTE_FLOW_ERROR_TYPE_ITEM, item, 2077 "L3 cannot follow an NVGRE layer."); 2078 if (!mask) 2079 mask = &rte_flow_item_ipv4_mask; 2080 else if (mask->hdr.next_proto_id != 0 && 2081 mask->hdr.next_proto_id != 0xff) 2082 return rte_flow_error_set(error, EINVAL, 2083 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2084 "partial mask is not supported" 2085 " for protocol"); 2086 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2087 acc_mask ? (const uint8_t *)acc_mask 2088 : (const uint8_t *)&nic_mask, 2089 sizeof(struct rte_flow_item_ipv4), 2090 range_accepted, error); 2091 if (ret < 0) 2092 return ret; 2093 return 0; 2094 } 2095 2096 /** 2097 * Validate IPV6 item. 2098 * 2099 * @param[in] item 2100 * Item specification. 2101 * @param[in] item_flags 2102 * Bit-fields that holds the items detected until now. 2103 * @param[in] last_item 2104 * Previous validated item in the pattern items. 2105 * @param[in] ether_type 2106 * Type in the ethernet layer header (including dot1q). 2107 * @param[in] acc_mask 2108 * Acceptable mask, if NULL default internal default mask 2109 * will be used to check whether item fields are supported. 2110 * @param[out] error 2111 * Pointer to error structure. 2112 * 2113 * @return 2114 * 0 on success, a negative errno value otherwise and rte_errno is set. 2115 */ 2116 int 2117 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2118 uint64_t item_flags, 2119 uint64_t last_item, 2120 uint16_t ether_type, 2121 const struct rte_flow_item_ipv6 *acc_mask, 2122 struct rte_flow_error *error) 2123 { 2124 const struct rte_flow_item_ipv6 *mask = item->mask; 2125 const struct rte_flow_item_ipv6 *spec = item->spec; 2126 const struct rte_flow_item_ipv6 nic_mask = { 2127 .hdr = { 2128 .src_addr = 2129 "\xff\xff\xff\xff\xff\xff\xff\xff" 2130 "\xff\xff\xff\xff\xff\xff\xff\xff", 2131 .dst_addr = 2132 "\xff\xff\xff\xff\xff\xff\xff\xff" 2133 "\xff\xff\xff\xff\xff\xff\xff\xff", 2134 .vtc_flow = RTE_BE32(0xffffffff), 2135 .proto = 0xff, 2136 }, 2137 }; 2138 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2139 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2140 MLX5_FLOW_LAYER_OUTER_L3; 2141 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2142 MLX5_FLOW_LAYER_OUTER_L4; 2143 int ret; 2144 uint8_t next_proto = 0xFF; 2145 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2146 MLX5_FLOW_LAYER_OUTER_VLAN | 2147 MLX5_FLOW_LAYER_INNER_VLAN); 2148 2149 if ((last_item & l2_vlan) && ether_type && 2150 ether_type != RTE_ETHER_TYPE_IPV6) 2151 return rte_flow_error_set(error, EINVAL, 2152 RTE_FLOW_ERROR_TYPE_ITEM, item, 2153 "IPv6 cannot follow L2/VLAN layer " 2154 "which ether type is not IPv6"); 2155 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2156 next_proto = spec->hdr.proto; 2157 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) { 2158 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2159 return rte_flow_error_set(error, EINVAL, 2160 RTE_FLOW_ERROR_TYPE_ITEM, 2161 item, 2162 "multiple tunnel " 2163 "not supported"); 2164 } 2165 if (next_proto == IPPROTO_HOPOPTS || 2166 next_proto == IPPROTO_ROUTING || 2167 next_proto == IPPROTO_FRAGMENT || 2168 next_proto == IPPROTO_ESP || 2169 next_proto == IPPROTO_AH || 2170 next_proto == IPPROTO_DSTOPTS) 2171 return rte_flow_error_set(error, EINVAL, 2172 RTE_FLOW_ERROR_TYPE_ITEM, item, 2173 "IPv6 proto (next header) should " 2174 "not be set as extension header"); 2175 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2176 return rte_flow_error_set(error, EINVAL, 2177 RTE_FLOW_ERROR_TYPE_ITEM, item, 2178 "wrong tunnel type - IPv4 specified " 2179 "but IPv6 item provided"); 2180 if (item_flags & l3m) 2181 return rte_flow_error_set(error, ENOTSUP, 2182 RTE_FLOW_ERROR_TYPE_ITEM, item, 2183 "multiple L3 layers not supported"); 2184 else if (item_flags & l4m) 2185 return rte_flow_error_set(error, EINVAL, 2186 RTE_FLOW_ERROR_TYPE_ITEM, item, 2187 "L3 cannot follow an L4 layer."); 2188 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2189 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2190 return rte_flow_error_set(error, EINVAL, 2191 RTE_FLOW_ERROR_TYPE_ITEM, item, 2192 "L3 cannot follow an NVGRE layer."); 2193 if (!mask) 2194 mask = &rte_flow_item_ipv6_mask; 2195 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2196 acc_mask ? (const uint8_t *)acc_mask 2197 : (const uint8_t *)&nic_mask, 2198 sizeof(struct rte_flow_item_ipv6), 2199 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2200 if (ret < 0) 2201 return ret; 2202 return 0; 2203 } 2204 2205 /** 2206 * Validate UDP item. 2207 * 2208 * @param[in] item 2209 * Item specification. 2210 * @param[in] item_flags 2211 * Bit-fields that holds the items detected until now. 2212 * @param[in] target_protocol 2213 * The next protocol in the previous item. 2214 * @param[in] flow_mask 2215 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2216 * @param[out] error 2217 * Pointer to error structure. 2218 * 2219 * @return 2220 * 0 on success, a negative errno value otherwise and rte_errno is set. 2221 */ 2222 int 2223 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2224 uint64_t item_flags, 2225 uint8_t target_protocol, 2226 struct rte_flow_error *error) 2227 { 2228 const struct rte_flow_item_udp *mask = item->mask; 2229 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2230 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2231 MLX5_FLOW_LAYER_OUTER_L3; 2232 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2233 MLX5_FLOW_LAYER_OUTER_L4; 2234 int ret; 2235 2236 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2237 return rte_flow_error_set(error, EINVAL, 2238 RTE_FLOW_ERROR_TYPE_ITEM, item, 2239 "protocol filtering not compatible" 2240 " with UDP layer"); 2241 if (!(item_flags & l3m)) 2242 return rte_flow_error_set(error, EINVAL, 2243 RTE_FLOW_ERROR_TYPE_ITEM, item, 2244 "L3 is mandatory to filter on L4"); 2245 if (item_flags & l4m) 2246 return rte_flow_error_set(error, EINVAL, 2247 RTE_FLOW_ERROR_TYPE_ITEM, item, 2248 "multiple L4 layers not supported"); 2249 if (!mask) 2250 mask = &rte_flow_item_udp_mask; 2251 ret = mlx5_flow_item_acceptable 2252 (item, (const uint8_t *)mask, 2253 (const uint8_t *)&rte_flow_item_udp_mask, 2254 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2255 error); 2256 if (ret < 0) 2257 return ret; 2258 return 0; 2259 } 2260 2261 /** 2262 * Validate TCP item. 2263 * 2264 * @param[in] item 2265 * Item specification. 2266 * @param[in] item_flags 2267 * Bit-fields that holds the items detected until now. 2268 * @param[in] target_protocol 2269 * The next protocol in the previous item. 2270 * @param[out] error 2271 * Pointer to error structure. 2272 * 2273 * @return 2274 * 0 on success, a negative errno value otherwise and rte_errno is set. 2275 */ 2276 int 2277 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2278 uint64_t item_flags, 2279 uint8_t target_protocol, 2280 const struct rte_flow_item_tcp *flow_mask, 2281 struct rte_flow_error *error) 2282 { 2283 const struct rte_flow_item_tcp *mask = item->mask; 2284 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2285 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2286 MLX5_FLOW_LAYER_OUTER_L3; 2287 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2288 MLX5_FLOW_LAYER_OUTER_L4; 2289 int ret; 2290 2291 MLX5_ASSERT(flow_mask); 2292 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2293 return rte_flow_error_set(error, EINVAL, 2294 RTE_FLOW_ERROR_TYPE_ITEM, item, 2295 "protocol filtering not compatible" 2296 " with TCP layer"); 2297 if (!(item_flags & l3m)) 2298 return rte_flow_error_set(error, EINVAL, 2299 RTE_FLOW_ERROR_TYPE_ITEM, item, 2300 "L3 is mandatory to filter on L4"); 2301 if (item_flags & l4m) 2302 return rte_flow_error_set(error, EINVAL, 2303 RTE_FLOW_ERROR_TYPE_ITEM, item, 2304 "multiple L4 layers not supported"); 2305 if (!mask) 2306 mask = &rte_flow_item_tcp_mask; 2307 ret = mlx5_flow_item_acceptable 2308 (item, (const uint8_t *)mask, 2309 (const uint8_t *)flow_mask, 2310 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2311 error); 2312 if (ret < 0) 2313 return ret; 2314 return 0; 2315 } 2316 2317 /** 2318 * Validate VXLAN item. 2319 * 2320 * @param[in] item 2321 * Item specification. 2322 * @param[in] item_flags 2323 * Bit-fields that holds the items detected until now. 2324 * @param[in] target_protocol 2325 * The next protocol in the previous item. 2326 * @param[out] error 2327 * Pointer to error structure. 2328 * 2329 * @return 2330 * 0 on success, a negative errno value otherwise and rte_errno is set. 2331 */ 2332 int 2333 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 2334 uint64_t item_flags, 2335 struct rte_flow_error *error) 2336 { 2337 const struct rte_flow_item_vxlan *spec = item->spec; 2338 const struct rte_flow_item_vxlan *mask = item->mask; 2339 int ret; 2340 union vni { 2341 uint32_t vlan_id; 2342 uint8_t vni[4]; 2343 } id = { .vlan_id = 0, }; 2344 2345 2346 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2347 return rte_flow_error_set(error, ENOTSUP, 2348 RTE_FLOW_ERROR_TYPE_ITEM, item, 2349 "multiple tunnel layers not" 2350 " supported"); 2351 /* 2352 * Verify only UDPv4 is present as defined in 2353 * https://tools.ietf.org/html/rfc7348 2354 */ 2355 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2356 return rte_flow_error_set(error, EINVAL, 2357 RTE_FLOW_ERROR_TYPE_ITEM, item, 2358 "no outer UDP layer found"); 2359 if (!mask) 2360 mask = &rte_flow_item_vxlan_mask; 2361 ret = mlx5_flow_item_acceptable 2362 (item, (const uint8_t *)mask, 2363 (const uint8_t *)&rte_flow_item_vxlan_mask, 2364 sizeof(struct rte_flow_item_vxlan), 2365 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2366 if (ret < 0) 2367 return ret; 2368 if (spec) { 2369 memcpy(&id.vni[1], spec->vni, 3); 2370 memcpy(&id.vni[1], mask->vni, 3); 2371 } 2372 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2373 return rte_flow_error_set(error, ENOTSUP, 2374 RTE_FLOW_ERROR_TYPE_ITEM, item, 2375 "VXLAN tunnel must be fully defined"); 2376 return 0; 2377 } 2378 2379 /** 2380 * Validate VXLAN_GPE item. 2381 * 2382 * @param[in] item 2383 * Item specification. 2384 * @param[in] item_flags 2385 * Bit-fields that holds the items detected until now. 2386 * @param[in] priv 2387 * Pointer to the private data structure. 2388 * @param[in] target_protocol 2389 * The next protocol in the previous item. 2390 * @param[out] error 2391 * Pointer to error structure. 2392 * 2393 * @return 2394 * 0 on success, a negative errno value otherwise and rte_errno is set. 2395 */ 2396 int 2397 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2398 uint64_t item_flags, 2399 struct rte_eth_dev *dev, 2400 struct rte_flow_error *error) 2401 { 2402 struct mlx5_priv *priv = dev->data->dev_private; 2403 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2404 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2405 int ret; 2406 union vni { 2407 uint32_t vlan_id; 2408 uint8_t vni[4]; 2409 } id = { .vlan_id = 0, }; 2410 2411 if (!priv->config.l3_vxlan_en) 2412 return rte_flow_error_set(error, ENOTSUP, 2413 RTE_FLOW_ERROR_TYPE_ITEM, item, 2414 "L3 VXLAN is not enabled by device" 2415 " parameter and/or not configured in" 2416 " firmware"); 2417 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2418 return rte_flow_error_set(error, ENOTSUP, 2419 RTE_FLOW_ERROR_TYPE_ITEM, item, 2420 "multiple tunnel layers not" 2421 " supported"); 2422 /* 2423 * Verify only UDPv4 is present as defined in 2424 * https://tools.ietf.org/html/rfc7348 2425 */ 2426 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2427 return rte_flow_error_set(error, EINVAL, 2428 RTE_FLOW_ERROR_TYPE_ITEM, item, 2429 "no outer UDP layer found"); 2430 if (!mask) 2431 mask = &rte_flow_item_vxlan_gpe_mask; 2432 ret = mlx5_flow_item_acceptable 2433 (item, (const uint8_t *)mask, 2434 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2435 sizeof(struct rte_flow_item_vxlan_gpe), 2436 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2437 if (ret < 0) 2438 return ret; 2439 if (spec) { 2440 if (spec->protocol) 2441 return rte_flow_error_set(error, ENOTSUP, 2442 RTE_FLOW_ERROR_TYPE_ITEM, 2443 item, 2444 "VxLAN-GPE protocol" 2445 " not supported"); 2446 memcpy(&id.vni[1], spec->vni, 3); 2447 memcpy(&id.vni[1], mask->vni, 3); 2448 } 2449 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2450 return rte_flow_error_set(error, ENOTSUP, 2451 RTE_FLOW_ERROR_TYPE_ITEM, item, 2452 "VXLAN-GPE tunnel must be fully" 2453 " defined"); 2454 return 0; 2455 } 2456 /** 2457 * Validate GRE Key item. 2458 * 2459 * @param[in] item 2460 * Item specification. 2461 * @param[in] item_flags 2462 * Bit flags to mark detected items. 2463 * @param[in] gre_item 2464 * Pointer to gre_item 2465 * @param[out] error 2466 * Pointer to error structure. 2467 * 2468 * @return 2469 * 0 on success, a negative errno value otherwise and rte_errno is set. 2470 */ 2471 int 2472 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2473 uint64_t item_flags, 2474 const struct rte_flow_item *gre_item, 2475 struct rte_flow_error *error) 2476 { 2477 const rte_be32_t *mask = item->mask; 2478 int ret = 0; 2479 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2480 const struct rte_flow_item_gre *gre_spec; 2481 const struct rte_flow_item_gre *gre_mask; 2482 2483 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2484 return rte_flow_error_set(error, ENOTSUP, 2485 RTE_FLOW_ERROR_TYPE_ITEM, item, 2486 "Multiple GRE key not support"); 2487 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2488 return rte_flow_error_set(error, ENOTSUP, 2489 RTE_FLOW_ERROR_TYPE_ITEM, item, 2490 "No preceding GRE header"); 2491 if (item_flags & MLX5_FLOW_LAYER_INNER) 2492 return rte_flow_error_set(error, ENOTSUP, 2493 RTE_FLOW_ERROR_TYPE_ITEM, item, 2494 "GRE key following a wrong item"); 2495 gre_mask = gre_item->mask; 2496 if (!gre_mask) 2497 gre_mask = &rte_flow_item_gre_mask; 2498 gre_spec = gre_item->spec; 2499 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2500 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2501 return rte_flow_error_set(error, EINVAL, 2502 RTE_FLOW_ERROR_TYPE_ITEM, item, 2503 "Key bit must be on"); 2504 2505 if (!mask) 2506 mask = &gre_key_default_mask; 2507 ret = mlx5_flow_item_acceptable 2508 (item, (const uint8_t *)mask, 2509 (const uint8_t *)&gre_key_default_mask, 2510 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2511 return ret; 2512 } 2513 2514 /** 2515 * Validate GRE item. 2516 * 2517 * @param[in] item 2518 * Item specification. 2519 * @param[in] item_flags 2520 * Bit flags to mark detected items. 2521 * @param[in] target_protocol 2522 * The next protocol in the previous item. 2523 * @param[out] error 2524 * Pointer to error structure. 2525 * 2526 * @return 2527 * 0 on success, a negative errno value otherwise and rte_errno is set. 2528 */ 2529 int 2530 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2531 uint64_t item_flags, 2532 uint8_t target_protocol, 2533 struct rte_flow_error *error) 2534 { 2535 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2536 const struct rte_flow_item_gre *mask = item->mask; 2537 int ret; 2538 const struct rte_flow_item_gre nic_mask = { 2539 .c_rsvd0_ver = RTE_BE16(0xB000), 2540 .protocol = RTE_BE16(UINT16_MAX), 2541 }; 2542 2543 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2544 return rte_flow_error_set(error, EINVAL, 2545 RTE_FLOW_ERROR_TYPE_ITEM, item, 2546 "protocol filtering not compatible" 2547 " with this GRE layer"); 2548 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2549 return rte_flow_error_set(error, ENOTSUP, 2550 RTE_FLOW_ERROR_TYPE_ITEM, item, 2551 "multiple tunnel layers not" 2552 " supported"); 2553 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2554 return rte_flow_error_set(error, ENOTSUP, 2555 RTE_FLOW_ERROR_TYPE_ITEM, item, 2556 "L3 Layer is missing"); 2557 if (!mask) 2558 mask = &rte_flow_item_gre_mask; 2559 ret = mlx5_flow_item_acceptable 2560 (item, (const uint8_t *)mask, 2561 (const uint8_t *)&nic_mask, 2562 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2563 error); 2564 if (ret < 0) 2565 return ret; 2566 #ifndef HAVE_MLX5DV_DR 2567 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2568 if (spec && (spec->protocol & mask->protocol)) 2569 return rte_flow_error_set(error, ENOTSUP, 2570 RTE_FLOW_ERROR_TYPE_ITEM, item, 2571 "without MPLS support the" 2572 " specification cannot be used for" 2573 " filtering"); 2574 #endif 2575 #endif 2576 return 0; 2577 } 2578 2579 /** 2580 * Validate Geneve item. 2581 * 2582 * @param[in] item 2583 * Item specification. 2584 * @param[in] itemFlags 2585 * Bit-fields that holds the items detected until now. 2586 * @param[in] enPriv 2587 * Pointer to the private data structure. 2588 * @param[out] error 2589 * Pointer to error structure. 2590 * 2591 * @return 2592 * 0 on success, a negative errno value otherwise and rte_errno is set. 2593 */ 2594 2595 int 2596 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2597 uint64_t item_flags, 2598 struct rte_eth_dev *dev, 2599 struct rte_flow_error *error) 2600 { 2601 struct mlx5_priv *priv = dev->data->dev_private; 2602 const struct rte_flow_item_geneve *spec = item->spec; 2603 const struct rte_flow_item_geneve *mask = item->mask; 2604 int ret; 2605 uint16_t gbhdr; 2606 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2607 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2608 const struct rte_flow_item_geneve nic_mask = { 2609 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2610 .vni = "\xff\xff\xff", 2611 .protocol = RTE_BE16(UINT16_MAX), 2612 }; 2613 2614 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2615 return rte_flow_error_set(error, ENOTSUP, 2616 RTE_FLOW_ERROR_TYPE_ITEM, item, 2617 "L3 Geneve is not enabled by device" 2618 " parameter and/or not configured in" 2619 " firmware"); 2620 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2621 return rte_flow_error_set(error, ENOTSUP, 2622 RTE_FLOW_ERROR_TYPE_ITEM, item, 2623 "multiple tunnel layers not" 2624 " supported"); 2625 /* 2626 * Verify only UDPv4 is present as defined in 2627 * https://tools.ietf.org/html/rfc7348 2628 */ 2629 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2630 return rte_flow_error_set(error, EINVAL, 2631 RTE_FLOW_ERROR_TYPE_ITEM, item, 2632 "no outer UDP layer found"); 2633 if (!mask) 2634 mask = &rte_flow_item_geneve_mask; 2635 ret = mlx5_flow_item_acceptable 2636 (item, (const uint8_t *)mask, 2637 (const uint8_t *)&nic_mask, 2638 sizeof(struct rte_flow_item_geneve), 2639 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2640 if (ret) 2641 return ret; 2642 if (spec) { 2643 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2644 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2645 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2646 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2647 return rte_flow_error_set(error, ENOTSUP, 2648 RTE_FLOW_ERROR_TYPE_ITEM, 2649 item, 2650 "Geneve protocol unsupported" 2651 " fields are being used"); 2652 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2653 return rte_flow_error_set 2654 (error, ENOTSUP, 2655 RTE_FLOW_ERROR_TYPE_ITEM, 2656 item, 2657 "Unsupported Geneve options length"); 2658 } 2659 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2660 return rte_flow_error_set 2661 (error, ENOTSUP, 2662 RTE_FLOW_ERROR_TYPE_ITEM, item, 2663 "Geneve tunnel must be fully defined"); 2664 return 0; 2665 } 2666 2667 /** 2668 * Validate Geneve TLV option item. 2669 * 2670 * @param[in] item 2671 * Item specification. 2672 * @param[in] last_item 2673 * Previous validated item in the pattern items. 2674 * @param[in] geneve_item 2675 * Previous GENEVE item specification. 2676 * @param[in] dev 2677 * Pointer to the rte_eth_dev structure. 2678 * @param[out] error 2679 * Pointer to error structure. 2680 * 2681 * @return 2682 * 0 on success, a negative errno value otherwise and rte_errno is set. 2683 */ 2684 int 2685 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item, 2686 uint64_t last_item, 2687 const struct rte_flow_item *geneve_item, 2688 struct rte_eth_dev *dev, 2689 struct rte_flow_error *error) 2690 { 2691 struct mlx5_priv *priv = dev->data->dev_private; 2692 struct mlx5_dev_ctx_shared *sh = priv->sh; 2693 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource; 2694 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr; 2695 uint8_t data_max_supported = 2696 hca_attr->max_geneve_tlv_option_data_len * 4; 2697 struct mlx5_dev_config *config = &priv->config; 2698 const struct rte_flow_item_geneve *geneve_spec; 2699 const struct rte_flow_item_geneve *geneve_mask; 2700 const struct rte_flow_item_geneve_opt *spec = item->spec; 2701 const struct rte_flow_item_geneve_opt *mask = item->mask; 2702 unsigned int i; 2703 unsigned int data_len; 2704 uint8_t tlv_option_len; 2705 uint16_t optlen_m, optlen_v; 2706 const struct rte_flow_item_geneve_opt full_mask = { 2707 .option_class = RTE_BE16(0xffff), 2708 .option_type = 0xff, 2709 .option_len = 0x1f, 2710 }; 2711 2712 if (!mask) 2713 mask = &rte_flow_item_geneve_opt_mask; 2714 if (!spec) 2715 return rte_flow_error_set 2716 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2717 "Geneve TLV opt class/type/length must be specified"); 2718 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK) 2719 return rte_flow_error_set 2720 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2721 "Geneve TLV opt length exceeeds the limit (31)"); 2722 /* Check if class type and length masks are full. */ 2723 if (full_mask.option_class != mask->option_class || 2724 full_mask.option_type != mask->option_type || 2725 full_mask.option_len != (mask->option_len & full_mask.option_len)) 2726 return rte_flow_error_set 2727 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2728 "Geneve TLV opt class/type/length masks must be full"); 2729 /* Check if length is supported */ 2730 if ((uint32_t)spec->option_len > 2731 config->hca_attr.max_geneve_tlv_option_data_len) 2732 return rte_flow_error_set 2733 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2734 "Geneve TLV opt length not supported"); 2735 if (config->hca_attr.max_geneve_tlv_options > 1) 2736 DRV_LOG(DEBUG, 2737 "max_geneve_tlv_options supports more than 1 option"); 2738 /* Check GENEVE item preceding. */ 2739 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE)) 2740 return rte_flow_error_set 2741 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2742 "Geneve opt item must be preceded with Geneve item"); 2743 geneve_spec = geneve_item->spec; 2744 geneve_mask = geneve_item->mask ? geneve_item->mask : 2745 &rte_flow_item_geneve_mask; 2746 /* Check if GENEVE TLV option size doesn't exceed option length */ 2747 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 || 2748 geneve_spec->ver_opt_len_o_c_rsvd0)) { 2749 tlv_option_len = spec->option_len & mask->option_len; 2750 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0); 2751 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v); 2752 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0); 2753 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m); 2754 if ((optlen_v & optlen_m) <= tlv_option_len) 2755 return rte_flow_error_set 2756 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2757 "GENEVE TLV option length exceeds optlen"); 2758 } 2759 /* Check if length is 0 or data is 0. */ 2760 if (spec->data == NULL || spec->option_len == 0) 2761 return rte_flow_error_set 2762 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2763 "Geneve TLV opt with zero data/length not supported"); 2764 /* Check not all data & mask are 0. */ 2765 data_len = spec->option_len * 4; 2766 if (mask->data == NULL) { 2767 for (i = 0; i < data_len; i++) 2768 if (spec->data[i]) 2769 break; 2770 if (i == data_len) 2771 return rte_flow_error_set(error, ENOTSUP, 2772 RTE_FLOW_ERROR_TYPE_ITEM, item, 2773 "Can't match on Geneve option data 0"); 2774 } else { 2775 for (i = 0; i < data_len; i++) 2776 if (spec->data[i] & mask->data[i]) 2777 break; 2778 if (i == data_len) 2779 return rte_flow_error_set(error, ENOTSUP, 2780 RTE_FLOW_ERROR_TYPE_ITEM, item, 2781 "Can't match on Geneve option data and mask 0"); 2782 /* Check data mask supported. */ 2783 for (i = data_max_supported; i < data_len ; i++) 2784 if (mask->data[i]) 2785 return rte_flow_error_set(error, ENOTSUP, 2786 RTE_FLOW_ERROR_TYPE_ITEM, item, 2787 "Data mask is of unsupported size"); 2788 } 2789 /* Check GENEVE option is supported in NIC. */ 2790 if (!config->hca_attr.geneve_tlv_opt) 2791 return rte_flow_error_set 2792 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2793 "Geneve TLV opt not supported"); 2794 /* Check if we already have geneve option with different type/class. */ 2795 rte_spinlock_lock(&sh->geneve_tlv_opt_sl); 2796 geneve_opt_resource = sh->geneve_tlv_option_resource; 2797 if (geneve_opt_resource != NULL) 2798 if (geneve_opt_resource->option_class != spec->option_class || 2799 geneve_opt_resource->option_type != spec->option_type || 2800 geneve_opt_resource->length != spec->option_len) { 2801 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2802 return rte_flow_error_set(error, ENOTSUP, 2803 RTE_FLOW_ERROR_TYPE_ITEM, item, 2804 "Only one Geneve TLV option supported"); 2805 } 2806 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2807 return 0; 2808 } 2809 2810 /** 2811 * Validate MPLS item. 2812 * 2813 * @param[in] dev 2814 * Pointer to the rte_eth_dev structure. 2815 * @param[in] item 2816 * Item specification. 2817 * @param[in] item_flags 2818 * Bit-fields that holds the items detected until now. 2819 * @param[in] prev_layer 2820 * The protocol layer indicated in previous item. 2821 * @param[out] error 2822 * Pointer to error structure. 2823 * 2824 * @return 2825 * 0 on success, a negative errno value otherwise and rte_errno is set. 2826 */ 2827 int 2828 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2829 const struct rte_flow_item *item __rte_unused, 2830 uint64_t item_flags __rte_unused, 2831 uint64_t prev_layer __rte_unused, 2832 struct rte_flow_error *error) 2833 { 2834 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2835 const struct rte_flow_item_mpls *mask = item->mask; 2836 struct mlx5_priv *priv = dev->data->dev_private; 2837 int ret; 2838 2839 if (!priv->config.mpls_en) 2840 return rte_flow_error_set(error, ENOTSUP, 2841 RTE_FLOW_ERROR_TYPE_ITEM, item, 2842 "MPLS not supported or" 2843 " disabled in firmware" 2844 " configuration."); 2845 /* MPLS over IP, UDP, GRE is allowed */ 2846 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 | 2847 MLX5_FLOW_LAYER_OUTER_L4_UDP | 2848 MLX5_FLOW_LAYER_GRE | 2849 MLX5_FLOW_LAYER_GRE_KEY))) 2850 return rte_flow_error_set(error, EINVAL, 2851 RTE_FLOW_ERROR_TYPE_ITEM, item, 2852 "protocol filtering not compatible" 2853 " with MPLS layer"); 2854 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2855 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2856 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2857 return rte_flow_error_set(error, ENOTSUP, 2858 RTE_FLOW_ERROR_TYPE_ITEM, item, 2859 "multiple tunnel layers not" 2860 " supported"); 2861 if (!mask) 2862 mask = &rte_flow_item_mpls_mask; 2863 ret = mlx5_flow_item_acceptable 2864 (item, (const uint8_t *)mask, 2865 (const uint8_t *)&rte_flow_item_mpls_mask, 2866 sizeof(struct rte_flow_item_mpls), 2867 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2868 if (ret < 0) 2869 return ret; 2870 return 0; 2871 #else 2872 return rte_flow_error_set(error, ENOTSUP, 2873 RTE_FLOW_ERROR_TYPE_ITEM, item, 2874 "MPLS is not supported by Verbs, please" 2875 " update."); 2876 #endif 2877 } 2878 2879 /** 2880 * Validate NVGRE item. 2881 * 2882 * @param[in] item 2883 * Item specification. 2884 * @param[in] item_flags 2885 * Bit flags to mark detected items. 2886 * @param[in] target_protocol 2887 * The next protocol in the previous item. 2888 * @param[out] error 2889 * Pointer to error structure. 2890 * 2891 * @return 2892 * 0 on success, a negative errno value otherwise and rte_errno is set. 2893 */ 2894 int 2895 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 2896 uint64_t item_flags, 2897 uint8_t target_protocol, 2898 struct rte_flow_error *error) 2899 { 2900 const struct rte_flow_item_nvgre *mask = item->mask; 2901 int ret; 2902 2903 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2904 return rte_flow_error_set(error, EINVAL, 2905 RTE_FLOW_ERROR_TYPE_ITEM, item, 2906 "protocol filtering not compatible" 2907 " with this GRE layer"); 2908 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2909 return rte_flow_error_set(error, ENOTSUP, 2910 RTE_FLOW_ERROR_TYPE_ITEM, item, 2911 "multiple tunnel layers not" 2912 " supported"); 2913 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2914 return rte_flow_error_set(error, ENOTSUP, 2915 RTE_FLOW_ERROR_TYPE_ITEM, item, 2916 "L3 Layer is missing"); 2917 if (!mask) 2918 mask = &rte_flow_item_nvgre_mask; 2919 ret = mlx5_flow_item_acceptable 2920 (item, (const uint8_t *)mask, 2921 (const uint8_t *)&rte_flow_item_nvgre_mask, 2922 sizeof(struct rte_flow_item_nvgre), 2923 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2924 if (ret < 0) 2925 return ret; 2926 return 0; 2927 } 2928 2929 /** 2930 * Validate eCPRI item. 2931 * 2932 * @param[in] item 2933 * Item specification. 2934 * @param[in] item_flags 2935 * Bit-fields that holds the items detected until now. 2936 * @param[in] last_item 2937 * Previous validated item in the pattern items. 2938 * @param[in] ether_type 2939 * Type in the ethernet layer header (including dot1q). 2940 * @param[in] acc_mask 2941 * Acceptable mask, if NULL default internal default mask 2942 * will be used to check whether item fields are supported. 2943 * @param[out] error 2944 * Pointer to error structure. 2945 * 2946 * @return 2947 * 0 on success, a negative errno value otherwise and rte_errno is set. 2948 */ 2949 int 2950 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 2951 uint64_t item_flags, 2952 uint64_t last_item, 2953 uint16_t ether_type, 2954 const struct rte_flow_item_ecpri *acc_mask, 2955 struct rte_flow_error *error) 2956 { 2957 const struct rte_flow_item_ecpri *mask = item->mask; 2958 const struct rte_flow_item_ecpri nic_mask = { 2959 .hdr = { 2960 .common = { 2961 .u32 = 2962 RTE_BE32(((const struct rte_ecpri_common_hdr) { 2963 .type = 0xFF, 2964 }).u32), 2965 }, 2966 .dummy[0] = 0xFFFFFFFF, 2967 }, 2968 }; 2969 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 2970 MLX5_FLOW_LAYER_OUTER_VLAN); 2971 struct rte_flow_item_ecpri mask_lo; 2972 2973 if (!(last_item & outer_l2_vlan) && 2974 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP) 2975 return rte_flow_error_set(error, EINVAL, 2976 RTE_FLOW_ERROR_TYPE_ITEM, item, 2977 "eCPRI can only follow L2/VLAN layer or UDP layer"); 2978 if ((last_item & outer_l2_vlan) && ether_type && 2979 ether_type != RTE_ETHER_TYPE_ECPRI) 2980 return rte_flow_error_set(error, EINVAL, 2981 RTE_FLOW_ERROR_TYPE_ITEM, item, 2982 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE"); 2983 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2984 return rte_flow_error_set(error, EINVAL, 2985 RTE_FLOW_ERROR_TYPE_ITEM, item, 2986 "eCPRI with tunnel is not supported right now"); 2987 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 2988 return rte_flow_error_set(error, ENOTSUP, 2989 RTE_FLOW_ERROR_TYPE_ITEM, item, 2990 "multiple L3 layers not supported"); 2991 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 2992 return rte_flow_error_set(error, EINVAL, 2993 RTE_FLOW_ERROR_TYPE_ITEM, item, 2994 "eCPRI cannot coexist with a TCP layer"); 2995 /* In specification, eCPRI could be over UDP layer. */ 2996 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 2997 return rte_flow_error_set(error, EINVAL, 2998 RTE_FLOW_ERROR_TYPE_ITEM, item, 2999 "eCPRI over UDP layer is not yet supported right now"); 3000 /* Mask for type field in common header could be zero. */ 3001 if (!mask) 3002 mask = &rte_flow_item_ecpri_mask; 3003 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 3004 /* Input mask is in big-endian format. */ 3005 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 3006 return rte_flow_error_set(error, EINVAL, 3007 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3008 "partial mask is not supported for protocol"); 3009 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 3010 return rte_flow_error_set(error, EINVAL, 3011 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3012 "message header mask must be after a type mask"); 3013 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 3014 acc_mask ? (const uint8_t *)acc_mask 3015 : (const uint8_t *)&nic_mask, 3016 sizeof(struct rte_flow_item_ecpri), 3017 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3018 } 3019 3020 /** 3021 * Release resource related QUEUE/RSS action split. 3022 * 3023 * @param dev 3024 * Pointer to Ethernet device. 3025 * @param flow 3026 * Flow to release id's from. 3027 */ 3028 static void 3029 flow_mreg_split_qrss_release(struct rte_eth_dev *dev, 3030 struct rte_flow *flow) 3031 { 3032 struct mlx5_priv *priv = dev->data->dev_private; 3033 uint32_t handle_idx; 3034 struct mlx5_flow_handle *dev_handle; 3035 3036 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 3037 handle_idx, dev_handle, next) 3038 if (dev_handle->split_flow_id && 3039 !dev_handle->is_meter_flow_id) 3040 mlx5_ipool_free(priv->sh->ipool 3041 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 3042 dev_handle->split_flow_id); 3043 } 3044 3045 static int 3046 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 3047 const struct rte_flow_attr *attr __rte_unused, 3048 const struct rte_flow_item items[] __rte_unused, 3049 const struct rte_flow_action actions[] __rte_unused, 3050 bool external __rte_unused, 3051 int hairpin __rte_unused, 3052 struct rte_flow_error *error) 3053 { 3054 return rte_flow_error_set(error, ENOTSUP, 3055 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3056 } 3057 3058 static struct mlx5_flow * 3059 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 3060 const struct rte_flow_attr *attr __rte_unused, 3061 const struct rte_flow_item items[] __rte_unused, 3062 const struct rte_flow_action actions[] __rte_unused, 3063 struct rte_flow_error *error) 3064 { 3065 rte_flow_error_set(error, ENOTSUP, 3066 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3067 return NULL; 3068 } 3069 3070 static int 3071 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3072 struct mlx5_flow *dev_flow __rte_unused, 3073 const struct rte_flow_attr *attr __rte_unused, 3074 const struct rte_flow_item items[] __rte_unused, 3075 const struct rte_flow_action actions[] __rte_unused, 3076 struct rte_flow_error *error) 3077 { 3078 return rte_flow_error_set(error, ENOTSUP, 3079 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3080 } 3081 3082 static int 3083 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3084 struct rte_flow *flow __rte_unused, 3085 struct rte_flow_error *error) 3086 { 3087 return rte_flow_error_set(error, ENOTSUP, 3088 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3089 } 3090 3091 static void 3092 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3093 struct rte_flow *flow __rte_unused) 3094 { 3095 } 3096 3097 static void 3098 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3099 struct rte_flow *flow __rte_unused) 3100 { 3101 } 3102 3103 static int 3104 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3105 struct rte_flow *flow __rte_unused, 3106 const struct rte_flow_action *actions __rte_unused, 3107 void *data __rte_unused, 3108 struct rte_flow_error *error) 3109 { 3110 return rte_flow_error_set(error, ENOTSUP, 3111 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3112 } 3113 3114 static int 3115 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3116 uint32_t domains __rte_unused, 3117 uint32_t flags __rte_unused) 3118 { 3119 return 0; 3120 } 3121 3122 /* Void driver to protect from null pointer reference. */ 3123 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3124 .validate = flow_null_validate, 3125 .prepare = flow_null_prepare, 3126 .translate = flow_null_translate, 3127 .apply = flow_null_apply, 3128 .remove = flow_null_remove, 3129 .destroy = flow_null_destroy, 3130 .query = flow_null_query, 3131 .sync_domain = flow_null_sync_domain, 3132 }; 3133 3134 /** 3135 * Select flow driver type according to flow attributes and device 3136 * configuration. 3137 * 3138 * @param[in] dev 3139 * Pointer to the dev structure. 3140 * @param[in] attr 3141 * Pointer to the flow attributes. 3142 * 3143 * @return 3144 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3145 */ 3146 static enum mlx5_flow_drv_type 3147 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3148 { 3149 struct mlx5_priv *priv = dev->data->dev_private; 3150 /* The OS can determine first a specific flow type (DV, VERBS) */ 3151 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3152 3153 if (type != MLX5_FLOW_TYPE_MAX) 3154 return type; 3155 /* If no OS specific type - continue with DV/VERBS selection */ 3156 if (attr->transfer && priv->config.dv_esw_en) 3157 type = MLX5_FLOW_TYPE_DV; 3158 if (!attr->transfer) 3159 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3160 MLX5_FLOW_TYPE_VERBS; 3161 return type; 3162 } 3163 3164 #define flow_get_drv_ops(type) flow_drv_ops[type] 3165 3166 /** 3167 * Flow driver validation API. This abstracts calling driver specific functions. 3168 * The type of flow driver is determined according to flow attributes. 3169 * 3170 * @param[in] dev 3171 * Pointer to the dev structure. 3172 * @param[in] attr 3173 * Pointer to the flow attributes. 3174 * @param[in] items 3175 * Pointer to the list of items. 3176 * @param[in] actions 3177 * Pointer to the list of actions. 3178 * @param[in] external 3179 * This flow rule is created by request external to PMD. 3180 * @param[in] hairpin 3181 * Number of hairpin TX actions, 0 means classic flow. 3182 * @param[out] error 3183 * Pointer to the error structure. 3184 * 3185 * @return 3186 * 0 on success, a negative errno value otherwise and rte_errno is set. 3187 */ 3188 static inline int 3189 flow_drv_validate(struct rte_eth_dev *dev, 3190 const struct rte_flow_attr *attr, 3191 const struct rte_flow_item items[], 3192 const struct rte_flow_action actions[], 3193 bool external, int hairpin, struct rte_flow_error *error) 3194 { 3195 const struct mlx5_flow_driver_ops *fops; 3196 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3197 3198 fops = flow_get_drv_ops(type); 3199 return fops->validate(dev, attr, items, actions, external, 3200 hairpin, error); 3201 } 3202 3203 /** 3204 * Flow driver preparation API. This abstracts calling driver specific 3205 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3206 * calculates the size of memory required for device flow, allocates the memory, 3207 * initializes the device flow and returns the pointer. 3208 * 3209 * @note 3210 * This function initializes device flow structure such as dv or verbs in 3211 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3212 * rest. For example, adding returning device flow to flow->dev_flow list and 3213 * setting backward reference to the flow should be done out of this function. 3214 * layers field is not filled either. 3215 * 3216 * @param[in] dev 3217 * Pointer to the dev structure. 3218 * @param[in] attr 3219 * Pointer to the flow attributes. 3220 * @param[in] items 3221 * Pointer to the list of items. 3222 * @param[in] actions 3223 * Pointer to the list of actions. 3224 * @param[in] flow_idx 3225 * This memory pool index to the flow. 3226 * @param[out] error 3227 * Pointer to the error structure. 3228 * 3229 * @return 3230 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3231 */ 3232 static inline struct mlx5_flow * 3233 flow_drv_prepare(struct rte_eth_dev *dev, 3234 const struct rte_flow *flow, 3235 const struct rte_flow_attr *attr, 3236 const struct rte_flow_item items[], 3237 const struct rte_flow_action actions[], 3238 uint32_t flow_idx, 3239 struct rte_flow_error *error) 3240 { 3241 const struct mlx5_flow_driver_ops *fops; 3242 enum mlx5_flow_drv_type type = flow->drv_type; 3243 struct mlx5_flow *mlx5_flow = NULL; 3244 3245 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3246 fops = flow_get_drv_ops(type); 3247 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3248 if (mlx5_flow) 3249 mlx5_flow->flow_idx = flow_idx; 3250 return mlx5_flow; 3251 } 3252 3253 /** 3254 * Flow driver translation API. This abstracts calling driver specific 3255 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3256 * translates a generic flow into a driver flow. flow_drv_prepare() must 3257 * precede. 3258 * 3259 * @note 3260 * dev_flow->layers could be filled as a result of parsing during translation 3261 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3262 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3263 * flow->actions could be overwritten even though all the expanded dev_flows 3264 * have the same actions. 3265 * 3266 * @param[in] dev 3267 * Pointer to the rte dev structure. 3268 * @param[in, out] dev_flow 3269 * Pointer to the mlx5 flow. 3270 * @param[in] attr 3271 * Pointer to the flow attributes. 3272 * @param[in] items 3273 * Pointer to the list of items. 3274 * @param[in] actions 3275 * Pointer to the list of actions. 3276 * @param[out] error 3277 * Pointer to the error structure. 3278 * 3279 * @return 3280 * 0 on success, a negative errno value otherwise and rte_errno is set. 3281 */ 3282 static inline int 3283 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3284 const struct rte_flow_attr *attr, 3285 const struct rte_flow_item items[], 3286 const struct rte_flow_action actions[], 3287 struct rte_flow_error *error) 3288 { 3289 const struct mlx5_flow_driver_ops *fops; 3290 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3291 3292 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3293 fops = flow_get_drv_ops(type); 3294 return fops->translate(dev, dev_flow, attr, items, actions, error); 3295 } 3296 3297 /** 3298 * Flow driver apply API. This abstracts calling driver specific functions. 3299 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3300 * translated driver flows on to device. flow_drv_translate() must precede. 3301 * 3302 * @param[in] dev 3303 * Pointer to Ethernet device structure. 3304 * @param[in, out] flow 3305 * Pointer to flow structure. 3306 * @param[out] error 3307 * Pointer to error structure. 3308 * 3309 * @return 3310 * 0 on success, a negative errno value otherwise and rte_errno is set. 3311 */ 3312 static inline int 3313 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3314 struct rte_flow_error *error) 3315 { 3316 const struct mlx5_flow_driver_ops *fops; 3317 enum mlx5_flow_drv_type type = flow->drv_type; 3318 3319 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3320 fops = flow_get_drv_ops(type); 3321 return fops->apply(dev, flow, error); 3322 } 3323 3324 /** 3325 * Flow driver destroy API. This abstracts calling driver specific functions. 3326 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3327 * on device and releases resources of the flow. 3328 * 3329 * @param[in] dev 3330 * Pointer to Ethernet device. 3331 * @param[in, out] flow 3332 * Pointer to flow structure. 3333 */ 3334 static inline void 3335 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3336 { 3337 const struct mlx5_flow_driver_ops *fops; 3338 enum mlx5_flow_drv_type type = flow->drv_type; 3339 3340 flow_mreg_split_qrss_release(dev, flow); 3341 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3342 fops = flow_get_drv_ops(type); 3343 fops->destroy(dev, flow); 3344 } 3345 3346 /** 3347 * Flow driver find RSS policy tbl API. This abstracts calling driver 3348 * specific functions. Parent flow (rte_flow) should have driver 3349 * type (drv_type). It will find the RSS policy table that has the rss_desc. 3350 * 3351 * @param[in] dev 3352 * Pointer to Ethernet device. 3353 * @param[in, out] flow 3354 * Pointer to flow structure. 3355 * @param[in] policy 3356 * Pointer to meter policy table. 3357 * @param[in] rss_desc 3358 * Pointer to rss_desc 3359 */ 3360 static struct mlx5_flow_meter_sub_policy * 3361 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev, 3362 struct rte_flow *flow, 3363 struct mlx5_flow_meter_policy *policy, 3364 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS]) 3365 { 3366 const struct mlx5_flow_driver_ops *fops; 3367 enum mlx5_flow_drv_type type = flow->drv_type; 3368 3369 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3370 fops = flow_get_drv_ops(type); 3371 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc); 3372 } 3373 3374 /** 3375 * Get RSS action from the action list. 3376 * 3377 * @param[in] dev 3378 * Pointer to Ethernet device. 3379 * @param[in] actions 3380 * Pointer to the list of actions. 3381 * @param[in] flow 3382 * Parent flow structure pointer. 3383 * 3384 * @return 3385 * Pointer to the RSS action if exist, else return NULL. 3386 */ 3387 static const struct rte_flow_action_rss* 3388 flow_get_rss_action(struct rte_eth_dev *dev, 3389 const struct rte_flow_action actions[]) 3390 { 3391 struct mlx5_priv *priv = dev->data->dev_private; 3392 const struct rte_flow_action_rss *rss = NULL; 3393 3394 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3395 switch (actions->type) { 3396 case RTE_FLOW_ACTION_TYPE_RSS: 3397 rss = actions->conf; 3398 break; 3399 case RTE_FLOW_ACTION_TYPE_SAMPLE: 3400 { 3401 const struct rte_flow_action_sample *sample = 3402 actions->conf; 3403 const struct rte_flow_action *act = sample->actions; 3404 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) 3405 if (act->type == RTE_FLOW_ACTION_TYPE_RSS) 3406 rss = act->conf; 3407 break; 3408 } 3409 case RTE_FLOW_ACTION_TYPE_METER: 3410 { 3411 uint32_t mtr_idx; 3412 struct mlx5_flow_meter_info *fm; 3413 struct mlx5_flow_meter_policy *policy; 3414 const struct rte_flow_action_meter *mtr = actions->conf; 3415 3416 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx); 3417 if (fm) { 3418 policy = mlx5_flow_meter_policy_find(dev, 3419 fm->policy_id, NULL); 3420 if (policy && policy->is_rss) 3421 rss = 3422 policy->act_cnt[RTE_COLOR_GREEN].rss->conf; 3423 } 3424 break; 3425 } 3426 default: 3427 break; 3428 } 3429 } 3430 return rss; 3431 } 3432 3433 /** 3434 * Get ASO age action by index. 3435 * 3436 * @param[in] dev 3437 * Pointer to the Ethernet device structure. 3438 * @param[in] age_idx 3439 * Index to the ASO age action. 3440 * 3441 * @return 3442 * The specified ASO age action. 3443 */ 3444 struct mlx5_aso_age_action* 3445 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3446 { 3447 uint16_t pool_idx = age_idx & UINT16_MAX; 3448 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3449 struct mlx5_priv *priv = dev->data->dev_private; 3450 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3451 struct mlx5_aso_age_pool *pool = mng->pools[pool_idx]; 3452 3453 return &pool->actions[offset - 1]; 3454 } 3455 3456 /* maps indirect action to translated direct in some actions array */ 3457 struct mlx5_translated_action_handle { 3458 struct rte_flow_action_handle *action; /**< Indirect action handle. */ 3459 int index; /**< Index in related array of rte_flow_action. */ 3460 }; 3461 3462 /** 3463 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related 3464 * direct action if translation possible. 3465 * This functionality used to run same execution path for both direct and 3466 * indirect actions on flow create. All necessary preparations for indirect 3467 * action handling should be performed on *handle* actions list returned 3468 * from this call. 3469 * 3470 * @param[in] dev 3471 * Pointer to Ethernet device. 3472 * @param[in] actions 3473 * List of actions to translate. 3474 * @param[out] handle 3475 * List to store translated indirect action object handles. 3476 * @param[in, out] indir_n 3477 * Size of *handle* array. On return should be updated with number of 3478 * indirect actions retrieved from the *actions* list. 3479 * @param[out] translated_actions 3480 * List of actions where all indirect actions were translated to direct 3481 * if possible. NULL if no translation took place. 3482 * @param[out] error 3483 * Pointer to the error structure. 3484 * 3485 * @return 3486 * 0 on success, a negative errno value otherwise and rte_errno is set. 3487 */ 3488 static int 3489 flow_action_handles_translate(struct rte_eth_dev *dev, 3490 const struct rte_flow_action actions[], 3491 struct mlx5_translated_action_handle *handle, 3492 int *indir_n, 3493 struct rte_flow_action **translated_actions, 3494 struct rte_flow_error *error) 3495 { 3496 struct mlx5_priv *priv = dev->data->dev_private; 3497 struct rte_flow_action *translated = NULL; 3498 size_t actions_size; 3499 int n; 3500 int copied_n = 0; 3501 struct mlx5_translated_action_handle *handle_end = NULL; 3502 3503 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3504 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT) 3505 continue; 3506 if (copied_n == *indir_n) { 3507 return rte_flow_error_set 3508 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3509 NULL, "too many shared actions"); 3510 } 3511 rte_memcpy(&handle[copied_n].action, &actions[n].conf, 3512 sizeof(actions[n].conf)); 3513 handle[copied_n].index = n; 3514 copied_n++; 3515 } 3516 n++; 3517 *indir_n = copied_n; 3518 if (!copied_n) 3519 return 0; 3520 actions_size = sizeof(struct rte_flow_action) * n; 3521 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3522 if (!translated) { 3523 rte_errno = ENOMEM; 3524 return -ENOMEM; 3525 } 3526 memcpy(translated, actions, actions_size); 3527 for (handle_end = handle + copied_n; handle < handle_end; handle++) { 3528 struct mlx5_shared_action_rss *shared_rss; 3529 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3530 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3531 uint32_t idx = act_idx & 3532 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3533 3534 switch (type) { 3535 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3536 shared_rss = mlx5_ipool_get 3537 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3538 translated[handle->index].type = 3539 RTE_FLOW_ACTION_TYPE_RSS; 3540 translated[handle->index].conf = 3541 &shared_rss->origin; 3542 break; 3543 case MLX5_INDIRECT_ACTION_TYPE_AGE: 3544 if (priv->sh->flow_hit_aso_en) { 3545 translated[handle->index].type = 3546 (enum rte_flow_action_type) 3547 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3548 translated[handle->index].conf = 3549 (void *)(uintptr_t)idx; 3550 break; 3551 } 3552 /* Fall-through */ 3553 default: 3554 mlx5_free(translated); 3555 return rte_flow_error_set 3556 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3557 NULL, "invalid indirect action type"); 3558 } 3559 } 3560 *translated_actions = translated; 3561 return 0; 3562 } 3563 3564 /** 3565 * Get Shared RSS action from the action list. 3566 * 3567 * @param[in] dev 3568 * Pointer to Ethernet device. 3569 * @param[in] shared 3570 * Pointer to the list of actions. 3571 * @param[in] shared_n 3572 * Actions list length. 3573 * 3574 * @return 3575 * The MLX5 RSS action ID if exists, otherwise return 0. 3576 */ 3577 static uint32_t 3578 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3579 struct mlx5_translated_action_handle *handle, 3580 int shared_n) 3581 { 3582 struct mlx5_translated_action_handle *handle_end; 3583 struct mlx5_priv *priv = dev->data->dev_private; 3584 struct mlx5_shared_action_rss *shared_rss; 3585 3586 3587 for (handle_end = handle + shared_n; handle < handle_end; handle++) { 3588 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3589 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3590 uint32_t idx = act_idx & 3591 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3592 switch (type) { 3593 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3594 shared_rss = mlx5_ipool_get 3595 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3596 idx); 3597 __atomic_add_fetch(&shared_rss->refcnt, 1, 3598 __ATOMIC_RELAXED); 3599 return idx; 3600 default: 3601 break; 3602 } 3603 } 3604 return 0; 3605 } 3606 3607 static unsigned int 3608 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 3609 { 3610 const struct rte_flow_item *item; 3611 unsigned int has_vlan = 0; 3612 3613 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3614 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 3615 has_vlan = 1; 3616 break; 3617 } 3618 } 3619 if (has_vlan) 3620 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 3621 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 3622 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3623 MLX5_EXPANSION_ROOT_OUTER; 3624 } 3625 3626 /** 3627 * Get layer flags from the prefix flow. 3628 * 3629 * Some flows may be split to several subflows, the prefix subflow gets the 3630 * match items and the suffix sub flow gets the actions. 3631 * Some actions need the user defined match item flags to get the detail for 3632 * the action. 3633 * This function helps the suffix flow to get the item layer flags from prefix 3634 * subflow. 3635 * 3636 * @param[in] dev_flow 3637 * Pointer the created preifx subflow. 3638 * 3639 * @return 3640 * The layers get from prefix subflow. 3641 */ 3642 static inline uint64_t 3643 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3644 { 3645 uint64_t layers = 0; 3646 3647 /* 3648 * Layers bits could be localization, but usually the compiler will 3649 * help to do the optimization work for source code. 3650 * If no decap actions, use the layers directly. 3651 */ 3652 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3653 return dev_flow->handle->layers; 3654 /* Convert L3 layers with decap action. */ 3655 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3656 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3657 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3658 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3659 /* Convert L4 layers with decap action. */ 3660 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3661 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3662 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3663 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3664 return layers; 3665 } 3666 3667 /** 3668 * Get metadata split action information. 3669 * 3670 * @param[in] actions 3671 * Pointer to the list of actions. 3672 * @param[out] qrss 3673 * Pointer to the return pointer. 3674 * @param[out] qrss_type 3675 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3676 * if no QUEUE/RSS is found. 3677 * @param[out] encap_idx 3678 * Pointer to the index of the encap action if exists, otherwise the last 3679 * action index. 3680 * 3681 * @return 3682 * Total number of actions. 3683 */ 3684 static int 3685 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3686 const struct rte_flow_action **qrss, 3687 int *encap_idx) 3688 { 3689 const struct rte_flow_action_raw_encap *raw_encap; 3690 int actions_n = 0; 3691 int raw_decap_idx = -1; 3692 3693 *encap_idx = -1; 3694 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3695 switch (actions->type) { 3696 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3697 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3698 *encap_idx = actions_n; 3699 break; 3700 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3701 raw_decap_idx = actions_n; 3702 break; 3703 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3704 raw_encap = actions->conf; 3705 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3706 *encap_idx = raw_decap_idx != -1 ? 3707 raw_decap_idx : actions_n; 3708 break; 3709 case RTE_FLOW_ACTION_TYPE_QUEUE: 3710 case RTE_FLOW_ACTION_TYPE_RSS: 3711 *qrss = actions; 3712 break; 3713 default: 3714 break; 3715 } 3716 actions_n++; 3717 } 3718 if (*encap_idx == -1) 3719 *encap_idx = actions_n; 3720 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3721 return actions_n + 1; 3722 } 3723 3724 /** 3725 * Check if the action will change packet. 3726 * 3727 * @param dev 3728 * Pointer to Ethernet device. 3729 * @param[in] type 3730 * action type. 3731 * 3732 * @return 3733 * true if action will change packet, false otherwise. 3734 */ 3735 static bool flow_check_modify_action_type(struct rte_eth_dev *dev, 3736 enum rte_flow_action_type type) 3737 { 3738 struct mlx5_priv *priv = dev->data->dev_private; 3739 3740 switch (type) { 3741 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 3742 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 3743 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 3744 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 3745 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 3746 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 3747 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 3748 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 3749 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 3750 case RTE_FLOW_ACTION_TYPE_SET_TTL: 3751 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 3752 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 3753 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 3754 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 3755 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 3756 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 3757 case RTE_FLOW_ACTION_TYPE_SET_META: 3758 case RTE_FLOW_ACTION_TYPE_SET_TAG: 3759 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 3760 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3761 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3762 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3763 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3764 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 3765 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3766 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 3767 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3768 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3769 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 3770 return true; 3771 case RTE_FLOW_ACTION_TYPE_FLAG: 3772 case RTE_FLOW_ACTION_TYPE_MARK: 3773 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) 3774 return true; 3775 else 3776 return false; 3777 default: 3778 return false; 3779 } 3780 } 3781 3782 /** 3783 * Check meter action from the action list. 3784 * 3785 * @param dev 3786 * Pointer to Ethernet device. 3787 * @param[in] actions 3788 * Pointer to the list of actions. 3789 * @param[out] has_mtr 3790 * Pointer to the meter exist flag. 3791 * @param[out] has_modify 3792 * Pointer to the flag showing there's packet change action. 3793 * @param[out] meter_id 3794 * Pointer to the meter id. 3795 * 3796 * @return 3797 * Total number of actions. 3798 */ 3799 static int 3800 flow_check_meter_action(struct rte_eth_dev *dev, 3801 const struct rte_flow_action actions[], 3802 bool *has_mtr, bool *has_modify, uint32_t *meter_id) 3803 { 3804 const struct rte_flow_action_meter *mtr = NULL; 3805 int actions_n = 0; 3806 3807 MLX5_ASSERT(has_mtr); 3808 *has_mtr = false; 3809 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3810 switch (actions->type) { 3811 case RTE_FLOW_ACTION_TYPE_METER: 3812 mtr = actions->conf; 3813 *meter_id = mtr->mtr_id; 3814 *has_mtr = true; 3815 break; 3816 default: 3817 break; 3818 } 3819 if (!*has_mtr) 3820 *has_modify |= flow_check_modify_action_type(dev, 3821 actions->type); 3822 actions_n++; 3823 } 3824 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3825 return actions_n + 1; 3826 } 3827 3828 /** 3829 * Check if the flow should be split due to hairpin. 3830 * The reason for the split is that in current HW we can't 3831 * support encap and push-vlan on Rx, so if a flow contains 3832 * these actions we move it to Tx. 3833 * 3834 * @param dev 3835 * Pointer to Ethernet device. 3836 * @param[in] attr 3837 * Flow rule attributes. 3838 * @param[in] actions 3839 * Associated actions (list terminated by the END action). 3840 * 3841 * @return 3842 * > 0 the number of actions and the flow should be split, 3843 * 0 when no split required. 3844 */ 3845 static int 3846 flow_check_hairpin_split(struct rte_eth_dev *dev, 3847 const struct rte_flow_attr *attr, 3848 const struct rte_flow_action actions[]) 3849 { 3850 int queue_action = 0; 3851 int action_n = 0; 3852 int split = 0; 3853 const struct rte_flow_action_queue *queue; 3854 const struct rte_flow_action_rss *rss; 3855 const struct rte_flow_action_raw_encap *raw_encap; 3856 const struct rte_eth_hairpin_conf *conf; 3857 3858 if (!attr->ingress) 3859 return 0; 3860 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3861 switch (actions->type) { 3862 case RTE_FLOW_ACTION_TYPE_QUEUE: 3863 queue = actions->conf; 3864 if (queue == NULL) 3865 return 0; 3866 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 3867 if (conf == NULL || conf->tx_explicit != 0) 3868 return 0; 3869 queue_action = 1; 3870 action_n++; 3871 break; 3872 case RTE_FLOW_ACTION_TYPE_RSS: 3873 rss = actions->conf; 3874 if (rss == NULL || rss->queue_num == 0) 3875 return 0; 3876 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 3877 if (conf == NULL || conf->tx_explicit != 0) 3878 return 0; 3879 queue_action = 1; 3880 action_n++; 3881 break; 3882 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3883 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3884 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3885 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3886 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3887 split++; 3888 action_n++; 3889 break; 3890 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3891 raw_encap = actions->conf; 3892 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3893 split++; 3894 action_n++; 3895 break; 3896 default: 3897 action_n++; 3898 break; 3899 } 3900 } 3901 if (split && queue_action) 3902 return action_n; 3903 return 0; 3904 } 3905 3906 /* Declare flow create/destroy prototype in advance. */ 3907 static uint32_t 3908 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 3909 const struct rte_flow_attr *attr, 3910 const struct rte_flow_item items[], 3911 const struct rte_flow_action actions[], 3912 bool external, struct rte_flow_error *error); 3913 3914 static void 3915 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 3916 uint32_t flow_idx); 3917 3918 int 3919 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused, 3920 struct mlx5_hlist_entry *entry, 3921 uint64_t key, void *cb_ctx __rte_unused) 3922 { 3923 struct mlx5_flow_mreg_copy_resource *mcp_res = 3924 container_of(entry, typeof(*mcp_res), hlist_ent); 3925 3926 return mcp_res->mark_id != key; 3927 } 3928 3929 struct mlx5_hlist_entry * 3930 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key, 3931 void *cb_ctx) 3932 { 3933 struct rte_eth_dev *dev = list->ctx; 3934 struct mlx5_priv *priv = dev->data->dev_private; 3935 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 3936 struct mlx5_flow_mreg_copy_resource *mcp_res; 3937 struct rte_flow_error *error = ctx->error; 3938 uint32_t idx = 0; 3939 int ret; 3940 uint32_t mark_id = key; 3941 struct rte_flow_attr attr = { 3942 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 3943 .ingress = 1, 3944 }; 3945 struct mlx5_rte_flow_item_tag tag_spec = { 3946 .data = mark_id, 3947 }; 3948 struct rte_flow_item items[] = { 3949 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 3950 }; 3951 struct rte_flow_action_mark ftag = { 3952 .id = mark_id, 3953 }; 3954 struct mlx5_flow_action_copy_mreg cp_mreg = { 3955 .dst = REG_B, 3956 .src = REG_NON, 3957 }; 3958 struct rte_flow_action_jump jump = { 3959 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 3960 }; 3961 struct rte_flow_action actions[] = { 3962 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 3963 }; 3964 3965 /* Fill the register fileds in the flow. */ 3966 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 3967 if (ret < 0) 3968 return NULL; 3969 tag_spec.id = ret; 3970 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 3971 if (ret < 0) 3972 return NULL; 3973 cp_mreg.src = ret; 3974 /* Provide the full width of FLAG specific value. */ 3975 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 3976 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 3977 /* Build a new flow. */ 3978 if (mark_id != MLX5_DEFAULT_COPY_ID) { 3979 items[0] = (struct rte_flow_item){ 3980 .type = (enum rte_flow_item_type) 3981 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 3982 .spec = &tag_spec, 3983 }; 3984 items[1] = (struct rte_flow_item){ 3985 .type = RTE_FLOW_ITEM_TYPE_END, 3986 }; 3987 actions[0] = (struct rte_flow_action){ 3988 .type = (enum rte_flow_action_type) 3989 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 3990 .conf = &ftag, 3991 }; 3992 actions[1] = (struct rte_flow_action){ 3993 .type = (enum rte_flow_action_type) 3994 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 3995 .conf = &cp_mreg, 3996 }; 3997 actions[2] = (struct rte_flow_action){ 3998 .type = RTE_FLOW_ACTION_TYPE_JUMP, 3999 .conf = &jump, 4000 }; 4001 actions[3] = (struct rte_flow_action){ 4002 .type = RTE_FLOW_ACTION_TYPE_END, 4003 }; 4004 } else { 4005 /* Default rule, wildcard match. */ 4006 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR; 4007 items[0] = (struct rte_flow_item){ 4008 .type = RTE_FLOW_ITEM_TYPE_END, 4009 }; 4010 actions[0] = (struct rte_flow_action){ 4011 .type = (enum rte_flow_action_type) 4012 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4013 .conf = &cp_mreg, 4014 }; 4015 actions[1] = (struct rte_flow_action){ 4016 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4017 .conf = &jump, 4018 }; 4019 actions[2] = (struct rte_flow_action){ 4020 .type = RTE_FLOW_ACTION_TYPE_END, 4021 }; 4022 } 4023 /* Build a new entry. */ 4024 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4025 if (!mcp_res) { 4026 rte_errno = ENOMEM; 4027 return NULL; 4028 } 4029 mcp_res->idx = idx; 4030 mcp_res->mark_id = mark_id; 4031 /* 4032 * The copy Flows are not included in any list. There 4033 * ones are referenced from other Flows and can not 4034 * be applied, removed, deleted in ardbitrary order 4035 * by list traversing. 4036 */ 4037 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items, 4038 actions, false, error); 4039 if (!mcp_res->rix_flow) { 4040 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 4041 return NULL; 4042 } 4043 return &mcp_res->hlist_ent; 4044 } 4045 4046 /** 4047 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4048 * 4049 * As mark_id is unique, if there's already a registered flow for the mark_id, 4050 * return by increasing the reference counter of the resource. Otherwise, create 4051 * the resource (mcp_res) and flow. 4052 * 4053 * Flow looks like, 4054 * - If ingress port is ANY and reg_c[1] is mark_id, 4055 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4056 * 4057 * For default flow (zero mark_id), flow is like, 4058 * - If ingress port is ANY, 4059 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 4060 * 4061 * @param dev 4062 * Pointer to Ethernet device. 4063 * @param mark_id 4064 * ID of MARK action, zero means default flow for META. 4065 * @param[out] error 4066 * Perform verbose error reporting if not NULL. 4067 * 4068 * @return 4069 * Associated resource on success, NULL otherwise and rte_errno is set. 4070 */ 4071 static struct mlx5_flow_mreg_copy_resource * 4072 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 4073 struct rte_flow_error *error) 4074 { 4075 struct mlx5_priv *priv = dev->data->dev_private; 4076 struct mlx5_hlist_entry *entry; 4077 struct mlx5_flow_cb_ctx ctx = { 4078 .dev = dev, 4079 .error = error, 4080 }; 4081 4082 /* Check if already registered. */ 4083 MLX5_ASSERT(priv->mreg_cp_tbl); 4084 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 4085 if (!entry) 4086 return NULL; 4087 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 4088 hlist_ent); 4089 } 4090 4091 void 4092 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry) 4093 { 4094 struct mlx5_flow_mreg_copy_resource *mcp_res = 4095 container_of(entry, typeof(*mcp_res), hlist_ent); 4096 struct rte_eth_dev *dev = list->ctx; 4097 struct mlx5_priv *priv = dev->data->dev_private; 4098 4099 MLX5_ASSERT(mcp_res->rix_flow); 4100 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 4101 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4102 } 4103 4104 /** 4105 * Release flow in RX_CP_TBL. 4106 * 4107 * @param dev 4108 * Pointer to Ethernet device. 4109 * @flow 4110 * Parent flow for wich copying is provided. 4111 */ 4112 static void 4113 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 4114 struct rte_flow *flow) 4115 { 4116 struct mlx5_flow_mreg_copy_resource *mcp_res; 4117 struct mlx5_priv *priv = dev->data->dev_private; 4118 4119 if (!flow->rix_mreg_copy) 4120 return; 4121 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 4122 flow->rix_mreg_copy); 4123 if (!mcp_res || !priv->mreg_cp_tbl) 4124 return; 4125 MLX5_ASSERT(mcp_res->rix_flow); 4126 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 4127 flow->rix_mreg_copy = 0; 4128 } 4129 4130 /** 4131 * Remove the default copy action from RX_CP_TBL. 4132 * 4133 * This functions is called in the mlx5_dev_start(). No thread safe 4134 * is guaranteed. 4135 * 4136 * @param dev 4137 * Pointer to Ethernet device. 4138 */ 4139 static void 4140 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 4141 { 4142 struct mlx5_hlist_entry *entry; 4143 struct mlx5_priv *priv = dev->data->dev_private; 4144 4145 /* Check if default flow is registered. */ 4146 if (!priv->mreg_cp_tbl) 4147 return; 4148 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, 4149 MLX5_DEFAULT_COPY_ID, NULL); 4150 if (!entry) 4151 return; 4152 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 4153 } 4154 4155 /** 4156 * Add the default copy action in in RX_CP_TBL. 4157 * 4158 * This functions is called in the mlx5_dev_start(). No thread safe 4159 * is guaranteed. 4160 * 4161 * @param dev 4162 * Pointer to Ethernet device. 4163 * @param[out] error 4164 * Perform verbose error reporting if not NULL. 4165 * 4166 * @return 4167 * 0 for success, negative value otherwise and rte_errno is set. 4168 */ 4169 static int 4170 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4171 struct rte_flow_error *error) 4172 { 4173 struct mlx5_priv *priv = dev->data->dev_private; 4174 struct mlx5_flow_mreg_copy_resource *mcp_res; 4175 4176 /* Check whether extensive metadata feature is engaged. */ 4177 if (!priv->config.dv_flow_en || 4178 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4179 !mlx5_flow_ext_mreg_supported(dev) || 4180 !priv->sh->dv_regc0_mask) 4181 return 0; 4182 /* 4183 * Add default mreg copy flow may be called multiple time, but 4184 * only be called once in stop. Avoid register it twice. 4185 */ 4186 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL)) 4187 return 0; 4188 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error); 4189 if (!mcp_res) 4190 return -rte_errno; 4191 return 0; 4192 } 4193 4194 /** 4195 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4196 * 4197 * All the flow having Q/RSS action should be split by 4198 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4199 * performs the following, 4200 * - CQE->flow_tag := reg_c[1] (MARK) 4201 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4202 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4203 * but there should be a flow per each MARK ID set by MARK action. 4204 * 4205 * For the aforementioned reason, if there's a MARK action in flow's action 4206 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4207 * the MARK ID to CQE's flow_tag like, 4208 * - If reg_c[1] is mark_id, 4209 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4210 * 4211 * For SET_META action which stores value in reg_c[0], as the destination is 4212 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4213 * MARK ID means the default flow. The default flow looks like, 4214 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4215 * 4216 * @param dev 4217 * Pointer to Ethernet device. 4218 * @param flow 4219 * Pointer to flow structure. 4220 * @param[in] actions 4221 * Pointer to the list of actions. 4222 * @param[out] error 4223 * Perform verbose error reporting if not NULL. 4224 * 4225 * @return 4226 * 0 on success, negative value otherwise and rte_errno is set. 4227 */ 4228 static int 4229 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4230 struct rte_flow *flow, 4231 const struct rte_flow_action *actions, 4232 struct rte_flow_error *error) 4233 { 4234 struct mlx5_priv *priv = dev->data->dev_private; 4235 struct mlx5_dev_config *config = &priv->config; 4236 struct mlx5_flow_mreg_copy_resource *mcp_res; 4237 const struct rte_flow_action_mark *mark; 4238 4239 /* Check whether extensive metadata feature is engaged. */ 4240 if (!config->dv_flow_en || 4241 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4242 !mlx5_flow_ext_mreg_supported(dev) || 4243 !priv->sh->dv_regc0_mask) 4244 return 0; 4245 /* Find MARK action. */ 4246 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4247 switch (actions->type) { 4248 case RTE_FLOW_ACTION_TYPE_FLAG: 4249 mcp_res = flow_mreg_add_copy_action 4250 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4251 if (!mcp_res) 4252 return -rte_errno; 4253 flow->rix_mreg_copy = mcp_res->idx; 4254 return 0; 4255 case RTE_FLOW_ACTION_TYPE_MARK: 4256 mark = (const struct rte_flow_action_mark *) 4257 actions->conf; 4258 mcp_res = 4259 flow_mreg_add_copy_action(dev, mark->id, error); 4260 if (!mcp_res) 4261 return -rte_errno; 4262 flow->rix_mreg_copy = mcp_res->idx; 4263 return 0; 4264 default: 4265 break; 4266 } 4267 } 4268 return 0; 4269 } 4270 4271 #define MLX5_MAX_SPLIT_ACTIONS 24 4272 #define MLX5_MAX_SPLIT_ITEMS 24 4273 4274 /** 4275 * Split the hairpin flow. 4276 * Since HW can't support encap and push-vlan on Rx, we move these 4277 * actions to Tx. 4278 * If the count action is after the encap then we also 4279 * move the count action. in this case the count will also measure 4280 * the outer bytes. 4281 * 4282 * @param dev 4283 * Pointer to Ethernet device. 4284 * @param[in] actions 4285 * Associated actions (list terminated by the END action). 4286 * @param[out] actions_rx 4287 * Rx flow actions. 4288 * @param[out] actions_tx 4289 * Tx flow actions.. 4290 * @param[out] pattern_tx 4291 * The pattern items for the Tx flow. 4292 * @param[out] flow_id 4293 * The flow ID connected to this flow. 4294 * 4295 * @return 4296 * 0 on success. 4297 */ 4298 static int 4299 flow_hairpin_split(struct rte_eth_dev *dev, 4300 const struct rte_flow_action actions[], 4301 struct rte_flow_action actions_rx[], 4302 struct rte_flow_action actions_tx[], 4303 struct rte_flow_item pattern_tx[], 4304 uint32_t flow_id) 4305 { 4306 const struct rte_flow_action_raw_encap *raw_encap; 4307 const struct rte_flow_action_raw_decap *raw_decap; 4308 struct mlx5_rte_flow_action_set_tag *set_tag; 4309 struct rte_flow_action *tag_action; 4310 struct mlx5_rte_flow_item_tag *tag_item; 4311 struct rte_flow_item *item; 4312 char *addr; 4313 int encap = 0; 4314 4315 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4316 switch (actions->type) { 4317 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4318 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4319 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4320 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4321 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4322 rte_memcpy(actions_tx, actions, 4323 sizeof(struct rte_flow_action)); 4324 actions_tx++; 4325 break; 4326 case RTE_FLOW_ACTION_TYPE_COUNT: 4327 if (encap) { 4328 rte_memcpy(actions_tx, actions, 4329 sizeof(struct rte_flow_action)); 4330 actions_tx++; 4331 } else { 4332 rte_memcpy(actions_rx, actions, 4333 sizeof(struct rte_flow_action)); 4334 actions_rx++; 4335 } 4336 break; 4337 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4338 raw_encap = actions->conf; 4339 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) { 4340 memcpy(actions_tx, actions, 4341 sizeof(struct rte_flow_action)); 4342 actions_tx++; 4343 encap = 1; 4344 } else { 4345 rte_memcpy(actions_rx, actions, 4346 sizeof(struct rte_flow_action)); 4347 actions_rx++; 4348 } 4349 break; 4350 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4351 raw_decap = actions->conf; 4352 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) { 4353 memcpy(actions_tx, actions, 4354 sizeof(struct rte_flow_action)); 4355 actions_tx++; 4356 } else { 4357 rte_memcpy(actions_rx, actions, 4358 sizeof(struct rte_flow_action)); 4359 actions_rx++; 4360 } 4361 break; 4362 default: 4363 rte_memcpy(actions_rx, actions, 4364 sizeof(struct rte_flow_action)); 4365 actions_rx++; 4366 break; 4367 } 4368 } 4369 /* Add set meta action and end action for the Rx flow. */ 4370 tag_action = actions_rx; 4371 tag_action->type = (enum rte_flow_action_type) 4372 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4373 actions_rx++; 4374 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4375 actions_rx++; 4376 set_tag = (void *)actions_rx; 4377 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4378 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), 4379 .data = flow_id, 4380 }; 4381 MLX5_ASSERT(set_tag->id > REG_NON); 4382 tag_action->conf = set_tag; 4383 /* Create Tx item list. */ 4384 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4385 addr = (void *)&pattern_tx[2]; 4386 item = pattern_tx; 4387 item->type = (enum rte_flow_item_type) 4388 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4389 tag_item = (void *)addr; 4390 tag_item->data = flow_id; 4391 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4392 MLX5_ASSERT(set_tag->id > REG_NON); 4393 item->spec = tag_item; 4394 addr += sizeof(struct mlx5_rte_flow_item_tag); 4395 tag_item = (void *)addr; 4396 tag_item->data = UINT32_MAX; 4397 tag_item->id = UINT16_MAX; 4398 item->mask = tag_item; 4399 item->last = NULL; 4400 item++; 4401 item->type = RTE_FLOW_ITEM_TYPE_END; 4402 return 0; 4403 } 4404 4405 /** 4406 * The last stage of splitting chain, just creates the subflow 4407 * without any modification. 4408 * 4409 * @param[in] dev 4410 * Pointer to Ethernet device. 4411 * @param[in] flow 4412 * Parent flow structure pointer. 4413 * @param[in, out] sub_flow 4414 * Pointer to return the created subflow, may be NULL. 4415 * @param[in] attr 4416 * Flow rule attributes. 4417 * @param[in] items 4418 * Pattern specification (list terminated by the END pattern item). 4419 * @param[in] actions 4420 * Associated actions (list terminated by the END action). 4421 * @param[in] flow_split_info 4422 * Pointer to flow split info structure. 4423 * @param[out] error 4424 * Perform verbose error reporting if not NULL. 4425 * @return 4426 * 0 on success, negative value otherwise 4427 */ 4428 static int 4429 flow_create_split_inner(struct rte_eth_dev *dev, 4430 struct rte_flow *flow, 4431 struct mlx5_flow **sub_flow, 4432 const struct rte_flow_attr *attr, 4433 const struct rte_flow_item items[], 4434 const struct rte_flow_action actions[], 4435 struct mlx5_flow_split_info *flow_split_info, 4436 struct rte_flow_error *error) 4437 { 4438 struct mlx5_flow *dev_flow; 4439 4440 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4441 flow_split_info->flow_idx, error); 4442 if (!dev_flow) 4443 return -rte_errno; 4444 dev_flow->flow = flow; 4445 dev_flow->external = flow_split_info->external; 4446 dev_flow->skip_scale = flow_split_info->skip_scale; 4447 /* Subflow object was created, we must include one in the list. */ 4448 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4449 dev_flow->handle, next); 4450 /* 4451 * If dev_flow is as one of the suffix flow, some actions in suffix 4452 * flow may need some user defined item layer flags, and pass the 4453 * Metadate rxq mark flag to suffix flow as well. 4454 */ 4455 if (flow_split_info->prefix_layers) 4456 dev_flow->handle->layers = flow_split_info->prefix_layers; 4457 if (flow_split_info->prefix_mark) 4458 dev_flow->handle->mark = 1; 4459 if (sub_flow) 4460 *sub_flow = dev_flow; 4461 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4462 dev_flow->dv.table_id = flow_split_info->table_id; 4463 #endif 4464 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4465 } 4466 4467 /** 4468 * Get the sub policy of a meter. 4469 * 4470 * @param[in] dev 4471 * Pointer to Ethernet device. 4472 * @param[in] flow 4473 * Parent flow structure pointer. 4474 * @param[in] policy_id; 4475 * Meter Policy id. 4476 * @param[in] attr 4477 * Flow rule attributes. 4478 * @param[in] items 4479 * Pattern specification (list terminated by the END pattern item). 4480 * @param[out] error 4481 * Perform verbose error reporting if not NULL. 4482 * 4483 * @return 4484 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set. 4485 */ 4486 static struct mlx5_flow_meter_sub_policy * 4487 get_meter_sub_policy(struct rte_eth_dev *dev, 4488 struct rte_flow *flow, 4489 uint32_t policy_id, 4490 const struct rte_flow_attr *attr, 4491 const struct rte_flow_item items[], 4492 struct rte_flow_error *error) 4493 { 4494 struct mlx5_flow_meter_policy *policy; 4495 struct mlx5_flow_meter_sub_policy *sub_policy = NULL; 4496 4497 policy = mlx5_flow_meter_policy_find(dev, policy_id, NULL); 4498 if (!policy) { 4499 rte_flow_error_set(error, EINVAL, 4500 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4501 "Failed to find Meter Policy."); 4502 goto exit; 4503 } 4504 if (policy->is_rss) { 4505 struct mlx5_flow_workspace *wks = 4506 mlx5_flow_get_thread_workspace(); 4507 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS]; 4508 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0}; 4509 uint32_t i; 4510 4511 MLX5_ASSERT(wks); 4512 /** 4513 * This is a tmp dev_flow, 4514 * no need to register any matcher for it in translate. 4515 */ 4516 wks->skip_matcher_reg = 1; 4517 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) { 4518 struct mlx5_flow dev_flow = {0}; 4519 struct mlx5_flow_handle dev_handle = { {0} }; 4520 const void *rss_act = policy->act_cnt[i].rss->conf; 4521 struct rte_flow_action rss_actions[2] = { 4522 [0] = { 4523 .type = RTE_FLOW_ACTION_TYPE_RSS, 4524 .conf = rss_act 4525 }, 4526 [1] = { 4527 .type = RTE_FLOW_ACTION_TYPE_END, 4528 .conf = NULL 4529 } 4530 }; 4531 4532 dev_flow.handle = &dev_handle; 4533 dev_flow.ingress = attr->ingress; 4534 dev_flow.flow = flow; 4535 dev_flow.external = 0; 4536 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4537 dev_flow.dv.transfer = attr->transfer; 4538 #endif 4539 /* Translate RSS action to get rss hash fields. */ 4540 if (flow_drv_translate(dev, &dev_flow, attr, 4541 items, rss_actions, error)) 4542 goto exit; 4543 rss_desc_v[i] = wks->rss_desc; 4544 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN; 4545 rss_desc_v[i].hash_fields = dev_flow.hash_fields; 4546 rss_desc_v[i].queue_num = rss_desc_v[i].hash_fields ? 4547 rss_desc_v[i].queue_num : 1; 4548 rss_desc[i] = &rss_desc_v[i]; 4549 } 4550 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev, 4551 flow, policy, rss_desc); 4552 } else { 4553 enum mlx5_meter_domain mtr_domain = 4554 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4555 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4556 MLX5_MTR_DOMAIN_INGRESS; 4557 sub_policy = policy->sub_policys[mtr_domain][0]; 4558 } 4559 if (!sub_policy) { 4560 rte_flow_error_set(error, EINVAL, 4561 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4562 "Failed to get meter sub-policy."); 4563 goto exit; 4564 } 4565 exit: 4566 return sub_policy; 4567 } 4568 4569 /** 4570 * Split the meter flow. 4571 * 4572 * As meter flow will split to three sub flow, other than meter 4573 * action, the other actions make sense to only meter accepts 4574 * the packet. If it need to be dropped, no other additional 4575 * actions should be take. 4576 * 4577 * One kind of special action which decapsulates the L3 tunnel 4578 * header will be in the prefix sub flow, as not to take the 4579 * L3 tunnel header into account. 4580 * 4581 * @param[in] dev 4582 * Pointer to Ethernet device. 4583 * @param[in] flow 4584 * Parent flow structure pointer. 4585 * @param[in] fm 4586 * Pointer to flow meter structure. 4587 * @param[in] attr 4588 * Flow rule attributes. 4589 * @param[in] items 4590 * Pattern specification (list terminated by the END pattern item). 4591 * @param[out] sfx_items 4592 * Suffix flow match items (list terminated by the END pattern item). 4593 * @param[in] actions 4594 * Associated actions (list terminated by the END action). 4595 * @param[out] actions_sfx 4596 * Suffix flow actions. 4597 * @param[out] actions_pre 4598 * Prefix flow actions. 4599 * @param[out] mtr_flow_id 4600 * Pointer to meter flow id. 4601 * @param[out] error 4602 * Perform verbose error reporting if not NULL. 4603 * 4604 * @return 4605 * 0 on success, a negative errno value otherwise and rte_errno is set. 4606 */ 4607 static int 4608 flow_meter_split_prep(struct rte_eth_dev *dev, 4609 struct rte_flow *flow, 4610 struct mlx5_flow_meter_info *fm, 4611 const struct rte_flow_attr *attr, 4612 const struct rte_flow_item items[], 4613 struct rte_flow_item sfx_items[], 4614 const struct rte_flow_action actions[], 4615 struct rte_flow_action actions_sfx[], 4616 struct rte_flow_action actions_pre[], 4617 uint32_t *mtr_flow_id, 4618 struct rte_flow_error *error) 4619 { 4620 struct mlx5_priv *priv = dev->data->dev_private; 4621 struct rte_flow_action *tag_action = NULL; 4622 struct rte_flow_item *tag_item; 4623 struct mlx5_rte_flow_action_set_tag *set_tag; 4624 const struct rte_flow_action_raw_encap *raw_encap; 4625 const struct rte_flow_action_raw_decap *raw_decap; 4626 struct mlx5_rte_flow_item_tag *tag_item_spec; 4627 struct mlx5_rte_flow_item_tag *tag_item_mask; 4628 uint32_t tag_id = 0; 4629 bool copy_vlan = false; 4630 struct rte_flow_action *hw_mtr_action; 4631 struct rte_flow_action *action_pre_head = NULL; 4632 bool mtr_first = priv->sh->meter_aso_en && 4633 (attr->egress || 4634 (attr->transfer && priv->representor_id != UINT16_MAX)); 4635 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0; 4636 uint8_t mtr_reg_bits = priv->mtr_reg_share ? 4637 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS; 4638 uint32_t flow_id = 0; 4639 uint32_t flow_id_reversed = 0; 4640 uint8_t flow_id_bits = 0; 4641 int shift; 4642 4643 /* For ASO meter, meter must be before tag in TX direction. */ 4644 if (mtr_first) { 4645 action_pre_head = actions_pre++; 4646 /* Leave space for tag action. */ 4647 tag_action = actions_pre++; 4648 } 4649 /* Prepare the actions for prefix and suffix flow. */ 4650 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4651 struct rte_flow_action *action_cur = NULL; 4652 4653 switch (actions->type) { 4654 case RTE_FLOW_ACTION_TYPE_METER: 4655 if (mtr_first) { 4656 action_cur = action_pre_head; 4657 } else { 4658 /* Leave space for tag action. */ 4659 tag_action = actions_pre++; 4660 action_cur = actions_pre++; 4661 } 4662 break; 4663 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4664 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4665 action_cur = actions_pre++; 4666 break; 4667 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4668 raw_encap = actions->conf; 4669 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 4670 action_cur = actions_pre++; 4671 break; 4672 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4673 raw_decap = actions->conf; 4674 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4675 action_cur = actions_pre++; 4676 break; 4677 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4678 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4679 copy_vlan = true; 4680 break; 4681 default: 4682 break; 4683 } 4684 if (!action_cur) 4685 action_cur = (fm->def_policy) ? 4686 actions_sfx++ : actions_pre++; 4687 memcpy(action_cur, actions, sizeof(struct rte_flow_action)); 4688 } 4689 /* Add end action to the actions. */ 4690 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 4691 if (priv->sh->meter_aso_en) { 4692 /** 4693 * For ASO meter, need to add an extra jump action explicitly, 4694 * to jump from meter to policer table. 4695 */ 4696 struct mlx5_flow_meter_sub_policy *sub_policy; 4697 struct mlx5_flow_tbl_data_entry *tbl_data; 4698 4699 if (!fm->def_policy) { 4700 sub_policy = get_meter_sub_policy(dev, flow, 4701 fm->policy_id, attr, 4702 items, error); 4703 if (!sub_policy) 4704 return -rte_errno; 4705 } else { 4706 enum mlx5_meter_domain mtr_domain = 4707 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4708 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4709 MLX5_MTR_DOMAIN_INGRESS; 4710 4711 sub_policy = 4712 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy; 4713 } 4714 tbl_data = container_of(sub_policy->tbl_rsc, 4715 struct mlx5_flow_tbl_data_entry, tbl); 4716 hw_mtr_action = actions_pre++; 4717 hw_mtr_action->type = (enum rte_flow_action_type) 4718 MLX5_RTE_FLOW_ACTION_TYPE_JUMP; 4719 hw_mtr_action->conf = tbl_data->jump.action; 4720 } 4721 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 4722 actions_pre++; 4723 if (!tag_action) 4724 return rte_flow_error_set(error, ENOMEM, 4725 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4726 "No tag action space."); 4727 if (!mtr_flow_id) { 4728 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID; 4729 goto exit; 4730 } 4731 /* Only default-policy Meter creates mtr flow id. */ 4732 if (fm->def_policy) { 4733 mlx5_ipool_malloc(fm->flow_ipool, &tag_id); 4734 if (!tag_id) 4735 return rte_flow_error_set(error, ENOMEM, 4736 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4737 "Failed to allocate meter flow id."); 4738 flow_id = tag_id - 1; 4739 flow_id_bits = MLX5_REG_BITS - __builtin_clz(flow_id); 4740 flow_id_bits = flow_id_bits ? flow_id_bits : 1; 4741 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) > 4742 mtr_reg_bits) { 4743 mlx5_ipool_free(fm->flow_ipool, tag_id); 4744 return rte_flow_error_set(error, EINVAL, 4745 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4746 "Meter flow id exceeds max limit."); 4747 } 4748 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits) 4749 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits; 4750 } 4751 /* Prepare the suffix subflow items. */ 4752 tag_item = sfx_items++; 4753 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4754 int item_type = items->type; 4755 4756 switch (item_type) { 4757 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4758 memcpy(sfx_items, items, sizeof(*sfx_items)); 4759 sfx_items++; 4760 break; 4761 case RTE_FLOW_ITEM_TYPE_VLAN: 4762 if (copy_vlan) { 4763 memcpy(sfx_items, items, sizeof(*sfx_items)); 4764 /* 4765 * Convert to internal match item, it is used 4766 * for vlan push and set vid. 4767 */ 4768 sfx_items->type = (enum rte_flow_item_type) 4769 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 4770 sfx_items++; 4771 } 4772 break; 4773 default: 4774 break; 4775 } 4776 } 4777 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4778 sfx_items++; 4779 /* Build tag actions and items for meter_id/meter flow_id. */ 4780 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; 4781 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 4782 tag_item_mask = tag_item_spec + 1; 4783 /* Both flow_id and meter_id share the same register. */ 4784 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4785 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 4786 0, error), 4787 .offset = mtr_id_offset, 4788 .length = mtr_reg_bits, 4789 .data = flow->meter, 4790 }; 4791 /* 4792 * The color Reg bits used by flow_id are growing from 4793 * msb to lsb, so must do bit reverse for flow_id val in RegC. 4794 */ 4795 for (shift = 0; shift < flow_id_bits; shift++) 4796 flow_id_reversed = (flow_id_reversed << 1) | 4797 ((flow_id >> shift) & 0x1); 4798 set_tag->data |= 4799 flow_id_reversed << (mtr_reg_bits - flow_id_bits); 4800 tag_item_spec->id = set_tag->id; 4801 tag_item_spec->data = set_tag->data << mtr_id_offset; 4802 tag_item_mask->data = UINT32_MAX << mtr_id_offset; 4803 tag_action->type = (enum rte_flow_action_type) 4804 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4805 tag_action->conf = set_tag; 4806 tag_item->type = (enum rte_flow_item_type) 4807 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4808 tag_item->spec = tag_item_spec; 4809 tag_item->last = NULL; 4810 tag_item->mask = tag_item_mask; 4811 exit: 4812 if (mtr_flow_id) 4813 *mtr_flow_id = tag_id; 4814 return 0; 4815 } 4816 4817 /** 4818 * Split action list having QUEUE/RSS for metadata register copy. 4819 * 4820 * Once Q/RSS action is detected in user's action list, the flow action 4821 * should be split in order to copy metadata registers, which will happen in 4822 * RX_CP_TBL like, 4823 * - CQE->flow_tag := reg_c[1] (MARK) 4824 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4825 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 4826 * This is because the last action of each flow must be a terminal action 4827 * (QUEUE, RSS or DROP). 4828 * 4829 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 4830 * stored and kept in the mlx5_flow structure per each sub_flow. 4831 * 4832 * The Q/RSS action is replaced with, 4833 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 4834 * And the following JUMP action is added at the end, 4835 * - JUMP, to RX_CP_TBL. 4836 * 4837 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 4838 * flow_create_split_metadata() routine. The flow will look like, 4839 * - If flow ID matches (reg_c[2]), perform Q/RSS. 4840 * 4841 * @param dev 4842 * Pointer to Ethernet device. 4843 * @param[out] split_actions 4844 * Pointer to store split actions to jump to CP_TBL. 4845 * @param[in] actions 4846 * Pointer to the list of original flow actions. 4847 * @param[in] qrss 4848 * Pointer to the Q/RSS action. 4849 * @param[in] actions_n 4850 * Number of original actions. 4851 * @param[out] error 4852 * Perform verbose error reporting if not NULL. 4853 * 4854 * @return 4855 * non-zero unique flow_id on success, otherwise 0 and 4856 * error/rte_error are set. 4857 */ 4858 static uint32_t 4859 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 4860 struct rte_flow_action *split_actions, 4861 const struct rte_flow_action *actions, 4862 const struct rte_flow_action *qrss, 4863 int actions_n, struct rte_flow_error *error) 4864 { 4865 struct mlx5_priv *priv = dev->data->dev_private; 4866 struct mlx5_rte_flow_action_set_tag *set_tag; 4867 struct rte_flow_action_jump *jump; 4868 const int qrss_idx = qrss - actions; 4869 uint32_t flow_id = 0; 4870 int ret = 0; 4871 4872 /* 4873 * Given actions will be split 4874 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 4875 * - Add jump to mreg CP_TBL. 4876 * As a result, there will be one more action. 4877 */ 4878 ++actions_n; 4879 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 4880 set_tag = (void *)(split_actions + actions_n); 4881 /* 4882 * If tag action is not set to void(it means we are not the meter 4883 * suffix flow), add the tag action. Since meter suffix flow already 4884 * has the tag added. 4885 */ 4886 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 4887 /* 4888 * Allocate the new subflow ID. This one is unique within 4889 * device and not shared with representors. Otherwise, 4890 * we would have to resolve multi-thread access synch 4891 * issue. Each flow on the shared device is appended 4892 * with source vport identifier, so the resulting 4893 * flows will be unique in the shared (by master and 4894 * representors) domain even if they have coinciding 4895 * IDs. 4896 */ 4897 mlx5_ipool_malloc(priv->sh->ipool 4898 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 4899 if (!flow_id) 4900 return rte_flow_error_set(error, ENOMEM, 4901 RTE_FLOW_ERROR_TYPE_ACTION, 4902 NULL, "can't allocate id " 4903 "for split Q/RSS subflow"); 4904 /* Internal SET_TAG action to set flow ID. */ 4905 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 4906 .data = flow_id, 4907 }; 4908 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 4909 if (ret < 0) 4910 return ret; 4911 set_tag->id = ret; 4912 /* Construct new actions array. */ 4913 /* Replace QUEUE/RSS action. */ 4914 split_actions[qrss_idx] = (struct rte_flow_action){ 4915 .type = (enum rte_flow_action_type) 4916 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 4917 .conf = set_tag, 4918 }; 4919 } 4920 /* JUMP action to jump to mreg copy table (CP_TBL). */ 4921 jump = (void *)(set_tag + 1); 4922 *jump = (struct rte_flow_action_jump){ 4923 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4924 }; 4925 split_actions[actions_n - 2] = (struct rte_flow_action){ 4926 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4927 .conf = jump, 4928 }; 4929 split_actions[actions_n - 1] = (struct rte_flow_action){ 4930 .type = RTE_FLOW_ACTION_TYPE_END, 4931 }; 4932 return flow_id; 4933 } 4934 4935 /** 4936 * Extend the given action list for Tx metadata copy. 4937 * 4938 * Copy the given action list to the ext_actions and add flow metadata register 4939 * copy action in order to copy reg_a set by WQE to reg_c[0]. 4940 * 4941 * @param[out] ext_actions 4942 * Pointer to the extended action list. 4943 * @param[in] actions 4944 * Pointer to the list of actions. 4945 * @param[in] actions_n 4946 * Number of actions in the list. 4947 * @param[out] error 4948 * Perform verbose error reporting if not NULL. 4949 * @param[in] encap_idx 4950 * The encap action inndex. 4951 * 4952 * @return 4953 * 0 on success, negative value otherwise 4954 */ 4955 static int 4956 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 4957 struct rte_flow_action *ext_actions, 4958 const struct rte_flow_action *actions, 4959 int actions_n, struct rte_flow_error *error, 4960 int encap_idx) 4961 { 4962 struct mlx5_flow_action_copy_mreg *cp_mreg = 4963 (struct mlx5_flow_action_copy_mreg *) 4964 (ext_actions + actions_n + 1); 4965 int ret; 4966 4967 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4968 if (ret < 0) 4969 return ret; 4970 cp_mreg->dst = ret; 4971 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 4972 if (ret < 0) 4973 return ret; 4974 cp_mreg->src = ret; 4975 if (encap_idx != 0) 4976 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 4977 if (encap_idx == actions_n - 1) { 4978 ext_actions[actions_n - 1] = (struct rte_flow_action){ 4979 .type = (enum rte_flow_action_type) 4980 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4981 .conf = cp_mreg, 4982 }; 4983 ext_actions[actions_n] = (struct rte_flow_action){ 4984 .type = RTE_FLOW_ACTION_TYPE_END, 4985 }; 4986 } else { 4987 ext_actions[encap_idx] = (struct rte_flow_action){ 4988 .type = (enum rte_flow_action_type) 4989 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4990 .conf = cp_mreg, 4991 }; 4992 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 4993 sizeof(*ext_actions) * (actions_n - encap_idx)); 4994 } 4995 return 0; 4996 } 4997 4998 /** 4999 * Check the match action from the action list. 5000 * 5001 * @param[in] actions 5002 * Pointer to the list of actions. 5003 * @param[in] attr 5004 * Flow rule attributes. 5005 * @param[in] action 5006 * The action to be check if exist. 5007 * @param[out] match_action_pos 5008 * Pointer to the position of the matched action if exists, otherwise is -1. 5009 * @param[out] qrss_action_pos 5010 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 5011 * @param[out] modify_after_mirror 5012 * Pointer to the flag of modify action after FDB mirroring. 5013 * 5014 * @return 5015 * > 0 the total number of actions. 5016 * 0 if not found match action in action list. 5017 */ 5018 static int 5019 flow_check_match_action(const struct rte_flow_action actions[], 5020 const struct rte_flow_attr *attr, 5021 enum rte_flow_action_type action, 5022 int *match_action_pos, int *qrss_action_pos, 5023 int *modify_after_mirror) 5024 { 5025 const struct rte_flow_action_sample *sample; 5026 int actions_n = 0; 5027 uint32_t ratio = 0; 5028 int sub_type = 0; 5029 int flag = 0; 5030 int fdb_mirror = 0; 5031 5032 *match_action_pos = -1; 5033 *qrss_action_pos = -1; 5034 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5035 if (actions->type == action) { 5036 flag = 1; 5037 *match_action_pos = actions_n; 5038 } 5039 switch (actions->type) { 5040 case RTE_FLOW_ACTION_TYPE_QUEUE: 5041 case RTE_FLOW_ACTION_TYPE_RSS: 5042 *qrss_action_pos = actions_n; 5043 break; 5044 case RTE_FLOW_ACTION_TYPE_SAMPLE: 5045 sample = actions->conf; 5046 ratio = sample->ratio; 5047 sub_type = ((const struct rte_flow_action *) 5048 (sample->actions))->type; 5049 if (ratio == 1 && attr->transfer) 5050 fdb_mirror = 1; 5051 break; 5052 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 5053 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 5054 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 5055 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 5056 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 5057 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 5058 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 5059 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 5060 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 5061 case RTE_FLOW_ACTION_TYPE_SET_TTL: 5062 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 5063 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 5064 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 5065 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 5066 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 5067 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 5068 case RTE_FLOW_ACTION_TYPE_FLAG: 5069 case RTE_FLOW_ACTION_TYPE_MARK: 5070 case RTE_FLOW_ACTION_TYPE_SET_META: 5071 case RTE_FLOW_ACTION_TYPE_SET_TAG: 5072 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 5073 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5074 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5075 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 5076 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5077 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5078 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5079 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 5080 if (fdb_mirror) 5081 *modify_after_mirror = 1; 5082 break; 5083 default: 5084 break; 5085 } 5086 actions_n++; 5087 } 5088 if (flag && fdb_mirror && !*modify_after_mirror) { 5089 /* FDB mirroring uses the destination array to implement 5090 * instead of FLOW_SAMPLER object. 5091 */ 5092 if (sub_type != RTE_FLOW_ACTION_TYPE_END) 5093 flag = 0; 5094 } 5095 /* Count RTE_FLOW_ACTION_TYPE_END. */ 5096 return flag ? actions_n + 1 : 0; 5097 } 5098 5099 #define SAMPLE_SUFFIX_ITEM 2 5100 5101 /** 5102 * Split the sample flow. 5103 * 5104 * As sample flow will split to two sub flow, sample flow with 5105 * sample action, the other actions will move to new suffix flow. 5106 * 5107 * Also add unique tag id with tag action in the sample flow, 5108 * the same tag id will be as match in the suffix flow. 5109 * 5110 * @param dev 5111 * Pointer to Ethernet device. 5112 * @param[in] add_tag 5113 * Add extra tag action flag. 5114 * @param[out] sfx_items 5115 * Suffix flow match items (list terminated by the END pattern item). 5116 * @param[in] actions 5117 * Associated actions (list terminated by the END action). 5118 * @param[out] actions_sfx 5119 * Suffix flow actions. 5120 * @param[out] actions_pre 5121 * Prefix flow actions. 5122 * @param[in] actions_n 5123 * The total number of actions. 5124 * @param[in] sample_action_pos 5125 * The sample action position. 5126 * @param[in] qrss_action_pos 5127 * The Queue/RSS action position. 5128 * @param[in] jump_table 5129 * Add extra jump action flag. 5130 * @param[out] error 5131 * Perform verbose error reporting if not NULL. 5132 * 5133 * @return 5134 * 0 on success, or unique flow_id, a negative errno value 5135 * otherwise and rte_errno is set. 5136 */ 5137 static int 5138 flow_sample_split_prep(struct rte_eth_dev *dev, 5139 int add_tag, 5140 struct rte_flow_item sfx_items[], 5141 const struct rte_flow_action actions[], 5142 struct rte_flow_action actions_sfx[], 5143 struct rte_flow_action actions_pre[], 5144 int actions_n, 5145 int sample_action_pos, 5146 int qrss_action_pos, 5147 int jump_table, 5148 struct rte_flow_error *error) 5149 { 5150 struct mlx5_priv *priv = dev->data->dev_private; 5151 struct mlx5_rte_flow_action_set_tag *set_tag; 5152 struct mlx5_rte_flow_item_tag *tag_spec; 5153 struct mlx5_rte_flow_item_tag *tag_mask; 5154 struct rte_flow_action_jump *jump_action; 5155 uint32_t tag_id = 0; 5156 int index; 5157 int append_index = 0; 5158 int ret; 5159 5160 if (sample_action_pos < 0) 5161 return rte_flow_error_set(error, EINVAL, 5162 RTE_FLOW_ERROR_TYPE_ACTION, 5163 NULL, "invalid position of sample " 5164 "action in list"); 5165 /* Prepare the actions for prefix and suffix flow. */ 5166 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 5167 index = qrss_action_pos; 5168 /* Put the preceding the Queue/RSS action into prefix flow. */ 5169 if (index != 0) 5170 memcpy(actions_pre, actions, 5171 sizeof(struct rte_flow_action) * index); 5172 /* Put others preceding the sample action into prefix flow. */ 5173 if (sample_action_pos > index + 1) 5174 memcpy(actions_pre + index, actions + index + 1, 5175 sizeof(struct rte_flow_action) * 5176 (sample_action_pos - index - 1)); 5177 index = sample_action_pos - 1; 5178 /* Put Queue/RSS action into Suffix flow. */ 5179 memcpy(actions_sfx, actions + qrss_action_pos, 5180 sizeof(struct rte_flow_action)); 5181 actions_sfx++; 5182 } else { 5183 index = sample_action_pos; 5184 if (index != 0) 5185 memcpy(actions_pre, actions, 5186 sizeof(struct rte_flow_action) * index); 5187 } 5188 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress. 5189 * For CX6DX and above, metadata registers Cx preserve their value, 5190 * add an extra tag action for NIC-RX and E-Switch Domain. 5191 */ 5192 if (add_tag) { 5193 /* Prepare the prefix tag action. */ 5194 append_index++; 5195 set_tag = (void *)(actions_pre + actions_n + append_index); 5196 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 5197 if (ret < 0) 5198 return ret; 5199 mlx5_ipool_malloc(priv->sh->ipool 5200 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 5201 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5202 .id = ret, 5203 .data = tag_id, 5204 }; 5205 /* Prepare the suffix subflow items. */ 5206 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 5207 tag_spec->data = tag_id; 5208 tag_spec->id = set_tag->id; 5209 tag_mask = tag_spec + 1; 5210 tag_mask->data = UINT32_MAX; 5211 sfx_items[0] = (struct rte_flow_item){ 5212 .type = (enum rte_flow_item_type) 5213 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5214 .spec = tag_spec, 5215 .last = NULL, 5216 .mask = tag_mask, 5217 }; 5218 sfx_items[1] = (struct rte_flow_item){ 5219 .type = (enum rte_flow_item_type) 5220 RTE_FLOW_ITEM_TYPE_END, 5221 }; 5222 /* Prepare the tag action in prefix subflow. */ 5223 actions_pre[index++] = 5224 (struct rte_flow_action){ 5225 .type = (enum rte_flow_action_type) 5226 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5227 .conf = set_tag, 5228 }; 5229 } 5230 memcpy(actions_pre + index, actions + sample_action_pos, 5231 sizeof(struct rte_flow_action)); 5232 index += 1; 5233 /* For the modify action after the sample action in E-Switch mirroring, 5234 * Add the extra jump action in prefix subflow and jump into the next 5235 * table, then do the modify action in the new table. 5236 */ 5237 if (jump_table) { 5238 /* Prepare the prefix jump action. */ 5239 append_index++; 5240 jump_action = (void *)(actions_pre + actions_n + append_index); 5241 jump_action->group = jump_table; 5242 actions_pre[index++] = 5243 (struct rte_flow_action){ 5244 .type = (enum rte_flow_action_type) 5245 RTE_FLOW_ACTION_TYPE_JUMP, 5246 .conf = jump_action, 5247 }; 5248 } 5249 actions_pre[index] = (struct rte_flow_action){ 5250 .type = (enum rte_flow_action_type) 5251 RTE_FLOW_ACTION_TYPE_END, 5252 }; 5253 /* Put the actions after sample into Suffix flow. */ 5254 memcpy(actions_sfx, actions + sample_action_pos + 1, 5255 sizeof(struct rte_flow_action) * 5256 (actions_n - sample_action_pos - 1)); 5257 return tag_id; 5258 } 5259 5260 /** 5261 * The splitting for metadata feature. 5262 * 5263 * - Q/RSS action on NIC Rx should be split in order to pass by 5264 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5265 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5266 * 5267 * - All the actions on NIC Tx should have a mreg copy action to 5268 * copy reg_a from WQE to reg_c[0]. 5269 * 5270 * @param dev 5271 * Pointer to Ethernet device. 5272 * @param[in] flow 5273 * Parent flow structure pointer. 5274 * @param[in] attr 5275 * Flow rule attributes. 5276 * @param[in] items 5277 * Pattern specification (list terminated by the END pattern item). 5278 * @param[in] actions 5279 * Associated actions (list terminated by the END action). 5280 * @param[in] flow_split_info 5281 * Pointer to flow split info structure. 5282 * @param[out] error 5283 * Perform verbose error reporting if not NULL. 5284 * @return 5285 * 0 on success, negative value otherwise 5286 */ 5287 static int 5288 flow_create_split_metadata(struct rte_eth_dev *dev, 5289 struct rte_flow *flow, 5290 const struct rte_flow_attr *attr, 5291 const struct rte_flow_item items[], 5292 const struct rte_flow_action actions[], 5293 struct mlx5_flow_split_info *flow_split_info, 5294 struct rte_flow_error *error) 5295 { 5296 struct mlx5_priv *priv = dev->data->dev_private; 5297 struct mlx5_dev_config *config = &priv->config; 5298 const struct rte_flow_action *qrss = NULL; 5299 struct rte_flow_action *ext_actions = NULL; 5300 struct mlx5_flow *dev_flow = NULL; 5301 uint32_t qrss_id = 0; 5302 int mtr_sfx = 0; 5303 size_t act_size; 5304 int actions_n; 5305 int encap_idx; 5306 int ret; 5307 5308 /* Check whether extensive metadata feature is engaged. */ 5309 if (!config->dv_flow_en || 5310 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5311 !mlx5_flow_ext_mreg_supported(dev)) 5312 return flow_create_split_inner(dev, flow, NULL, attr, items, 5313 actions, flow_split_info, error); 5314 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5315 &encap_idx); 5316 if (qrss) { 5317 /* Exclude hairpin flows from splitting. */ 5318 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5319 const struct rte_flow_action_queue *queue; 5320 5321 queue = qrss->conf; 5322 if (mlx5_rxq_get_type(dev, queue->index) == 5323 MLX5_RXQ_TYPE_HAIRPIN) 5324 qrss = NULL; 5325 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5326 const struct rte_flow_action_rss *rss; 5327 5328 rss = qrss->conf; 5329 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5330 MLX5_RXQ_TYPE_HAIRPIN) 5331 qrss = NULL; 5332 } 5333 } 5334 if (qrss) { 5335 /* Check if it is in meter suffix table. */ 5336 mtr_sfx = attr->group == (attr->transfer ? 5337 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5338 MLX5_FLOW_TABLE_LEVEL_METER); 5339 /* 5340 * Q/RSS action on NIC Rx should be split in order to pass by 5341 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5342 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5343 */ 5344 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5345 sizeof(struct rte_flow_action_set_tag) + 5346 sizeof(struct rte_flow_action_jump); 5347 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5348 SOCKET_ID_ANY); 5349 if (!ext_actions) 5350 return rte_flow_error_set(error, ENOMEM, 5351 RTE_FLOW_ERROR_TYPE_ACTION, 5352 NULL, "no memory to split " 5353 "metadata flow"); 5354 /* 5355 * If we are the suffix flow of meter, tag already exist. 5356 * Set the tag action to void. 5357 */ 5358 if (mtr_sfx) 5359 ext_actions[qrss - actions].type = 5360 RTE_FLOW_ACTION_TYPE_VOID; 5361 else 5362 ext_actions[qrss - actions].type = 5363 (enum rte_flow_action_type) 5364 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5365 /* 5366 * Create the new actions list with removed Q/RSS action 5367 * and appended set tag and jump to register copy table 5368 * (RX_CP_TBL). We should preallocate unique tag ID here 5369 * in advance, because it is needed for set tag action. 5370 */ 5371 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5372 qrss, actions_n, error); 5373 if (!mtr_sfx && !qrss_id) { 5374 ret = -rte_errno; 5375 goto exit; 5376 } 5377 } else if (attr->egress && !attr->transfer) { 5378 /* 5379 * All the actions on NIC Tx should have a metadata register 5380 * copy action to copy reg_a from WQE to reg_c[meta] 5381 */ 5382 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5383 sizeof(struct mlx5_flow_action_copy_mreg); 5384 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5385 SOCKET_ID_ANY); 5386 if (!ext_actions) 5387 return rte_flow_error_set(error, ENOMEM, 5388 RTE_FLOW_ERROR_TYPE_ACTION, 5389 NULL, "no memory to split " 5390 "metadata flow"); 5391 /* Create the action list appended with copy register. */ 5392 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5393 actions_n, error, encap_idx); 5394 if (ret < 0) 5395 goto exit; 5396 } 5397 /* Add the unmodified original or prefix subflow. */ 5398 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5399 items, ext_actions ? ext_actions : 5400 actions, flow_split_info, error); 5401 if (ret < 0) 5402 goto exit; 5403 MLX5_ASSERT(dev_flow); 5404 if (qrss) { 5405 const struct rte_flow_attr q_attr = { 5406 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5407 .ingress = 1, 5408 }; 5409 /* Internal PMD action to set register. */ 5410 struct mlx5_rte_flow_item_tag q_tag_spec = { 5411 .data = qrss_id, 5412 .id = REG_NON, 5413 }; 5414 struct rte_flow_item q_items[] = { 5415 { 5416 .type = (enum rte_flow_item_type) 5417 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5418 .spec = &q_tag_spec, 5419 .last = NULL, 5420 .mask = NULL, 5421 }, 5422 { 5423 .type = RTE_FLOW_ITEM_TYPE_END, 5424 }, 5425 }; 5426 struct rte_flow_action q_actions[] = { 5427 { 5428 .type = qrss->type, 5429 .conf = qrss->conf, 5430 }, 5431 { 5432 .type = RTE_FLOW_ACTION_TYPE_END, 5433 }, 5434 }; 5435 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5436 5437 /* 5438 * Configure the tag item only if there is no meter subflow. 5439 * Since tag is already marked in the meter suffix subflow 5440 * we can just use the meter suffix items as is. 5441 */ 5442 if (qrss_id) { 5443 /* Not meter subflow. */ 5444 MLX5_ASSERT(!mtr_sfx); 5445 /* 5446 * Put unique id in prefix flow due to it is destroyed 5447 * after suffix flow and id will be freed after there 5448 * is no actual flows with this id and identifier 5449 * reallocation becomes possible (for example, for 5450 * other flows in other threads). 5451 */ 5452 dev_flow->handle->split_flow_id = qrss_id; 5453 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5454 error); 5455 if (ret < 0) 5456 goto exit; 5457 q_tag_spec.id = ret; 5458 } 5459 dev_flow = NULL; 5460 /* Add suffix subflow to execute Q/RSS. */ 5461 flow_split_info->prefix_layers = layers; 5462 flow_split_info->prefix_mark = 0; 5463 ret = flow_create_split_inner(dev, flow, &dev_flow, 5464 &q_attr, mtr_sfx ? items : 5465 q_items, q_actions, 5466 flow_split_info, error); 5467 if (ret < 0) 5468 goto exit; 5469 /* qrss ID should be freed if failed. */ 5470 qrss_id = 0; 5471 MLX5_ASSERT(dev_flow); 5472 } 5473 5474 exit: 5475 /* 5476 * We do not destroy the partially created sub_flows in case of error. 5477 * These ones are included into parent flow list and will be destroyed 5478 * by flow_drv_destroy. 5479 */ 5480 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5481 qrss_id); 5482 mlx5_free(ext_actions); 5483 return ret; 5484 } 5485 5486 /** 5487 * Create meter internal drop flow with the original pattern. 5488 * 5489 * @param dev 5490 * Pointer to Ethernet device. 5491 * @param[in] flow 5492 * Parent flow structure pointer. 5493 * @param[in] attr 5494 * Flow rule attributes. 5495 * @param[in] items 5496 * Pattern specification (list terminated by the END pattern item). 5497 * @param[in] flow_split_info 5498 * Pointer to flow split info structure. 5499 * @param[in] fm 5500 * Pointer to flow meter structure. 5501 * @param[out] error 5502 * Perform verbose error reporting if not NULL. 5503 * @return 5504 * 0 on success, negative value otherwise 5505 */ 5506 static uint32_t 5507 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev, 5508 struct rte_flow *flow, 5509 const struct rte_flow_attr *attr, 5510 const struct rte_flow_item items[], 5511 struct mlx5_flow_split_info *flow_split_info, 5512 struct mlx5_flow_meter_info *fm, 5513 struct rte_flow_error *error) 5514 { 5515 struct mlx5_flow *dev_flow = NULL; 5516 struct rte_flow_attr drop_attr = *attr; 5517 struct rte_flow_action drop_actions[3]; 5518 struct mlx5_flow_split_info drop_split_info = *flow_split_info; 5519 5520 MLX5_ASSERT(fm->drop_cnt); 5521 drop_actions[0].type = 5522 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 5523 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt; 5524 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP; 5525 drop_actions[1].conf = NULL; 5526 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END; 5527 drop_actions[2].conf = NULL; 5528 drop_split_info.external = false; 5529 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5530 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP; 5531 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER; 5532 return flow_create_split_inner(dev, flow, &dev_flow, 5533 &drop_attr, items, drop_actions, 5534 &drop_split_info, error); 5535 } 5536 5537 /** 5538 * The splitting for meter feature. 5539 * 5540 * - The meter flow will be split to two flows as prefix and 5541 * suffix flow. The packets make sense only it pass the prefix 5542 * meter action. 5543 * 5544 * - Reg_C_5 is used for the packet to match betweend prefix and 5545 * suffix flow. 5546 * 5547 * @param dev 5548 * Pointer to Ethernet device. 5549 * @param[in] flow 5550 * Parent flow structure pointer. 5551 * @param[in] attr 5552 * Flow rule attributes. 5553 * @param[in] items 5554 * Pattern specification (list terminated by the END pattern item). 5555 * @param[in] actions 5556 * Associated actions (list terminated by the END action). 5557 * @param[in] flow_split_info 5558 * Pointer to flow split info structure. 5559 * @param[out] error 5560 * Perform verbose error reporting if not NULL. 5561 * @return 5562 * 0 on success, negative value otherwise 5563 */ 5564 static int 5565 flow_create_split_meter(struct rte_eth_dev *dev, 5566 struct rte_flow *flow, 5567 const struct rte_flow_attr *attr, 5568 const struct rte_flow_item items[], 5569 const struct rte_flow_action actions[], 5570 struct mlx5_flow_split_info *flow_split_info, 5571 struct rte_flow_error *error) 5572 { 5573 struct mlx5_priv *priv = dev->data->dev_private; 5574 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5575 struct rte_flow_action *sfx_actions = NULL; 5576 struct rte_flow_action *pre_actions = NULL; 5577 struct rte_flow_item *sfx_items = NULL; 5578 struct mlx5_flow *dev_flow = NULL; 5579 struct rte_flow_attr sfx_attr = *attr; 5580 struct mlx5_flow_meter_info *fm = NULL; 5581 uint8_t skip_scale_restore; 5582 bool has_mtr = false; 5583 bool has_modify = false; 5584 bool set_mtr_reg = true; 5585 uint32_t meter_id = 0; 5586 uint32_t mtr_idx = 0; 5587 uint32_t mtr_flow_id = 0; 5588 size_t act_size; 5589 size_t item_size; 5590 int actions_n = 0; 5591 int ret = 0; 5592 5593 if (priv->mtr_en) 5594 actions_n = flow_check_meter_action(dev, actions, &has_mtr, 5595 &has_modify, &meter_id); 5596 if (has_mtr) { 5597 if (flow->meter) { 5598 fm = flow_dv_meter_find_by_idx(priv, flow->meter); 5599 if (!fm) 5600 return rte_flow_error_set(error, EINVAL, 5601 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5602 NULL, "Meter not found."); 5603 } else { 5604 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx); 5605 if (!fm) 5606 return rte_flow_error_set(error, EINVAL, 5607 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5608 NULL, "Meter not found."); 5609 ret = mlx5_flow_meter_attach(priv, fm, 5610 &sfx_attr, error); 5611 if (ret) 5612 return -rte_errno; 5613 flow->meter = mtr_idx; 5614 } 5615 MLX5_ASSERT(wks); 5616 wks->fm = fm; 5617 /* 5618 * If it isn't default-policy Meter, and 5619 * 1. There's no action in flow to change 5620 * packet (modify/encap/decap etc.), OR 5621 * 2. No drop count needed for this meter. 5622 * no need to use regC to save meter id anymore. 5623 */ 5624 if (!fm->def_policy && (!has_modify || !fm->drop_cnt)) 5625 set_mtr_reg = false; 5626 /* Prefix actions: meter, decap, encap, tag, jump, end. */ 5627 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) + 5628 sizeof(struct mlx5_rte_flow_action_set_tag); 5629 /* Suffix items: tag, vlan, port id, end. */ 5630 #define METER_SUFFIX_ITEM 4 5631 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 5632 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5633 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 5634 0, SOCKET_ID_ANY); 5635 if (!sfx_actions) 5636 return rte_flow_error_set(error, ENOMEM, 5637 RTE_FLOW_ERROR_TYPE_ACTION, 5638 NULL, "no memory to split " 5639 "meter flow"); 5640 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 5641 act_size); 5642 /* There's no suffix flow for meter of non-default policy. */ 5643 if (!fm->def_policy) 5644 pre_actions = sfx_actions + 1; 5645 else 5646 pre_actions = sfx_actions + actions_n; 5647 ret = flow_meter_split_prep(dev, flow, fm, &sfx_attr, 5648 items, sfx_items, actions, 5649 sfx_actions, pre_actions, 5650 (set_mtr_reg ? &mtr_flow_id : NULL), 5651 error); 5652 if (ret) { 5653 ret = -rte_errno; 5654 goto exit; 5655 } 5656 /* Add the prefix subflow. */ 5657 flow_split_info->prefix_mark = 0; 5658 skip_scale_restore = flow_split_info->skip_scale; 5659 flow_split_info->skip_scale |= 5660 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 5661 ret = flow_create_split_inner(dev, flow, &dev_flow, 5662 attr, items, pre_actions, 5663 flow_split_info, error); 5664 flow_split_info->skip_scale = skip_scale_restore; 5665 if (ret) { 5666 if (mtr_flow_id) 5667 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id); 5668 ret = -rte_errno; 5669 goto exit; 5670 } 5671 if (mtr_flow_id) { 5672 dev_flow->handle->split_flow_id = mtr_flow_id; 5673 dev_flow->handle->is_meter_flow_id = 1; 5674 } 5675 if (!fm->def_policy) { 5676 if (!set_mtr_reg && fm->drop_cnt) 5677 ret = 5678 flow_meter_create_drop_flow_with_org_pattern(dev, flow, 5679 &sfx_attr, items, 5680 flow_split_info, 5681 fm, error); 5682 goto exit; 5683 } 5684 /* Setting the sfx group atrr. */ 5685 sfx_attr.group = sfx_attr.transfer ? 5686 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5687 MLX5_FLOW_TABLE_LEVEL_METER; 5688 flow_split_info->prefix_layers = 5689 flow_get_prefix_layer_flags(dev_flow); 5690 flow_split_info->prefix_mark = dev_flow->handle->mark; 5691 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX; 5692 } 5693 /* Add the prefix subflow. */ 5694 ret = flow_create_split_metadata(dev, flow, 5695 &sfx_attr, sfx_items ? 5696 sfx_items : items, 5697 sfx_actions ? sfx_actions : actions, 5698 flow_split_info, error); 5699 exit: 5700 if (sfx_actions) 5701 mlx5_free(sfx_actions); 5702 return ret; 5703 } 5704 5705 /** 5706 * The splitting for sample feature. 5707 * 5708 * Once Sample action is detected in the action list, the flow actions should 5709 * be split into prefix sub flow and suffix sub flow. 5710 * 5711 * The original items remain in the prefix sub flow, all actions preceding the 5712 * sample action and the sample action itself will be copied to the prefix 5713 * sub flow, the actions following the sample action will be copied to the 5714 * suffix sub flow, Queue action always be located in the suffix sub flow. 5715 * 5716 * In order to make the packet from prefix sub flow matches with suffix sub 5717 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 5718 * flow uses tag item with the unique flow id. 5719 * 5720 * @param dev 5721 * Pointer to Ethernet device. 5722 * @param[in] flow 5723 * Parent flow structure pointer. 5724 * @param[in] attr 5725 * Flow rule attributes. 5726 * @param[in] items 5727 * Pattern specification (list terminated by the END pattern item). 5728 * @param[in] actions 5729 * Associated actions (list terminated by the END action). 5730 * @param[in] flow_split_info 5731 * Pointer to flow split info structure. 5732 * @param[out] error 5733 * Perform verbose error reporting if not NULL. 5734 * @return 5735 * 0 on success, negative value otherwise 5736 */ 5737 static int 5738 flow_create_split_sample(struct rte_eth_dev *dev, 5739 struct rte_flow *flow, 5740 const struct rte_flow_attr *attr, 5741 const struct rte_flow_item items[], 5742 const struct rte_flow_action actions[], 5743 struct mlx5_flow_split_info *flow_split_info, 5744 struct rte_flow_error *error) 5745 { 5746 struct mlx5_priv *priv = dev->data->dev_private; 5747 struct rte_flow_action *sfx_actions = NULL; 5748 struct rte_flow_action *pre_actions = NULL; 5749 struct rte_flow_item *sfx_items = NULL; 5750 struct mlx5_flow *dev_flow = NULL; 5751 struct rte_flow_attr sfx_attr = *attr; 5752 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5753 struct mlx5_flow_dv_sample_resource *sample_res; 5754 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 5755 struct mlx5_flow_tbl_resource *sfx_tbl; 5756 #endif 5757 size_t act_size; 5758 size_t item_size; 5759 uint32_t fdb_tx = 0; 5760 int32_t tag_id = 0; 5761 int actions_n = 0; 5762 int sample_action_pos; 5763 int qrss_action_pos; 5764 int add_tag = 0; 5765 int modify_after_mirror = 0; 5766 uint16_t jump_table = 0; 5767 const uint32_t next_ft_step = 1; 5768 int ret = 0; 5769 5770 if (priv->sampler_en) 5771 actions_n = flow_check_match_action(actions, attr, 5772 RTE_FLOW_ACTION_TYPE_SAMPLE, 5773 &sample_action_pos, &qrss_action_pos, 5774 &modify_after_mirror); 5775 if (actions_n) { 5776 /* The prefix actions must includes sample, tag, end. */ 5777 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 5778 + sizeof(struct mlx5_rte_flow_action_set_tag); 5779 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 5780 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5781 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 5782 item_size), 0, SOCKET_ID_ANY); 5783 if (!sfx_actions) 5784 return rte_flow_error_set(error, ENOMEM, 5785 RTE_FLOW_ERROR_TYPE_ACTION, 5786 NULL, "no memory to split " 5787 "sample flow"); 5788 /* The representor_id is -1 for uplink. */ 5789 fdb_tx = (attr->transfer && priv->representor_id != -1); 5790 /* 5791 * When reg_c_preserve is set, metadata registers Cx preserve 5792 * their value even through packet duplication. 5793 */ 5794 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve); 5795 if (add_tag) 5796 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 5797 + act_size); 5798 if (modify_after_mirror) 5799 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR + 5800 next_ft_step; 5801 pre_actions = sfx_actions + actions_n; 5802 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items, 5803 actions, sfx_actions, 5804 pre_actions, actions_n, 5805 sample_action_pos, 5806 qrss_action_pos, jump_table, 5807 error); 5808 if (tag_id < 0 || (add_tag && !tag_id)) { 5809 ret = -rte_errno; 5810 goto exit; 5811 } 5812 if (modify_after_mirror) 5813 flow_split_info->skip_scale = 5814 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 5815 /* Add the prefix subflow. */ 5816 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5817 items, pre_actions, 5818 flow_split_info, error); 5819 if (ret) { 5820 ret = -rte_errno; 5821 goto exit; 5822 } 5823 dev_flow->handle->split_flow_id = tag_id; 5824 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5825 if (!modify_after_mirror) { 5826 /* Set the sfx group attr. */ 5827 sample_res = (struct mlx5_flow_dv_sample_resource *) 5828 dev_flow->dv.sample_res; 5829 sfx_tbl = (struct mlx5_flow_tbl_resource *) 5830 sample_res->normal_path_tbl; 5831 sfx_tbl_data = container_of(sfx_tbl, 5832 struct mlx5_flow_tbl_data_entry, 5833 tbl); 5834 sfx_attr.group = sfx_attr.transfer ? 5835 (sfx_tbl_data->level - 1) : sfx_tbl_data->level; 5836 } else { 5837 MLX5_ASSERT(attr->transfer); 5838 sfx_attr.group = jump_table; 5839 } 5840 flow_split_info->prefix_layers = 5841 flow_get_prefix_layer_flags(dev_flow); 5842 flow_split_info->prefix_mark = dev_flow->handle->mark; 5843 /* Suffix group level already be scaled with factor, set 5844 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale 5845 * again in translation. 5846 */ 5847 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5848 #endif 5849 } 5850 /* Add the suffix subflow. */ 5851 ret = flow_create_split_meter(dev, flow, &sfx_attr, 5852 sfx_items ? sfx_items : items, 5853 sfx_actions ? sfx_actions : actions, 5854 flow_split_info, error); 5855 exit: 5856 if (sfx_actions) 5857 mlx5_free(sfx_actions); 5858 return ret; 5859 } 5860 5861 /** 5862 * Split the flow to subflow set. The splitters might be linked 5863 * in the chain, like this: 5864 * flow_create_split_outer() calls: 5865 * flow_create_split_meter() calls: 5866 * flow_create_split_metadata(meter_subflow_0) calls: 5867 * flow_create_split_inner(metadata_subflow_0) 5868 * flow_create_split_inner(metadata_subflow_1) 5869 * flow_create_split_inner(metadata_subflow_2) 5870 * flow_create_split_metadata(meter_subflow_1) calls: 5871 * flow_create_split_inner(metadata_subflow_0) 5872 * flow_create_split_inner(metadata_subflow_1) 5873 * flow_create_split_inner(metadata_subflow_2) 5874 * 5875 * This provide flexible way to add new levels of flow splitting. 5876 * The all of successfully created subflows are included to the 5877 * parent flow dev_flow list. 5878 * 5879 * @param dev 5880 * Pointer to Ethernet device. 5881 * @param[in] flow 5882 * Parent flow structure pointer. 5883 * @param[in] attr 5884 * Flow rule attributes. 5885 * @param[in] items 5886 * Pattern specification (list terminated by the END pattern item). 5887 * @param[in] actions 5888 * Associated actions (list terminated by the END action). 5889 * @param[in] flow_split_info 5890 * Pointer to flow split info structure. 5891 * @param[out] error 5892 * Perform verbose error reporting if not NULL. 5893 * @return 5894 * 0 on success, negative value otherwise 5895 */ 5896 static int 5897 flow_create_split_outer(struct rte_eth_dev *dev, 5898 struct rte_flow *flow, 5899 const struct rte_flow_attr *attr, 5900 const struct rte_flow_item items[], 5901 const struct rte_flow_action actions[], 5902 struct mlx5_flow_split_info *flow_split_info, 5903 struct rte_flow_error *error) 5904 { 5905 int ret; 5906 5907 ret = flow_create_split_sample(dev, flow, attr, items, 5908 actions, flow_split_info, error); 5909 MLX5_ASSERT(ret <= 0); 5910 return ret; 5911 } 5912 5913 static struct mlx5_flow_tunnel * 5914 flow_tunnel_from_rule(struct rte_eth_dev *dev, 5915 const struct rte_flow_attr *attr, 5916 const struct rte_flow_item items[], 5917 const struct rte_flow_action actions[]) 5918 { 5919 struct mlx5_flow_tunnel *tunnel; 5920 5921 #pragma GCC diagnostic push 5922 #pragma GCC diagnostic ignored "-Wcast-qual" 5923 if (is_flow_tunnel_match_rule(dev, attr, items, actions)) 5924 tunnel = (struct mlx5_flow_tunnel *)items[0].spec; 5925 else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) 5926 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf; 5927 else 5928 tunnel = NULL; 5929 #pragma GCC diagnostic pop 5930 5931 return tunnel; 5932 } 5933 5934 /** 5935 * Adjust flow RSS workspace if needed. 5936 * 5937 * @param wks 5938 * Pointer to thread flow work space. 5939 * @param rss_desc 5940 * Pointer to RSS descriptor. 5941 * @param[in] nrssq_num 5942 * New RSS queue number. 5943 * 5944 * @return 5945 * 0 on success, -1 otherwise and rte_errno is set. 5946 */ 5947 static int 5948 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 5949 struct mlx5_flow_rss_desc *rss_desc, 5950 uint32_t nrssq_num) 5951 { 5952 if (likely(nrssq_num <= wks->rssq_num)) 5953 return 0; 5954 rss_desc->queue = realloc(rss_desc->queue, 5955 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2)); 5956 if (!rss_desc->queue) { 5957 rte_errno = ENOMEM; 5958 return -1; 5959 } 5960 wks->rssq_num = RTE_ALIGN(nrssq_num, 2); 5961 return 0; 5962 } 5963 5964 /** 5965 * Create a flow and add it to @p list. 5966 * 5967 * @param dev 5968 * Pointer to Ethernet device. 5969 * @param list 5970 * Pointer to a TAILQ flow list. If this parameter NULL, 5971 * no list insertion occurred, flow is just created, 5972 * this is caller's responsibility to track the 5973 * created flow. 5974 * @param[in] attr 5975 * Flow rule attributes. 5976 * @param[in] items 5977 * Pattern specification (list terminated by the END pattern item). 5978 * @param[in] actions 5979 * Associated actions (list terminated by the END action). 5980 * @param[in] external 5981 * This flow rule is created by request external to PMD. 5982 * @param[out] error 5983 * Perform verbose error reporting if not NULL. 5984 * 5985 * @return 5986 * A flow index on success, 0 otherwise and rte_errno is set. 5987 */ 5988 static uint32_t 5989 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 5990 const struct rte_flow_attr *attr, 5991 const struct rte_flow_item items[], 5992 const struct rte_flow_action original_actions[], 5993 bool external, struct rte_flow_error *error) 5994 { 5995 struct mlx5_priv *priv = dev->data->dev_private; 5996 struct rte_flow *flow = NULL; 5997 struct mlx5_flow *dev_flow; 5998 const struct rte_flow_action_rss *rss = NULL; 5999 struct mlx5_translated_action_handle 6000 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6001 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6002 union { 6003 struct mlx5_flow_expand_rss buf; 6004 uint8_t buffer[2048]; 6005 } expand_buffer; 6006 union { 6007 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6008 uint8_t buffer[2048]; 6009 } actions_rx; 6010 union { 6011 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6012 uint8_t buffer[2048]; 6013 } actions_hairpin_tx; 6014 union { 6015 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 6016 uint8_t buffer[2048]; 6017 } items_tx; 6018 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 6019 struct mlx5_flow_rss_desc *rss_desc; 6020 const struct rte_flow_action *p_actions_rx; 6021 uint32_t i; 6022 uint32_t idx = 0; 6023 int hairpin_flow; 6024 struct rte_flow_attr attr_tx = { .priority = 0 }; 6025 const struct rte_flow_action *actions; 6026 struct rte_flow_action *translated_actions = NULL; 6027 struct mlx5_flow_tunnel *tunnel; 6028 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 6029 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace(); 6030 struct mlx5_flow_split_info flow_split_info = { 6031 .external = !!external, 6032 .skip_scale = 0, 6033 .flow_idx = 0, 6034 .prefix_mark = 0, 6035 .prefix_layers = 0, 6036 .table_id = 0 6037 }; 6038 int ret; 6039 6040 MLX5_ASSERT(wks); 6041 rss_desc = &wks->rss_desc; 6042 ret = flow_action_handles_translate(dev, original_actions, 6043 indir_actions, 6044 &indir_actions_n, 6045 &translated_actions, error); 6046 if (ret < 0) { 6047 MLX5_ASSERT(translated_actions == NULL); 6048 return 0; 6049 } 6050 actions = translated_actions ? translated_actions : original_actions; 6051 p_actions_rx = actions; 6052 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6053 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 6054 external, hairpin_flow, error); 6055 if (ret < 0) 6056 goto error_before_hairpin_split; 6057 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx); 6058 if (!flow) { 6059 rte_errno = ENOMEM; 6060 goto error_before_hairpin_split; 6061 } 6062 if (hairpin_flow > 0) { 6063 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 6064 rte_errno = EINVAL; 6065 goto error_before_hairpin_split; 6066 } 6067 flow_hairpin_split(dev, actions, actions_rx.actions, 6068 actions_hairpin_tx.actions, items_tx.items, 6069 idx); 6070 p_actions_rx = actions_rx.actions; 6071 } 6072 flow_split_info.flow_idx = idx; 6073 flow->drv_type = flow_get_drv_type(dev, attr); 6074 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 6075 flow->drv_type < MLX5_FLOW_TYPE_MAX); 6076 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 6077 /* RSS Action only works on NIC RX domain */ 6078 if (attr->ingress && !attr->transfer) 6079 rss = flow_get_rss_action(dev, p_actions_rx); 6080 if (rss) { 6081 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 6082 return 0; 6083 /* 6084 * The following information is required by 6085 * mlx5_flow_hashfields_adjust() in advance. 6086 */ 6087 rss_desc->level = rss->level; 6088 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 6089 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types; 6090 } 6091 flow->dev_handles = 0; 6092 if (rss && rss->types) { 6093 unsigned int graph_root; 6094 6095 graph_root = find_graph_root(items, rss->level); 6096 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 6097 items, rss->types, 6098 mlx5_support_expansion, graph_root); 6099 MLX5_ASSERT(ret > 0 && 6100 (unsigned int)ret < sizeof(expand_buffer.buffer)); 6101 } else { 6102 buf->entries = 1; 6103 buf->entry[0].pattern = (void *)(uintptr_t)items; 6104 } 6105 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions, 6106 indir_actions_n); 6107 for (i = 0; i < buf->entries; ++i) { 6108 /* Initialize flow split data. */ 6109 flow_split_info.prefix_layers = 0; 6110 flow_split_info.prefix_mark = 0; 6111 flow_split_info.skip_scale = 0; 6112 /* 6113 * The splitter may create multiple dev_flows, 6114 * depending on configuration. In the simplest 6115 * case it just creates unmodified original flow. 6116 */ 6117 ret = flow_create_split_outer(dev, flow, attr, 6118 buf->entry[i].pattern, 6119 p_actions_rx, &flow_split_info, 6120 error); 6121 if (ret < 0) 6122 goto error; 6123 if (is_flow_tunnel_steer_rule(dev, attr, 6124 buf->entry[i].pattern, 6125 p_actions_rx)) { 6126 ret = flow_tunnel_add_default_miss(dev, flow, attr, 6127 p_actions_rx, 6128 idx, 6129 &default_miss_ctx, 6130 error); 6131 if (ret < 0) { 6132 mlx5_free(default_miss_ctx.queue); 6133 goto error; 6134 } 6135 } 6136 } 6137 /* Create the tx flow. */ 6138 if (hairpin_flow) { 6139 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 6140 attr_tx.ingress = 0; 6141 attr_tx.egress = 1; 6142 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 6143 actions_hairpin_tx.actions, 6144 idx, error); 6145 if (!dev_flow) 6146 goto error; 6147 dev_flow->flow = flow; 6148 dev_flow->external = 0; 6149 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 6150 dev_flow->handle, next); 6151 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 6152 items_tx.items, 6153 actions_hairpin_tx.actions, error); 6154 if (ret < 0) 6155 goto error; 6156 } 6157 /* 6158 * Update the metadata register copy table. If extensive 6159 * metadata feature is enabled and registers are supported 6160 * we might create the extra rte_flow for each unique 6161 * MARK/FLAG action ID. 6162 * 6163 * The table is updated for ingress Flows only, because 6164 * the egress Flows belong to the different device and 6165 * copy table should be updated in peer NIC Rx domain. 6166 */ 6167 if (attr->ingress && 6168 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 6169 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 6170 if (ret) 6171 goto error; 6172 } 6173 /* 6174 * If the flow is external (from application) OR device is started, 6175 * OR mreg discover, then apply immediately. 6176 */ 6177 if (external || dev->data->dev_started || 6178 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP && 6179 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) { 6180 ret = flow_drv_apply(dev, flow, error); 6181 if (ret < 0) 6182 goto error; 6183 } 6184 if (list) { 6185 rte_spinlock_lock(&priv->flow_list_lock); 6186 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx, 6187 flow, next); 6188 rte_spinlock_unlock(&priv->flow_list_lock); 6189 } 6190 flow_rxq_flags_set(dev, flow); 6191 rte_free(translated_actions); 6192 tunnel = flow_tunnel_from_rule(dev, attr, items, actions); 6193 if (tunnel) { 6194 flow->tunnel = 1; 6195 flow->tunnel_id = tunnel->tunnel_id; 6196 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 6197 mlx5_free(default_miss_ctx.queue); 6198 } 6199 mlx5_flow_pop_thread_workspace(); 6200 return idx; 6201 error: 6202 MLX5_ASSERT(flow); 6203 ret = rte_errno; /* Save rte_errno before cleanup. */ 6204 flow_mreg_del_copy_action(dev, flow); 6205 flow_drv_destroy(dev, flow); 6206 if (rss_desc->shared_rss) 6207 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 6208 mlx5_ipool_get 6209 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 6210 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 6211 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx); 6212 rte_errno = ret; /* Restore rte_errno. */ 6213 ret = rte_errno; 6214 rte_errno = ret; 6215 mlx5_flow_pop_thread_workspace(); 6216 error_before_hairpin_split: 6217 rte_free(translated_actions); 6218 return 0; 6219 } 6220 6221 /** 6222 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 6223 * incoming packets to table 1. 6224 * 6225 * Other flow rules, requested for group n, will be created in 6226 * e-switch table n+1. 6227 * Jump action to e-switch group n will be created to group n+1. 6228 * 6229 * Used when working in switchdev mode, to utilise advantages of table 1 6230 * and above. 6231 * 6232 * @param dev 6233 * Pointer to Ethernet device. 6234 * 6235 * @return 6236 * Pointer to flow on success, NULL otherwise and rte_errno is set. 6237 */ 6238 struct rte_flow * 6239 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 6240 { 6241 const struct rte_flow_attr attr = { 6242 .group = 0, 6243 .priority = 0, 6244 .ingress = 1, 6245 .egress = 0, 6246 .transfer = 1, 6247 }; 6248 const struct rte_flow_item pattern = { 6249 .type = RTE_FLOW_ITEM_TYPE_END, 6250 }; 6251 struct rte_flow_action_jump jump = { 6252 .group = 1, 6253 }; 6254 const struct rte_flow_action actions[] = { 6255 { 6256 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6257 .conf = &jump, 6258 }, 6259 { 6260 .type = RTE_FLOW_ACTION_TYPE_END, 6261 }, 6262 }; 6263 struct mlx5_priv *priv = dev->data->dev_private; 6264 struct rte_flow_error error; 6265 6266 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows, 6267 &attr, &pattern, 6268 actions, false, &error); 6269 } 6270 6271 /** 6272 * Validate a flow supported by the NIC. 6273 * 6274 * @see rte_flow_validate() 6275 * @see rte_flow_ops 6276 */ 6277 int 6278 mlx5_flow_validate(struct rte_eth_dev *dev, 6279 const struct rte_flow_attr *attr, 6280 const struct rte_flow_item items[], 6281 const struct rte_flow_action original_actions[], 6282 struct rte_flow_error *error) 6283 { 6284 int hairpin_flow; 6285 struct mlx5_translated_action_handle 6286 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6287 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6288 const struct rte_flow_action *actions; 6289 struct rte_flow_action *translated_actions = NULL; 6290 int ret = flow_action_handles_translate(dev, original_actions, 6291 indir_actions, 6292 &indir_actions_n, 6293 &translated_actions, error); 6294 6295 if (ret) 6296 return ret; 6297 actions = translated_actions ? translated_actions : original_actions; 6298 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6299 ret = flow_drv_validate(dev, attr, items, actions, 6300 true, hairpin_flow, error); 6301 rte_free(translated_actions); 6302 return ret; 6303 } 6304 6305 /** 6306 * Create a flow. 6307 * 6308 * @see rte_flow_create() 6309 * @see rte_flow_ops 6310 */ 6311 struct rte_flow * 6312 mlx5_flow_create(struct rte_eth_dev *dev, 6313 const struct rte_flow_attr *attr, 6314 const struct rte_flow_item items[], 6315 const struct rte_flow_action actions[], 6316 struct rte_flow_error *error) 6317 { 6318 struct mlx5_priv *priv = dev->data->dev_private; 6319 6320 /* 6321 * If the device is not started yet, it is not allowed to created a 6322 * flow from application. PMD default flows and traffic control flows 6323 * are not affected. 6324 */ 6325 if (unlikely(!dev->data->dev_started)) { 6326 DRV_LOG(DEBUG, "port %u is not started when " 6327 "inserting a flow", dev->data->port_id); 6328 rte_flow_error_set(error, ENODEV, 6329 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6330 NULL, 6331 "port not started"); 6332 return NULL; 6333 } 6334 6335 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows, 6336 attr, items, actions, true, error); 6337 } 6338 6339 /** 6340 * Destroy a flow in a list. 6341 * 6342 * @param dev 6343 * Pointer to Ethernet device. 6344 * @param list 6345 * Pointer to the Indexed flow list. If this parameter NULL, 6346 * there is no flow removal from the list. Be noted that as 6347 * flow is add to the indexed list, memory of the indexed 6348 * list points to maybe changed as flow destroyed. 6349 * @param[in] flow_idx 6350 * Index of flow to destroy. 6351 */ 6352 static void 6353 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 6354 uint32_t flow_idx) 6355 { 6356 struct mlx5_priv *priv = dev->data->dev_private; 6357 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6358 [MLX5_IPOOL_RTE_FLOW], flow_idx); 6359 6360 if (!flow) 6361 return; 6362 /* 6363 * Update RX queue flags only if port is started, otherwise it is 6364 * already clean. 6365 */ 6366 if (dev->data->dev_started) 6367 flow_rxq_flags_trim(dev, flow); 6368 flow_drv_destroy(dev, flow); 6369 if (list) { 6370 rte_spinlock_lock(&priv->flow_list_lock); 6371 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, 6372 flow_idx, flow, next); 6373 rte_spinlock_unlock(&priv->flow_list_lock); 6374 } 6375 if (flow->tunnel) { 6376 struct mlx5_flow_tunnel *tunnel; 6377 6378 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 6379 RTE_VERIFY(tunnel); 6380 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 6381 mlx5_flow_tunnel_free(dev, tunnel); 6382 } 6383 flow_mreg_del_copy_action(dev, flow); 6384 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx); 6385 } 6386 6387 /** 6388 * Destroy all flows. 6389 * 6390 * @param dev 6391 * Pointer to Ethernet device. 6392 * @param list 6393 * Pointer to the Indexed flow list. 6394 * @param active 6395 * If flushing is called avtively. 6396 */ 6397 void 6398 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active) 6399 { 6400 uint32_t num_flushed = 0; 6401 6402 while (*list) { 6403 flow_list_destroy(dev, list, *list); 6404 num_flushed++; 6405 } 6406 if (active) { 6407 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 6408 dev->data->port_id, num_flushed); 6409 } 6410 } 6411 6412 /** 6413 * Stop all default actions for flows. 6414 * 6415 * @param dev 6416 * Pointer to Ethernet device. 6417 */ 6418 void 6419 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6420 { 6421 flow_mreg_del_default_copy_action(dev); 6422 flow_rxq_flags_clear(dev); 6423 } 6424 6425 /** 6426 * Start all default actions for flows. 6427 * 6428 * @param dev 6429 * Pointer to Ethernet device. 6430 * @return 6431 * 0 on success, a negative errno value otherwise and rte_errno is set. 6432 */ 6433 int 6434 mlx5_flow_start_default(struct rte_eth_dev *dev) 6435 { 6436 struct rte_flow_error error; 6437 6438 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6439 return flow_mreg_add_default_copy_action(dev, &error); 6440 } 6441 6442 /** 6443 * Release key of thread specific flow workspace data. 6444 */ 6445 void 6446 flow_release_workspace(void *data) 6447 { 6448 struct mlx5_flow_workspace *wks = data; 6449 struct mlx5_flow_workspace *next; 6450 6451 while (wks) { 6452 next = wks->next; 6453 free(wks->rss_desc.queue); 6454 free(wks); 6455 wks = next; 6456 } 6457 } 6458 6459 /** 6460 * Get thread specific current flow workspace. 6461 * 6462 * @return pointer to thread specific flow workspace data, NULL on error. 6463 */ 6464 struct mlx5_flow_workspace* 6465 mlx5_flow_get_thread_workspace(void) 6466 { 6467 struct mlx5_flow_workspace *data; 6468 6469 data = mlx5_flow_os_get_specific_workspace(); 6470 MLX5_ASSERT(data && data->inuse); 6471 if (!data || !data->inuse) 6472 DRV_LOG(ERR, "flow workspace not initialized."); 6473 return data; 6474 } 6475 6476 /** 6477 * Allocate and init new flow workspace. 6478 * 6479 * @return pointer to flow workspace data, NULL on error. 6480 */ 6481 static struct mlx5_flow_workspace* 6482 flow_alloc_thread_workspace(void) 6483 { 6484 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data)); 6485 6486 if (!data) { 6487 DRV_LOG(ERR, "Failed to allocate flow workspace " 6488 "memory."); 6489 return NULL; 6490 } 6491 data->rss_desc.queue = calloc(1, 6492 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6493 if (!data->rss_desc.queue) 6494 goto err; 6495 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM; 6496 return data; 6497 err: 6498 if (data->rss_desc.queue) 6499 free(data->rss_desc.queue); 6500 free(data); 6501 return NULL; 6502 } 6503 6504 /** 6505 * Get new thread specific flow workspace. 6506 * 6507 * If current workspace inuse, create new one and set as current. 6508 * 6509 * @return pointer to thread specific flow workspace data, NULL on error. 6510 */ 6511 static struct mlx5_flow_workspace* 6512 mlx5_flow_push_thread_workspace(void) 6513 { 6514 struct mlx5_flow_workspace *curr; 6515 struct mlx5_flow_workspace *data; 6516 6517 curr = mlx5_flow_os_get_specific_workspace(); 6518 if (!curr) { 6519 data = flow_alloc_thread_workspace(); 6520 if (!data) 6521 return NULL; 6522 } else if (!curr->inuse) { 6523 data = curr; 6524 } else if (curr->next) { 6525 data = curr->next; 6526 } else { 6527 data = flow_alloc_thread_workspace(); 6528 if (!data) 6529 return NULL; 6530 curr->next = data; 6531 data->prev = curr; 6532 } 6533 data->inuse = 1; 6534 data->flow_idx = 0; 6535 /* Set as current workspace */ 6536 if (mlx5_flow_os_set_specific_workspace(data)) 6537 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6538 return data; 6539 } 6540 6541 /** 6542 * Close current thread specific flow workspace. 6543 * 6544 * If previous workspace available, set it as current. 6545 * 6546 * @return pointer to thread specific flow workspace data, NULL on error. 6547 */ 6548 static void 6549 mlx5_flow_pop_thread_workspace(void) 6550 { 6551 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace(); 6552 6553 if (!data) 6554 return; 6555 if (!data->inuse) { 6556 DRV_LOG(ERR, "Failed to close unused flow workspace."); 6557 return; 6558 } 6559 data->inuse = 0; 6560 if (!data->prev) 6561 return; 6562 if (mlx5_flow_os_set_specific_workspace(data->prev)) 6563 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6564 } 6565 6566 /** 6567 * Verify the flow list is empty 6568 * 6569 * @param dev 6570 * Pointer to Ethernet device. 6571 * 6572 * @return the number of flows not released. 6573 */ 6574 int 6575 mlx5_flow_verify(struct rte_eth_dev *dev) 6576 { 6577 struct mlx5_priv *priv = dev->data->dev_private; 6578 struct rte_flow *flow; 6579 uint32_t idx; 6580 int ret = 0; 6581 6582 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx, 6583 flow, next) { 6584 DRV_LOG(DEBUG, "port %u flow %p still referenced", 6585 dev->data->port_id, (void *)flow); 6586 ++ret; 6587 } 6588 return ret; 6589 } 6590 6591 /** 6592 * Enable default hairpin egress flow. 6593 * 6594 * @param dev 6595 * Pointer to Ethernet device. 6596 * @param queue 6597 * The queue index. 6598 * 6599 * @return 6600 * 0 on success, a negative errno value otherwise and rte_errno is set. 6601 */ 6602 int 6603 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 6604 uint32_t queue) 6605 { 6606 struct mlx5_priv *priv = dev->data->dev_private; 6607 const struct rte_flow_attr attr = { 6608 .egress = 1, 6609 .priority = 0, 6610 }; 6611 struct mlx5_rte_flow_item_tx_queue queue_spec = { 6612 .queue = queue, 6613 }; 6614 struct mlx5_rte_flow_item_tx_queue queue_mask = { 6615 .queue = UINT32_MAX, 6616 }; 6617 struct rte_flow_item items[] = { 6618 { 6619 .type = (enum rte_flow_item_type) 6620 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6621 .spec = &queue_spec, 6622 .last = NULL, 6623 .mask = &queue_mask, 6624 }, 6625 { 6626 .type = RTE_FLOW_ITEM_TYPE_END, 6627 }, 6628 }; 6629 struct rte_flow_action_jump jump = { 6630 .group = MLX5_HAIRPIN_TX_TABLE, 6631 }; 6632 struct rte_flow_action actions[2]; 6633 uint32_t flow_idx; 6634 struct rte_flow_error error; 6635 6636 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 6637 actions[0].conf = &jump; 6638 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 6639 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6640 &attr, items, actions, false, &error); 6641 if (!flow_idx) { 6642 DRV_LOG(DEBUG, 6643 "Failed to create ctrl flow: rte_errno(%d)," 6644 " type(%d), message(%s)", 6645 rte_errno, error.type, 6646 error.message ? error.message : " (no stated reason)"); 6647 return -rte_errno; 6648 } 6649 return 0; 6650 } 6651 6652 /** 6653 * Enable a control flow configured from the control plane. 6654 * 6655 * @param dev 6656 * Pointer to Ethernet device. 6657 * @param eth_spec 6658 * An Ethernet flow spec to apply. 6659 * @param eth_mask 6660 * An Ethernet flow mask to apply. 6661 * @param vlan_spec 6662 * A VLAN flow spec to apply. 6663 * @param vlan_mask 6664 * A VLAN flow mask to apply. 6665 * 6666 * @return 6667 * 0 on success, a negative errno value otherwise and rte_errno is set. 6668 */ 6669 int 6670 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 6671 struct rte_flow_item_eth *eth_spec, 6672 struct rte_flow_item_eth *eth_mask, 6673 struct rte_flow_item_vlan *vlan_spec, 6674 struct rte_flow_item_vlan *vlan_mask) 6675 { 6676 struct mlx5_priv *priv = dev->data->dev_private; 6677 const struct rte_flow_attr attr = { 6678 .ingress = 1, 6679 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 6680 }; 6681 struct rte_flow_item items[] = { 6682 { 6683 .type = RTE_FLOW_ITEM_TYPE_ETH, 6684 .spec = eth_spec, 6685 .last = NULL, 6686 .mask = eth_mask, 6687 }, 6688 { 6689 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 6690 RTE_FLOW_ITEM_TYPE_END, 6691 .spec = vlan_spec, 6692 .last = NULL, 6693 .mask = vlan_mask, 6694 }, 6695 { 6696 .type = RTE_FLOW_ITEM_TYPE_END, 6697 }, 6698 }; 6699 uint16_t queue[priv->reta_idx_n]; 6700 struct rte_flow_action_rss action_rss = { 6701 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 6702 .level = 0, 6703 .types = priv->rss_conf.rss_hf, 6704 .key_len = priv->rss_conf.rss_key_len, 6705 .queue_num = priv->reta_idx_n, 6706 .key = priv->rss_conf.rss_key, 6707 .queue = queue, 6708 }; 6709 struct rte_flow_action actions[] = { 6710 { 6711 .type = RTE_FLOW_ACTION_TYPE_RSS, 6712 .conf = &action_rss, 6713 }, 6714 { 6715 .type = RTE_FLOW_ACTION_TYPE_END, 6716 }, 6717 }; 6718 uint32_t flow_idx; 6719 struct rte_flow_error error; 6720 unsigned int i; 6721 6722 if (!priv->reta_idx_n || !priv->rxqs_n) { 6723 return 0; 6724 } 6725 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 6726 action_rss.types = 0; 6727 for (i = 0; i != priv->reta_idx_n; ++i) 6728 queue[i] = (*priv->reta_idx)[i]; 6729 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6730 &attr, items, actions, false, &error); 6731 if (!flow_idx) 6732 return -rte_errno; 6733 return 0; 6734 } 6735 6736 /** 6737 * Enable a flow control configured from the control plane. 6738 * 6739 * @param dev 6740 * Pointer to Ethernet device. 6741 * @param eth_spec 6742 * An Ethernet flow spec to apply. 6743 * @param eth_mask 6744 * An Ethernet flow mask to apply. 6745 * 6746 * @return 6747 * 0 on success, a negative errno value otherwise and rte_errno is set. 6748 */ 6749 int 6750 mlx5_ctrl_flow(struct rte_eth_dev *dev, 6751 struct rte_flow_item_eth *eth_spec, 6752 struct rte_flow_item_eth *eth_mask) 6753 { 6754 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 6755 } 6756 6757 /** 6758 * Create default miss flow rule matching lacp traffic 6759 * 6760 * @param dev 6761 * Pointer to Ethernet device. 6762 * @param eth_spec 6763 * An Ethernet flow spec to apply. 6764 * 6765 * @return 6766 * 0 on success, a negative errno value otherwise and rte_errno is set. 6767 */ 6768 int 6769 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 6770 { 6771 struct mlx5_priv *priv = dev->data->dev_private; 6772 /* 6773 * The LACP matching is done by only using ether type since using 6774 * a multicast dst mac causes kernel to give low priority to this flow. 6775 */ 6776 static const struct rte_flow_item_eth lacp_spec = { 6777 .type = RTE_BE16(0x8809), 6778 }; 6779 static const struct rte_flow_item_eth lacp_mask = { 6780 .type = 0xffff, 6781 }; 6782 const struct rte_flow_attr attr = { 6783 .ingress = 1, 6784 }; 6785 struct rte_flow_item items[] = { 6786 { 6787 .type = RTE_FLOW_ITEM_TYPE_ETH, 6788 .spec = &lacp_spec, 6789 .mask = &lacp_mask, 6790 }, 6791 { 6792 .type = RTE_FLOW_ITEM_TYPE_END, 6793 }, 6794 }; 6795 struct rte_flow_action actions[] = { 6796 { 6797 .type = (enum rte_flow_action_type) 6798 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 6799 }, 6800 { 6801 .type = RTE_FLOW_ACTION_TYPE_END, 6802 }, 6803 }; 6804 struct rte_flow_error error; 6805 uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6806 &attr, items, actions, false, &error); 6807 6808 if (!flow_idx) 6809 return -rte_errno; 6810 return 0; 6811 } 6812 6813 /** 6814 * Destroy a flow. 6815 * 6816 * @see rte_flow_destroy() 6817 * @see rte_flow_ops 6818 */ 6819 int 6820 mlx5_flow_destroy(struct rte_eth_dev *dev, 6821 struct rte_flow *flow, 6822 struct rte_flow_error *error __rte_unused) 6823 { 6824 struct mlx5_priv *priv = dev->data->dev_private; 6825 6826 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow); 6827 return 0; 6828 } 6829 6830 /** 6831 * Destroy all flows. 6832 * 6833 * @see rte_flow_flush() 6834 * @see rte_flow_ops 6835 */ 6836 int 6837 mlx5_flow_flush(struct rte_eth_dev *dev, 6838 struct rte_flow_error *error __rte_unused) 6839 { 6840 struct mlx5_priv *priv = dev->data->dev_private; 6841 6842 mlx5_flow_list_flush(dev, &priv->flows, false); 6843 return 0; 6844 } 6845 6846 /** 6847 * Isolated mode. 6848 * 6849 * @see rte_flow_isolate() 6850 * @see rte_flow_ops 6851 */ 6852 int 6853 mlx5_flow_isolate(struct rte_eth_dev *dev, 6854 int enable, 6855 struct rte_flow_error *error) 6856 { 6857 struct mlx5_priv *priv = dev->data->dev_private; 6858 6859 if (dev->data->dev_started) { 6860 rte_flow_error_set(error, EBUSY, 6861 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6862 NULL, 6863 "port must be stopped first"); 6864 return -rte_errno; 6865 } 6866 priv->isolated = !!enable; 6867 if (enable) 6868 dev->dev_ops = &mlx5_dev_ops_isolate; 6869 else 6870 dev->dev_ops = &mlx5_dev_ops; 6871 6872 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 6873 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 6874 6875 return 0; 6876 } 6877 6878 /** 6879 * Query a flow. 6880 * 6881 * @see rte_flow_query() 6882 * @see rte_flow_ops 6883 */ 6884 static int 6885 flow_drv_query(struct rte_eth_dev *dev, 6886 uint32_t flow_idx, 6887 const struct rte_flow_action *actions, 6888 void *data, 6889 struct rte_flow_error *error) 6890 { 6891 struct mlx5_priv *priv = dev->data->dev_private; 6892 const struct mlx5_flow_driver_ops *fops; 6893 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6894 [MLX5_IPOOL_RTE_FLOW], 6895 flow_idx); 6896 enum mlx5_flow_drv_type ftype; 6897 6898 if (!flow) { 6899 return rte_flow_error_set(error, ENOENT, 6900 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6901 NULL, 6902 "invalid flow handle"); 6903 } 6904 ftype = flow->drv_type; 6905 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 6906 fops = flow_get_drv_ops(ftype); 6907 6908 return fops->query(dev, flow, actions, data, error); 6909 } 6910 6911 /** 6912 * Query a flow. 6913 * 6914 * @see rte_flow_query() 6915 * @see rte_flow_ops 6916 */ 6917 int 6918 mlx5_flow_query(struct rte_eth_dev *dev, 6919 struct rte_flow *flow, 6920 const struct rte_flow_action *actions, 6921 void *data, 6922 struct rte_flow_error *error) 6923 { 6924 int ret; 6925 6926 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 6927 error); 6928 if (ret < 0) 6929 return ret; 6930 return 0; 6931 } 6932 6933 /** 6934 * Get rte_flow callbacks. 6935 * 6936 * @param dev 6937 * Pointer to Ethernet device structure. 6938 * @param ops 6939 * Pointer to operation-specific structure. 6940 * 6941 * @return 0 6942 */ 6943 int 6944 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 6945 const struct rte_flow_ops **ops) 6946 { 6947 *ops = &mlx5_flow_ops; 6948 return 0; 6949 } 6950 6951 /** 6952 * Validate meter policy actions. 6953 * Dispatcher for action type specific validation. 6954 * 6955 * @param[in] dev 6956 * Pointer to the Ethernet device structure. 6957 * @param[in] action 6958 * The meter policy action object to validate. 6959 * @param[in] attr 6960 * Attributes of flow to determine steering domain. 6961 * @param[out] is_rss 6962 * Is RSS or not. 6963 * @param[out] domain_bitmap 6964 * Domain bitmap. 6965 * @param[out] is_def_policy 6966 * Is default policy or not. 6967 * @param[out] error 6968 * Perform verbose error reporting if not NULL. Initialized in case of 6969 * error only. 6970 * 6971 * @return 6972 * 0 on success, otherwise negative errno value. 6973 */ 6974 int 6975 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev, 6976 const struct rte_flow_action *actions[RTE_COLORS], 6977 struct rte_flow_attr *attr, 6978 bool *is_rss, 6979 uint8_t *domain_bitmap, 6980 bool *is_def_policy, 6981 struct rte_mtr_error *error) 6982 { 6983 const struct mlx5_flow_driver_ops *fops; 6984 6985 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 6986 return fops->validate_mtr_acts(dev, actions, attr, 6987 is_rss, domain_bitmap, is_def_policy, error); 6988 } 6989 6990 /** 6991 * Destroy the meter table set. 6992 * 6993 * @param[in] dev 6994 * Pointer to Ethernet device. 6995 * @param[in] mtr_policy 6996 * Meter policy struct. 6997 */ 6998 void 6999 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, 7000 struct mlx5_flow_meter_policy *mtr_policy) 7001 { 7002 const struct mlx5_flow_driver_ops *fops; 7003 7004 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7005 fops->destroy_mtr_acts(dev, mtr_policy); 7006 } 7007 7008 /** 7009 * Create policy action, lock free, 7010 * (mutex should be acquired by caller). 7011 * Dispatcher for action type specific call. 7012 * 7013 * @param[in] dev 7014 * Pointer to the Ethernet device structure. 7015 * @param[in] mtr_policy 7016 * Meter policy struct. 7017 * @param[in] action 7018 * Action specification used to create meter actions. 7019 * @param[out] error 7020 * Perform verbose error reporting if not NULL. Initialized in case of 7021 * error only. 7022 * 7023 * @return 7024 * 0 on success, otherwise negative errno value. 7025 */ 7026 int 7027 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, 7028 struct mlx5_flow_meter_policy *mtr_policy, 7029 const struct rte_flow_action *actions[RTE_COLORS], 7030 struct rte_mtr_error *error) 7031 { 7032 const struct mlx5_flow_driver_ops *fops; 7033 7034 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7035 return fops->create_mtr_acts(dev, mtr_policy, actions, error); 7036 } 7037 7038 /** 7039 * Create policy rules, lock free, 7040 * (mutex should be acquired by caller). 7041 * Dispatcher for action type specific call. 7042 * 7043 * @param[in] dev 7044 * Pointer to the Ethernet device structure. 7045 * @param[in] mtr_policy 7046 * Meter policy struct. 7047 * 7048 * @return 7049 * 0 on success, -1 otherwise. 7050 */ 7051 int 7052 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, 7053 struct mlx5_flow_meter_policy *mtr_policy) 7054 { 7055 const struct mlx5_flow_driver_ops *fops; 7056 7057 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7058 return fops->create_policy_rules(dev, mtr_policy); 7059 } 7060 7061 /** 7062 * Destroy policy rules, lock free, 7063 * (mutex should be acquired by caller). 7064 * Dispatcher for action type specific call. 7065 * 7066 * @param[in] dev 7067 * Pointer to the Ethernet device structure. 7068 * @param[in] mtr_policy 7069 * Meter policy struct. 7070 */ 7071 void 7072 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev, 7073 struct mlx5_flow_meter_policy *mtr_policy) 7074 { 7075 const struct mlx5_flow_driver_ops *fops; 7076 7077 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7078 fops->destroy_policy_rules(dev, mtr_policy); 7079 } 7080 7081 /** 7082 * Destroy the default policy table set. 7083 * 7084 * @param[in] dev 7085 * Pointer to Ethernet device. 7086 */ 7087 void 7088 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev) 7089 { 7090 const struct mlx5_flow_driver_ops *fops; 7091 7092 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7093 fops->destroy_def_policy(dev); 7094 } 7095 7096 /** 7097 * Destroy the default policy table set. 7098 * 7099 * @param[in] dev 7100 * Pointer to Ethernet device. 7101 * 7102 * @return 7103 * 0 on success, -1 otherwise. 7104 */ 7105 int 7106 mlx5_flow_create_def_policy(struct rte_eth_dev *dev) 7107 { 7108 const struct mlx5_flow_driver_ops *fops; 7109 7110 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7111 return fops->create_def_policy(dev); 7112 } 7113 7114 /** 7115 * Create the needed meter and suffix tables. 7116 * 7117 * @param[in] dev 7118 * Pointer to Ethernet device. 7119 * 7120 * @return 7121 * 0 on success, -1 otherwise. 7122 */ 7123 int 7124 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7125 struct mlx5_flow_meter_info *fm, 7126 uint32_t mtr_idx, 7127 uint8_t domain_bitmap) 7128 { 7129 const struct mlx5_flow_driver_ops *fops; 7130 7131 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7132 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap); 7133 } 7134 7135 /** 7136 * Destroy the meter table set. 7137 * 7138 * @param[in] dev 7139 * Pointer to Ethernet device. 7140 * @param[in] tbl 7141 * Pointer to the meter table set. 7142 */ 7143 void 7144 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7145 struct mlx5_flow_meter_info *fm) 7146 { 7147 const struct mlx5_flow_driver_ops *fops; 7148 7149 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7150 fops->destroy_mtr_tbls(dev, fm); 7151 } 7152 7153 /** 7154 * Destroy the global meter drop table. 7155 * 7156 * @param[in] dev 7157 * Pointer to Ethernet device. 7158 */ 7159 void 7160 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev) 7161 { 7162 const struct mlx5_flow_driver_ops *fops; 7163 7164 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7165 fops->destroy_mtr_drop_tbls(dev); 7166 } 7167 7168 /** 7169 * Allocate the needed aso flow meter id. 7170 * 7171 * @param[in] dev 7172 * Pointer to Ethernet device. 7173 * 7174 * @return 7175 * Index to aso flow meter on success, NULL otherwise. 7176 */ 7177 uint32_t 7178 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev) 7179 { 7180 const struct mlx5_flow_driver_ops *fops; 7181 7182 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7183 return fops->create_meter(dev); 7184 } 7185 7186 /** 7187 * Free the aso flow meter id. 7188 * 7189 * @param[in] dev 7190 * Pointer to Ethernet device. 7191 * @param[in] mtr_idx 7192 * Index to aso flow meter to be free. 7193 * 7194 * @return 7195 * 0 on success. 7196 */ 7197 void 7198 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx) 7199 { 7200 const struct mlx5_flow_driver_ops *fops; 7201 7202 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7203 fops->free_meter(dev, mtr_idx); 7204 } 7205 7206 /** 7207 * Allocate a counter. 7208 * 7209 * @param[in] dev 7210 * Pointer to Ethernet device structure. 7211 * 7212 * @return 7213 * Index to allocated counter on success, 0 otherwise. 7214 */ 7215 uint32_t 7216 mlx5_counter_alloc(struct rte_eth_dev *dev) 7217 { 7218 const struct mlx5_flow_driver_ops *fops; 7219 struct rte_flow_attr attr = { .transfer = 0 }; 7220 7221 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7222 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7223 return fops->counter_alloc(dev); 7224 } 7225 DRV_LOG(ERR, 7226 "port %u counter allocate is not supported.", 7227 dev->data->port_id); 7228 return 0; 7229 } 7230 7231 /** 7232 * Free a counter. 7233 * 7234 * @param[in] dev 7235 * Pointer to Ethernet device structure. 7236 * @param[in] cnt 7237 * Index to counter to be free. 7238 */ 7239 void 7240 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7241 { 7242 const struct mlx5_flow_driver_ops *fops; 7243 struct rte_flow_attr attr = { .transfer = 0 }; 7244 7245 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7246 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7247 fops->counter_free(dev, cnt); 7248 return; 7249 } 7250 DRV_LOG(ERR, 7251 "port %u counter free is not supported.", 7252 dev->data->port_id); 7253 } 7254 7255 /** 7256 * Query counter statistics. 7257 * 7258 * @param[in] dev 7259 * Pointer to Ethernet device structure. 7260 * @param[in] cnt 7261 * Index to counter to query. 7262 * @param[in] clear 7263 * Set to clear counter statistics. 7264 * @param[out] pkts 7265 * The counter hits packets number to save. 7266 * @param[out] bytes 7267 * The counter hits bytes number to save. 7268 * 7269 * @return 7270 * 0 on success, a negative errno value otherwise. 7271 */ 7272 int 7273 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7274 bool clear, uint64_t *pkts, uint64_t *bytes) 7275 { 7276 const struct mlx5_flow_driver_ops *fops; 7277 struct rte_flow_attr attr = { .transfer = 0 }; 7278 7279 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7280 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7281 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7282 } 7283 DRV_LOG(ERR, 7284 "port %u counter query is not supported.", 7285 dev->data->port_id); 7286 return -ENOTSUP; 7287 } 7288 7289 /** 7290 * Allocate a new memory for the counter values wrapped by all the needed 7291 * management. 7292 * 7293 * @param[in] sh 7294 * Pointer to mlx5_dev_ctx_shared object. 7295 * 7296 * @return 7297 * 0 on success, a negative errno value otherwise. 7298 */ 7299 static int 7300 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7301 { 7302 struct mlx5_devx_mkey_attr mkey_attr; 7303 struct mlx5_counter_stats_mem_mng *mem_mng; 7304 volatile struct flow_counter_stats *raw_data; 7305 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7306 int size = (sizeof(struct flow_counter_stats) * 7307 MLX5_COUNTERS_PER_POOL + 7308 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7309 sizeof(struct mlx5_counter_stats_mem_mng); 7310 size_t pgsize = rte_mem_page_size(); 7311 uint8_t *mem; 7312 int i; 7313 7314 if (pgsize == (size_t)-1) { 7315 DRV_LOG(ERR, "Failed to get mem page size"); 7316 rte_errno = ENOMEM; 7317 return -ENOMEM; 7318 } 7319 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7320 if (!mem) { 7321 rte_errno = ENOMEM; 7322 return -ENOMEM; 7323 } 7324 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7325 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7326 mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size, 7327 IBV_ACCESS_LOCAL_WRITE); 7328 if (!mem_mng->umem) { 7329 rte_errno = errno; 7330 mlx5_free(mem); 7331 return -rte_errno; 7332 } 7333 mkey_attr.addr = (uintptr_t)mem; 7334 mkey_attr.size = size; 7335 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 7336 mkey_attr.pd = sh->pdn; 7337 mkey_attr.log_entity_size = 0; 7338 mkey_attr.pg_access = 0; 7339 mkey_attr.klm_array = NULL; 7340 mkey_attr.klm_num = 0; 7341 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write; 7342 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; 7343 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); 7344 if (!mem_mng->dm) { 7345 mlx5_os_umem_dereg(mem_mng->umem); 7346 rte_errno = errno; 7347 mlx5_free(mem); 7348 return -rte_errno; 7349 } 7350 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7351 raw_data = (volatile struct flow_counter_stats *)mem; 7352 for (i = 0; i < raws_n; ++i) { 7353 mem_mng->raws[i].mem_mng = mem_mng; 7354 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7355 } 7356 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7357 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7358 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7359 next); 7360 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7361 sh->cmng.mem_mng = mem_mng; 7362 return 0; 7363 } 7364 7365 /** 7366 * Set the statistic memory to the new counter pool. 7367 * 7368 * @param[in] sh 7369 * Pointer to mlx5_dev_ctx_shared object. 7370 * @param[in] pool 7371 * Pointer to the pool to set the statistic memory. 7372 * 7373 * @return 7374 * 0 on success, a negative errno value otherwise. 7375 */ 7376 static int 7377 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7378 struct mlx5_flow_counter_pool *pool) 7379 { 7380 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7381 /* Resize statistic memory once used out. */ 7382 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7383 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7384 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7385 return -1; 7386 } 7387 rte_spinlock_lock(&pool->sl); 7388 pool->raw = cmng->mem_mng->raws + pool->index % 7389 MLX5_CNT_CONTAINER_RESIZE; 7390 rte_spinlock_unlock(&pool->sl); 7391 pool->raw_hw = NULL; 7392 return 0; 7393 } 7394 7395 #define MLX5_POOL_QUERY_FREQ_US 1000000 7396 7397 /** 7398 * Set the periodic procedure for triggering asynchronous batch queries for all 7399 * the counter pools. 7400 * 7401 * @param[in] sh 7402 * Pointer to mlx5_dev_ctx_shared object. 7403 */ 7404 void 7405 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7406 { 7407 uint32_t pools_n, us; 7408 7409 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7410 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7411 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7412 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7413 sh->cmng.query_thread_on = 0; 7414 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7415 } else { 7416 sh->cmng.query_thread_on = 1; 7417 } 7418 } 7419 7420 /** 7421 * The periodic procedure for triggering asynchronous batch queries for all the 7422 * counter pools. This function is probably called by the host thread. 7423 * 7424 * @param[in] arg 7425 * The parameter for the alarm process. 7426 */ 7427 void 7428 mlx5_flow_query_alarm(void *arg) 7429 { 7430 struct mlx5_dev_ctx_shared *sh = arg; 7431 int ret; 7432 uint16_t pool_index = sh->cmng.pool_index; 7433 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7434 struct mlx5_flow_counter_pool *pool; 7435 uint16_t n_valid; 7436 7437 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7438 goto set_alarm; 7439 rte_spinlock_lock(&cmng->pool_update_sl); 7440 pool = cmng->pools[pool_index]; 7441 n_valid = cmng->n_valid; 7442 rte_spinlock_unlock(&cmng->pool_update_sl); 7443 /* Set the statistic memory to the new created pool. */ 7444 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7445 goto set_alarm; 7446 if (pool->raw_hw) 7447 /* There is a pool query in progress. */ 7448 goto set_alarm; 7449 pool->raw_hw = 7450 LIST_FIRST(&sh->cmng.free_stat_raws); 7451 if (!pool->raw_hw) 7452 /* No free counter statistics raw memory. */ 7453 goto set_alarm; 7454 /* 7455 * Identify the counters released between query trigger and query 7456 * handle more efficiently. The counter released in this gap period 7457 * should wait for a new round of query as the new arrived packets 7458 * will not be taken into account. 7459 */ 7460 pool->query_gen++; 7461 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7462 MLX5_COUNTERS_PER_POOL, 7463 NULL, NULL, 7464 pool->raw_hw->mem_mng->dm->id, 7465 (void *)(uintptr_t) 7466 pool->raw_hw->data, 7467 sh->devx_comp, 7468 (uint64_t)(uintptr_t)pool); 7469 if (ret) { 7470 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7471 " %d", pool->min_dcs->id); 7472 pool->raw_hw = NULL; 7473 goto set_alarm; 7474 } 7475 LIST_REMOVE(pool->raw_hw, next); 7476 sh->cmng.pending_queries++; 7477 pool_index++; 7478 if (pool_index >= n_valid) 7479 pool_index = 0; 7480 set_alarm: 7481 sh->cmng.pool_index = pool_index; 7482 mlx5_set_query_alarm(sh); 7483 } 7484 7485 /** 7486 * Check and callback event for new aged flow in the counter pool 7487 * 7488 * @param[in] sh 7489 * Pointer to mlx5_dev_ctx_shared object. 7490 * @param[in] pool 7491 * Pointer to Current counter pool. 7492 */ 7493 static void 7494 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7495 struct mlx5_flow_counter_pool *pool) 7496 { 7497 struct mlx5_priv *priv; 7498 struct mlx5_flow_counter *cnt; 7499 struct mlx5_age_info *age_info; 7500 struct mlx5_age_param *age_param; 7501 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7502 struct mlx5_counter_stats_raw *prev = pool->raw; 7503 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7504 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7505 uint16_t expected = AGE_CANDIDATE; 7506 uint32_t i; 7507 7508 pool->time_of_last_age_check = curr_time; 7509 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 7510 cnt = MLX5_POOL_GET_CNT(pool, i); 7511 age_param = MLX5_CNT_TO_AGE(cnt); 7512 if (__atomic_load_n(&age_param->state, 7513 __ATOMIC_RELAXED) != AGE_CANDIDATE) 7514 continue; 7515 if (cur->data[i].hits != prev->data[i].hits) { 7516 __atomic_store_n(&age_param->sec_since_last_hit, 0, 7517 __ATOMIC_RELAXED); 7518 continue; 7519 } 7520 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 7521 time_delta, 7522 __ATOMIC_RELAXED) <= age_param->timeout) 7523 continue; 7524 /** 7525 * Hold the lock first, or if between the 7526 * state AGE_TMOUT and tailq operation the 7527 * release happened, the release procedure 7528 * may delete a non-existent tailq node. 7529 */ 7530 priv = rte_eth_devices[age_param->port_id].data->dev_private; 7531 age_info = GET_PORT_AGE_INFO(priv); 7532 rte_spinlock_lock(&age_info->aged_sl); 7533 if (__atomic_compare_exchange_n(&age_param->state, &expected, 7534 AGE_TMOUT, false, 7535 __ATOMIC_RELAXED, 7536 __ATOMIC_RELAXED)) { 7537 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 7538 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 7539 } 7540 rte_spinlock_unlock(&age_info->aged_sl); 7541 } 7542 mlx5_age_event_prepare(sh); 7543 } 7544 7545 /** 7546 * Handler for the HW respond about ready values from an asynchronous batch 7547 * query. This function is probably called by the host thread. 7548 * 7549 * @param[in] sh 7550 * The pointer to the shared device context. 7551 * @param[in] async_id 7552 * The Devx async ID. 7553 * @param[in] status 7554 * The status of the completion. 7555 */ 7556 void 7557 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 7558 uint64_t async_id, int status) 7559 { 7560 struct mlx5_flow_counter_pool *pool = 7561 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 7562 struct mlx5_counter_stats_raw *raw_to_free; 7563 uint8_t query_gen = pool->query_gen ^ 1; 7564 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7565 enum mlx5_counter_type cnt_type = 7566 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 7567 MLX5_COUNTER_TYPE_ORIGIN; 7568 7569 if (unlikely(status)) { 7570 raw_to_free = pool->raw_hw; 7571 } else { 7572 raw_to_free = pool->raw; 7573 if (pool->is_aged) 7574 mlx5_flow_aging_check(sh, pool); 7575 rte_spinlock_lock(&pool->sl); 7576 pool->raw = pool->raw_hw; 7577 rte_spinlock_unlock(&pool->sl); 7578 /* Be sure the new raw counters data is updated in memory. */ 7579 rte_io_wmb(); 7580 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 7581 rte_spinlock_lock(&cmng->csl[cnt_type]); 7582 TAILQ_CONCAT(&cmng->counters[cnt_type], 7583 &pool->counters[query_gen], next); 7584 rte_spinlock_unlock(&cmng->csl[cnt_type]); 7585 } 7586 } 7587 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 7588 pool->raw_hw = NULL; 7589 sh->cmng.pending_queries--; 7590 } 7591 7592 static int 7593 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 7594 const struct flow_grp_info *grp_info, 7595 struct rte_flow_error *error) 7596 { 7597 if (grp_info->transfer && grp_info->external && 7598 grp_info->fdb_def_rule) { 7599 if (group == UINT32_MAX) 7600 return rte_flow_error_set 7601 (error, EINVAL, 7602 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7603 NULL, 7604 "group index not supported"); 7605 *table = group + 1; 7606 } else { 7607 *table = group; 7608 } 7609 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 7610 return 0; 7611 } 7612 7613 /** 7614 * Translate the rte_flow group index to HW table value. 7615 * 7616 * If tunnel offload is disabled, all group ids converted to flow table 7617 * id using the standard method. 7618 * If tunnel offload is enabled, group id can be converted using the 7619 * standard or tunnel conversion method. Group conversion method 7620 * selection depends on flags in `grp_info` parameter: 7621 * - Internal (grp_info.external == 0) groups conversion uses the 7622 * standard method. 7623 * - Group ids in JUMP action converted with the tunnel conversion. 7624 * - Group id in rule attribute conversion depends on a rule type and 7625 * group id value: 7626 * ** non zero group attributes converted with the tunnel method 7627 * ** zero group attribute in non-tunnel rule is converted using the 7628 * standard method - there's only one root table 7629 * ** zero group attribute in steer tunnel rule is converted with the 7630 * standard method - single root table 7631 * ** zero group attribute in match tunnel rule is a special OvS 7632 * case: that value is used for portability reasons. That group 7633 * id is converted with the tunnel conversion method. 7634 * 7635 * @param[in] dev 7636 * Port device 7637 * @param[in] tunnel 7638 * PMD tunnel offload object 7639 * @param[in] group 7640 * rte_flow group index value. 7641 * @param[out] table 7642 * HW table value. 7643 * @param[in] grp_info 7644 * flags used for conversion 7645 * @param[out] error 7646 * Pointer to error structure. 7647 * 7648 * @return 7649 * 0 on success, a negative errno value otherwise and rte_errno is set. 7650 */ 7651 int 7652 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 7653 const struct mlx5_flow_tunnel *tunnel, 7654 uint32_t group, uint32_t *table, 7655 const struct flow_grp_info *grp_info, 7656 struct rte_flow_error *error) 7657 { 7658 int ret; 7659 bool standard_translation; 7660 7661 if (!grp_info->skip_scale && grp_info->external && 7662 group < MLX5_MAX_TABLES_EXTERNAL) 7663 group *= MLX5_FLOW_TABLE_FACTOR; 7664 if (is_tunnel_offload_active(dev)) { 7665 standard_translation = !grp_info->external || 7666 grp_info->std_tbl_fix; 7667 } else { 7668 standard_translation = true; 7669 } 7670 DRV_LOG(DEBUG, 7671 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s", 7672 dev->data->port_id, group, grp_info->transfer, 7673 grp_info->external, grp_info->fdb_def_rule, 7674 standard_translation ? "STANDARD" : "TUNNEL"); 7675 if (standard_translation) 7676 ret = flow_group_to_table(dev->data->port_id, group, table, 7677 grp_info, error); 7678 else 7679 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 7680 table, error); 7681 7682 return ret; 7683 } 7684 7685 /** 7686 * Discover availability of metadata reg_c's. 7687 * 7688 * Iteratively use test flows to check availability. 7689 * 7690 * @param[in] dev 7691 * Pointer to the Ethernet device structure. 7692 * 7693 * @return 7694 * 0 on success, a negative errno value otherwise and rte_errno is set. 7695 */ 7696 int 7697 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 7698 { 7699 struct mlx5_priv *priv = dev->data->dev_private; 7700 struct mlx5_dev_config *config = &priv->config; 7701 enum modify_reg idx; 7702 int n = 0; 7703 7704 /* reg_c[0] and reg_c[1] are reserved. */ 7705 config->flow_mreg_c[n++] = REG_C_0; 7706 config->flow_mreg_c[n++] = REG_C_1; 7707 /* Discover availability of other reg_c's. */ 7708 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 7709 struct rte_flow_attr attr = { 7710 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 7711 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 7712 .ingress = 1, 7713 }; 7714 struct rte_flow_item items[] = { 7715 [0] = { 7716 .type = RTE_FLOW_ITEM_TYPE_END, 7717 }, 7718 }; 7719 struct rte_flow_action actions[] = { 7720 [0] = { 7721 .type = (enum rte_flow_action_type) 7722 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 7723 .conf = &(struct mlx5_flow_action_copy_mreg){ 7724 .src = REG_C_1, 7725 .dst = idx, 7726 }, 7727 }, 7728 [1] = { 7729 .type = RTE_FLOW_ACTION_TYPE_JUMP, 7730 .conf = &(struct rte_flow_action_jump){ 7731 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 7732 }, 7733 }, 7734 [2] = { 7735 .type = RTE_FLOW_ACTION_TYPE_END, 7736 }, 7737 }; 7738 uint32_t flow_idx; 7739 struct rte_flow *flow; 7740 struct rte_flow_error error; 7741 7742 if (!config->dv_flow_en) 7743 break; 7744 /* Create internal flow, validation skips copy action. */ 7745 flow_idx = flow_list_create(dev, NULL, &attr, items, 7746 actions, false, &error); 7747 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 7748 flow_idx); 7749 if (!flow) 7750 continue; 7751 config->flow_mreg_c[n++] = idx; 7752 flow_list_destroy(dev, NULL, flow_idx); 7753 } 7754 for (; n < MLX5_MREG_C_NUM; ++n) 7755 config->flow_mreg_c[n] = REG_NON; 7756 return 0; 7757 } 7758 7759 /** 7760 * Dump flow raw hw data to file 7761 * 7762 * @param[in] dev 7763 * The pointer to Ethernet device. 7764 * @param[in] file 7765 * A pointer to a file for output. 7766 * @param[out] error 7767 * Perform verbose error reporting if not NULL. PMDs initialize this 7768 * structure in case of error only. 7769 * @return 7770 * 0 on success, a nagative value otherwise. 7771 */ 7772 int 7773 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx, 7774 FILE *file, 7775 struct rte_flow_error *error __rte_unused) 7776 { 7777 struct mlx5_priv *priv = dev->data->dev_private; 7778 struct mlx5_dev_ctx_shared *sh = priv->sh; 7779 uint32_t handle_idx; 7780 int ret; 7781 struct mlx5_flow_handle *dh; 7782 struct rte_flow *flow; 7783 7784 if (!priv->config.dv_flow_en) { 7785 if (fputs("device dv flow disabled\n", file) <= 0) 7786 return -errno; 7787 return -ENOTSUP; 7788 } 7789 7790 /* dump all */ 7791 if (!flow_idx) 7792 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, 7793 sh->rx_domain, 7794 sh->tx_domain, file); 7795 /* dump one */ 7796 flow = mlx5_ipool_get(priv->sh->ipool 7797 [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx); 7798 if (!flow) 7799 return -ENOENT; 7800 7801 handle_idx = flow->dev_handles; 7802 while (handle_idx) { 7803 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], 7804 handle_idx); 7805 if (!dh) 7806 return -ENOENT; 7807 if (dh->drv_flow) { 7808 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow, 7809 file); 7810 if (ret) 7811 return -ENOENT; 7812 } 7813 handle_idx = dh->next.next; 7814 } 7815 return 0; 7816 } 7817 7818 /** 7819 * Get aged-out flows. 7820 * 7821 * @param[in] dev 7822 * Pointer to the Ethernet device structure. 7823 * @param[in] context 7824 * The address of an array of pointers to the aged-out flows contexts. 7825 * @param[in] nb_countexts 7826 * The length of context array pointers. 7827 * @param[out] error 7828 * Perform verbose error reporting if not NULL. Initialized in case of 7829 * error only. 7830 * 7831 * @return 7832 * how many contexts get in success, otherwise negative errno value. 7833 * if nb_contexts is 0, return the amount of all aged contexts. 7834 * if nb_contexts is not 0 , return the amount of aged flows reported 7835 * in the context array. 7836 */ 7837 int 7838 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 7839 uint32_t nb_contexts, struct rte_flow_error *error) 7840 { 7841 const struct mlx5_flow_driver_ops *fops; 7842 struct rte_flow_attr attr = { .transfer = 0 }; 7843 7844 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7845 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7846 return fops->get_aged_flows(dev, contexts, nb_contexts, 7847 error); 7848 } 7849 DRV_LOG(ERR, 7850 "port %u get aged flows is not supported.", 7851 dev->data->port_id); 7852 return -ENOTSUP; 7853 } 7854 7855 /* Wrapper for driver action_validate op callback */ 7856 static int 7857 flow_drv_action_validate(struct rte_eth_dev *dev, 7858 const struct rte_flow_indir_action_conf *conf, 7859 const struct rte_flow_action *action, 7860 const struct mlx5_flow_driver_ops *fops, 7861 struct rte_flow_error *error) 7862 { 7863 static const char err_msg[] = "indirect action validation unsupported"; 7864 7865 if (!fops->action_validate) { 7866 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7867 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7868 NULL, err_msg); 7869 return -rte_errno; 7870 } 7871 return fops->action_validate(dev, conf, action, error); 7872 } 7873 7874 /** 7875 * Destroys the shared action by handle. 7876 * 7877 * @param dev 7878 * Pointer to Ethernet device structure. 7879 * @param[in] handle 7880 * Handle for the indirect action object to be destroyed. 7881 * @param[out] error 7882 * Perform verbose error reporting if not NULL. PMDs initialize this 7883 * structure in case of error only. 7884 * 7885 * @return 7886 * 0 on success, a negative errno value otherwise and rte_errno is set. 7887 * 7888 * @note: wrapper for driver action_create op callback. 7889 */ 7890 static int 7891 mlx5_action_handle_destroy(struct rte_eth_dev *dev, 7892 struct rte_flow_action_handle *handle, 7893 struct rte_flow_error *error) 7894 { 7895 static const char err_msg[] = "indirect action destruction unsupported"; 7896 struct rte_flow_attr attr = { .transfer = 0 }; 7897 const struct mlx5_flow_driver_ops *fops = 7898 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7899 7900 if (!fops->action_destroy) { 7901 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7902 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7903 NULL, err_msg); 7904 return -rte_errno; 7905 } 7906 return fops->action_destroy(dev, handle, error); 7907 } 7908 7909 /* Wrapper for driver action_destroy op callback */ 7910 static int 7911 flow_drv_action_update(struct rte_eth_dev *dev, 7912 struct rte_flow_action_handle *handle, 7913 const void *update, 7914 const struct mlx5_flow_driver_ops *fops, 7915 struct rte_flow_error *error) 7916 { 7917 static const char err_msg[] = "indirect action update unsupported"; 7918 7919 if (!fops->action_update) { 7920 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7921 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7922 NULL, err_msg); 7923 return -rte_errno; 7924 } 7925 return fops->action_update(dev, handle, update, error); 7926 } 7927 7928 /* Wrapper for driver action_destroy op callback */ 7929 static int 7930 flow_drv_action_query(struct rte_eth_dev *dev, 7931 const struct rte_flow_action_handle *handle, 7932 void *data, 7933 const struct mlx5_flow_driver_ops *fops, 7934 struct rte_flow_error *error) 7935 { 7936 static const char err_msg[] = "indirect action query unsupported"; 7937 7938 if (!fops->action_query) { 7939 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7940 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7941 NULL, err_msg); 7942 return -rte_errno; 7943 } 7944 return fops->action_query(dev, handle, data, error); 7945 } 7946 7947 /** 7948 * Create indirect action for reuse in multiple flow rules. 7949 * 7950 * @param dev 7951 * Pointer to Ethernet device structure. 7952 * @param conf 7953 * Pointer to indirect action object configuration. 7954 * @param[in] action 7955 * Action configuration for indirect action object creation. 7956 * @param[out] error 7957 * Perform verbose error reporting if not NULL. PMDs initialize this 7958 * structure in case of error only. 7959 * @return 7960 * A valid handle in case of success, NULL otherwise and rte_errno is set. 7961 */ 7962 static struct rte_flow_action_handle * 7963 mlx5_action_handle_create(struct rte_eth_dev *dev, 7964 const struct rte_flow_indir_action_conf *conf, 7965 const struct rte_flow_action *action, 7966 struct rte_flow_error *error) 7967 { 7968 static const char err_msg[] = "indirect action creation unsupported"; 7969 struct rte_flow_attr attr = { .transfer = 0 }; 7970 const struct mlx5_flow_driver_ops *fops = 7971 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 7972 7973 if (flow_drv_action_validate(dev, conf, action, fops, error)) 7974 return NULL; 7975 if (!fops->action_create) { 7976 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 7977 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 7978 NULL, err_msg); 7979 return NULL; 7980 } 7981 return fops->action_create(dev, conf, action, error); 7982 } 7983 7984 /** 7985 * Updates inplace the indirect action configuration pointed by *handle* 7986 * with the configuration provided as *update* argument. 7987 * The update of the indirect action configuration effects all flow rules 7988 * reusing the action via handle. 7989 * 7990 * @param dev 7991 * Pointer to Ethernet device structure. 7992 * @param[in] handle 7993 * Handle for the indirect action to be updated. 7994 * @param[in] update 7995 * Action specification used to modify the action pointed by handle. 7996 * *update* could be of same type with the action pointed by the *handle* 7997 * handle argument, or some other structures like a wrapper, depending on 7998 * the indirect action type. 7999 * @param[out] error 8000 * Perform verbose error reporting if not NULL. PMDs initialize this 8001 * structure in case of error only. 8002 * 8003 * @return 8004 * 0 on success, a negative errno value otherwise and rte_errno is set. 8005 */ 8006 static int 8007 mlx5_action_handle_update(struct rte_eth_dev *dev, 8008 struct rte_flow_action_handle *handle, 8009 const void *update, 8010 struct rte_flow_error *error) 8011 { 8012 struct rte_flow_attr attr = { .transfer = 0 }; 8013 const struct mlx5_flow_driver_ops *fops = 8014 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8015 int ret; 8016 8017 ret = flow_drv_action_validate(dev, NULL, 8018 (const struct rte_flow_action *)update, fops, error); 8019 if (ret) 8020 return ret; 8021 return flow_drv_action_update(dev, handle, update, fops, 8022 error); 8023 } 8024 8025 /** 8026 * Query the indirect action by handle. 8027 * 8028 * This function allows retrieving action-specific data such as counters. 8029 * Data is gathered by special action which may be present/referenced in 8030 * more than one flow rule definition. 8031 * 8032 * see @RTE_FLOW_ACTION_TYPE_COUNT 8033 * 8034 * @param dev 8035 * Pointer to Ethernet device structure. 8036 * @param[in] handle 8037 * Handle for the indirect action to query. 8038 * @param[in, out] data 8039 * Pointer to storage for the associated query data type. 8040 * @param[out] error 8041 * Perform verbose error reporting if not NULL. PMDs initialize this 8042 * structure in case of error only. 8043 * 8044 * @return 8045 * 0 on success, a negative errno value otherwise and rte_errno is set. 8046 */ 8047 static int 8048 mlx5_action_handle_query(struct rte_eth_dev *dev, 8049 const struct rte_flow_action_handle *handle, 8050 void *data, 8051 struct rte_flow_error *error) 8052 { 8053 struct rte_flow_attr attr = { .transfer = 0 }; 8054 const struct mlx5_flow_driver_ops *fops = 8055 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8056 8057 return flow_drv_action_query(dev, handle, data, fops, error); 8058 } 8059 8060 /** 8061 * Destroy all indirect actions (shared RSS). 8062 * 8063 * @param dev 8064 * Pointer to Ethernet device. 8065 * 8066 * @return 8067 * 0 on success, a negative errno value otherwise and rte_errno is set. 8068 */ 8069 int 8070 mlx5_action_handle_flush(struct rte_eth_dev *dev) 8071 { 8072 struct rte_flow_error error; 8073 struct mlx5_priv *priv = dev->data->dev_private; 8074 struct mlx5_shared_action_rss *shared_rss; 8075 int ret = 0; 8076 uint32_t idx; 8077 8078 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 8079 priv->rss_shared_actions, idx, shared_rss, next) { 8080 ret |= mlx5_action_handle_destroy(dev, 8081 (struct rte_flow_action_handle *)(uintptr_t)idx, &error); 8082 } 8083 return ret; 8084 } 8085 8086 #ifndef HAVE_MLX5DV_DR 8087 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 8088 #else 8089 #define MLX5_DOMAIN_SYNC_FLOW \ 8090 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 8091 #endif 8092 8093 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 8094 { 8095 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 8096 const struct mlx5_flow_driver_ops *fops; 8097 int ret; 8098 struct rte_flow_attr attr = { .transfer = 0 }; 8099 8100 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8101 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 8102 if (ret > 0) 8103 ret = -ret; 8104 return ret; 8105 } 8106 8107 /** 8108 * tunnel offload functionalilty is defined for DV environment only 8109 */ 8110 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8111 __extension__ 8112 union tunnel_offload_mark { 8113 uint32_t val; 8114 struct { 8115 uint32_t app_reserve:8; 8116 uint32_t table_id:15; 8117 uint32_t transfer:1; 8118 uint32_t _unused_:8; 8119 }; 8120 }; 8121 8122 static bool 8123 mlx5_access_tunnel_offload_db 8124 (struct rte_eth_dev *dev, 8125 bool (*match)(struct rte_eth_dev *, 8126 struct mlx5_flow_tunnel *, const void *), 8127 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8128 void (*miss)(struct rte_eth_dev *, void *), 8129 void *ctx, bool lock_op); 8130 8131 static int 8132 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 8133 struct rte_flow *flow, 8134 const struct rte_flow_attr *attr, 8135 const struct rte_flow_action *app_actions, 8136 uint32_t flow_idx, 8137 struct tunnel_default_miss_ctx *ctx, 8138 struct rte_flow_error *error) 8139 { 8140 struct mlx5_priv *priv = dev->data->dev_private; 8141 struct mlx5_flow *dev_flow; 8142 struct rte_flow_attr miss_attr = *attr; 8143 const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf; 8144 const struct rte_flow_item miss_items[2] = { 8145 { 8146 .type = RTE_FLOW_ITEM_TYPE_ETH, 8147 .spec = NULL, 8148 .last = NULL, 8149 .mask = NULL 8150 }, 8151 { 8152 .type = RTE_FLOW_ITEM_TYPE_END, 8153 .spec = NULL, 8154 .last = NULL, 8155 .mask = NULL 8156 } 8157 }; 8158 union tunnel_offload_mark mark_id; 8159 struct rte_flow_action_mark miss_mark; 8160 struct rte_flow_action miss_actions[3] = { 8161 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 8162 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 8163 }; 8164 const struct rte_flow_action_jump *jump_data; 8165 uint32_t i, flow_table = 0; /* prevent compilation warning */ 8166 struct flow_grp_info grp_info = { 8167 .external = 1, 8168 .transfer = attr->transfer, 8169 .fdb_def_rule = !!priv->fdb_def_rule, 8170 .std_tbl_fix = 0, 8171 }; 8172 int ret; 8173 8174 if (!attr->transfer) { 8175 uint32_t q_size; 8176 8177 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 8178 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 8179 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 8180 0, SOCKET_ID_ANY); 8181 if (!ctx->queue) 8182 return rte_flow_error_set 8183 (error, ENOMEM, 8184 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8185 NULL, "invalid default miss RSS"); 8186 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 8187 ctx->action_rss.level = 0, 8188 ctx->action_rss.types = priv->rss_conf.rss_hf, 8189 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 8190 ctx->action_rss.queue_num = priv->reta_idx_n, 8191 ctx->action_rss.key = priv->rss_conf.rss_key, 8192 ctx->action_rss.queue = ctx->queue; 8193 if (!priv->reta_idx_n || !priv->rxqs_n) 8194 return rte_flow_error_set 8195 (error, EINVAL, 8196 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8197 NULL, "invalid port configuration"); 8198 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 8199 ctx->action_rss.types = 0; 8200 for (i = 0; i != priv->reta_idx_n; ++i) 8201 ctx->queue[i] = (*priv->reta_idx)[i]; 8202 } else { 8203 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 8204 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 8205 } 8206 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 8207 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 8208 jump_data = app_actions->conf; 8209 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 8210 miss_attr.group = jump_data->group; 8211 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 8212 &flow_table, &grp_info, error); 8213 if (ret) 8214 return rte_flow_error_set(error, EINVAL, 8215 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8216 NULL, "invalid tunnel id"); 8217 mark_id.app_reserve = 0; 8218 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 8219 mark_id.transfer = !!attr->transfer; 8220 mark_id._unused_ = 0; 8221 miss_mark.id = mark_id.val; 8222 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 8223 miss_items, miss_actions, flow_idx, error); 8224 if (!dev_flow) 8225 return -rte_errno; 8226 dev_flow->flow = flow; 8227 dev_flow->external = true; 8228 dev_flow->tunnel = tunnel; 8229 /* Subflow object was created, we must include one in the list. */ 8230 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 8231 dev_flow->handle, next); 8232 DRV_LOG(DEBUG, 8233 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 8234 dev->data->port_id, tunnel->app_tunnel.type, 8235 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 8236 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 8237 miss_actions, error); 8238 if (!ret) 8239 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 8240 error); 8241 8242 return ret; 8243 } 8244 8245 static const struct mlx5_flow_tbl_data_entry * 8246 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 8247 { 8248 struct mlx5_priv *priv = dev->data->dev_private; 8249 struct mlx5_dev_ctx_shared *sh = priv->sh; 8250 struct mlx5_hlist_entry *he; 8251 union tunnel_offload_mark mbits = { .val = mark }; 8252 union mlx5_flow_tbl_key table_key = { 8253 { 8254 .level = tunnel_id_to_flow_tbl(mbits.table_id), 8255 .id = 0, 8256 .reserved = 0, 8257 .dummy = 0, 8258 .is_fdb = !!mbits.transfer, 8259 .is_egress = 0, 8260 } 8261 }; 8262 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL); 8263 return he ? 8264 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 8265 } 8266 8267 static void 8268 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list, 8269 struct mlx5_hlist_entry *entry) 8270 { 8271 struct mlx5_dev_ctx_shared *sh = list->ctx; 8272 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8273 8274 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8275 tunnel_flow_tbl_to_id(tte->flow_table)); 8276 mlx5_free(tte); 8277 } 8278 8279 static int 8280 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused, 8281 struct mlx5_hlist_entry *entry, 8282 uint64_t key, void *cb_ctx __rte_unused) 8283 { 8284 union tunnel_tbl_key tbl = { 8285 .val = key, 8286 }; 8287 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8288 8289 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group; 8290 } 8291 8292 static struct mlx5_hlist_entry * 8293 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key, 8294 void *ctx __rte_unused) 8295 { 8296 struct mlx5_dev_ctx_shared *sh = list->ctx; 8297 struct tunnel_tbl_entry *tte; 8298 union tunnel_tbl_key tbl = { 8299 .val = key, 8300 }; 8301 8302 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 8303 sizeof(*tte), 0, 8304 SOCKET_ID_ANY); 8305 if (!tte) 8306 goto err; 8307 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8308 &tte->flow_table); 8309 if (tte->flow_table >= MLX5_MAX_TABLES) { 8310 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 8311 tte->flow_table); 8312 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8313 tte->flow_table); 8314 goto err; 8315 } else if (!tte->flow_table) { 8316 goto err; 8317 } 8318 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 8319 tte->tunnel_id = tbl.tunnel_id; 8320 tte->group = tbl.group; 8321 return &tte->hash; 8322 err: 8323 if (tte) 8324 mlx5_free(tte); 8325 return NULL; 8326 } 8327 8328 static uint32_t 8329 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 8330 const struct mlx5_flow_tunnel *tunnel, 8331 uint32_t group, uint32_t *table, 8332 struct rte_flow_error *error) 8333 { 8334 struct mlx5_hlist_entry *he; 8335 struct tunnel_tbl_entry *tte; 8336 union tunnel_tbl_key key = { 8337 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 8338 .group = group 8339 }; 8340 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8341 struct mlx5_hlist *group_hash; 8342 8343 group_hash = tunnel ? tunnel->groups : thub->groups; 8344 he = mlx5_hlist_register(group_hash, key.val, NULL); 8345 if (!he) 8346 return rte_flow_error_set(error, EINVAL, 8347 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 8348 NULL, 8349 "tunnel group index not supported"); 8350 tte = container_of(he, typeof(*tte), hash); 8351 *table = tte->flow_table; 8352 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 8353 dev->data->port_id, key.tunnel_id, group, *table); 8354 return 0; 8355 } 8356 8357 static void 8358 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 8359 struct mlx5_flow_tunnel *tunnel) 8360 { 8361 struct mlx5_priv *priv = dev->data->dev_private; 8362 struct mlx5_indexed_pool *ipool; 8363 8364 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 8365 dev->data->port_id, tunnel->tunnel_id); 8366 LIST_REMOVE(tunnel, chain); 8367 mlx5_hlist_destroy(tunnel->groups); 8368 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8369 mlx5_ipool_free(ipool, tunnel->tunnel_id); 8370 } 8371 8372 static bool 8373 mlx5_access_tunnel_offload_db 8374 (struct rte_eth_dev *dev, 8375 bool (*match)(struct rte_eth_dev *, 8376 struct mlx5_flow_tunnel *, const void *), 8377 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8378 void (*miss)(struct rte_eth_dev *, void *), 8379 void *ctx, bool lock_op) 8380 { 8381 bool verdict = false; 8382 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8383 struct mlx5_flow_tunnel *tunnel; 8384 8385 rte_spinlock_lock(&thub->sl); 8386 LIST_FOREACH(tunnel, &thub->tunnels, chain) { 8387 verdict = match(dev, tunnel, (const void *)ctx); 8388 if (verdict) 8389 break; 8390 } 8391 if (!lock_op) 8392 rte_spinlock_unlock(&thub->sl); 8393 if (verdict && hit) 8394 hit(dev, tunnel, ctx); 8395 if (!verdict && miss) 8396 miss(dev, ctx); 8397 if (lock_op) 8398 rte_spinlock_unlock(&thub->sl); 8399 8400 return verdict; 8401 } 8402 8403 struct tunnel_db_find_tunnel_id_ctx { 8404 uint32_t tunnel_id; 8405 struct mlx5_flow_tunnel *tunnel; 8406 }; 8407 8408 static bool 8409 find_tunnel_id_match(struct rte_eth_dev *dev, 8410 struct mlx5_flow_tunnel *tunnel, const void *x) 8411 { 8412 const struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8413 8414 RTE_SET_USED(dev); 8415 return tunnel->tunnel_id == ctx->tunnel_id; 8416 } 8417 8418 static void 8419 find_tunnel_id_hit(struct rte_eth_dev *dev, 8420 struct mlx5_flow_tunnel *tunnel, void *x) 8421 { 8422 struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8423 RTE_SET_USED(dev); 8424 ctx->tunnel = tunnel; 8425 } 8426 8427 static struct mlx5_flow_tunnel * 8428 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 8429 { 8430 struct tunnel_db_find_tunnel_id_ctx ctx = { 8431 .tunnel_id = id, 8432 }; 8433 8434 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match, 8435 find_tunnel_id_hit, NULL, &ctx, true); 8436 8437 return ctx.tunnel; 8438 } 8439 8440 static struct mlx5_flow_tunnel * 8441 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 8442 const struct rte_flow_tunnel *app_tunnel) 8443 { 8444 struct mlx5_priv *priv = dev->data->dev_private; 8445 struct mlx5_indexed_pool *ipool; 8446 struct mlx5_flow_tunnel *tunnel; 8447 uint32_t id; 8448 8449 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8450 tunnel = mlx5_ipool_zmalloc(ipool, &id); 8451 if (!tunnel) 8452 return NULL; 8453 if (id >= MLX5_MAX_TUNNELS) { 8454 mlx5_ipool_free(ipool, id); 8455 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 8456 return NULL; 8457 } 8458 tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0, 8459 mlx5_flow_tunnel_grp2tbl_create_cb, 8460 mlx5_flow_tunnel_grp2tbl_match_cb, 8461 mlx5_flow_tunnel_grp2tbl_remove_cb); 8462 if (!tunnel->groups) { 8463 mlx5_ipool_free(ipool, id); 8464 return NULL; 8465 } 8466 tunnel->groups->ctx = priv->sh; 8467 /* initiate new PMD tunnel */ 8468 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 8469 tunnel->tunnel_id = id; 8470 tunnel->action.type = (typeof(tunnel->action.type)) 8471 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 8472 tunnel->action.conf = tunnel; 8473 tunnel->item.type = (typeof(tunnel->item.type)) 8474 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 8475 tunnel->item.spec = tunnel; 8476 tunnel->item.last = NULL; 8477 tunnel->item.mask = NULL; 8478 8479 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 8480 dev->data->port_id, tunnel->tunnel_id); 8481 8482 return tunnel; 8483 } 8484 8485 struct tunnel_db_get_tunnel_ctx { 8486 const struct rte_flow_tunnel *app_tunnel; 8487 struct mlx5_flow_tunnel *tunnel; 8488 }; 8489 8490 static bool get_tunnel_match(struct rte_eth_dev *dev, 8491 struct mlx5_flow_tunnel *tunnel, const void *x) 8492 { 8493 const struct tunnel_db_get_tunnel_ctx *ctx = x; 8494 8495 RTE_SET_USED(dev); 8496 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel, 8497 sizeof(*ctx->app_tunnel)); 8498 } 8499 8500 static void get_tunnel_hit(struct rte_eth_dev *dev, 8501 struct mlx5_flow_tunnel *tunnel, void *x) 8502 { 8503 /* called under tunnel spinlock protection */ 8504 struct tunnel_db_get_tunnel_ctx *ctx = x; 8505 8506 RTE_SET_USED(dev); 8507 tunnel->refctn++; 8508 ctx->tunnel = tunnel; 8509 } 8510 8511 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x) 8512 { 8513 /* called under tunnel spinlock protection */ 8514 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8515 struct tunnel_db_get_tunnel_ctx *ctx = x; 8516 8517 rte_spinlock_unlock(&thub->sl); 8518 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel); 8519 rte_spinlock_lock(&thub->sl); 8520 if (ctx->tunnel) { 8521 ctx->tunnel->refctn = 1; 8522 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain); 8523 } 8524 } 8525 8526 8527 static int 8528 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 8529 const struct rte_flow_tunnel *app_tunnel, 8530 struct mlx5_flow_tunnel **tunnel) 8531 { 8532 struct tunnel_db_get_tunnel_ctx ctx = { 8533 .app_tunnel = app_tunnel, 8534 }; 8535 8536 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit, 8537 get_tunnel_miss, &ctx, true); 8538 *tunnel = ctx.tunnel; 8539 return ctx.tunnel ? 0 : -ENOMEM; 8540 } 8541 8542 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 8543 { 8544 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 8545 8546 if (!thub) 8547 return; 8548 if (!LIST_EMPTY(&thub->tunnels)) 8549 DRV_LOG(WARNING, "port %u tunnels present", port_id); 8550 mlx5_hlist_destroy(thub->groups); 8551 mlx5_free(thub); 8552 } 8553 8554 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 8555 { 8556 int err; 8557 struct mlx5_flow_tunnel_hub *thub; 8558 8559 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 8560 0, SOCKET_ID_ANY); 8561 if (!thub) 8562 return -ENOMEM; 8563 LIST_INIT(&thub->tunnels); 8564 rte_spinlock_init(&thub->sl); 8565 thub->groups = mlx5_hlist_create("flow groups", 8566 rte_align32pow2(MLX5_MAX_TABLES), 0, 8567 0, mlx5_flow_tunnel_grp2tbl_create_cb, 8568 mlx5_flow_tunnel_grp2tbl_match_cb, 8569 mlx5_flow_tunnel_grp2tbl_remove_cb); 8570 if (!thub->groups) { 8571 err = -rte_errno; 8572 goto err; 8573 } 8574 thub->groups->ctx = sh; 8575 sh->tunnel_hub = thub; 8576 8577 return 0; 8578 8579 err: 8580 if (thub->groups) 8581 mlx5_hlist_destroy(thub->groups); 8582 if (thub) 8583 mlx5_free(thub); 8584 return err; 8585 } 8586 8587 static inline bool 8588 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 8589 struct rte_flow_tunnel *tunnel, 8590 const char *err_msg) 8591 { 8592 err_msg = NULL; 8593 if (!is_tunnel_offload_active(dev)) { 8594 err_msg = "tunnel offload was not activated"; 8595 goto out; 8596 } else if (!tunnel) { 8597 err_msg = "no application tunnel"; 8598 goto out; 8599 } 8600 8601 switch (tunnel->type) { 8602 default: 8603 err_msg = "unsupported tunnel type"; 8604 goto out; 8605 case RTE_FLOW_ITEM_TYPE_VXLAN: 8606 break; 8607 } 8608 8609 out: 8610 return !err_msg; 8611 } 8612 8613 static int 8614 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 8615 struct rte_flow_tunnel *app_tunnel, 8616 struct rte_flow_action **actions, 8617 uint32_t *num_of_actions, 8618 struct rte_flow_error *error) 8619 { 8620 int ret; 8621 struct mlx5_flow_tunnel *tunnel; 8622 const char *err_msg = NULL; 8623 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 8624 8625 if (!verdict) 8626 return rte_flow_error_set(error, EINVAL, 8627 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 8628 err_msg); 8629 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 8630 if (ret < 0) { 8631 return rte_flow_error_set(error, ret, 8632 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 8633 "failed to initialize pmd tunnel"); 8634 } 8635 *actions = &tunnel->action; 8636 *num_of_actions = 1; 8637 return 0; 8638 } 8639 8640 static int 8641 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 8642 struct rte_flow_tunnel *app_tunnel, 8643 struct rte_flow_item **items, 8644 uint32_t *num_of_items, 8645 struct rte_flow_error *error) 8646 { 8647 int ret; 8648 struct mlx5_flow_tunnel *tunnel; 8649 const char *err_msg = NULL; 8650 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 8651 8652 if (!verdict) 8653 return rte_flow_error_set(error, EINVAL, 8654 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 8655 err_msg); 8656 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 8657 if (ret < 0) { 8658 return rte_flow_error_set(error, ret, 8659 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 8660 "failed to initialize pmd tunnel"); 8661 } 8662 *items = &tunnel->item; 8663 *num_of_items = 1; 8664 return 0; 8665 } 8666 8667 struct tunnel_db_element_release_ctx { 8668 struct rte_flow_item *items; 8669 struct rte_flow_action *actions; 8670 uint32_t num_elements; 8671 struct rte_flow_error *error; 8672 int ret; 8673 }; 8674 8675 static bool 8676 tunnel_element_release_match(struct rte_eth_dev *dev, 8677 struct mlx5_flow_tunnel *tunnel, const void *x) 8678 { 8679 const struct tunnel_db_element_release_ctx *ctx = x; 8680 8681 RTE_SET_USED(dev); 8682 if (ctx->num_elements != 1) 8683 return false; 8684 else if (ctx->items) 8685 return ctx->items == &tunnel->item; 8686 else if (ctx->actions) 8687 return ctx->actions == &tunnel->action; 8688 8689 return false; 8690 } 8691 8692 static void 8693 tunnel_element_release_hit(struct rte_eth_dev *dev, 8694 struct mlx5_flow_tunnel *tunnel, void *x) 8695 { 8696 struct tunnel_db_element_release_ctx *ctx = x; 8697 ctx->ret = 0; 8698 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 8699 mlx5_flow_tunnel_free(dev, tunnel); 8700 } 8701 8702 static void 8703 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x) 8704 { 8705 struct tunnel_db_element_release_ctx *ctx = x; 8706 RTE_SET_USED(dev); 8707 ctx->ret = rte_flow_error_set(ctx->error, EINVAL, 8708 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 8709 "invalid argument"); 8710 } 8711 8712 static int 8713 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 8714 struct rte_flow_item *pmd_items, 8715 uint32_t num_items, struct rte_flow_error *err) 8716 { 8717 struct tunnel_db_element_release_ctx ctx = { 8718 .items = pmd_items, 8719 .actions = NULL, 8720 .num_elements = num_items, 8721 .error = err, 8722 }; 8723 8724 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 8725 tunnel_element_release_hit, 8726 tunnel_element_release_miss, &ctx, false); 8727 8728 return ctx.ret; 8729 } 8730 8731 static int 8732 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 8733 struct rte_flow_action *pmd_actions, 8734 uint32_t num_actions, struct rte_flow_error *err) 8735 { 8736 struct tunnel_db_element_release_ctx ctx = { 8737 .items = NULL, 8738 .actions = pmd_actions, 8739 .num_elements = num_actions, 8740 .error = err, 8741 }; 8742 8743 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 8744 tunnel_element_release_hit, 8745 tunnel_element_release_miss, &ctx, false); 8746 8747 return ctx.ret; 8748 } 8749 8750 static int 8751 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 8752 struct rte_mbuf *m, 8753 struct rte_flow_restore_info *info, 8754 struct rte_flow_error *err) 8755 { 8756 uint64_t ol_flags = m->ol_flags; 8757 const struct mlx5_flow_tbl_data_entry *tble; 8758 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID; 8759 8760 if (!is_tunnel_offload_active(dev)) { 8761 info->flags = 0; 8762 return 0; 8763 } 8764 8765 if ((ol_flags & mask) != mask) 8766 goto err; 8767 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 8768 if (!tble) { 8769 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 8770 dev->data->port_id, m->hash.fdir.hi); 8771 goto err; 8772 } 8773 MLX5_ASSERT(tble->tunnel); 8774 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 8775 info->group_id = tble->group_id; 8776 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 8777 RTE_FLOW_RESTORE_INFO_GROUP_ID | 8778 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 8779 8780 return 0; 8781 8782 err: 8783 return rte_flow_error_set(err, EINVAL, 8784 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 8785 "failed to get restore info"); 8786 } 8787 8788 #else /* HAVE_IBV_FLOW_DV_SUPPORT */ 8789 static int 8790 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev, 8791 __rte_unused struct rte_flow_tunnel *app_tunnel, 8792 __rte_unused struct rte_flow_action **actions, 8793 __rte_unused uint32_t *num_of_actions, 8794 __rte_unused struct rte_flow_error *error) 8795 { 8796 return -ENOTSUP; 8797 } 8798 8799 static int 8800 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev, 8801 __rte_unused struct rte_flow_tunnel *app_tunnel, 8802 __rte_unused struct rte_flow_item **items, 8803 __rte_unused uint32_t *num_of_items, 8804 __rte_unused struct rte_flow_error *error) 8805 { 8806 return -ENOTSUP; 8807 } 8808 8809 static int 8810 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev, 8811 __rte_unused struct rte_flow_item *pmd_items, 8812 __rte_unused uint32_t num_items, 8813 __rte_unused struct rte_flow_error *err) 8814 { 8815 return -ENOTSUP; 8816 } 8817 8818 static int 8819 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev, 8820 __rte_unused struct rte_flow_action *pmd_action, 8821 __rte_unused uint32_t num_actions, 8822 __rte_unused struct rte_flow_error *err) 8823 { 8824 return -ENOTSUP; 8825 } 8826 8827 static int 8828 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev, 8829 __rte_unused struct rte_mbuf *m, 8830 __rte_unused struct rte_flow_restore_info *i, 8831 __rte_unused struct rte_flow_error *err) 8832 { 8833 return -ENOTSUP; 8834 } 8835 8836 static int 8837 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev, 8838 __rte_unused struct rte_flow *flow, 8839 __rte_unused const struct rte_flow_attr *attr, 8840 __rte_unused const struct rte_flow_action *actions, 8841 __rte_unused uint32_t flow_idx, 8842 __rte_unused struct tunnel_default_miss_ctx *ctx, 8843 __rte_unused struct rte_flow_error *error) 8844 { 8845 return -ENOTSUP; 8846 } 8847 8848 static struct mlx5_flow_tunnel * 8849 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev, 8850 __rte_unused uint32_t id) 8851 { 8852 return NULL; 8853 } 8854 8855 static void 8856 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev, 8857 __rte_unused struct mlx5_flow_tunnel *tunnel) 8858 { 8859 } 8860 8861 static uint32_t 8862 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev, 8863 __rte_unused const struct mlx5_flow_tunnel *t, 8864 __rte_unused uint32_t group, 8865 __rte_unused uint32_t *table, 8866 struct rte_flow_error *error) 8867 { 8868 return rte_flow_error_set(error, ENOTSUP, 8869 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 8870 "tunnel offload requires DV support"); 8871 } 8872 8873 void 8874 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh, 8875 __rte_unused uint16_t port_id) 8876 { 8877 } 8878 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 8879