1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2016 6WIND S.A. 3 * Copyright 2016 Mellanox Technologies, Ltd 4 */ 5 6 #include <stdalign.h> 7 #include <stdint.h> 8 #include <string.h> 9 #include <stdbool.h> 10 #include <sys/queue.h> 11 12 #include <rte_common.h> 13 #include <rte_ether.h> 14 #include <ethdev_driver.h> 15 #include <rte_eal_paging.h> 16 #include <rte_flow.h> 17 #include <rte_cycles.h> 18 #include <rte_flow_driver.h> 19 #include <rte_malloc.h> 20 #include <rte_ip.h> 21 22 #include <mlx5_glue.h> 23 #include <mlx5_devx_cmds.h> 24 #include <mlx5_prm.h> 25 #include <mlx5_malloc.h> 26 27 #include "mlx5_defs.h" 28 #include "mlx5.h" 29 #include "mlx5_flow.h" 30 #include "mlx5_flow_os.h" 31 #include "mlx5_rx.h" 32 #include "mlx5_tx.h" 33 #include "mlx5_common_os.h" 34 #include "rte_pmd_mlx5.h" 35 36 struct tunnel_default_miss_ctx { 37 uint16_t *queue; 38 __extension__ 39 union { 40 struct rte_flow_action_rss action_rss; 41 struct rte_flow_action_queue miss_queue; 42 struct rte_flow_action_jump miss_jump; 43 uint8_t raw[0]; 44 }; 45 }; 46 47 static int 48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 49 struct rte_flow *flow, 50 const struct rte_flow_attr *attr, 51 const struct rte_flow_action *app_actions, 52 uint32_t flow_idx, 53 const struct mlx5_flow_tunnel *tunnel, 54 struct tunnel_default_miss_ctx *ctx, 55 struct rte_flow_error *error); 56 static struct mlx5_flow_tunnel * 57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id); 58 static void 59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel); 60 static uint32_t 61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 62 const struct mlx5_flow_tunnel *tunnel, 63 uint32_t group, uint32_t *table, 64 struct rte_flow_error *error); 65 66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void); 67 static void mlx5_flow_pop_thread_workspace(void); 68 69 70 /** Device flow drivers. */ 71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops; 72 73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops; 74 75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = { 76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops, 77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H) 78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops, 79 #endif 80 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops, 81 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops 82 }; 83 84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */ 85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \ 86 (const int []){ \ 87 __VA_ARGS__, 0, \ 88 } 89 90 /** Node object of input graph for mlx5_flow_expand_rss(). */ 91 struct mlx5_flow_expand_node { 92 const int *const next; 93 /**< 94 * List of next node indexes. Index 0 is interpreted as a terminator. 95 */ 96 const enum rte_flow_item_type type; 97 /**< Pattern item type of current node. */ 98 uint64_t rss_types; 99 /**< 100 * RSS types bit-field associated with this node 101 * (see ETH_RSS_* definitions). 102 */ 103 uint8_t optional; 104 /**< optional expand field. Default 0 to expand, 1 not go deeper. */ 105 }; 106 107 /** Object returned by mlx5_flow_expand_rss(). */ 108 struct mlx5_flow_expand_rss { 109 uint32_t entries; 110 /**< Number of entries @p patterns and @p priorities. */ 111 struct { 112 struct rte_flow_item *pattern; /**< Expanded pattern array. */ 113 uint32_t priority; /**< Priority offset for each expansion. */ 114 } entry[]; 115 }; 116 117 static void 118 mlx5_dbg__print_pattern(const struct rte_flow_item *item); 119 120 static bool 121 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item) 122 { 123 switch (item->type) { 124 case RTE_FLOW_ITEM_TYPE_ETH: 125 case RTE_FLOW_ITEM_TYPE_VLAN: 126 case RTE_FLOW_ITEM_TYPE_IPV4: 127 case RTE_FLOW_ITEM_TYPE_IPV6: 128 case RTE_FLOW_ITEM_TYPE_UDP: 129 case RTE_FLOW_ITEM_TYPE_TCP: 130 case RTE_FLOW_ITEM_TYPE_VXLAN: 131 case RTE_FLOW_ITEM_TYPE_NVGRE: 132 case RTE_FLOW_ITEM_TYPE_GRE: 133 case RTE_FLOW_ITEM_TYPE_GENEVE: 134 case RTE_FLOW_ITEM_TYPE_MPLS: 135 return true; 136 default: 137 break; 138 } 139 return false; 140 } 141 142 static enum rte_flow_item_type 143 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item) 144 { 145 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID; 146 uint16_t ether_type = 0; 147 uint16_t ether_type_m; 148 uint8_t ip_next_proto = 0; 149 uint8_t ip_next_proto_m; 150 151 if (item == NULL || item->spec == NULL) 152 return ret; 153 switch (item->type) { 154 case RTE_FLOW_ITEM_TYPE_ETH: 155 if (item->mask) 156 ether_type_m = ((const struct rte_flow_item_eth *) 157 (item->mask))->type; 158 else 159 ether_type_m = rte_flow_item_eth_mask.type; 160 if (ether_type_m != RTE_BE16(0xFFFF)) 161 break; 162 ether_type = ((const struct rte_flow_item_eth *) 163 (item->spec))->type; 164 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 165 ret = RTE_FLOW_ITEM_TYPE_IPV4; 166 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 167 ret = RTE_FLOW_ITEM_TYPE_IPV6; 168 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 169 ret = RTE_FLOW_ITEM_TYPE_VLAN; 170 else 171 ret = RTE_FLOW_ITEM_TYPE_END; 172 break; 173 case RTE_FLOW_ITEM_TYPE_VLAN: 174 if (item->mask) 175 ether_type_m = ((const struct rte_flow_item_vlan *) 176 (item->mask))->inner_type; 177 else 178 ether_type_m = rte_flow_item_vlan_mask.inner_type; 179 if (ether_type_m != RTE_BE16(0xFFFF)) 180 break; 181 ether_type = ((const struct rte_flow_item_vlan *) 182 (item->spec))->inner_type; 183 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4) 184 ret = RTE_FLOW_ITEM_TYPE_IPV4; 185 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6) 186 ret = RTE_FLOW_ITEM_TYPE_IPV6; 187 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN) 188 ret = RTE_FLOW_ITEM_TYPE_VLAN; 189 else 190 ret = RTE_FLOW_ITEM_TYPE_END; 191 break; 192 case RTE_FLOW_ITEM_TYPE_IPV4: 193 if (item->mask) 194 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *) 195 (item->mask))->hdr.next_proto_id; 196 else 197 ip_next_proto_m = 198 rte_flow_item_ipv4_mask.hdr.next_proto_id; 199 if (ip_next_proto_m != 0xFF) 200 break; 201 ip_next_proto = ((const struct rte_flow_item_ipv4 *) 202 (item->spec))->hdr.next_proto_id; 203 if (ip_next_proto == IPPROTO_UDP) 204 ret = RTE_FLOW_ITEM_TYPE_UDP; 205 else if (ip_next_proto == IPPROTO_TCP) 206 ret = RTE_FLOW_ITEM_TYPE_TCP; 207 else if (ip_next_proto == IPPROTO_IP) 208 ret = RTE_FLOW_ITEM_TYPE_IPV4; 209 else if (ip_next_proto == IPPROTO_IPV6) 210 ret = RTE_FLOW_ITEM_TYPE_IPV6; 211 else 212 ret = RTE_FLOW_ITEM_TYPE_END; 213 break; 214 case RTE_FLOW_ITEM_TYPE_IPV6: 215 if (item->mask) 216 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *) 217 (item->mask))->hdr.proto; 218 else 219 ip_next_proto_m = 220 rte_flow_item_ipv6_mask.hdr.proto; 221 if (ip_next_proto_m != 0xFF) 222 break; 223 ip_next_proto = ((const struct rte_flow_item_ipv6 *) 224 (item->spec))->hdr.proto; 225 if (ip_next_proto == IPPROTO_UDP) 226 ret = RTE_FLOW_ITEM_TYPE_UDP; 227 else if (ip_next_proto == IPPROTO_TCP) 228 ret = RTE_FLOW_ITEM_TYPE_TCP; 229 else if (ip_next_proto == IPPROTO_IP) 230 ret = RTE_FLOW_ITEM_TYPE_IPV4; 231 else if (ip_next_proto == IPPROTO_IPV6) 232 ret = RTE_FLOW_ITEM_TYPE_IPV6; 233 else 234 ret = RTE_FLOW_ITEM_TYPE_END; 235 break; 236 default: 237 ret = RTE_FLOW_ITEM_TYPE_VOID; 238 break; 239 } 240 return ret; 241 } 242 243 #define MLX5_RSS_EXP_ELT_N 16 244 245 /** 246 * Expand RSS flows into several possible flows according to the RSS hash 247 * fields requested and the driver capabilities. 248 * 249 * @param[out] buf 250 * Buffer to store the result expansion. 251 * @param[in] size 252 * Buffer size in bytes. If 0, @p buf can be NULL. 253 * @param[in] pattern 254 * User flow pattern. 255 * @param[in] types 256 * RSS types to expand (see ETH_RSS_* definitions). 257 * @param[in] graph 258 * Input graph to expand @p pattern according to @p types. 259 * @param[in] graph_root_index 260 * Index of root node in @p graph, typically 0. 261 * 262 * @return 263 * A positive value representing the size of @p buf in bytes regardless of 264 * @p size on success, a negative errno value otherwise and rte_errno is 265 * set, the following errors are defined: 266 * 267 * -E2BIG: graph-depth @p graph is too deep. 268 * -EINVAL: @p size has not enough space for expanded pattern. 269 */ 270 static int 271 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size, 272 const struct rte_flow_item *pattern, uint64_t types, 273 const struct mlx5_flow_expand_node graph[], 274 int graph_root_index) 275 { 276 const struct rte_flow_item *item; 277 const struct mlx5_flow_expand_node *node = &graph[graph_root_index]; 278 const int *next_node; 279 const int *stack[MLX5_RSS_EXP_ELT_N]; 280 int stack_pos = 0; 281 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N]; 282 unsigned int i; 283 size_t lsize; 284 size_t user_pattern_size = 0; 285 void *addr = NULL; 286 const struct mlx5_flow_expand_node *next = NULL; 287 struct rte_flow_item missed_item; 288 int missed = 0; 289 int elt = 0; 290 const struct rte_flow_item *last_item = NULL; 291 292 memset(&missed_item, 0, sizeof(missed_item)); 293 lsize = offsetof(struct mlx5_flow_expand_rss, entry) + 294 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]); 295 if (lsize > size) 296 return -EINVAL; 297 buf->entry[0].priority = 0; 298 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N]; 299 buf->entries = 0; 300 addr = buf->entry[0].pattern; 301 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 302 if (!mlx5_flow_is_rss_expandable_item(item)) { 303 user_pattern_size += sizeof(*item); 304 continue; 305 } 306 last_item = item; 307 for (i = 0; node->next && node->next[i]; ++i) { 308 next = &graph[node->next[i]]; 309 if (next->type == item->type) 310 break; 311 } 312 if (next) 313 node = next; 314 user_pattern_size += sizeof(*item); 315 } 316 user_pattern_size += sizeof(*item); /* Handle END item. */ 317 lsize += user_pattern_size; 318 if (lsize > size) 319 return -EINVAL; 320 /* Copy the user pattern in the first entry of the buffer. */ 321 rte_memcpy(addr, pattern, user_pattern_size); 322 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 323 buf->entries = 1; 324 /* Start expanding. */ 325 memset(flow_items, 0, sizeof(flow_items)); 326 user_pattern_size -= sizeof(*item); 327 /* 328 * Check if the last valid item has spec set, need complete pattern, 329 * and the pattern can be used for expansion. 330 */ 331 missed_item.type = mlx5_flow_expand_rss_item_complete(last_item); 332 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) { 333 /* Item type END indicates expansion is not required. */ 334 return lsize; 335 } 336 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) { 337 next = NULL; 338 missed = 1; 339 for (i = 0; node->next && node->next[i]; ++i) { 340 next = &graph[node->next[i]]; 341 if (next->type == missed_item.type) { 342 flow_items[0].type = missed_item.type; 343 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END; 344 break; 345 } 346 next = NULL; 347 } 348 } 349 if (next && missed) { 350 elt = 2; /* missed item + item end. */ 351 node = next; 352 lsize += elt * sizeof(*item) + user_pattern_size; 353 if (lsize > size) 354 return -EINVAL; 355 if (node->rss_types & types) { 356 buf->entry[buf->entries].priority = 1; 357 buf->entry[buf->entries].pattern = addr; 358 buf->entries++; 359 rte_memcpy(addr, buf->entry[0].pattern, 360 user_pattern_size); 361 addr = (void *)(((uintptr_t)addr) + user_pattern_size); 362 rte_memcpy(addr, flow_items, elt * sizeof(*item)); 363 addr = (void *)(((uintptr_t)addr) + 364 elt * sizeof(*item)); 365 } 366 } 367 memset(flow_items, 0, sizeof(flow_items)); 368 next_node = node->next; 369 stack[stack_pos] = next_node; 370 node = next_node ? &graph[*next_node] : NULL; 371 while (node) { 372 flow_items[stack_pos].type = node->type; 373 if (node->rss_types & types) { 374 size_t n; 375 /* 376 * compute the number of items to copy from the 377 * expansion and copy it. 378 * When the stack_pos is 0, there are 1 element in it, 379 * plus the addition END item. 380 */ 381 elt = stack_pos + 2; 382 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END; 383 lsize += elt * sizeof(*item) + user_pattern_size; 384 if (lsize > size) 385 return -EINVAL; 386 n = elt * sizeof(*item); 387 buf->entry[buf->entries].priority = 388 stack_pos + 1 + missed; 389 buf->entry[buf->entries].pattern = addr; 390 buf->entries++; 391 rte_memcpy(addr, buf->entry[0].pattern, 392 user_pattern_size); 393 addr = (void *)(((uintptr_t)addr) + 394 user_pattern_size); 395 rte_memcpy(addr, &missed_item, 396 missed * sizeof(*item)); 397 addr = (void *)(((uintptr_t)addr) + 398 missed * sizeof(*item)); 399 rte_memcpy(addr, flow_items, n); 400 addr = (void *)(((uintptr_t)addr) + n); 401 } 402 /* Go deeper. */ 403 if (!node->optional && node->next) { 404 next_node = node->next; 405 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) { 406 rte_errno = E2BIG; 407 return -rte_errno; 408 } 409 stack[stack_pos] = next_node; 410 } else if (*(next_node + 1)) { 411 /* Follow up with the next possibility. */ 412 ++next_node; 413 } else { 414 /* Move to the next path. */ 415 if (stack_pos) 416 next_node = stack[--stack_pos]; 417 next_node++; 418 stack[stack_pos] = next_node; 419 } 420 node = *next_node ? &graph[*next_node] : NULL; 421 }; 422 return lsize; 423 } 424 425 enum mlx5_expansion { 426 MLX5_EXPANSION_ROOT, 427 MLX5_EXPANSION_ROOT_OUTER, 428 MLX5_EXPANSION_ROOT_ETH_VLAN, 429 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN, 430 MLX5_EXPANSION_OUTER_ETH, 431 MLX5_EXPANSION_OUTER_ETH_VLAN, 432 MLX5_EXPANSION_OUTER_VLAN, 433 MLX5_EXPANSION_OUTER_IPV4, 434 MLX5_EXPANSION_OUTER_IPV4_UDP, 435 MLX5_EXPANSION_OUTER_IPV4_TCP, 436 MLX5_EXPANSION_OUTER_IPV6, 437 MLX5_EXPANSION_OUTER_IPV6_UDP, 438 MLX5_EXPANSION_OUTER_IPV6_TCP, 439 MLX5_EXPANSION_VXLAN, 440 MLX5_EXPANSION_VXLAN_GPE, 441 MLX5_EXPANSION_GRE, 442 MLX5_EXPANSION_NVGRE, 443 MLX5_EXPANSION_GRE_KEY, 444 MLX5_EXPANSION_MPLS, 445 MLX5_EXPANSION_ETH, 446 MLX5_EXPANSION_ETH_VLAN, 447 MLX5_EXPANSION_VLAN, 448 MLX5_EXPANSION_IPV4, 449 MLX5_EXPANSION_IPV4_UDP, 450 MLX5_EXPANSION_IPV4_TCP, 451 MLX5_EXPANSION_IPV6, 452 MLX5_EXPANSION_IPV6_UDP, 453 MLX5_EXPANSION_IPV6_TCP, 454 }; 455 456 /** Supported expansion of items. */ 457 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = { 458 [MLX5_EXPANSION_ROOT] = { 459 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 460 MLX5_EXPANSION_IPV4, 461 MLX5_EXPANSION_IPV6), 462 .type = RTE_FLOW_ITEM_TYPE_END, 463 }, 464 [MLX5_EXPANSION_ROOT_OUTER] = { 465 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH, 466 MLX5_EXPANSION_OUTER_IPV4, 467 MLX5_EXPANSION_OUTER_IPV6), 468 .type = RTE_FLOW_ITEM_TYPE_END, 469 }, 470 [MLX5_EXPANSION_ROOT_ETH_VLAN] = { 471 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN), 472 .type = RTE_FLOW_ITEM_TYPE_END, 473 }, 474 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = { 475 .next = MLX5_FLOW_EXPAND_RSS_NEXT 476 (MLX5_EXPANSION_OUTER_ETH_VLAN), 477 .type = RTE_FLOW_ITEM_TYPE_END, 478 }, 479 [MLX5_EXPANSION_OUTER_ETH] = { 480 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 481 MLX5_EXPANSION_OUTER_IPV6), 482 .type = RTE_FLOW_ITEM_TYPE_ETH, 483 .rss_types = 0, 484 }, 485 [MLX5_EXPANSION_OUTER_ETH_VLAN] = { 486 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN), 487 .type = RTE_FLOW_ITEM_TYPE_ETH, 488 .rss_types = 0, 489 }, 490 [MLX5_EXPANSION_OUTER_VLAN] = { 491 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4, 492 MLX5_EXPANSION_OUTER_IPV6), 493 .type = RTE_FLOW_ITEM_TYPE_VLAN, 494 }, 495 [MLX5_EXPANSION_OUTER_IPV4] = { 496 .next = MLX5_FLOW_EXPAND_RSS_NEXT 497 (MLX5_EXPANSION_OUTER_IPV4_UDP, 498 MLX5_EXPANSION_OUTER_IPV4_TCP, 499 MLX5_EXPANSION_GRE, 500 MLX5_EXPANSION_NVGRE, 501 MLX5_EXPANSION_IPV4, 502 MLX5_EXPANSION_IPV6), 503 .type = RTE_FLOW_ITEM_TYPE_IPV4, 504 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 505 ETH_RSS_NONFRAG_IPV4_OTHER, 506 }, 507 [MLX5_EXPANSION_OUTER_IPV4_UDP] = { 508 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 509 MLX5_EXPANSION_VXLAN_GPE, 510 MLX5_EXPANSION_MPLS), 511 .type = RTE_FLOW_ITEM_TYPE_UDP, 512 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 513 }, 514 [MLX5_EXPANSION_OUTER_IPV4_TCP] = { 515 .type = RTE_FLOW_ITEM_TYPE_TCP, 516 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 517 }, 518 [MLX5_EXPANSION_OUTER_IPV6] = { 519 .next = MLX5_FLOW_EXPAND_RSS_NEXT 520 (MLX5_EXPANSION_OUTER_IPV6_UDP, 521 MLX5_EXPANSION_OUTER_IPV6_TCP, 522 MLX5_EXPANSION_IPV4, 523 MLX5_EXPANSION_IPV6, 524 MLX5_EXPANSION_GRE, 525 MLX5_EXPANSION_NVGRE), 526 .type = RTE_FLOW_ITEM_TYPE_IPV6, 527 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 528 ETH_RSS_NONFRAG_IPV6_OTHER, 529 }, 530 [MLX5_EXPANSION_OUTER_IPV6_UDP] = { 531 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN, 532 MLX5_EXPANSION_VXLAN_GPE, 533 MLX5_EXPANSION_MPLS), 534 .type = RTE_FLOW_ITEM_TYPE_UDP, 535 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 536 }, 537 [MLX5_EXPANSION_OUTER_IPV6_TCP] = { 538 .type = RTE_FLOW_ITEM_TYPE_TCP, 539 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 540 }, 541 [MLX5_EXPANSION_VXLAN] = { 542 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 543 MLX5_EXPANSION_IPV4, 544 MLX5_EXPANSION_IPV6), 545 .type = RTE_FLOW_ITEM_TYPE_VXLAN, 546 }, 547 [MLX5_EXPANSION_VXLAN_GPE] = { 548 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH, 549 MLX5_EXPANSION_IPV4, 550 MLX5_EXPANSION_IPV6), 551 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE, 552 }, 553 [MLX5_EXPANSION_GRE] = { 554 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 555 MLX5_EXPANSION_IPV6, 556 MLX5_EXPANSION_GRE_KEY, 557 MLX5_EXPANSION_MPLS), 558 .type = RTE_FLOW_ITEM_TYPE_GRE, 559 }, 560 [MLX5_EXPANSION_GRE_KEY] = { 561 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 562 MLX5_EXPANSION_IPV6, 563 MLX5_EXPANSION_MPLS), 564 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY, 565 .optional = 1, 566 }, 567 [MLX5_EXPANSION_NVGRE] = { 568 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH), 569 .type = RTE_FLOW_ITEM_TYPE_NVGRE, 570 }, 571 [MLX5_EXPANSION_MPLS] = { 572 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 573 MLX5_EXPANSION_IPV6, 574 MLX5_EXPANSION_ETH), 575 .type = RTE_FLOW_ITEM_TYPE_MPLS, 576 }, 577 [MLX5_EXPANSION_ETH] = { 578 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 579 MLX5_EXPANSION_IPV6), 580 .type = RTE_FLOW_ITEM_TYPE_ETH, 581 }, 582 [MLX5_EXPANSION_ETH_VLAN] = { 583 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN), 584 .type = RTE_FLOW_ITEM_TYPE_ETH, 585 }, 586 [MLX5_EXPANSION_VLAN] = { 587 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4, 588 MLX5_EXPANSION_IPV6), 589 .type = RTE_FLOW_ITEM_TYPE_VLAN, 590 }, 591 [MLX5_EXPANSION_IPV4] = { 592 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP, 593 MLX5_EXPANSION_IPV4_TCP), 594 .type = RTE_FLOW_ITEM_TYPE_IPV4, 595 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | 596 ETH_RSS_NONFRAG_IPV4_OTHER, 597 }, 598 [MLX5_EXPANSION_IPV4_UDP] = { 599 .type = RTE_FLOW_ITEM_TYPE_UDP, 600 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP, 601 }, 602 [MLX5_EXPANSION_IPV4_TCP] = { 603 .type = RTE_FLOW_ITEM_TYPE_TCP, 604 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP, 605 }, 606 [MLX5_EXPANSION_IPV6] = { 607 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP, 608 MLX5_EXPANSION_IPV6_TCP), 609 .type = RTE_FLOW_ITEM_TYPE_IPV6, 610 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | 611 ETH_RSS_NONFRAG_IPV6_OTHER, 612 }, 613 [MLX5_EXPANSION_IPV6_UDP] = { 614 .type = RTE_FLOW_ITEM_TYPE_UDP, 615 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP, 616 }, 617 [MLX5_EXPANSION_IPV6_TCP] = { 618 .type = RTE_FLOW_ITEM_TYPE_TCP, 619 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP, 620 }, 621 }; 622 623 static struct rte_flow_action_handle * 624 mlx5_action_handle_create(struct rte_eth_dev *dev, 625 const struct rte_flow_indir_action_conf *conf, 626 const struct rte_flow_action *action, 627 struct rte_flow_error *error); 628 static int mlx5_action_handle_destroy 629 (struct rte_eth_dev *dev, 630 struct rte_flow_action_handle *handle, 631 struct rte_flow_error *error); 632 static int mlx5_action_handle_update 633 (struct rte_eth_dev *dev, 634 struct rte_flow_action_handle *handle, 635 const void *update, 636 struct rte_flow_error *error); 637 static int mlx5_action_handle_query 638 (struct rte_eth_dev *dev, 639 const struct rte_flow_action_handle *handle, 640 void *data, 641 struct rte_flow_error *error); 642 static int 643 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 644 struct rte_flow_tunnel *app_tunnel, 645 struct rte_flow_action **actions, 646 uint32_t *num_of_actions, 647 struct rte_flow_error *error); 648 static int 649 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 650 struct rte_flow_tunnel *app_tunnel, 651 struct rte_flow_item **items, 652 uint32_t *num_of_items, 653 struct rte_flow_error *error); 654 static int 655 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 656 struct rte_flow_item *pmd_items, 657 uint32_t num_items, struct rte_flow_error *err); 658 static int 659 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 660 struct rte_flow_action *pmd_actions, 661 uint32_t num_actions, 662 struct rte_flow_error *err); 663 static int 664 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 665 struct rte_mbuf *m, 666 struct rte_flow_restore_info *info, 667 struct rte_flow_error *err); 668 669 static const struct rte_flow_ops mlx5_flow_ops = { 670 .validate = mlx5_flow_validate, 671 .create = mlx5_flow_create, 672 .destroy = mlx5_flow_destroy, 673 .flush = mlx5_flow_flush, 674 .isolate = mlx5_flow_isolate, 675 .query = mlx5_flow_query, 676 .dev_dump = mlx5_flow_dev_dump, 677 .get_aged_flows = mlx5_flow_get_aged_flows, 678 .action_handle_create = mlx5_action_handle_create, 679 .action_handle_destroy = mlx5_action_handle_destroy, 680 .action_handle_update = mlx5_action_handle_update, 681 .action_handle_query = mlx5_action_handle_query, 682 .tunnel_decap_set = mlx5_flow_tunnel_decap_set, 683 .tunnel_match = mlx5_flow_tunnel_match, 684 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release, 685 .tunnel_item_release = mlx5_flow_tunnel_item_release, 686 .get_restore_info = mlx5_flow_tunnel_get_restore_info, 687 }; 688 689 /* Tunnel information. */ 690 struct mlx5_flow_tunnel_info { 691 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */ 692 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */ 693 }; 694 695 static struct mlx5_flow_tunnel_info tunnels_info[] = { 696 { 697 .tunnel = MLX5_FLOW_LAYER_VXLAN, 698 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP, 699 }, 700 { 701 .tunnel = MLX5_FLOW_LAYER_GENEVE, 702 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP, 703 }, 704 { 705 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE, 706 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP, 707 }, 708 { 709 .tunnel = MLX5_FLOW_LAYER_GRE, 710 .ptype = RTE_PTYPE_TUNNEL_GRE, 711 }, 712 { 713 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP, 714 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP, 715 }, 716 { 717 .tunnel = MLX5_FLOW_LAYER_MPLS, 718 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE, 719 }, 720 { 721 .tunnel = MLX5_FLOW_LAYER_NVGRE, 722 .ptype = RTE_PTYPE_TUNNEL_NVGRE, 723 }, 724 { 725 .tunnel = MLX5_FLOW_LAYER_IPIP, 726 .ptype = RTE_PTYPE_TUNNEL_IP, 727 }, 728 { 729 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP, 730 .ptype = RTE_PTYPE_TUNNEL_IP, 731 }, 732 { 733 .tunnel = MLX5_FLOW_LAYER_GTP, 734 .ptype = RTE_PTYPE_TUNNEL_GTPU, 735 }, 736 }; 737 738 739 740 /** 741 * Translate tag ID to register. 742 * 743 * @param[in] dev 744 * Pointer to the Ethernet device structure. 745 * @param[in] feature 746 * The feature that request the register. 747 * @param[in] id 748 * The request register ID. 749 * @param[out] error 750 * Error description in case of any. 751 * 752 * @return 753 * The request register on success, a negative errno 754 * value otherwise and rte_errno is set. 755 */ 756 int 757 mlx5_flow_get_reg_id(struct rte_eth_dev *dev, 758 enum mlx5_feature_name feature, 759 uint32_t id, 760 struct rte_flow_error *error) 761 { 762 struct mlx5_priv *priv = dev->data->dev_private; 763 struct mlx5_dev_config *config = &priv->config; 764 enum modify_reg start_reg; 765 bool skip_mtr_reg = false; 766 767 switch (feature) { 768 case MLX5_HAIRPIN_RX: 769 return REG_B; 770 case MLX5_HAIRPIN_TX: 771 return REG_A; 772 case MLX5_METADATA_RX: 773 switch (config->dv_xmeta_en) { 774 case MLX5_XMETA_MODE_LEGACY: 775 return REG_B; 776 case MLX5_XMETA_MODE_META16: 777 return REG_C_0; 778 case MLX5_XMETA_MODE_META32: 779 return REG_C_1; 780 } 781 break; 782 case MLX5_METADATA_TX: 783 return REG_A; 784 case MLX5_METADATA_FDB: 785 switch (config->dv_xmeta_en) { 786 case MLX5_XMETA_MODE_LEGACY: 787 return REG_NON; 788 case MLX5_XMETA_MODE_META16: 789 return REG_C_0; 790 case MLX5_XMETA_MODE_META32: 791 return REG_C_1; 792 } 793 break; 794 case MLX5_FLOW_MARK: 795 switch (config->dv_xmeta_en) { 796 case MLX5_XMETA_MODE_LEGACY: 797 return REG_NON; 798 case MLX5_XMETA_MODE_META16: 799 return REG_C_1; 800 case MLX5_XMETA_MODE_META32: 801 return REG_C_0; 802 } 803 break; 804 case MLX5_MTR_ID: 805 /* 806 * If meter color and meter id share one register, flow match 807 * should use the meter color register for match. 808 */ 809 if (priv->mtr_reg_share) 810 return priv->mtr_color_reg; 811 else 812 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 813 REG_C_3; 814 case MLX5_MTR_COLOR: 815 case MLX5_ASO_FLOW_HIT: 816 case MLX5_ASO_CONNTRACK: 817 /* All features use the same REG_C. */ 818 MLX5_ASSERT(priv->mtr_color_reg != REG_NON); 819 return priv->mtr_color_reg; 820 case MLX5_COPY_MARK: 821 /* 822 * Metadata COPY_MARK register using is in meter suffix sub 823 * flow while with meter. It's safe to share the same register. 824 */ 825 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3; 826 case MLX5_APP_TAG: 827 /* 828 * If meter is enable, it will engage the register for color 829 * match and flow match. If meter color match is not using the 830 * REG_C_2, need to skip the REG_C_x be used by meter color 831 * match. 832 * If meter is disable, free to use all available registers. 833 */ 834 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 : 835 (priv->mtr_reg_share ? REG_C_3 : REG_C_4); 836 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2); 837 if (id > (uint32_t)(REG_C_7 - start_reg)) 838 return rte_flow_error_set(error, EINVAL, 839 RTE_FLOW_ERROR_TYPE_ITEM, 840 NULL, "invalid tag id"); 841 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON) 842 return rte_flow_error_set(error, ENOTSUP, 843 RTE_FLOW_ERROR_TYPE_ITEM, 844 NULL, "unsupported tag id"); 845 /* 846 * This case means meter is using the REG_C_x great than 2. 847 * Take care not to conflict with meter color REG_C_x. 848 * If the available index REG_C_y >= REG_C_x, skip the 849 * color register. 850 */ 851 if (skip_mtr_reg && config->flow_mreg_c 852 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) { 853 if (id >= (uint32_t)(REG_C_7 - start_reg)) 854 return rte_flow_error_set(error, EINVAL, 855 RTE_FLOW_ERROR_TYPE_ITEM, 856 NULL, "invalid tag id"); 857 if (config->flow_mreg_c 858 [id + 1 + start_reg - REG_C_0] != REG_NON) 859 return config->flow_mreg_c 860 [id + 1 + start_reg - REG_C_0]; 861 return rte_flow_error_set(error, ENOTSUP, 862 RTE_FLOW_ERROR_TYPE_ITEM, 863 NULL, "unsupported tag id"); 864 } 865 return config->flow_mreg_c[id + start_reg - REG_C_0]; 866 } 867 MLX5_ASSERT(false); 868 return rte_flow_error_set(error, EINVAL, 869 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 870 NULL, "invalid feature name"); 871 } 872 873 /** 874 * Check extensive flow metadata register support. 875 * 876 * @param dev 877 * Pointer to rte_eth_dev structure. 878 * 879 * @return 880 * True if device supports extensive flow metadata register, otherwise false. 881 */ 882 bool 883 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev) 884 { 885 struct mlx5_priv *priv = dev->data->dev_private; 886 struct mlx5_dev_config *config = &priv->config; 887 888 /* 889 * Having available reg_c can be regarded inclusively as supporting 890 * extensive flow metadata register, which could mean, 891 * - metadata register copy action by modify header. 892 * - 16 modify header actions is supported. 893 * - reg_c's are preserved across different domain (FDB and NIC) on 894 * packet loopback by flow lookup miss. 895 */ 896 return config->flow_mreg_c[2] != REG_NON; 897 } 898 899 /** 900 * Get the lowest priority. 901 * 902 * @param[in] dev 903 * Pointer to the Ethernet device structure. 904 * @param[in] attributes 905 * Pointer to device flow rule attributes. 906 * 907 * @return 908 * The value of lowest priority of flow. 909 */ 910 uint32_t 911 mlx5_get_lowest_priority(struct rte_eth_dev *dev, 912 const struct rte_flow_attr *attr) 913 { 914 struct mlx5_priv *priv = dev->data->dev_private; 915 916 if (!attr->group && !attr->transfer) 917 return priv->config.flow_prio - 2; 918 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1; 919 } 920 921 /** 922 * Calculate matcher priority of the flow. 923 * 924 * @param[in] dev 925 * Pointer to the Ethernet device structure. 926 * @param[in] attr 927 * Pointer to device flow rule attributes. 928 * @param[in] subpriority 929 * The priority based on the items. 930 * @return 931 * The matcher priority of the flow. 932 */ 933 uint16_t 934 mlx5_get_matcher_priority(struct rte_eth_dev *dev, 935 const struct rte_flow_attr *attr, 936 uint32_t subpriority) 937 { 938 uint16_t priority = (uint16_t)attr->priority; 939 struct mlx5_priv *priv = dev->data->dev_private; 940 941 if (!attr->group && !attr->transfer) { 942 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 943 priority = priv->config.flow_prio - 1; 944 return mlx5_os_flow_adjust_priority(dev, priority, subpriority); 945 } 946 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) 947 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO; 948 return priority * 3 + subpriority; 949 } 950 951 /** 952 * Verify the @p item specifications (spec, last, mask) are compatible with the 953 * NIC capabilities. 954 * 955 * @param[in] item 956 * Item specification. 957 * @param[in] mask 958 * @p item->mask or flow default bit-masks. 959 * @param[in] nic_mask 960 * Bit-masks covering supported fields by the NIC to compare with user mask. 961 * @param[in] size 962 * Bit-masks size in bytes. 963 * @param[in] range_accepted 964 * True if range of values is accepted for specific fields, false otherwise. 965 * @param[out] error 966 * Pointer to error structure. 967 * 968 * @return 969 * 0 on success, a negative errno value otherwise and rte_errno is set. 970 */ 971 int 972 mlx5_flow_item_acceptable(const struct rte_flow_item *item, 973 const uint8_t *mask, 974 const uint8_t *nic_mask, 975 unsigned int size, 976 bool range_accepted, 977 struct rte_flow_error *error) 978 { 979 unsigned int i; 980 981 MLX5_ASSERT(nic_mask); 982 for (i = 0; i < size; ++i) 983 if ((nic_mask[i] | mask[i]) != nic_mask[i]) 984 return rte_flow_error_set(error, ENOTSUP, 985 RTE_FLOW_ERROR_TYPE_ITEM, 986 item, 987 "mask enables non supported" 988 " bits"); 989 if (!item->spec && (item->mask || item->last)) 990 return rte_flow_error_set(error, EINVAL, 991 RTE_FLOW_ERROR_TYPE_ITEM, item, 992 "mask/last without a spec is not" 993 " supported"); 994 if (item->spec && item->last && !range_accepted) { 995 uint8_t spec[size]; 996 uint8_t last[size]; 997 unsigned int i; 998 int ret; 999 1000 for (i = 0; i < size; ++i) { 1001 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i]; 1002 last[i] = ((const uint8_t *)item->last)[i] & mask[i]; 1003 } 1004 ret = memcmp(spec, last, size); 1005 if (ret != 0) 1006 return rte_flow_error_set(error, EINVAL, 1007 RTE_FLOW_ERROR_TYPE_ITEM, 1008 item, 1009 "range is not valid"); 1010 } 1011 return 0; 1012 } 1013 1014 /** 1015 * Adjust the hash fields according to the @p flow information. 1016 * 1017 * @param[in] dev_flow. 1018 * Pointer to the mlx5_flow. 1019 * @param[in] tunnel 1020 * 1 when the hash field is for a tunnel item. 1021 * @param[in] layer_types 1022 * ETH_RSS_* types. 1023 * @param[in] hash_fields 1024 * Item hash fields. 1025 * 1026 * @return 1027 * The hash fields that should be used. 1028 */ 1029 uint64_t 1030 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc, 1031 int tunnel __rte_unused, uint64_t layer_types, 1032 uint64_t hash_fields) 1033 { 1034 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1035 int rss_request_inner = rss_desc->level >= 2; 1036 1037 /* Check RSS hash level for tunnel. */ 1038 if (tunnel && rss_request_inner) 1039 hash_fields |= IBV_RX_HASH_INNER; 1040 else if (tunnel || rss_request_inner) 1041 return 0; 1042 #endif 1043 /* Check if requested layer matches RSS hash fields. */ 1044 if (!(rss_desc->types & layer_types)) 1045 return 0; 1046 return hash_fields; 1047 } 1048 1049 /** 1050 * Lookup and set the ptype in the data Rx part. A single Ptype can be used, 1051 * if several tunnel rules are used on this queue, the tunnel ptype will be 1052 * cleared. 1053 * 1054 * @param rxq_ctrl 1055 * Rx queue to update. 1056 */ 1057 static void 1058 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl) 1059 { 1060 unsigned int i; 1061 uint32_t tunnel_ptype = 0; 1062 1063 /* Look up for the ptype to use. */ 1064 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) { 1065 if (!rxq_ctrl->flow_tunnels_n[i]) 1066 continue; 1067 if (!tunnel_ptype) { 1068 tunnel_ptype = tunnels_info[i].ptype; 1069 } else { 1070 tunnel_ptype = 0; 1071 break; 1072 } 1073 } 1074 rxq_ctrl->rxq.tunnel = tunnel_ptype; 1075 } 1076 1077 /** 1078 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive 1079 * flow. 1080 * 1081 * @param[in] dev 1082 * Pointer to the Ethernet device structure. 1083 * @param[in] dev_handle 1084 * Pointer to device flow handle structure. 1085 */ 1086 void 1087 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, 1088 struct mlx5_flow_handle *dev_handle) 1089 { 1090 struct mlx5_priv *priv = dev->data->dev_private; 1091 const int mark = dev_handle->mark; 1092 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1093 struct mlx5_ind_table_obj *ind_tbl = NULL; 1094 unsigned int i; 1095 1096 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1097 struct mlx5_hrxq *hrxq; 1098 1099 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1100 dev_handle->rix_hrxq); 1101 if (hrxq) 1102 ind_tbl = hrxq->ind_table; 1103 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1104 struct mlx5_shared_action_rss *shared_rss; 1105 1106 shared_rss = mlx5_ipool_get 1107 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1108 dev_handle->rix_srss); 1109 if (shared_rss) 1110 ind_tbl = shared_rss->ind_tbl; 1111 } 1112 if (!ind_tbl) 1113 return; 1114 for (i = 0; i != ind_tbl->queues_n; ++i) { 1115 int idx = ind_tbl->queues[i]; 1116 struct mlx5_rxq_ctrl *rxq_ctrl = 1117 container_of((*priv->rxqs)[idx], 1118 struct mlx5_rxq_ctrl, rxq); 1119 1120 /* 1121 * To support metadata register copy on Tx loopback, 1122 * this must be always enabled (metadata may arive 1123 * from other port - not from local flows only. 1124 */ 1125 if (priv->config.dv_flow_en && 1126 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1127 mlx5_flow_ext_mreg_supported(dev)) { 1128 rxq_ctrl->rxq.mark = 1; 1129 rxq_ctrl->flow_mark_n = 1; 1130 } else if (mark) { 1131 rxq_ctrl->rxq.mark = 1; 1132 rxq_ctrl->flow_mark_n++; 1133 } 1134 if (tunnel) { 1135 unsigned int j; 1136 1137 /* Increase the counter matching the flow. */ 1138 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1139 if ((tunnels_info[j].tunnel & 1140 dev_handle->layers) == 1141 tunnels_info[j].tunnel) { 1142 rxq_ctrl->flow_tunnels_n[j]++; 1143 break; 1144 } 1145 } 1146 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1147 } 1148 } 1149 } 1150 1151 /** 1152 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow 1153 * 1154 * @param[in] dev 1155 * Pointer to the Ethernet device structure. 1156 * @param[in] flow 1157 * Pointer to flow structure. 1158 */ 1159 static void 1160 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow) 1161 { 1162 struct mlx5_priv *priv = dev->data->dev_private; 1163 uint32_t handle_idx; 1164 struct mlx5_flow_handle *dev_handle; 1165 1166 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1167 handle_idx, dev_handle, next) 1168 flow_drv_rxq_flags_set(dev, dev_handle); 1169 } 1170 1171 /** 1172 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1173 * device flow if no other flow uses it with the same kind of request. 1174 * 1175 * @param dev 1176 * Pointer to Ethernet device. 1177 * @param[in] dev_handle 1178 * Pointer to the device flow handle structure. 1179 */ 1180 static void 1181 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, 1182 struct mlx5_flow_handle *dev_handle) 1183 { 1184 struct mlx5_priv *priv = dev->data->dev_private; 1185 const int mark = dev_handle->mark; 1186 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL); 1187 struct mlx5_ind_table_obj *ind_tbl = NULL; 1188 unsigned int i; 1189 1190 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) { 1191 struct mlx5_hrxq *hrxq; 1192 1193 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ], 1194 dev_handle->rix_hrxq); 1195 if (hrxq) 1196 ind_tbl = hrxq->ind_table; 1197 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) { 1198 struct mlx5_shared_action_rss *shared_rss; 1199 1200 shared_rss = mlx5_ipool_get 1201 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 1202 dev_handle->rix_srss); 1203 if (shared_rss) 1204 ind_tbl = shared_rss->ind_tbl; 1205 } 1206 if (!ind_tbl) 1207 return; 1208 MLX5_ASSERT(dev->data->dev_started); 1209 for (i = 0; i != ind_tbl->queues_n; ++i) { 1210 int idx = ind_tbl->queues[i]; 1211 struct mlx5_rxq_ctrl *rxq_ctrl = 1212 container_of((*priv->rxqs)[idx], 1213 struct mlx5_rxq_ctrl, rxq); 1214 1215 if (priv->config.dv_flow_en && 1216 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && 1217 mlx5_flow_ext_mreg_supported(dev)) { 1218 rxq_ctrl->rxq.mark = 1; 1219 rxq_ctrl->flow_mark_n = 1; 1220 } else if (mark) { 1221 rxq_ctrl->flow_mark_n--; 1222 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n; 1223 } 1224 if (tunnel) { 1225 unsigned int j; 1226 1227 /* Decrease the counter matching the flow. */ 1228 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) { 1229 if ((tunnels_info[j].tunnel & 1230 dev_handle->layers) == 1231 tunnels_info[j].tunnel) { 1232 rxq_ctrl->flow_tunnels_n[j]--; 1233 break; 1234 } 1235 } 1236 flow_rxq_tunnel_ptype_update(rxq_ctrl); 1237 } 1238 } 1239 } 1240 1241 /** 1242 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the 1243 * @p flow if no other flow uses it with the same kind of request. 1244 * 1245 * @param dev 1246 * Pointer to Ethernet device. 1247 * @param[in] flow 1248 * Pointer to the flow. 1249 */ 1250 static void 1251 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow) 1252 { 1253 struct mlx5_priv *priv = dev->data->dev_private; 1254 uint32_t handle_idx; 1255 struct mlx5_flow_handle *dev_handle; 1256 1257 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 1258 handle_idx, dev_handle, next) 1259 flow_drv_rxq_flags_trim(dev, dev_handle); 1260 } 1261 1262 /** 1263 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues. 1264 * 1265 * @param dev 1266 * Pointer to Ethernet device. 1267 */ 1268 static void 1269 flow_rxq_flags_clear(struct rte_eth_dev *dev) 1270 { 1271 struct mlx5_priv *priv = dev->data->dev_private; 1272 unsigned int i; 1273 1274 for (i = 0; i != priv->rxqs_n; ++i) { 1275 struct mlx5_rxq_ctrl *rxq_ctrl; 1276 unsigned int j; 1277 1278 if (!(*priv->rxqs)[i]) 1279 continue; 1280 rxq_ctrl = container_of((*priv->rxqs)[i], 1281 struct mlx5_rxq_ctrl, rxq); 1282 rxq_ctrl->flow_mark_n = 0; 1283 rxq_ctrl->rxq.mark = 0; 1284 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) 1285 rxq_ctrl->flow_tunnels_n[j] = 0; 1286 rxq_ctrl->rxq.tunnel = 0; 1287 } 1288 } 1289 1290 /** 1291 * Set the Rx queue dynamic metadata (mask and offset) for a flow 1292 * 1293 * @param[in] dev 1294 * Pointer to the Ethernet device structure. 1295 */ 1296 void 1297 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev) 1298 { 1299 struct mlx5_priv *priv = dev->data->dev_private; 1300 struct mlx5_rxq_data *data; 1301 unsigned int i; 1302 1303 for (i = 0; i != priv->rxqs_n; ++i) { 1304 if (!(*priv->rxqs)[i]) 1305 continue; 1306 data = (*priv->rxqs)[i]; 1307 if (!rte_flow_dynf_metadata_avail()) { 1308 data->dynf_meta = 0; 1309 data->flow_meta_mask = 0; 1310 data->flow_meta_offset = -1; 1311 data->flow_meta_port_mask = 0; 1312 } else { 1313 data->dynf_meta = 1; 1314 data->flow_meta_mask = rte_flow_dynf_metadata_mask; 1315 data->flow_meta_offset = rte_flow_dynf_metadata_offs; 1316 data->flow_meta_port_mask = (uint32_t)~0; 1317 if (priv->config.dv_xmeta_en == MLX5_XMETA_MODE_META16) 1318 data->flow_meta_port_mask >>= 16; 1319 } 1320 } 1321 } 1322 1323 /* 1324 * return a pointer to the desired action in the list of actions. 1325 * 1326 * @param[in] actions 1327 * The list of actions to search the action in. 1328 * @param[in] action 1329 * The action to find. 1330 * 1331 * @return 1332 * Pointer to the action in the list, if found. NULL otherwise. 1333 */ 1334 const struct rte_flow_action * 1335 mlx5_flow_find_action(const struct rte_flow_action *actions, 1336 enum rte_flow_action_type action) 1337 { 1338 if (actions == NULL) 1339 return NULL; 1340 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) 1341 if (actions->type == action) 1342 return actions; 1343 return NULL; 1344 } 1345 1346 /* 1347 * Validate the flag action. 1348 * 1349 * @param[in] action_flags 1350 * Bit-fields that holds the actions detected until now. 1351 * @param[in] attr 1352 * Attributes of flow that includes this action. 1353 * @param[out] error 1354 * Pointer to error structure. 1355 * 1356 * @return 1357 * 0 on success, a negative errno value otherwise and rte_errno is set. 1358 */ 1359 int 1360 mlx5_flow_validate_action_flag(uint64_t action_flags, 1361 const struct rte_flow_attr *attr, 1362 struct rte_flow_error *error) 1363 { 1364 if (action_flags & MLX5_FLOW_ACTION_MARK) 1365 return rte_flow_error_set(error, EINVAL, 1366 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1367 "can't mark and flag in same flow"); 1368 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1369 return rte_flow_error_set(error, EINVAL, 1370 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1371 "can't have 2 flag" 1372 " actions in same flow"); 1373 if (attr->egress) 1374 return rte_flow_error_set(error, ENOTSUP, 1375 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1376 "flag action not supported for " 1377 "egress"); 1378 return 0; 1379 } 1380 1381 /* 1382 * Validate the mark action. 1383 * 1384 * @param[in] action 1385 * Pointer to the queue action. 1386 * @param[in] action_flags 1387 * Bit-fields that holds the actions detected until now. 1388 * @param[in] attr 1389 * Attributes of flow that includes this action. 1390 * @param[out] error 1391 * Pointer to error structure. 1392 * 1393 * @return 1394 * 0 on success, a negative errno value otherwise and rte_errno is set. 1395 */ 1396 int 1397 mlx5_flow_validate_action_mark(const struct rte_flow_action *action, 1398 uint64_t action_flags, 1399 const struct rte_flow_attr *attr, 1400 struct rte_flow_error *error) 1401 { 1402 const struct rte_flow_action_mark *mark = action->conf; 1403 1404 if (!mark) 1405 return rte_flow_error_set(error, EINVAL, 1406 RTE_FLOW_ERROR_TYPE_ACTION, 1407 action, 1408 "configuration cannot be null"); 1409 if (mark->id >= MLX5_FLOW_MARK_MAX) 1410 return rte_flow_error_set(error, EINVAL, 1411 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1412 &mark->id, 1413 "mark id must in 0 <= id < " 1414 RTE_STR(MLX5_FLOW_MARK_MAX)); 1415 if (action_flags & MLX5_FLOW_ACTION_FLAG) 1416 return rte_flow_error_set(error, EINVAL, 1417 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1418 "can't flag and mark in same flow"); 1419 if (action_flags & MLX5_FLOW_ACTION_MARK) 1420 return rte_flow_error_set(error, EINVAL, 1421 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1422 "can't have 2 mark actions in same" 1423 " flow"); 1424 if (attr->egress) 1425 return rte_flow_error_set(error, ENOTSUP, 1426 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1427 "mark action not supported for " 1428 "egress"); 1429 return 0; 1430 } 1431 1432 /* 1433 * Validate the drop action. 1434 * 1435 * @param[in] action_flags 1436 * Bit-fields that holds the actions detected until now. 1437 * @param[in] attr 1438 * Attributes of flow that includes this action. 1439 * @param[out] error 1440 * Pointer to error structure. 1441 * 1442 * @return 1443 * 0 on success, a negative errno value otherwise and rte_errno is set. 1444 */ 1445 int 1446 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused, 1447 const struct rte_flow_attr *attr, 1448 struct rte_flow_error *error) 1449 { 1450 if (attr->egress) 1451 return rte_flow_error_set(error, ENOTSUP, 1452 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1453 "drop action not supported for " 1454 "egress"); 1455 return 0; 1456 } 1457 1458 /* 1459 * Validate the queue action. 1460 * 1461 * @param[in] action 1462 * Pointer to the queue action. 1463 * @param[in] action_flags 1464 * Bit-fields that holds the actions detected until now. 1465 * @param[in] dev 1466 * Pointer to the Ethernet device structure. 1467 * @param[in] attr 1468 * Attributes of flow that includes this action. 1469 * @param[out] error 1470 * Pointer to error structure. 1471 * 1472 * @return 1473 * 0 on success, a negative errno value otherwise and rte_errno is set. 1474 */ 1475 int 1476 mlx5_flow_validate_action_queue(const struct rte_flow_action *action, 1477 uint64_t action_flags, 1478 struct rte_eth_dev *dev, 1479 const struct rte_flow_attr *attr, 1480 struct rte_flow_error *error) 1481 { 1482 struct mlx5_priv *priv = dev->data->dev_private; 1483 const struct rte_flow_action_queue *queue = action->conf; 1484 1485 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1486 return rte_flow_error_set(error, EINVAL, 1487 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1488 "can't have 2 fate actions in" 1489 " same flow"); 1490 if (!priv->rxqs_n) 1491 return rte_flow_error_set(error, EINVAL, 1492 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1493 NULL, "No Rx queues configured"); 1494 if (queue->index >= priv->rxqs_n) 1495 return rte_flow_error_set(error, EINVAL, 1496 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1497 &queue->index, 1498 "queue index out of range"); 1499 if (!(*priv->rxqs)[queue->index]) 1500 return rte_flow_error_set(error, EINVAL, 1501 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1502 &queue->index, 1503 "queue is not configured"); 1504 if (attr->egress) 1505 return rte_flow_error_set(error, ENOTSUP, 1506 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1507 "queue action not supported for " 1508 "egress"); 1509 return 0; 1510 } 1511 1512 /* 1513 * Validate the rss action. 1514 * 1515 * @param[in] dev 1516 * Pointer to the Ethernet device structure. 1517 * @param[in] action 1518 * Pointer to the queue action. 1519 * @param[out] error 1520 * Pointer to error structure. 1521 * 1522 * @return 1523 * 0 on success, a negative errno value otherwise and rte_errno is set. 1524 */ 1525 int 1526 mlx5_validate_action_rss(struct rte_eth_dev *dev, 1527 const struct rte_flow_action *action, 1528 struct rte_flow_error *error) 1529 { 1530 struct mlx5_priv *priv = dev->data->dev_private; 1531 const struct rte_flow_action_rss *rss = action->conf; 1532 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED; 1533 unsigned int i; 1534 1535 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT && 1536 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) 1537 return rte_flow_error_set(error, ENOTSUP, 1538 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1539 &rss->func, 1540 "RSS hash function not supported"); 1541 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT 1542 if (rss->level > 2) 1543 #else 1544 if (rss->level > 1) 1545 #endif 1546 return rte_flow_error_set(error, ENOTSUP, 1547 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1548 &rss->level, 1549 "tunnel RSS is not supported"); 1550 /* allow RSS key_len 0 in case of NULL (default) RSS key. */ 1551 if (rss->key_len == 0 && rss->key != NULL) 1552 return rte_flow_error_set(error, ENOTSUP, 1553 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1554 &rss->key_len, 1555 "RSS hash key length 0"); 1556 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN) 1557 return rte_flow_error_set(error, ENOTSUP, 1558 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1559 &rss->key_len, 1560 "RSS hash key too small"); 1561 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN) 1562 return rte_flow_error_set(error, ENOTSUP, 1563 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1564 &rss->key_len, 1565 "RSS hash key too large"); 1566 if (rss->queue_num > priv->config.ind_table_max_size) 1567 return rte_flow_error_set(error, ENOTSUP, 1568 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1569 &rss->queue_num, 1570 "number of queues too large"); 1571 if (rss->types & MLX5_RSS_HF_MASK) 1572 return rte_flow_error_set(error, ENOTSUP, 1573 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1574 &rss->types, 1575 "some RSS protocols are not" 1576 " supported"); 1577 if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) && 1578 !(rss->types & ETH_RSS_IP)) 1579 return rte_flow_error_set(error, EINVAL, 1580 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1581 "L3 partial RSS requested but L3 RSS" 1582 " type not specified"); 1583 if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) && 1584 !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP))) 1585 return rte_flow_error_set(error, EINVAL, 1586 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1587 "L4 partial RSS requested but L4 RSS" 1588 " type not specified"); 1589 if (!priv->rxqs_n) 1590 return rte_flow_error_set(error, EINVAL, 1591 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1592 NULL, "No Rx queues configured"); 1593 if (!rss->queue_num) 1594 return rte_flow_error_set(error, EINVAL, 1595 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1596 NULL, "No queues configured"); 1597 for (i = 0; i != rss->queue_num; ++i) { 1598 struct mlx5_rxq_ctrl *rxq_ctrl; 1599 1600 if (rss->queue[i] >= priv->rxqs_n) 1601 return rte_flow_error_set 1602 (error, EINVAL, 1603 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1604 &rss->queue[i], "queue index out of range"); 1605 if (!(*priv->rxqs)[rss->queue[i]]) 1606 return rte_flow_error_set 1607 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1608 &rss->queue[i], "queue is not configured"); 1609 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]], 1610 struct mlx5_rxq_ctrl, rxq); 1611 if (i == 0) 1612 rxq_type = rxq_ctrl->type; 1613 if (rxq_type != rxq_ctrl->type) 1614 return rte_flow_error_set 1615 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF, 1616 &rss->queue[i], 1617 "combining hairpin and regular RSS queues is not supported"); 1618 } 1619 return 0; 1620 } 1621 1622 /* 1623 * Validate the rss action. 1624 * 1625 * @param[in] action 1626 * Pointer to the queue action. 1627 * @param[in] action_flags 1628 * Bit-fields that holds the actions detected until now. 1629 * @param[in] dev 1630 * Pointer to the Ethernet device structure. 1631 * @param[in] attr 1632 * Attributes of flow that includes this action. 1633 * @param[in] item_flags 1634 * Items that were detected. 1635 * @param[out] error 1636 * Pointer to error structure. 1637 * 1638 * @return 1639 * 0 on success, a negative errno value otherwise and rte_errno is set. 1640 */ 1641 int 1642 mlx5_flow_validate_action_rss(const struct rte_flow_action *action, 1643 uint64_t action_flags, 1644 struct rte_eth_dev *dev, 1645 const struct rte_flow_attr *attr, 1646 uint64_t item_flags, 1647 struct rte_flow_error *error) 1648 { 1649 const struct rte_flow_action_rss *rss = action->conf; 1650 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1651 int ret; 1652 1653 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1654 return rte_flow_error_set(error, EINVAL, 1655 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1656 "can't have 2 fate actions" 1657 " in same flow"); 1658 ret = mlx5_validate_action_rss(dev, action, error); 1659 if (ret) 1660 return ret; 1661 if (attr->egress) 1662 return rte_flow_error_set(error, ENOTSUP, 1663 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1664 "rss action not supported for " 1665 "egress"); 1666 if (rss->level > 1 && !tunnel) 1667 return rte_flow_error_set(error, EINVAL, 1668 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1669 "inner RSS is not supported for " 1670 "non-tunnel flows"); 1671 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) && 1672 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) { 1673 return rte_flow_error_set(error, EINVAL, 1674 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 1675 "RSS on eCPRI is not supported now"); 1676 } 1677 if ((item_flags & MLX5_FLOW_LAYER_MPLS) && 1678 !(item_flags & 1679 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) && 1680 rss->level > 1) 1681 return rte_flow_error_set(error, EINVAL, 1682 RTE_FLOW_ERROR_TYPE_ITEM, NULL, 1683 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern"); 1684 return 0; 1685 } 1686 1687 /* 1688 * Validate the default miss action. 1689 * 1690 * @param[in] action_flags 1691 * Bit-fields that holds the actions detected until now. 1692 * @param[out] error 1693 * Pointer to error structure. 1694 * 1695 * @return 1696 * 0 on success, a negative errno value otherwise and rte_errno is set. 1697 */ 1698 int 1699 mlx5_flow_validate_action_default_miss(uint64_t action_flags, 1700 const struct rte_flow_attr *attr, 1701 struct rte_flow_error *error) 1702 { 1703 if (action_flags & MLX5_FLOW_FATE_ACTIONS) 1704 return rte_flow_error_set(error, EINVAL, 1705 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1706 "can't have 2 fate actions in" 1707 " same flow"); 1708 if (attr->egress) 1709 return rte_flow_error_set(error, ENOTSUP, 1710 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1711 "default miss action not supported " 1712 "for egress"); 1713 if (attr->group) 1714 return rte_flow_error_set(error, ENOTSUP, 1715 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL, 1716 "only group 0 is supported"); 1717 if (attr->transfer) 1718 return rte_flow_error_set(error, ENOTSUP, 1719 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1720 NULL, "transfer is not supported"); 1721 return 0; 1722 } 1723 1724 /* 1725 * Validate the count action. 1726 * 1727 * @param[in] dev 1728 * Pointer to the Ethernet device structure. 1729 * @param[in] attr 1730 * Attributes of flow that includes this action. 1731 * @param[out] error 1732 * Pointer to error structure. 1733 * 1734 * @return 1735 * 0 on success, a negative errno value otherwise and rte_errno is set. 1736 */ 1737 int 1738 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused, 1739 const struct rte_flow_attr *attr, 1740 struct rte_flow_error *error) 1741 { 1742 if (attr->egress) 1743 return rte_flow_error_set(error, ENOTSUP, 1744 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1745 "count action not supported for " 1746 "egress"); 1747 return 0; 1748 } 1749 1750 /* 1751 * Validate the ASO CT action. 1752 * 1753 * @param[in] dev 1754 * Pointer to the Ethernet device structure. 1755 * @param[in] conntrack 1756 * Pointer to the CT action profile. 1757 * @param[out] error 1758 * Pointer to error structure. 1759 * 1760 * @return 1761 * 0 on success, a negative errno value otherwise and rte_errno is set. 1762 */ 1763 int 1764 mlx5_validate_action_ct(struct rte_eth_dev *dev, 1765 const struct rte_flow_action_conntrack *conntrack, 1766 struct rte_flow_error *error) 1767 { 1768 RTE_SET_USED(dev); 1769 1770 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT) 1771 return rte_flow_error_set(error, EINVAL, 1772 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1773 "Invalid CT state"); 1774 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST) 1775 return rte_flow_error_set(error, EINVAL, 1776 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 1777 "Invalid last TCP packet flag"); 1778 return 0; 1779 } 1780 1781 /** 1782 * Verify the @p attributes will be correctly understood by the NIC and store 1783 * them in the @p flow if everything is correct. 1784 * 1785 * @param[in] dev 1786 * Pointer to the Ethernet device structure. 1787 * @param[in] attributes 1788 * Pointer to flow attributes 1789 * @param[out] error 1790 * Pointer to error structure. 1791 * 1792 * @return 1793 * 0 on success, a negative errno value otherwise and rte_errno is set. 1794 */ 1795 int 1796 mlx5_flow_validate_attributes(struct rte_eth_dev *dev, 1797 const struct rte_flow_attr *attributes, 1798 struct rte_flow_error *error) 1799 { 1800 struct mlx5_priv *priv = dev->data->dev_private; 1801 uint32_t priority_max = priv->config.flow_prio - 1; 1802 1803 if (attributes->group) 1804 return rte_flow_error_set(error, ENOTSUP, 1805 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 1806 NULL, "groups is not supported"); 1807 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR && 1808 attributes->priority >= priority_max) 1809 return rte_flow_error_set(error, ENOTSUP, 1810 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 1811 NULL, "priority out of range"); 1812 if (attributes->egress) 1813 return rte_flow_error_set(error, ENOTSUP, 1814 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL, 1815 "egress is not supported"); 1816 if (attributes->transfer && !priv->config.dv_esw_en) 1817 return rte_flow_error_set(error, ENOTSUP, 1818 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 1819 NULL, "transfer is not supported"); 1820 if (!attributes->ingress) 1821 return rte_flow_error_set(error, EINVAL, 1822 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 1823 NULL, 1824 "ingress attribute is mandatory"); 1825 return 0; 1826 } 1827 1828 /** 1829 * Validate ICMP6 item. 1830 * 1831 * @param[in] item 1832 * Item specification. 1833 * @param[in] item_flags 1834 * Bit-fields that holds the items detected until now. 1835 * @param[in] ext_vlan_sup 1836 * Whether extended VLAN features are supported or not. 1837 * @param[out] error 1838 * Pointer to error structure. 1839 * 1840 * @return 1841 * 0 on success, a negative errno value otherwise and rte_errno is set. 1842 */ 1843 int 1844 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item, 1845 uint64_t item_flags, 1846 uint8_t target_protocol, 1847 struct rte_flow_error *error) 1848 { 1849 const struct rte_flow_item_icmp6 *mask = item->mask; 1850 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1851 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 : 1852 MLX5_FLOW_LAYER_OUTER_L3_IPV6; 1853 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1854 MLX5_FLOW_LAYER_OUTER_L4; 1855 int ret; 1856 1857 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6) 1858 return rte_flow_error_set(error, EINVAL, 1859 RTE_FLOW_ERROR_TYPE_ITEM, item, 1860 "protocol filtering not compatible" 1861 " with ICMP6 layer"); 1862 if (!(item_flags & l3m)) 1863 return rte_flow_error_set(error, EINVAL, 1864 RTE_FLOW_ERROR_TYPE_ITEM, item, 1865 "IPv6 is mandatory to filter on" 1866 " ICMP6"); 1867 if (item_flags & l4m) 1868 return rte_flow_error_set(error, EINVAL, 1869 RTE_FLOW_ERROR_TYPE_ITEM, item, 1870 "multiple L4 layers not supported"); 1871 if (!mask) 1872 mask = &rte_flow_item_icmp6_mask; 1873 ret = mlx5_flow_item_acceptable 1874 (item, (const uint8_t *)mask, 1875 (const uint8_t *)&rte_flow_item_icmp6_mask, 1876 sizeof(struct rte_flow_item_icmp6), 1877 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1878 if (ret < 0) 1879 return ret; 1880 return 0; 1881 } 1882 1883 /** 1884 * Validate ICMP item. 1885 * 1886 * @param[in] item 1887 * Item specification. 1888 * @param[in] item_flags 1889 * Bit-fields that holds the items detected until now. 1890 * @param[out] error 1891 * Pointer to error structure. 1892 * 1893 * @return 1894 * 0 on success, a negative errno value otherwise and rte_errno is set. 1895 */ 1896 int 1897 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item, 1898 uint64_t item_flags, 1899 uint8_t target_protocol, 1900 struct rte_flow_error *error) 1901 { 1902 const struct rte_flow_item_icmp *mask = item->mask; 1903 const struct rte_flow_item_icmp nic_mask = { 1904 .hdr.icmp_type = 0xff, 1905 .hdr.icmp_code = 0xff, 1906 .hdr.icmp_ident = RTE_BE16(0xffff), 1907 .hdr.icmp_seq_nb = RTE_BE16(0xffff), 1908 }; 1909 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1910 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 : 1911 MLX5_FLOW_LAYER_OUTER_L3_IPV4; 1912 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 1913 MLX5_FLOW_LAYER_OUTER_L4; 1914 int ret; 1915 1916 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP) 1917 return rte_flow_error_set(error, EINVAL, 1918 RTE_FLOW_ERROR_TYPE_ITEM, item, 1919 "protocol filtering not compatible" 1920 " with ICMP layer"); 1921 if (!(item_flags & l3m)) 1922 return rte_flow_error_set(error, EINVAL, 1923 RTE_FLOW_ERROR_TYPE_ITEM, item, 1924 "IPv4 is mandatory to filter" 1925 " on ICMP"); 1926 if (item_flags & l4m) 1927 return rte_flow_error_set(error, EINVAL, 1928 RTE_FLOW_ERROR_TYPE_ITEM, item, 1929 "multiple L4 layers not supported"); 1930 if (!mask) 1931 mask = &nic_mask; 1932 ret = mlx5_flow_item_acceptable 1933 (item, (const uint8_t *)mask, 1934 (const uint8_t *)&nic_mask, 1935 sizeof(struct rte_flow_item_icmp), 1936 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1937 if (ret < 0) 1938 return ret; 1939 return 0; 1940 } 1941 1942 /** 1943 * Validate Ethernet item. 1944 * 1945 * @param[in] item 1946 * Item specification. 1947 * @param[in] item_flags 1948 * Bit-fields that holds the items detected until now. 1949 * @param[out] error 1950 * Pointer to error structure. 1951 * 1952 * @return 1953 * 0 on success, a negative errno value otherwise and rte_errno is set. 1954 */ 1955 int 1956 mlx5_flow_validate_item_eth(const struct rte_flow_item *item, 1957 uint64_t item_flags, bool ext_vlan_sup, 1958 struct rte_flow_error *error) 1959 { 1960 const struct rte_flow_item_eth *mask = item->mask; 1961 const struct rte_flow_item_eth nic_mask = { 1962 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1963 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1964 .type = RTE_BE16(0xffff), 1965 .has_vlan = ext_vlan_sup ? 1 : 0, 1966 }; 1967 int ret; 1968 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 1969 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 : 1970 MLX5_FLOW_LAYER_OUTER_L2; 1971 1972 if (item_flags & ethm) 1973 return rte_flow_error_set(error, ENOTSUP, 1974 RTE_FLOW_ERROR_TYPE_ITEM, item, 1975 "multiple L2 layers not supported"); 1976 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) || 1977 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))) 1978 return rte_flow_error_set(error, EINVAL, 1979 RTE_FLOW_ERROR_TYPE_ITEM, item, 1980 "L2 layer should not follow " 1981 "L3 layers"); 1982 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) || 1983 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN))) 1984 return rte_flow_error_set(error, EINVAL, 1985 RTE_FLOW_ERROR_TYPE_ITEM, item, 1986 "L2 layer should not follow VLAN"); 1987 if (!mask) 1988 mask = &rte_flow_item_eth_mask; 1989 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 1990 (const uint8_t *)&nic_mask, 1991 sizeof(struct rte_flow_item_eth), 1992 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 1993 return ret; 1994 } 1995 1996 /** 1997 * Validate VLAN item. 1998 * 1999 * @param[in] item 2000 * Item specification. 2001 * @param[in] item_flags 2002 * Bit-fields that holds the items detected until now. 2003 * @param[in] dev 2004 * Ethernet device flow is being created on. 2005 * @param[out] error 2006 * Pointer to error structure. 2007 * 2008 * @return 2009 * 0 on success, a negative errno value otherwise and rte_errno is set. 2010 */ 2011 int 2012 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item, 2013 uint64_t item_flags, 2014 struct rte_eth_dev *dev, 2015 struct rte_flow_error *error) 2016 { 2017 const struct rte_flow_item_vlan *spec = item->spec; 2018 const struct rte_flow_item_vlan *mask = item->mask; 2019 const struct rte_flow_item_vlan nic_mask = { 2020 .tci = RTE_BE16(UINT16_MAX), 2021 .inner_type = RTE_BE16(UINT16_MAX), 2022 }; 2023 uint16_t vlan_tag = 0; 2024 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2025 int ret; 2026 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 | 2027 MLX5_FLOW_LAYER_INNER_L4) : 2028 (MLX5_FLOW_LAYER_OUTER_L3 | 2029 MLX5_FLOW_LAYER_OUTER_L4); 2030 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN : 2031 MLX5_FLOW_LAYER_OUTER_VLAN; 2032 2033 if (item_flags & vlanm) 2034 return rte_flow_error_set(error, EINVAL, 2035 RTE_FLOW_ERROR_TYPE_ITEM, item, 2036 "multiple VLAN layers not supported"); 2037 else if ((item_flags & l34m) != 0) 2038 return rte_flow_error_set(error, EINVAL, 2039 RTE_FLOW_ERROR_TYPE_ITEM, item, 2040 "VLAN cannot follow L3/L4 layer"); 2041 if (!mask) 2042 mask = &rte_flow_item_vlan_mask; 2043 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2044 (const uint8_t *)&nic_mask, 2045 sizeof(struct rte_flow_item_vlan), 2046 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2047 if (ret) 2048 return ret; 2049 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) { 2050 struct mlx5_priv *priv = dev->data->dev_private; 2051 2052 if (priv->vmwa_context) { 2053 /* 2054 * Non-NULL context means we have a virtual machine 2055 * and SR-IOV enabled, we have to create VLAN interface 2056 * to make hypervisor to setup E-Switch vport 2057 * context correctly. We avoid creating the multiple 2058 * VLAN interfaces, so we cannot support VLAN tag mask. 2059 */ 2060 return rte_flow_error_set(error, EINVAL, 2061 RTE_FLOW_ERROR_TYPE_ITEM, 2062 item, 2063 "VLAN tag mask is not" 2064 " supported in virtual" 2065 " environment"); 2066 } 2067 } 2068 if (spec) { 2069 vlan_tag = spec->tci; 2070 vlan_tag &= mask->tci; 2071 } 2072 /* 2073 * From verbs perspective an empty VLAN is equivalent 2074 * to a packet without VLAN layer. 2075 */ 2076 if (!vlan_tag) 2077 return rte_flow_error_set(error, EINVAL, 2078 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 2079 item->spec, 2080 "VLAN cannot be empty"); 2081 return 0; 2082 } 2083 2084 /** 2085 * Validate IPV4 item. 2086 * 2087 * @param[in] item 2088 * Item specification. 2089 * @param[in] item_flags 2090 * Bit-fields that holds the items detected until now. 2091 * @param[in] last_item 2092 * Previous validated item in the pattern items. 2093 * @param[in] ether_type 2094 * Type in the ethernet layer header (including dot1q). 2095 * @param[in] acc_mask 2096 * Acceptable mask, if NULL default internal default mask 2097 * will be used to check whether item fields are supported. 2098 * @param[in] range_accepted 2099 * True if range of values is accepted for specific fields, false otherwise. 2100 * @param[out] error 2101 * Pointer to error structure. 2102 * 2103 * @return 2104 * 0 on success, a negative errno value otherwise and rte_errno is set. 2105 */ 2106 int 2107 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item, 2108 uint64_t item_flags, 2109 uint64_t last_item, 2110 uint16_t ether_type, 2111 const struct rte_flow_item_ipv4 *acc_mask, 2112 bool range_accepted, 2113 struct rte_flow_error *error) 2114 { 2115 const struct rte_flow_item_ipv4 *mask = item->mask; 2116 const struct rte_flow_item_ipv4 *spec = item->spec; 2117 const struct rte_flow_item_ipv4 nic_mask = { 2118 .hdr = { 2119 .src_addr = RTE_BE32(0xffffffff), 2120 .dst_addr = RTE_BE32(0xffffffff), 2121 .type_of_service = 0xff, 2122 .next_proto_id = 0xff, 2123 }, 2124 }; 2125 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2126 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2127 MLX5_FLOW_LAYER_OUTER_L3; 2128 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2129 MLX5_FLOW_LAYER_OUTER_L4; 2130 int ret; 2131 uint8_t next_proto = 0xFF; 2132 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2133 MLX5_FLOW_LAYER_OUTER_VLAN | 2134 MLX5_FLOW_LAYER_INNER_VLAN); 2135 2136 if ((last_item & l2_vlan) && ether_type && 2137 ether_type != RTE_ETHER_TYPE_IPV4) 2138 return rte_flow_error_set(error, EINVAL, 2139 RTE_FLOW_ERROR_TYPE_ITEM, item, 2140 "IPv4 cannot follow L2/VLAN layer " 2141 "which ether type is not IPv4"); 2142 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2143 if (mask && spec) 2144 next_proto = mask->hdr.next_proto_id & 2145 spec->hdr.next_proto_id; 2146 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2147 return rte_flow_error_set(error, EINVAL, 2148 RTE_FLOW_ERROR_TYPE_ITEM, 2149 item, 2150 "multiple tunnel " 2151 "not supported"); 2152 } 2153 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) 2154 return rte_flow_error_set(error, EINVAL, 2155 RTE_FLOW_ERROR_TYPE_ITEM, item, 2156 "wrong tunnel type - IPv6 specified " 2157 "but IPv4 item provided"); 2158 if (item_flags & l3m) 2159 return rte_flow_error_set(error, ENOTSUP, 2160 RTE_FLOW_ERROR_TYPE_ITEM, item, 2161 "multiple L3 layers not supported"); 2162 else if (item_flags & l4m) 2163 return rte_flow_error_set(error, EINVAL, 2164 RTE_FLOW_ERROR_TYPE_ITEM, item, 2165 "L3 cannot follow an L4 layer."); 2166 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2167 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2168 return rte_flow_error_set(error, EINVAL, 2169 RTE_FLOW_ERROR_TYPE_ITEM, item, 2170 "L3 cannot follow an NVGRE layer."); 2171 if (!mask) 2172 mask = &rte_flow_item_ipv4_mask; 2173 else if (mask->hdr.next_proto_id != 0 && 2174 mask->hdr.next_proto_id != 0xff) 2175 return rte_flow_error_set(error, EINVAL, 2176 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 2177 "partial mask is not supported" 2178 " for protocol"); 2179 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2180 acc_mask ? (const uint8_t *)acc_mask 2181 : (const uint8_t *)&nic_mask, 2182 sizeof(struct rte_flow_item_ipv4), 2183 range_accepted, error); 2184 if (ret < 0) 2185 return ret; 2186 return 0; 2187 } 2188 2189 /** 2190 * Validate IPV6 item. 2191 * 2192 * @param[in] item 2193 * Item specification. 2194 * @param[in] item_flags 2195 * Bit-fields that holds the items detected until now. 2196 * @param[in] last_item 2197 * Previous validated item in the pattern items. 2198 * @param[in] ether_type 2199 * Type in the ethernet layer header (including dot1q). 2200 * @param[in] acc_mask 2201 * Acceptable mask, if NULL default internal default mask 2202 * will be used to check whether item fields are supported. 2203 * @param[out] error 2204 * Pointer to error structure. 2205 * 2206 * @return 2207 * 0 on success, a negative errno value otherwise and rte_errno is set. 2208 */ 2209 int 2210 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item, 2211 uint64_t item_flags, 2212 uint64_t last_item, 2213 uint16_t ether_type, 2214 const struct rte_flow_item_ipv6 *acc_mask, 2215 struct rte_flow_error *error) 2216 { 2217 const struct rte_flow_item_ipv6 *mask = item->mask; 2218 const struct rte_flow_item_ipv6 *spec = item->spec; 2219 const struct rte_flow_item_ipv6 nic_mask = { 2220 .hdr = { 2221 .src_addr = 2222 "\xff\xff\xff\xff\xff\xff\xff\xff" 2223 "\xff\xff\xff\xff\xff\xff\xff\xff", 2224 .dst_addr = 2225 "\xff\xff\xff\xff\xff\xff\xff\xff" 2226 "\xff\xff\xff\xff\xff\xff\xff\xff", 2227 .vtc_flow = RTE_BE32(0xffffffff), 2228 .proto = 0xff, 2229 }, 2230 }; 2231 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2232 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2233 MLX5_FLOW_LAYER_OUTER_L3; 2234 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2235 MLX5_FLOW_LAYER_OUTER_L4; 2236 int ret; 2237 uint8_t next_proto = 0xFF; 2238 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 | 2239 MLX5_FLOW_LAYER_OUTER_VLAN | 2240 MLX5_FLOW_LAYER_INNER_VLAN); 2241 2242 if ((last_item & l2_vlan) && ether_type && 2243 ether_type != RTE_ETHER_TYPE_IPV6) 2244 return rte_flow_error_set(error, EINVAL, 2245 RTE_FLOW_ERROR_TYPE_ITEM, item, 2246 "IPv6 cannot follow L2/VLAN layer " 2247 "which ether type is not IPv6"); 2248 if (mask && mask->hdr.proto == UINT8_MAX && spec) 2249 next_proto = spec->hdr.proto; 2250 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) { 2251 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6) 2252 return rte_flow_error_set(error, EINVAL, 2253 RTE_FLOW_ERROR_TYPE_ITEM, 2254 item, 2255 "multiple tunnel " 2256 "not supported"); 2257 } 2258 if (next_proto == IPPROTO_HOPOPTS || 2259 next_proto == IPPROTO_ROUTING || 2260 next_proto == IPPROTO_FRAGMENT || 2261 next_proto == IPPROTO_ESP || 2262 next_proto == IPPROTO_AH || 2263 next_proto == IPPROTO_DSTOPTS) 2264 return rte_flow_error_set(error, EINVAL, 2265 RTE_FLOW_ERROR_TYPE_ITEM, item, 2266 "IPv6 proto (next header) should " 2267 "not be set as extension header"); 2268 if (item_flags & MLX5_FLOW_LAYER_IPIP) 2269 return rte_flow_error_set(error, EINVAL, 2270 RTE_FLOW_ERROR_TYPE_ITEM, item, 2271 "wrong tunnel type - IPv4 specified " 2272 "but IPv6 item provided"); 2273 if (item_flags & l3m) 2274 return rte_flow_error_set(error, ENOTSUP, 2275 RTE_FLOW_ERROR_TYPE_ITEM, item, 2276 "multiple L3 layers not supported"); 2277 else if (item_flags & l4m) 2278 return rte_flow_error_set(error, EINVAL, 2279 RTE_FLOW_ERROR_TYPE_ITEM, item, 2280 "L3 cannot follow an L4 layer."); 2281 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) && 2282 !(item_flags & MLX5_FLOW_LAYER_INNER_L2)) 2283 return rte_flow_error_set(error, EINVAL, 2284 RTE_FLOW_ERROR_TYPE_ITEM, item, 2285 "L3 cannot follow an NVGRE layer."); 2286 if (!mask) 2287 mask = &rte_flow_item_ipv6_mask; 2288 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 2289 acc_mask ? (const uint8_t *)acc_mask 2290 : (const uint8_t *)&nic_mask, 2291 sizeof(struct rte_flow_item_ipv6), 2292 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2293 if (ret < 0) 2294 return ret; 2295 return 0; 2296 } 2297 2298 /** 2299 * Validate UDP item. 2300 * 2301 * @param[in] item 2302 * Item specification. 2303 * @param[in] item_flags 2304 * Bit-fields that holds the items detected until now. 2305 * @param[in] target_protocol 2306 * The next protocol in the previous item. 2307 * @param[in] flow_mask 2308 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask. 2309 * @param[out] error 2310 * Pointer to error structure. 2311 * 2312 * @return 2313 * 0 on success, a negative errno value otherwise and rte_errno is set. 2314 */ 2315 int 2316 mlx5_flow_validate_item_udp(const struct rte_flow_item *item, 2317 uint64_t item_flags, 2318 uint8_t target_protocol, 2319 struct rte_flow_error *error) 2320 { 2321 const struct rte_flow_item_udp *mask = item->mask; 2322 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2323 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2324 MLX5_FLOW_LAYER_OUTER_L3; 2325 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2326 MLX5_FLOW_LAYER_OUTER_L4; 2327 int ret; 2328 2329 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP) 2330 return rte_flow_error_set(error, EINVAL, 2331 RTE_FLOW_ERROR_TYPE_ITEM, item, 2332 "protocol filtering not compatible" 2333 " with UDP layer"); 2334 if (!(item_flags & l3m)) 2335 return rte_flow_error_set(error, EINVAL, 2336 RTE_FLOW_ERROR_TYPE_ITEM, item, 2337 "L3 is mandatory to filter on L4"); 2338 if (item_flags & l4m) 2339 return rte_flow_error_set(error, EINVAL, 2340 RTE_FLOW_ERROR_TYPE_ITEM, item, 2341 "multiple L4 layers not supported"); 2342 if (!mask) 2343 mask = &rte_flow_item_udp_mask; 2344 ret = mlx5_flow_item_acceptable 2345 (item, (const uint8_t *)mask, 2346 (const uint8_t *)&rte_flow_item_udp_mask, 2347 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2348 error); 2349 if (ret < 0) 2350 return ret; 2351 return 0; 2352 } 2353 2354 /** 2355 * Validate TCP item. 2356 * 2357 * @param[in] item 2358 * Item specification. 2359 * @param[in] item_flags 2360 * Bit-fields that holds the items detected until now. 2361 * @param[in] target_protocol 2362 * The next protocol in the previous item. 2363 * @param[out] error 2364 * Pointer to error structure. 2365 * 2366 * @return 2367 * 0 on success, a negative errno value otherwise and rte_errno is set. 2368 */ 2369 int 2370 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item, 2371 uint64_t item_flags, 2372 uint8_t target_protocol, 2373 const struct rte_flow_item_tcp *flow_mask, 2374 struct rte_flow_error *error) 2375 { 2376 const struct rte_flow_item_tcp *mask = item->mask; 2377 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL); 2378 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 : 2379 MLX5_FLOW_LAYER_OUTER_L3; 2380 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 : 2381 MLX5_FLOW_LAYER_OUTER_L4; 2382 int ret; 2383 2384 MLX5_ASSERT(flow_mask); 2385 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP) 2386 return rte_flow_error_set(error, EINVAL, 2387 RTE_FLOW_ERROR_TYPE_ITEM, item, 2388 "protocol filtering not compatible" 2389 " with TCP layer"); 2390 if (!(item_flags & l3m)) 2391 return rte_flow_error_set(error, EINVAL, 2392 RTE_FLOW_ERROR_TYPE_ITEM, item, 2393 "L3 is mandatory to filter on L4"); 2394 if (item_flags & l4m) 2395 return rte_flow_error_set(error, EINVAL, 2396 RTE_FLOW_ERROR_TYPE_ITEM, item, 2397 "multiple L4 layers not supported"); 2398 if (!mask) 2399 mask = &rte_flow_item_tcp_mask; 2400 ret = mlx5_flow_item_acceptable 2401 (item, (const uint8_t *)mask, 2402 (const uint8_t *)flow_mask, 2403 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2404 error); 2405 if (ret < 0) 2406 return ret; 2407 return 0; 2408 } 2409 2410 /** 2411 * Validate VXLAN item. 2412 * 2413 * @param[in] item 2414 * Item specification. 2415 * @param[in] item_flags 2416 * Bit-fields that holds the items detected until now. 2417 * @param[in] target_protocol 2418 * The next protocol in the previous item. 2419 * @param[out] error 2420 * Pointer to error structure. 2421 * 2422 * @return 2423 * 0 on success, a negative errno value otherwise and rte_errno is set. 2424 */ 2425 int 2426 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item, 2427 uint64_t item_flags, 2428 struct rte_flow_error *error) 2429 { 2430 const struct rte_flow_item_vxlan *spec = item->spec; 2431 const struct rte_flow_item_vxlan *mask = item->mask; 2432 int ret; 2433 union vni { 2434 uint32_t vlan_id; 2435 uint8_t vni[4]; 2436 } id = { .vlan_id = 0, }; 2437 2438 2439 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2440 return rte_flow_error_set(error, ENOTSUP, 2441 RTE_FLOW_ERROR_TYPE_ITEM, item, 2442 "multiple tunnel layers not" 2443 " supported"); 2444 /* 2445 * Verify only UDPv4 is present as defined in 2446 * https://tools.ietf.org/html/rfc7348 2447 */ 2448 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2449 return rte_flow_error_set(error, EINVAL, 2450 RTE_FLOW_ERROR_TYPE_ITEM, item, 2451 "no outer UDP layer found"); 2452 if (!mask) 2453 mask = &rte_flow_item_vxlan_mask; 2454 ret = mlx5_flow_item_acceptable 2455 (item, (const uint8_t *)mask, 2456 (const uint8_t *)&rte_flow_item_vxlan_mask, 2457 sizeof(struct rte_flow_item_vxlan), 2458 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2459 if (ret < 0) 2460 return ret; 2461 if (spec) { 2462 memcpy(&id.vni[1], spec->vni, 3); 2463 memcpy(&id.vni[1], mask->vni, 3); 2464 } 2465 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2466 return rte_flow_error_set(error, ENOTSUP, 2467 RTE_FLOW_ERROR_TYPE_ITEM, item, 2468 "VXLAN tunnel must be fully defined"); 2469 return 0; 2470 } 2471 2472 /** 2473 * Validate VXLAN_GPE item. 2474 * 2475 * @param[in] item 2476 * Item specification. 2477 * @param[in] item_flags 2478 * Bit-fields that holds the items detected until now. 2479 * @param[in] priv 2480 * Pointer to the private data structure. 2481 * @param[in] target_protocol 2482 * The next protocol in the previous item. 2483 * @param[out] error 2484 * Pointer to error structure. 2485 * 2486 * @return 2487 * 0 on success, a negative errno value otherwise and rte_errno is set. 2488 */ 2489 int 2490 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item, 2491 uint64_t item_flags, 2492 struct rte_eth_dev *dev, 2493 struct rte_flow_error *error) 2494 { 2495 struct mlx5_priv *priv = dev->data->dev_private; 2496 const struct rte_flow_item_vxlan_gpe *spec = item->spec; 2497 const struct rte_flow_item_vxlan_gpe *mask = item->mask; 2498 int ret; 2499 union vni { 2500 uint32_t vlan_id; 2501 uint8_t vni[4]; 2502 } id = { .vlan_id = 0, }; 2503 2504 if (!priv->config.l3_vxlan_en) 2505 return rte_flow_error_set(error, ENOTSUP, 2506 RTE_FLOW_ERROR_TYPE_ITEM, item, 2507 "L3 VXLAN is not enabled by device" 2508 " parameter and/or not configured in" 2509 " firmware"); 2510 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2511 return rte_flow_error_set(error, ENOTSUP, 2512 RTE_FLOW_ERROR_TYPE_ITEM, item, 2513 "multiple tunnel layers not" 2514 " supported"); 2515 /* 2516 * Verify only UDPv4 is present as defined in 2517 * https://tools.ietf.org/html/rfc7348 2518 */ 2519 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2520 return rte_flow_error_set(error, EINVAL, 2521 RTE_FLOW_ERROR_TYPE_ITEM, item, 2522 "no outer UDP layer found"); 2523 if (!mask) 2524 mask = &rte_flow_item_vxlan_gpe_mask; 2525 ret = mlx5_flow_item_acceptable 2526 (item, (const uint8_t *)mask, 2527 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask, 2528 sizeof(struct rte_flow_item_vxlan_gpe), 2529 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2530 if (ret < 0) 2531 return ret; 2532 if (spec) { 2533 if (spec->protocol) 2534 return rte_flow_error_set(error, ENOTSUP, 2535 RTE_FLOW_ERROR_TYPE_ITEM, 2536 item, 2537 "VxLAN-GPE protocol" 2538 " not supported"); 2539 memcpy(&id.vni[1], spec->vni, 3); 2540 memcpy(&id.vni[1], mask->vni, 3); 2541 } 2542 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2543 return rte_flow_error_set(error, ENOTSUP, 2544 RTE_FLOW_ERROR_TYPE_ITEM, item, 2545 "VXLAN-GPE tunnel must be fully" 2546 " defined"); 2547 return 0; 2548 } 2549 /** 2550 * Validate GRE Key item. 2551 * 2552 * @param[in] item 2553 * Item specification. 2554 * @param[in] item_flags 2555 * Bit flags to mark detected items. 2556 * @param[in] gre_item 2557 * Pointer to gre_item 2558 * @param[out] error 2559 * Pointer to error structure. 2560 * 2561 * @return 2562 * 0 on success, a negative errno value otherwise and rte_errno is set. 2563 */ 2564 int 2565 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item, 2566 uint64_t item_flags, 2567 const struct rte_flow_item *gre_item, 2568 struct rte_flow_error *error) 2569 { 2570 const rte_be32_t *mask = item->mask; 2571 int ret = 0; 2572 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX); 2573 const struct rte_flow_item_gre *gre_spec; 2574 const struct rte_flow_item_gre *gre_mask; 2575 2576 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY) 2577 return rte_flow_error_set(error, ENOTSUP, 2578 RTE_FLOW_ERROR_TYPE_ITEM, item, 2579 "Multiple GRE key not support"); 2580 if (!(item_flags & MLX5_FLOW_LAYER_GRE)) 2581 return rte_flow_error_set(error, ENOTSUP, 2582 RTE_FLOW_ERROR_TYPE_ITEM, item, 2583 "No preceding GRE header"); 2584 if (item_flags & MLX5_FLOW_LAYER_INNER) 2585 return rte_flow_error_set(error, ENOTSUP, 2586 RTE_FLOW_ERROR_TYPE_ITEM, item, 2587 "GRE key following a wrong item"); 2588 gre_mask = gre_item->mask; 2589 if (!gre_mask) 2590 gre_mask = &rte_flow_item_gre_mask; 2591 gre_spec = gre_item->spec; 2592 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) && 2593 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000))) 2594 return rte_flow_error_set(error, EINVAL, 2595 RTE_FLOW_ERROR_TYPE_ITEM, item, 2596 "Key bit must be on"); 2597 2598 if (!mask) 2599 mask = &gre_key_default_mask; 2600 ret = mlx5_flow_item_acceptable 2601 (item, (const uint8_t *)mask, 2602 (const uint8_t *)&gre_key_default_mask, 2603 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2604 return ret; 2605 } 2606 2607 /** 2608 * Validate GRE item. 2609 * 2610 * @param[in] item 2611 * Item specification. 2612 * @param[in] item_flags 2613 * Bit flags to mark detected items. 2614 * @param[in] target_protocol 2615 * The next protocol in the previous item. 2616 * @param[out] error 2617 * Pointer to error structure. 2618 * 2619 * @return 2620 * 0 on success, a negative errno value otherwise and rte_errno is set. 2621 */ 2622 int 2623 mlx5_flow_validate_item_gre(const struct rte_flow_item *item, 2624 uint64_t item_flags, 2625 uint8_t target_protocol, 2626 struct rte_flow_error *error) 2627 { 2628 const struct rte_flow_item_gre *spec __rte_unused = item->spec; 2629 const struct rte_flow_item_gre *mask = item->mask; 2630 int ret; 2631 const struct rte_flow_item_gre nic_mask = { 2632 .c_rsvd0_ver = RTE_BE16(0xB000), 2633 .protocol = RTE_BE16(UINT16_MAX), 2634 }; 2635 2636 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2637 return rte_flow_error_set(error, EINVAL, 2638 RTE_FLOW_ERROR_TYPE_ITEM, item, 2639 "protocol filtering not compatible" 2640 " with this GRE layer"); 2641 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2642 return rte_flow_error_set(error, ENOTSUP, 2643 RTE_FLOW_ERROR_TYPE_ITEM, item, 2644 "multiple tunnel layers not" 2645 " supported"); 2646 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 2647 return rte_flow_error_set(error, ENOTSUP, 2648 RTE_FLOW_ERROR_TYPE_ITEM, item, 2649 "L3 Layer is missing"); 2650 if (!mask) 2651 mask = &rte_flow_item_gre_mask; 2652 ret = mlx5_flow_item_acceptable 2653 (item, (const uint8_t *)mask, 2654 (const uint8_t *)&nic_mask, 2655 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED, 2656 error); 2657 if (ret < 0) 2658 return ret; 2659 #ifndef HAVE_MLX5DV_DR 2660 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT 2661 if (spec && (spec->protocol & mask->protocol)) 2662 return rte_flow_error_set(error, ENOTSUP, 2663 RTE_FLOW_ERROR_TYPE_ITEM, item, 2664 "without MPLS support the" 2665 " specification cannot be used for" 2666 " filtering"); 2667 #endif 2668 #endif 2669 return 0; 2670 } 2671 2672 /** 2673 * Validate Geneve item. 2674 * 2675 * @param[in] item 2676 * Item specification. 2677 * @param[in] itemFlags 2678 * Bit-fields that holds the items detected until now. 2679 * @param[in] enPriv 2680 * Pointer to the private data structure. 2681 * @param[out] error 2682 * Pointer to error structure. 2683 * 2684 * @return 2685 * 0 on success, a negative errno value otherwise and rte_errno is set. 2686 */ 2687 2688 int 2689 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item, 2690 uint64_t item_flags, 2691 struct rte_eth_dev *dev, 2692 struct rte_flow_error *error) 2693 { 2694 struct mlx5_priv *priv = dev->data->dev_private; 2695 const struct rte_flow_item_geneve *spec = item->spec; 2696 const struct rte_flow_item_geneve *mask = item->mask; 2697 int ret; 2698 uint16_t gbhdr; 2699 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ? 2700 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0; 2701 const struct rte_flow_item_geneve nic_mask = { 2702 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80), 2703 .vni = "\xff\xff\xff", 2704 .protocol = RTE_BE16(UINT16_MAX), 2705 }; 2706 2707 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx) 2708 return rte_flow_error_set(error, ENOTSUP, 2709 RTE_FLOW_ERROR_TYPE_ITEM, item, 2710 "L3 Geneve is not enabled by device" 2711 " parameter and/or not configured in" 2712 " firmware"); 2713 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 2714 return rte_flow_error_set(error, ENOTSUP, 2715 RTE_FLOW_ERROR_TYPE_ITEM, item, 2716 "multiple tunnel layers not" 2717 " supported"); 2718 /* 2719 * Verify only UDPv4 is present as defined in 2720 * https://tools.ietf.org/html/rfc7348 2721 */ 2722 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)) 2723 return rte_flow_error_set(error, EINVAL, 2724 RTE_FLOW_ERROR_TYPE_ITEM, item, 2725 "no outer UDP layer found"); 2726 if (!mask) 2727 mask = &rte_flow_item_geneve_mask; 2728 ret = mlx5_flow_item_acceptable 2729 (item, (const uint8_t *)mask, 2730 (const uint8_t *)&nic_mask, 2731 sizeof(struct rte_flow_item_geneve), 2732 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2733 if (ret) 2734 return ret; 2735 if (spec) { 2736 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0); 2737 if (MLX5_GENEVE_VER_VAL(gbhdr) || 2738 MLX5_GENEVE_CRITO_VAL(gbhdr) || 2739 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1) 2740 return rte_flow_error_set(error, ENOTSUP, 2741 RTE_FLOW_ERROR_TYPE_ITEM, 2742 item, 2743 "Geneve protocol unsupported" 2744 " fields are being used"); 2745 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len) 2746 return rte_flow_error_set 2747 (error, ENOTSUP, 2748 RTE_FLOW_ERROR_TYPE_ITEM, 2749 item, 2750 "Unsupported Geneve options length"); 2751 } 2752 if (!(item_flags & MLX5_FLOW_LAYER_OUTER)) 2753 return rte_flow_error_set 2754 (error, ENOTSUP, 2755 RTE_FLOW_ERROR_TYPE_ITEM, item, 2756 "Geneve tunnel must be fully defined"); 2757 return 0; 2758 } 2759 2760 /** 2761 * Validate Geneve TLV option item. 2762 * 2763 * @param[in] item 2764 * Item specification. 2765 * @param[in] last_item 2766 * Previous validated item in the pattern items. 2767 * @param[in] geneve_item 2768 * Previous GENEVE item specification. 2769 * @param[in] dev 2770 * Pointer to the rte_eth_dev structure. 2771 * @param[out] error 2772 * Pointer to error structure. 2773 * 2774 * @return 2775 * 0 on success, a negative errno value otherwise and rte_errno is set. 2776 */ 2777 int 2778 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item, 2779 uint64_t last_item, 2780 const struct rte_flow_item *geneve_item, 2781 struct rte_eth_dev *dev, 2782 struct rte_flow_error *error) 2783 { 2784 struct mlx5_priv *priv = dev->data->dev_private; 2785 struct mlx5_dev_ctx_shared *sh = priv->sh; 2786 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource; 2787 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr; 2788 uint8_t data_max_supported = 2789 hca_attr->max_geneve_tlv_option_data_len * 4; 2790 struct mlx5_dev_config *config = &priv->config; 2791 const struct rte_flow_item_geneve *geneve_spec; 2792 const struct rte_flow_item_geneve *geneve_mask; 2793 const struct rte_flow_item_geneve_opt *spec = item->spec; 2794 const struct rte_flow_item_geneve_opt *mask = item->mask; 2795 unsigned int i; 2796 unsigned int data_len; 2797 uint8_t tlv_option_len; 2798 uint16_t optlen_m, optlen_v; 2799 const struct rte_flow_item_geneve_opt full_mask = { 2800 .option_class = RTE_BE16(0xffff), 2801 .option_type = 0xff, 2802 .option_len = 0x1f, 2803 }; 2804 2805 if (!mask) 2806 mask = &rte_flow_item_geneve_opt_mask; 2807 if (!spec) 2808 return rte_flow_error_set 2809 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2810 "Geneve TLV opt class/type/length must be specified"); 2811 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK) 2812 return rte_flow_error_set 2813 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2814 "Geneve TLV opt length exceeeds the limit (31)"); 2815 /* Check if class type and length masks are full. */ 2816 if (full_mask.option_class != mask->option_class || 2817 full_mask.option_type != mask->option_type || 2818 full_mask.option_len != (mask->option_len & full_mask.option_len)) 2819 return rte_flow_error_set 2820 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2821 "Geneve TLV opt class/type/length masks must be full"); 2822 /* Check if length is supported */ 2823 if ((uint32_t)spec->option_len > 2824 config->hca_attr.max_geneve_tlv_option_data_len) 2825 return rte_flow_error_set 2826 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2827 "Geneve TLV opt length not supported"); 2828 if (config->hca_attr.max_geneve_tlv_options > 1) 2829 DRV_LOG(DEBUG, 2830 "max_geneve_tlv_options supports more than 1 option"); 2831 /* Check GENEVE item preceding. */ 2832 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE)) 2833 return rte_flow_error_set 2834 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2835 "Geneve opt item must be preceded with Geneve item"); 2836 geneve_spec = geneve_item->spec; 2837 geneve_mask = geneve_item->mask ? geneve_item->mask : 2838 &rte_flow_item_geneve_mask; 2839 /* Check if GENEVE TLV option size doesn't exceed option length */ 2840 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 || 2841 geneve_spec->ver_opt_len_o_c_rsvd0)) { 2842 tlv_option_len = spec->option_len & mask->option_len; 2843 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0); 2844 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v); 2845 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0); 2846 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m); 2847 if ((optlen_v & optlen_m) <= tlv_option_len) 2848 return rte_flow_error_set 2849 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2850 "GENEVE TLV option length exceeds optlen"); 2851 } 2852 /* Check if length is 0 or data is 0. */ 2853 if (spec->data == NULL || spec->option_len == 0) 2854 return rte_flow_error_set 2855 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2856 "Geneve TLV opt with zero data/length not supported"); 2857 /* Check not all data & mask are 0. */ 2858 data_len = spec->option_len * 4; 2859 if (mask->data == NULL) { 2860 for (i = 0; i < data_len; i++) 2861 if (spec->data[i]) 2862 break; 2863 if (i == data_len) 2864 return rte_flow_error_set(error, ENOTSUP, 2865 RTE_FLOW_ERROR_TYPE_ITEM, item, 2866 "Can't match on Geneve option data 0"); 2867 } else { 2868 for (i = 0; i < data_len; i++) 2869 if (spec->data[i] & mask->data[i]) 2870 break; 2871 if (i == data_len) 2872 return rte_flow_error_set(error, ENOTSUP, 2873 RTE_FLOW_ERROR_TYPE_ITEM, item, 2874 "Can't match on Geneve option data and mask 0"); 2875 /* Check data mask supported. */ 2876 for (i = data_max_supported; i < data_len ; i++) 2877 if (mask->data[i]) 2878 return rte_flow_error_set(error, ENOTSUP, 2879 RTE_FLOW_ERROR_TYPE_ITEM, item, 2880 "Data mask is of unsupported size"); 2881 } 2882 /* Check GENEVE option is supported in NIC. */ 2883 if (!config->hca_attr.geneve_tlv_opt) 2884 return rte_flow_error_set 2885 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item, 2886 "Geneve TLV opt not supported"); 2887 /* Check if we already have geneve option with different type/class. */ 2888 rte_spinlock_lock(&sh->geneve_tlv_opt_sl); 2889 geneve_opt_resource = sh->geneve_tlv_option_resource; 2890 if (geneve_opt_resource != NULL) 2891 if (geneve_opt_resource->option_class != spec->option_class || 2892 geneve_opt_resource->option_type != spec->option_type || 2893 geneve_opt_resource->length != spec->option_len) { 2894 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2895 return rte_flow_error_set(error, ENOTSUP, 2896 RTE_FLOW_ERROR_TYPE_ITEM, item, 2897 "Only one Geneve TLV option supported"); 2898 } 2899 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl); 2900 return 0; 2901 } 2902 2903 /** 2904 * Validate MPLS item. 2905 * 2906 * @param[in] dev 2907 * Pointer to the rte_eth_dev structure. 2908 * @param[in] item 2909 * Item specification. 2910 * @param[in] item_flags 2911 * Bit-fields that holds the items detected until now. 2912 * @param[in] prev_layer 2913 * The protocol layer indicated in previous item. 2914 * @param[out] error 2915 * Pointer to error structure. 2916 * 2917 * @return 2918 * 0 on success, a negative errno value otherwise and rte_errno is set. 2919 */ 2920 int 2921 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused, 2922 const struct rte_flow_item *item __rte_unused, 2923 uint64_t item_flags __rte_unused, 2924 uint64_t prev_layer __rte_unused, 2925 struct rte_flow_error *error) 2926 { 2927 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT 2928 const struct rte_flow_item_mpls *mask = item->mask; 2929 struct mlx5_priv *priv = dev->data->dev_private; 2930 int ret; 2931 2932 if (!priv->config.mpls_en) 2933 return rte_flow_error_set(error, ENOTSUP, 2934 RTE_FLOW_ERROR_TYPE_ITEM, item, 2935 "MPLS not supported or" 2936 " disabled in firmware" 2937 " configuration."); 2938 /* MPLS over UDP, GRE is allowed */ 2939 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP | 2940 MLX5_FLOW_LAYER_GRE | 2941 MLX5_FLOW_LAYER_GRE_KEY))) 2942 return rte_flow_error_set(error, EINVAL, 2943 RTE_FLOW_ERROR_TYPE_ITEM, item, 2944 "protocol filtering not compatible" 2945 " with MPLS layer"); 2946 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */ 2947 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) && 2948 !(item_flags & MLX5_FLOW_LAYER_GRE)) 2949 return rte_flow_error_set(error, ENOTSUP, 2950 RTE_FLOW_ERROR_TYPE_ITEM, item, 2951 "multiple tunnel layers not" 2952 " supported"); 2953 if (!mask) 2954 mask = &rte_flow_item_mpls_mask; 2955 ret = mlx5_flow_item_acceptable 2956 (item, (const uint8_t *)mask, 2957 (const uint8_t *)&rte_flow_item_mpls_mask, 2958 sizeof(struct rte_flow_item_mpls), 2959 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 2960 if (ret < 0) 2961 return ret; 2962 return 0; 2963 #else 2964 return rte_flow_error_set(error, ENOTSUP, 2965 RTE_FLOW_ERROR_TYPE_ITEM, item, 2966 "MPLS is not supported by Verbs, please" 2967 " update."); 2968 #endif 2969 } 2970 2971 /** 2972 * Validate NVGRE item. 2973 * 2974 * @param[in] item 2975 * Item specification. 2976 * @param[in] item_flags 2977 * Bit flags to mark detected items. 2978 * @param[in] target_protocol 2979 * The next protocol in the previous item. 2980 * @param[out] error 2981 * Pointer to error structure. 2982 * 2983 * @return 2984 * 0 on success, a negative errno value otherwise and rte_errno is set. 2985 */ 2986 int 2987 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item, 2988 uint64_t item_flags, 2989 uint8_t target_protocol, 2990 struct rte_flow_error *error) 2991 { 2992 const struct rte_flow_item_nvgre *mask = item->mask; 2993 int ret; 2994 2995 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE) 2996 return rte_flow_error_set(error, EINVAL, 2997 RTE_FLOW_ERROR_TYPE_ITEM, item, 2998 "protocol filtering not compatible" 2999 " with this GRE layer"); 3000 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3001 return rte_flow_error_set(error, ENOTSUP, 3002 RTE_FLOW_ERROR_TYPE_ITEM, item, 3003 "multiple tunnel layers not" 3004 " supported"); 3005 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3)) 3006 return rte_flow_error_set(error, ENOTSUP, 3007 RTE_FLOW_ERROR_TYPE_ITEM, item, 3008 "L3 Layer is missing"); 3009 if (!mask) 3010 mask = &rte_flow_item_nvgre_mask; 3011 ret = mlx5_flow_item_acceptable 3012 (item, (const uint8_t *)mask, 3013 (const uint8_t *)&rte_flow_item_nvgre_mask, 3014 sizeof(struct rte_flow_item_nvgre), 3015 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3016 if (ret < 0) 3017 return ret; 3018 return 0; 3019 } 3020 3021 /** 3022 * Validate eCPRI item. 3023 * 3024 * @param[in] item 3025 * Item specification. 3026 * @param[in] item_flags 3027 * Bit-fields that holds the items detected until now. 3028 * @param[in] last_item 3029 * Previous validated item in the pattern items. 3030 * @param[in] ether_type 3031 * Type in the ethernet layer header (including dot1q). 3032 * @param[in] acc_mask 3033 * Acceptable mask, if NULL default internal default mask 3034 * will be used to check whether item fields are supported. 3035 * @param[out] error 3036 * Pointer to error structure. 3037 * 3038 * @return 3039 * 0 on success, a negative errno value otherwise and rte_errno is set. 3040 */ 3041 int 3042 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item, 3043 uint64_t item_flags, 3044 uint64_t last_item, 3045 uint16_t ether_type, 3046 const struct rte_flow_item_ecpri *acc_mask, 3047 struct rte_flow_error *error) 3048 { 3049 const struct rte_flow_item_ecpri *mask = item->mask; 3050 const struct rte_flow_item_ecpri nic_mask = { 3051 .hdr = { 3052 .common = { 3053 .u32 = 3054 RTE_BE32(((const struct rte_ecpri_common_hdr) { 3055 .type = 0xFF, 3056 }).u32), 3057 }, 3058 .dummy[0] = 0xFFFFFFFF, 3059 }, 3060 }; 3061 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 | 3062 MLX5_FLOW_LAYER_OUTER_VLAN); 3063 struct rte_flow_item_ecpri mask_lo; 3064 3065 if (!(last_item & outer_l2_vlan) && 3066 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP) 3067 return rte_flow_error_set(error, EINVAL, 3068 RTE_FLOW_ERROR_TYPE_ITEM, item, 3069 "eCPRI can only follow L2/VLAN layer or UDP layer"); 3070 if ((last_item & outer_l2_vlan) && ether_type && 3071 ether_type != RTE_ETHER_TYPE_ECPRI) 3072 return rte_flow_error_set(error, EINVAL, 3073 RTE_FLOW_ERROR_TYPE_ITEM, item, 3074 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE"); 3075 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) 3076 return rte_flow_error_set(error, EINVAL, 3077 RTE_FLOW_ERROR_TYPE_ITEM, item, 3078 "eCPRI with tunnel is not supported right now"); 3079 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3) 3080 return rte_flow_error_set(error, ENOTSUP, 3081 RTE_FLOW_ERROR_TYPE_ITEM, item, 3082 "multiple L3 layers not supported"); 3083 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP) 3084 return rte_flow_error_set(error, EINVAL, 3085 RTE_FLOW_ERROR_TYPE_ITEM, item, 3086 "eCPRI cannot coexist with a TCP layer"); 3087 /* In specification, eCPRI could be over UDP layer. */ 3088 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP) 3089 return rte_flow_error_set(error, EINVAL, 3090 RTE_FLOW_ERROR_TYPE_ITEM, item, 3091 "eCPRI over UDP layer is not yet supported right now"); 3092 /* Mask for type field in common header could be zero. */ 3093 if (!mask) 3094 mask = &rte_flow_item_ecpri_mask; 3095 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32); 3096 /* Input mask is in big-endian format. */ 3097 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff) 3098 return rte_flow_error_set(error, EINVAL, 3099 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3100 "partial mask is not supported for protocol"); 3101 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0) 3102 return rte_flow_error_set(error, EINVAL, 3103 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask, 3104 "message header mask must be after a type mask"); 3105 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask, 3106 acc_mask ? (const uint8_t *)acc_mask 3107 : (const uint8_t *)&nic_mask, 3108 sizeof(struct rte_flow_item_ecpri), 3109 MLX5_ITEM_RANGE_NOT_ACCEPTED, error); 3110 } 3111 3112 /** 3113 * Release resource related QUEUE/RSS action split. 3114 * 3115 * @param dev 3116 * Pointer to Ethernet device. 3117 * @param flow 3118 * Flow to release id's from. 3119 */ 3120 static void 3121 flow_mreg_split_qrss_release(struct rte_eth_dev *dev, 3122 struct rte_flow *flow) 3123 { 3124 struct mlx5_priv *priv = dev->data->dev_private; 3125 uint32_t handle_idx; 3126 struct mlx5_flow_handle *dev_handle; 3127 3128 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles, 3129 handle_idx, dev_handle, next) 3130 if (dev_handle->split_flow_id && 3131 !dev_handle->is_meter_flow_id) 3132 mlx5_ipool_free(priv->sh->ipool 3133 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 3134 dev_handle->split_flow_id); 3135 } 3136 3137 static int 3138 flow_null_validate(struct rte_eth_dev *dev __rte_unused, 3139 const struct rte_flow_attr *attr __rte_unused, 3140 const struct rte_flow_item items[] __rte_unused, 3141 const struct rte_flow_action actions[] __rte_unused, 3142 bool external __rte_unused, 3143 int hairpin __rte_unused, 3144 struct rte_flow_error *error) 3145 { 3146 return rte_flow_error_set(error, ENOTSUP, 3147 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3148 } 3149 3150 static struct mlx5_flow * 3151 flow_null_prepare(struct rte_eth_dev *dev __rte_unused, 3152 const struct rte_flow_attr *attr __rte_unused, 3153 const struct rte_flow_item items[] __rte_unused, 3154 const struct rte_flow_action actions[] __rte_unused, 3155 struct rte_flow_error *error) 3156 { 3157 rte_flow_error_set(error, ENOTSUP, 3158 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3159 return NULL; 3160 } 3161 3162 static int 3163 flow_null_translate(struct rte_eth_dev *dev __rte_unused, 3164 struct mlx5_flow *dev_flow __rte_unused, 3165 const struct rte_flow_attr *attr __rte_unused, 3166 const struct rte_flow_item items[] __rte_unused, 3167 const struct rte_flow_action actions[] __rte_unused, 3168 struct rte_flow_error *error) 3169 { 3170 return rte_flow_error_set(error, ENOTSUP, 3171 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3172 } 3173 3174 static int 3175 flow_null_apply(struct rte_eth_dev *dev __rte_unused, 3176 struct rte_flow *flow __rte_unused, 3177 struct rte_flow_error *error) 3178 { 3179 return rte_flow_error_set(error, ENOTSUP, 3180 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3181 } 3182 3183 static void 3184 flow_null_remove(struct rte_eth_dev *dev __rte_unused, 3185 struct rte_flow *flow __rte_unused) 3186 { 3187 } 3188 3189 static void 3190 flow_null_destroy(struct rte_eth_dev *dev __rte_unused, 3191 struct rte_flow *flow __rte_unused) 3192 { 3193 } 3194 3195 static int 3196 flow_null_query(struct rte_eth_dev *dev __rte_unused, 3197 struct rte_flow *flow __rte_unused, 3198 const struct rte_flow_action *actions __rte_unused, 3199 void *data __rte_unused, 3200 struct rte_flow_error *error) 3201 { 3202 return rte_flow_error_set(error, ENOTSUP, 3203 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL); 3204 } 3205 3206 static int 3207 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused, 3208 uint32_t domains __rte_unused, 3209 uint32_t flags __rte_unused) 3210 { 3211 return 0; 3212 } 3213 3214 /* Void driver to protect from null pointer reference. */ 3215 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = { 3216 .validate = flow_null_validate, 3217 .prepare = flow_null_prepare, 3218 .translate = flow_null_translate, 3219 .apply = flow_null_apply, 3220 .remove = flow_null_remove, 3221 .destroy = flow_null_destroy, 3222 .query = flow_null_query, 3223 .sync_domain = flow_null_sync_domain, 3224 }; 3225 3226 /** 3227 * Select flow driver type according to flow attributes and device 3228 * configuration. 3229 * 3230 * @param[in] dev 3231 * Pointer to the dev structure. 3232 * @param[in] attr 3233 * Pointer to the flow attributes. 3234 * 3235 * @return 3236 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise. 3237 */ 3238 static enum mlx5_flow_drv_type 3239 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr) 3240 { 3241 struct mlx5_priv *priv = dev->data->dev_private; 3242 /* The OS can determine first a specific flow type (DV, VERBS) */ 3243 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type(); 3244 3245 if (type != MLX5_FLOW_TYPE_MAX) 3246 return type; 3247 /* If no OS specific type - continue with DV/VERBS selection */ 3248 if (attr->transfer && priv->config.dv_esw_en) 3249 type = MLX5_FLOW_TYPE_DV; 3250 if (!attr->transfer) 3251 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV : 3252 MLX5_FLOW_TYPE_VERBS; 3253 return type; 3254 } 3255 3256 #define flow_get_drv_ops(type) flow_drv_ops[type] 3257 3258 /** 3259 * Flow driver validation API. This abstracts calling driver specific functions. 3260 * The type of flow driver is determined according to flow attributes. 3261 * 3262 * @param[in] dev 3263 * Pointer to the dev structure. 3264 * @param[in] attr 3265 * Pointer to the flow attributes. 3266 * @param[in] items 3267 * Pointer to the list of items. 3268 * @param[in] actions 3269 * Pointer to the list of actions. 3270 * @param[in] external 3271 * This flow rule is created by request external to PMD. 3272 * @param[in] hairpin 3273 * Number of hairpin TX actions, 0 means classic flow. 3274 * @param[out] error 3275 * Pointer to the error structure. 3276 * 3277 * @return 3278 * 0 on success, a negative errno value otherwise and rte_errno is set. 3279 */ 3280 static inline int 3281 flow_drv_validate(struct rte_eth_dev *dev, 3282 const struct rte_flow_attr *attr, 3283 const struct rte_flow_item items[], 3284 const struct rte_flow_action actions[], 3285 bool external, int hairpin, struct rte_flow_error *error) 3286 { 3287 const struct mlx5_flow_driver_ops *fops; 3288 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr); 3289 3290 fops = flow_get_drv_ops(type); 3291 return fops->validate(dev, attr, items, actions, external, 3292 hairpin, error); 3293 } 3294 3295 /** 3296 * Flow driver preparation API. This abstracts calling driver specific 3297 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3298 * calculates the size of memory required for device flow, allocates the memory, 3299 * initializes the device flow and returns the pointer. 3300 * 3301 * @note 3302 * This function initializes device flow structure such as dv or verbs in 3303 * struct mlx5_flow. However, it is caller's responsibility to initialize the 3304 * rest. For example, adding returning device flow to flow->dev_flow list and 3305 * setting backward reference to the flow should be done out of this function. 3306 * layers field is not filled either. 3307 * 3308 * @param[in] dev 3309 * Pointer to the dev structure. 3310 * @param[in] attr 3311 * Pointer to the flow attributes. 3312 * @param[in] items 3313 * Pointer to the list of items. 3314 * @param[in] actions 3315 * Pointer to the list of actions. 3316 * @param[in] flow_idx 3317 * This memory pool index to the flow. 3318 * @param[out] error 3319 * Pointer to the error structure. 3320 * 3321 * @return 3322 * Pointer to device flow on success, otherwise NULL and rte_errno is set. 3323 */ 3324 static inline struct mlx5_flow * 3325 flow_drv_prepare(struct rte_eth_dev *dev, 3326 const struct rte_flow *flow, 3327 const struct rte_flow_attr *attr, 3328 const struct rte_flow_item items[], 3329 const struct rte_flow_action actions[], 3330 uint32_t flow_idx, 3331 struct rte_flow_error *error) 3332 { 3333 const struct mlx5_flow_driver_ops *fops; 3334 enum mlx5_flow_drv_type type = flow->drv_type; 3335 struct mlx5_flow *mlx5_flow = NULL; 3336 3337 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3338 fops = flow_get_drv_ops(type); 3339 mlx5_flow = fops->prepare(dev, attr, items, actions, error); 3340 if (mlx5_flow) 3341 mlx5_flow->flow_idx = flow_idx; 3342 return mlx5_flow; 3343 } 3344 3345 /** 3346 * Flow driver translation API. This abstracts calling driver specific 3347 * functions. Parent flow (rte_flow) should have driver type (drv_type). It 3348 * translates a generic flow into a driver flow. flow_drv_prepare() must 3349 * precede. 3350 * 3351 * @note 3352 * dev_flow->layers could be filled as a result of parsing during translation 3353 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled 3354 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion, 3355 * flow->actions could be overwritten even though all the expanded dev_flows 3356 * have the same actions. 3357 * 3358 * @param[in] dev 3359 * Pointer to the rte dev structure. 3360 * @param[in, out] dev_flow 3361 * Pointer to the mlx5 flow. 3362 * @param[in] attr 3363 * Pointer to the flow attributes. 3364 * @param[in] items 3365 * Pointer to the list of items. 3366 * @param[in] actions 3367 * Pointer to the list of actions. 3368 * @param[out] error 3369 * Pointer to the error structure. 3370 * 3371 * @return 3372 * 0 on success, a negative errno value otherwise and rte_errno is set. 3373 */ 3374 static inline int 3375 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow, 3376 const struct rte_flow_attr *attr, 3377 const struct rte_flow_item items[], 3378 const struct rte_flow_action actions[], 3379 struct rte_flow_error *error) 3380 { 3381 const struct mlx5_flow_driver_ops *fops; 3382 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type; 3383 3384 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3385 fops = flow_get_drv_ops(type); 3386 return fops->translate(dev, dev_flow, attr, items, actions, error); 3387 } 3388 3389 /** 3390 * Flow driver apply API. This abstracts calling driver specific functions. 3391 * Parent flow (rte_flow) should have driver type (drv_type). It applies 3392 * translated driver flows on to device. flow_drv_translate() must precede. 3393 * 3394 * @param[in] dev 3395 * Pointer to Ethernet device structure. 3396 * @param[in, out] flow 3397 * Pointer to flow structure. 3398 * @param[out] error 3399 * Pointer to error structure. 3400 * 3401 * @return 3402 * 0 on success, a negative errno value otherwise and rte_errno is set. 3403 */ 3404 static inline int 3405 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow, 3406 struct rte_flow_error *error) 3407 { 3408 const struct mlx5_flow_driver_ops *fops; 3409 enum mlx5_flow_drv_type type = flow->drv_type; 3410 3411 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3412 fops = flow_get_drv_ops(type); 3413 return fops->apply(dev, flow, error); 3414 } 3415 3416 /** 3417 * Flow driver destroy API. This abstracts calling driver specific functions. 3418 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow 3419 * on device and releases resources of the flow. 3420 * 3421 * @param[in] dev 3422 * Pointer to Ethernet device. 3423 * @param[in, out] flow 3424 * Pointer to flow structure. 3425 */ 3426 static inline void 3427 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow) 3428 { 3429 const struct mlx5_flow_driver_ops *fops; 3430 enum mlx5_flow_drv_type type = flow->drv_type; 3431 3432 flow_mreg_split_qrss_release(dev, flow); 3433 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3434 fops = flow_get_drv_ops(type); 3435 fops->destroy(dev, flow); 3436 } 3437 3438 /** 3439 * Flow driver find RSS policy tbl API. This abstracts calling driver 3440 * specific functions. Parent flow (rte_flow) should have driver 3441 * type (drv_type). It will find the RSS policy table that has the rss_desc. 3442 * 3443 * @param[in] dev 3444 * Pointer to Ethernet device. 3445 * @param[in, out] flow 3446 * Pointer to flow structure. 3447 * @param[in] policy 3448 * Pointer to meter policy table. 3449 * @param[in] rss_desc 3450 * Pointer to rss_desc 3451 */ 3452 static struct mlx5_flow_meter_sub_policy * 3453 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev, 3454 struct rte_flow *flow, 3455 struct mlx5_flow_meter_policy *policy, 3456 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS]) 3457 { 3458 const struct mlx5_flow_driver_ops *fops; 3459 enum mlx5_flow_drv_type type = flow->drv_type; 3460 3461 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3462 fops = flow_get_drv_ops(type); 3463 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc); 3464 } 3465 3466 /** 3467 * Flow driver color tag rule API. This abstracts calling driver 3468 * specific functions. Parent flow (rte_flow) should have driver 3469 * type (drv_type). It will create the color tag rules in hierarchy meter. 3470 * 3471 * @param[in] dev 3472 * Pointer to Ethernet device. 3473 * @param[in, out] flow 3474 * Pointer to flow structure. 3475 * @param[in] fm 3476 * Pointer to flow meter structure. 3477 * @param[in] src_port 3478 * The src port this extra rule should use. 3479 * @param[in] item 3480 * The src port id match item. 3481 * @param[out] error 3482 * Pointer to error structure. 3483 */ 3484 static int 3485 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev, 3486 struct rte_flow *flow, 3487 struct mlx5_flow_meter_info *fm, 3488 int32_t src_port, 3489 const struct rte_flow_item *item, 3490 struct rte_flow_error *error) 3491 { 3492 const struct mlx5_flow_driver_ops *fops; 3493 enum mlx5_flow_drv_type type = flow->drv_type; 3494 3495 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX); 3496 fops = flow_get_drv_ops(type); 3497 return fops->meter_hierarchy_rule_create(dev, fm, 3498 src_port, item, error); 3499 } 3500 3501 /** 3502 * Get RSS action from the action list. 3503 * 3504 * @param[in] dev 3505 * Pointer to Ethernet device. 3506 * @param[in] actions 3507 * Pointer to the list of actions. 3508 * @param[in] flow 3509 * Parent flow structure pointer. 3510 * 3511 * @return 3512 * Pointer to the RSS action if exist, else return NULL. 3513 */ 3514 static const struct rte_flow_action_rss* 3515 flow_get_rss_action(struct rte_eth_dev *dev, 3516 const struct rte_flow_action actions[]) 3517 { 3518 struct mlx5_priv *priv = dev->data->dev_private; 3519 const struct rte_flow_action_rss *rss = NULL; 3520 3521 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3522 switch (actions->type) { 3523 case RTE_FLOW_ACTION_TYPE_RSS: 3524 rss = actions->conf; 3525 break; 3526 case RTE_FLOW_ACTION_TYPE_SAMPLE: 3527 { 3528 const struct rte_flow_action_sample *sample = 3529 actions->conf; 3530 const struct rte_flow_action *act = sample->actions; 3531 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) 3532 if (act->type == RTE_FLOW_ACTION_TYPE_RSS) 3533 rss = act->conf; 3534 break; 3535 } 3536 case RTE_FLOW_ACTION_TYPE_METER: 3537 { 3538 uint32_t mtr_idx; 3539 struct mlx5_flow_meter_info *fm; 3540 struct mlx5_flow_meter_policy *policy; 3541 const struct rte_flow_action_meter *mtr = actions->conf; 3542 3543 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx); 3544 if (fm && !fm->def_policy) { 3545 policy = mlx5_flow_meter_policy_find(dev, 3546 fm->policy_id, NULL); 3547 MLX5_ASSERT(policy); 3548 if (policy->is_hierarchy) { 3549 policy = 3550 mlx5_flow_meter_hierarchy_get_final_policy(dev, 3551 policy); 3552 if (!policy) 3553 return NULL; 3554 } 3555 if (policy->is_rss) 3556 rss = 3557 policy->act_cnt[RTE_COLOR_GREEN].rss->conf; 3558 } 3559 break; 3560 } 3561 default: 3562 break; 3563 } 3564 } 3565 return rss; 3566 } 3567 3568 /** 3569 * Get ASO age action by index. 3570 * 3571 * @param[in] dev 3572 * Pointer to the Ethernet device structure. 3573 * @param[in] age_idx 3574 * Index to the ASO age action. 3575 * 3576 * @return 3577 * The specified ASO age action. 3578 */ 3579 struct mlx5_aso_age_action* 3580 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx) 3581 { 3582 uint16_t pool_idx = age_idx & UINT16_MAX; 3583 uint16_t offset = (age_idx >> 16) & UINT16_MAX; 3584 struct mlx5_priv *priv = dev->data->dev_private; 3585 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng; 3586 struct mlx5_aso_age_pool *pool = mng->pools[pool_idx]; 3587 3588 return &pool->actions[offset - 1]; 3589 } 3590 3591 /* maps indirect action to translated direct in some actions array */ 3592 struct mlx5_translated_action_handle { 3593 struct rte_flow_action_handle *action; /**< Indirect action handle. */ 3594 int index; /**< Index in related array of rte_flow_action. */ 3595 }; 3596 3597 /** 3598 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related 3599 * direct action if translation possible. 3600 * This functionality used to run same execution path for both direct and 3601 * indirect actions on flow create. All necessary preparations for indirect 3602 * action handling should be performed on *handle* actions list returned 3603 * from this call. 3604 * 3605 * @param[in] dev 3606 * Pointer to Ethernet device. 3607 * @param[in] actions 3608 * List of actions to translate. 3609 * @param[out] handle 3610 * List to store translated indirect action object handles. 3611 * @param[in, out] indir_n 3612 * Size of *handle* array. On return should be updated with number of 3613 * indirect actions retrieved from the *actions* list. 3614 * @param[out] translated_actions 3615 * List of actions where all indirect actions were translated to direct 3616 * if possible. NULL if no translation took place. 3617 * @param[out] error 3618 * Pointer to the error structure. 3619 * 3620 * @return 3621 * 0 on success, a negative errno value otherwise and rte_errno is set. 3622 */ 3623 static int 3624 flow_action_handles_translate(struct rte_eth_dev *dev, 3625 const struct rte_flow_action actions[], 3626 struct mlx5_translated_action_handle *handle, 3627 int *indir_n, 3628 struct rte_flow_action **translated_actions, 3629 struct rte_flow_error *error) 3630 { 3631 struct mlx5_priv *priv = dev->data->dev_private; 3632 struct rte_flow_action *translated = NULL; 3633 size_t actions_size; 3634 int n; 3635 int copied_n = 0; 3636 struct mlx5_translated_action_handle *handle_end = NULL; 3637 3638 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) { 3639 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT) 3640 continue; 3641 if (copied_n == *indir_n) { 3642 return rte_flow_error_set 3643 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM, 3644 NULL, "too many shared actions"); 3645 } 3646 rte_memcpy(&handle[copied_n].action, &actions[n].conf, 3647 sizeof(actions[n].conf)); 3648 handle[copied_n].index = n; 3649 copied_n++; 3650 } 3651 n++; 3652 *indir_n = copied_n; 3653 if (!copied_n) 3654 return 0; 3655 actions_size = sizeof(struct rte_flow_action) * n; 3656 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY); 3657 if (!translated) { 3658 rte_errno = ENOMEM; 3659 return -ENOMEM; 3660 } 3661 memcpy(translated, actions, actions_size); 3662 for (handle_end = handle + copied_n; handle < handle_end; handle++) { 3663 struct mlx5_shared_action_rss *shared_rss; 3664 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3665 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3666 uint32_t idx = act_idx & 3667 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3668 3669 switch (type) { 3670 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3671 shared_rss = mlx5_ipool_get 3672 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx); 3673 translated[handle->index].type = 3674 RTE_FLOW_ACTION_TYPE_RSS; 3675 translated[handle->index].conf = 3676 &shared_rss->origin; 3677 break; 3678 case MLX5_INDIRECT_ACTION_TYPE_COUNT: 3679 translated[handle->index].type = 3680 (enum rte_flow_action_type) 3681 MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 3682 translated[handle->index].conf = (void *)(uintptr_t)idx; 3683 break; 3684 case MLX5_INDIRECT_ACTION_TYPE_AGE: 3685 if (priv->sh->flow_hit_aso_en) { 3686 translated[handle->index].type = 3687 (enum rte_flow_action_type) 3688 MLX5_RTE_FLOW_ACTION_TYPE_AGE; 3689 translated[handle->index].conf = 3690 (void *)(uintptr_t)idx; 3691 break; 3692 } 3693 /* Fall-through */ 3694 case MLX5_INDIRECT_ACTION_TYPE_CT: 3695 if (priv->sh->ct_aso_en) { 3696 translated[handle->index].type = 3697 RTE_FLOW_ACTION_TYPE_CONNTRACK; 3698 translated[handle->index].conf = 3699 (void *)(uintptr_t)idx; 3700 break; 3701 } 3702 /* Fall-through */ 3703 default: 3704 mlx5_free(translated); 3705 return rte_flow_error_set 3706 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, 3707 NULL, "invalid indirect action type"); 3708 } 3709 } 3710 *translated_actions = translated; 3711 return 0; 3712 } 3713 3714 /** 3715 * Get Shared RSS action from the action list. 3716 * 3717 * @param[in] dev 3718 * Pointer to Ethernet device. 3719 * @param[in] shared 3720 * Pointer to the list of actions. 3721 * @param[in] shared_n 3722 * Actions list length. 3723 * 3724 * @return 3725 * The MLX5 RSS action ID if exists, otherwise return 0. 3726 */ 3727 static uint32_t 3728 flow_get_shared_rss_action(struct rte_eth_dev *dev, 3729 struct mlx5_translated_action_handle *handle, 3730 int shared_n) 3731 { 3732 struct mlx5_translated_action_handle *handle_end; 3733 struct mlx5_priv *priv = dev->data->dev_private; 3734 struct mlx5_shared_action_rss *shared_rss; 3735 3736 3737 for (handle_end = handle + shared_n; handle < handle_end; handle++) { 3738 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action; 3739 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET; 3740 uint32_t idx = act_idx & 3741 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1); 3742 switch (type) { 3743 case MLX5_INDIRECT_ACTION_TYPE_RSS: 3744 shared_rss = mlx5_ipool_get 3745 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 3746 idx); 3747 __atomic_add_fetch(&shared_rss->refcnt, 1, 3748 __ATOMIC_RELAXED); 3749 return idx; 3750 default: 3751 break; 3752 } 3753 } 3754 return 0; 3755 } 3756 3757 static unsigned int 3758 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level) 3759 { 3760 const struct rte_flow_item *item; 3761 unsigned int has_vlan = 0; 3762 3763 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 3764 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) { 3765 has_vlan = 1; 3766 break; 3767 } 3768 } 3769 if (has_vlan) 3770 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN : 3771 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN; 3772 return rss_level < 2 ? MLX5_EXPANSION_ROOT : 3773 MLX5_EXPANSION_ROOT_OUTER; 3774 } 3775 3776 /** 3777 * Get layer flags from the prefix flow. 3778 * 3779 * Some flows may be split to several subflows, the prefix subflow gets the 3780 * match items and the suffix sub flow gets the actions. 3781 * Some actions need the user defined match item flags to get the detail for 3782 * the action. 3783 * This function helps the suffix flow to get the item layer flags from prefix 3784 * subflow. 3785 * 3786 * @param[in] dev_flow 3787 * Pointer the created preifx subflow. 3788 * 3789 * @return 3790 * The layers get from prefix subflow. 3791 */ 3792 static inline uint64_t 3793 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow) 3794 { 3795 uint64_t layers = 0; 3796 3797 /* 3798 * Layers bits could be localization, but usually the compiler will 3799 * help to do the optimization work for source code. 3800 * If no decap actions, use the layers directly. 3801 */ 3802 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP)) 3803 return dev_flow->handle->layers; 3804 /* Convert L3 layers with decap action. */ 3805 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4) 3806 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4; 3807 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6) 3808 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6; 3809 /* Convert L4 layers with decap action. */ 3810 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP) 3811 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP; 3812 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP) 3813 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP; 3814 return layers; 3815 } 3816 3817 /** 3818 * Get metadata split action information. 3819 * 3820 * @param[in] actions 3821 * Pointer to the list of actions. 3822 * @param[out] qrss 3823 * Pointer to the return pointer. 3824 * @param[out] qrss_type 3825 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned 3826 * if no QUEUE/RSS is found. 3827 * @param[out] encap_idx 3828 * Pointer to the index of the encap action if exists, otherwise the last 3829 * action index. 3830 * 3831 * @return 3832 * Total number of actions. 3833 */ 3834 static int 3835 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[], 3836 const struct rte_flow_action **qrss, 3837 int *encap_idx) 3838 { 3839 const struct rte_flow_action_raw_encap *raw_encap; 3840 int actions_n = 0; 3841 int raw_decap_idx = -1; 3842 3843 *encap_idx = -1; 3844 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3845 switch (actions->type) { 3846 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3847 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3848 *encap_idx = actions_n; 3849 break; 3850 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3851 raw_decap_idx = actions_n; 3852 break; 3853 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3854 raw_encap = actions->conf; 3855 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 3856 *encap_idx = raw_decap_idx != -1 ? 3857 raw_decap_idx : actions_n; 3858 break; 3859 case RTE_FLOW_ACTION_TYPE_QUEUE: 3860 case RTE_FLOW_ACTION_TYPE_RSS: 3861 *qrss = actions; 3862 break; 3863 default: 3864 break; 3865 } 3866 actions_n++; 3867 } 3868 if (*encap_idx == -1) 3869 *encap_idx = actions_n; 3870 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3871 return actions_n + 1; 3872 } 3873 3874 /** 3875 * Check if the action will change packet. 3876 * 3877 * @param dev 3878 * Pointer to Ethernet device. 3879 * @param[in] type 3880 * action type. 3881 * 3882 * @return 3883 * true if action will change packet, false otherwise. 3884 */ 3885 static bool flow_check_modify_action_type(struct rte_eth_dev *dev, 3886 enum rte_flow_action_type type) 3887 { 3888 struct mlx5_priv *priv = dev->data->dev_private; 3889 3890 switch (type) { 3891 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 3892 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 3893 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 3894 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 3895 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 3896 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 3897 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 3898 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 3899 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 3900 case RTE_FLOW_ACTION_TYPE_SET_TTL: 3901 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 3902 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 3903 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 3904 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 3905 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 3906 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 3907 case RTE_FLOW_ACTION_TYPE_SET_META: 3908 case RTE_FLOW_ACTION_TYPE_SET_TAG: 3909 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 3910 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 3911 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 3912 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 3913 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 3914 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 3915 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 3916 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 3917 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 3918 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 3919 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 3920 return true; 3921 case RTE_FLOW_ACTION_TYPE_FLAG: 3922 case RTE_FLOW_ACTION_TYPE_MARK: 3923 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) 3924 return true; 3925 else 3926 return false; 3927 default: 3928 return false; 3929 } 3930 } 3931 3932 /** 3933 * Check meter action from the action list. 3934 * 3935 * @param dev 3936 * Pointer to Ethernet device. 3937 * @param[in] actions 3938 * Pointer to the list of actions. 3939 * @param[out] has_mtr 3940 * Pointer to the meter exist flag. 3941 * @param[out] has_modify 3942 * Pointer to the flag showing there's packet change action. 3943 * @param[out] meter_id 3944 * Pointer to the meter id. 3945 * 3946 * @return 3947 * Total number of actions. 3948 */ 3949 static int 3950 flow_check_meter_action(struct rte_eth_dev *dev, 3951 const struct rte_flow_action actions[], 3952 bool *has_mtr, bool *has_modify, uint32_t *meter_id) 3953 { 3954 const struct rte_flow_action_meter *mtr = NULL; 3955 int actions_n = 0; 3956 3957 MLX5_ASSERT(has_mtr); 3958 *has_mtr = false; 3959 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 3960 switch (actions->type) { 3961 case RTE_FLOW_ACTION_TYPE_METER: 3962 mtr = actions->conf; 3963 *meter_id = mtr->mtr_id; 3964 *has_mtr = true; 3965 break; 3966 default: 3967 break; 3968 } 3969 if (!*has_mtr) 3970 *has_modify |= flow_check_modify_action_type(dev, 3971 actions->type); 3972 actions_n++; 3973 } 3974 /* Count RTE_FLOW_ACTION_TYPE_END. */ 3975 return actions_n + 1; 3976 } 3977 3978 /** 3979 * Check if the flow should be split due to hairpin. 3980 * The reason for the split is that in current HW we can't 3981 * support encap and push-vlan on Rx, so if a flow contains 3982 * these actions we move it to Tx. 3983 * 3984 * @param dev 3985 * Pointer to Ethernet device. 3986 * @param[in] attr 3987 * Flow rule attributes. 3988 * @param[in] actions 3989 * Associated actions (list terminated by the END action). 3990 * 3991 * @return 3992 * > 0 the number of actions and the flow should be split, 3993 * 0 when no split required. 3994 */ 3995 static int 3996 flow_check_hairpin_split(struct rte_eth_dev *dev, 3997 const struct rte_flow_attr *attr, 3998 const struct rte_flow_action actions[]) 3999 { 4000 int queue_action = 0; 4001 int action_n = 0; 4002 int split = 0; 4003 const struct rte_flow_action_queue *queue; 4004 const struct rte_flow_action_rss *rss; 4005 const struct rte_flow_action_raw_encap *raw_encap; 4006 const struct rte_eth_hairpin_conf *conf; 4007 4008 if (!attr->ingress) 4009 return 0; 4010 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4011 switch (actions->type) { 4012 case RTE_FLOW_ACTION_TYPE_QUEUE: 4013 queue = actions->conf; 4014 if (queue == NULL) 4015 return 0; 4016 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index); 4017 if (conf == NULL || conf->tx_explicit != 0) 4018 return 0; 4019 queue_action = 1; 4020 action_n++; 4021 break; 4022 case RTE_FLOW_ACTION_TYPE_RSS: 4023 rss = actions->conf; 4024 if (rss == NULL || rss->queue_num == 0) 4025 return 0; 4026 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]); 4027 if (conf == NULL || conf->tx_explicit != 0) 4028 return 0; 4029 queue_action = 1; 4030 action_n++; 4031 break; 4032 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4033 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4034 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4035 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4036 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4037 split++; 4038 action_n++; 4039 break; 4040 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4041 raw_encap = actions->conf; 4042 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4043 split++; 4044 action_n++; 4045 break; 4046 default: 4047 action_n++; 4048 break; 4049 } 4050 } 4051 if (split && queue_action) 4052 return action_n; 4053 return 0; 4054 } 4055 4056 /* Declare flow create/destroy prototype in advance. */ 4057 static uint32_t 4058 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 4059 const struct rte_flow_attr *attr, 4060 const struct rte_flow_item items[], 4061 const struct rte_flow_action actions[], 4062 bool external, struct rte_flow_error *error); 4063 4064 static void 4065 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 4066 uint32_t flow_idx); 4067 4068 int 4069 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused, 4070 struct mlx5_hlist_entry *entry, 4071 uint64_t key, void *cb_ctx __rte_unused) 4072 { 4073 struct mlx5_flow_mreg_copy_resource *mcp_res = 4074 container_of(entry, typeof(*mcp_res), hlist_ent); 4075 4076 return mcp_res->mark_id != key; 4077 } 4078 4079 struct mlx5_hlist_entry * 4080 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key, 4081 void *cb_ctx) 4082 { 4083 struct rte_eth_dev *dev = list->ctx; 4084 struct mlx5_priv *priv = dev->data->dev_private; 4085 struct mlx5_flow_cb_ctx *ctx = cb_ctx; 4086 struct mlx5_flow_mreg_copy_resource *mcp_res; 4087 struct rte_flow_error *error = ctx->error; 4088 uint32_t idx = 0; 4089 int ret; 4090 uint32_t mark_id = key; 4091 struct rte_flow_attr attr = { 4092 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 4093 .ingress = 1, 4094 }; 4095 struct mlx5_rte_flow_item_tag tag_spec = { 4096 .data = mark_id, 4097 }; 4098 struct rte_flow_item items[] = { 4099 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, }, 4100 }; 4101 struct rte_flow_action_mark ftag = { 4102 .id = mark_id, 4103 }; 4104 struct mlx5_flow_action_copy_mreg cp_mreg = { 4105 .dst = REG_B, 4106 .src = REG_NON, 4107 }; 4108 struct rte_flow_action_jump jump = { 4109 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 4110 }; 4111 struct rte_flow_action actions[] = { 4112 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, }, 4113 }; 4114 4115 /* Fill the register fileds in the flow. */ 4116 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error); 4117 if (ret < 0) 4118 return NULL; 4119 tag_spec.id = ret; 4120 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 4121 if (ret < 0) 4122 return NULL; 4123 cp_mreg.src = ret; 4124 /* Provide the full width of FLAG specific value. */ 4125 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT)) 4126 tag_spec.data = MLX5_FLOW_MARK_DEFAULT; 4127 /* Build a new flow. */ 4128 if (mark_id != MLX5_DEFAULT_COPY_ID) { 4129 items[0] = (struct rte_flow_item){ 4130 .type = (enum rte_flow_item_type) 4131 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 4132 .spec = &tag_spec, 4133 }; 4134 items[1] = (struct rte_flow_item){ 4135 .type = RTE_FLOW_ITEM_TYPE_END, 4136 }; 4137 actions[0] = (struct rte_flow_action){ 4138 .type = (enum rte_flow_action_type) 4139 MLX5_RTE_FLOW_ACTION_TYPE_MARK, 4140 .conf = &ftag, 4141 }; 4142 actions[1] = (struct rte_flow_action){ 4143 .type = (enum rte_flow_action_type) 4144 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4145 .conf = &cp_mreg, 4146 }; 4147 actions[2] = (struct rte_flow_action){ 4148 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4149 .conf = &jump, 4150 }; 4151 actions[3] = (struct rte_flow_action){ 4152 .type = RTE_FLOW_ACTION_TYPE_END, 4153 }; 4154 } else { 4155 /* Default rule, wildcard match. */ 4156 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR; 4157 items[0] = (struct rte_flow_item){ 4158 .type = RTE_FLOW_ITEM_TYPE_END, 4159 }; 4160 actions[0] = (struct rte_flow_action){ 4161 .type = (enum rte_flow_action_type) 4162 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 4163 .conf = &cp_mreg, 4164 }; 4165 actions[1] = (struct rte_flow_action){ 4166 .type = RTE_FLOW_ACTION_TYPE_JUMP, 4167 .conf = &jump, 4168 }; 4169 actions[2] = (struct rte_flow_action){ 4170 .type = RTE_FLOW_ACTION_TYPE_END, 4171 }; 4172 } 4173 /* Build a new entry. */ 4174 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx); 4175 if (!mcp_res) { 4176 rte_errno = ENOMEM; 4177 return NULL; 4178 } 4179 mcp_res->idx = idx; 4180 mcp_res->mark_id = mark_id; 4181 /* 4182 * The copy Flows are not included in any list. There 4183 * ones are referenced from other Flows and can not 4184 * be applied, removed, deleted in ardbitrary order 4185 * by list traversing. 4186 */ 4187 mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items, 4188 actions, false, error); 4189 if (!mcp_res->rix_flow) { 4190 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx); 4191 return NULL; 4192 } 4193 return &mcp_res->hlist_ent; 4194 } 4195 4196 /** 4197 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4198 * 4199 * As mark_id is unique, if there's already a registered flow for the mark_id, 4200 * return by increasing the reference counter of the resource. Otherwise, create 4201 * the resource (mcp_res) and flow. 4202 * 4203 * Flow looks like, 4204 * - If ingress port is ANY and reg_c[1] is mark_id, 4205 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4206 * 4207 * For default flow (zero mark_id), flow is like, 4208 * - If ingress port is ANY, 4209 * reg_b := reg_c[0] and jump to RX_ACT_TBL. 4210 * 4211 * @param dev 4212 * Pointer to Ethernet device. 4213 * @param mark_id 4214 * ID of MARK action, zero means default flow for META. 4215 * @param[out] error 4216 * Perform verbose error reporting if not NULL. 4217 * 4218 * @return 4219 * Associated resource on success, NULL otherwise and rte_errno is set. 4220 */ 4221 static struct mlx5_flow_mreg_copy_resource * 4222 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id, 4223 struct rte_flow_error *error) 4224 { 4225 struct mlx5_priv *priv = dev->data->dev_private; 4226 struct mlx5_hlist_entry *entry; 4227 struct mlx5_flow_cb_ctx ctx = { 4228 .dev = dev, 4229 .error = error, 4230 }; 4231 4232 /* Check if already registered. */ 4233 MLX5_ASSERT(priv->mreg_cp_tbl); 4234 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx); 4235 if (!entry) 4236 return NULL; 4237 return container_of(entry, struct mlx5_flow_mreg_copy_resource, 4238 hlist_ent); 4239 } 4240 4241 void 4242 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry) 4243 { 4244 struct mlx5_flow_mreg_copy_resource *mcp_res = 4245 container_of(entry, typeof(*mcp_res), hlist_ent); 4246 struct rte_eth_dev *dev = list->ctx; 4247 struct mlx5_priv *priv = dev->data->dev_private; 4248 4249 MLX5_ASSERT(mcp_res->rix_flow); 4250 flow_list_destroy(dev, NULL, mcp_res->rix_flow); 4251 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx); 4252 } 4253 4254 /** 4255 * Release flow in RX_CP_TBL. 4256 * 4257 * @param dev 4258 * Pointer to Ethernet device. 4259 * @flow 4260 * Parent flow for wich copying is provided. 4261 */ 4262 static void 4263 flow_mreg_del_copy_action(struct rte_eth_dev *dev, 4264 struct rte_flow *flow) 4265 { 4266 struct mlx5_flow_mreg_copy_resource *mcp_res; 4267 struct mlx5_priv *priv = dev->data->dev_private; 4268 4269 if (!flow->rix_mreg_copy) 4270 return; 4271 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP], 4272 flow->rix_mreg_copy); 4273 if (!mcp_res || !priv->mreg_cp_tbl) 4274 return; 4275 MLX5_ASSERT(mcp_res->rix_flow); 4276 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent); 4277 flow->rix_mreg_copy = 0; 4278 } 4279 4280 /** 4281 * Remove the default copy action from RX_CP_TBL. 4282 * 4283 * This functions is called in the mlx5_dev_start(). No thread safe 4284 * is guaranteed. 4285 * 4286 * @param dev 4287 * Pointer to Ethernet device. 4288 */ 4289 static void 4290 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev) 4291 { 4292 struct mlx5_hlist_entry *entry; 4293 struct mlx5_priv *priv = dev->data->dev_private; 4294 4295 /* Check if default flow is registered. */ 4296 if (!priv->mreg_cp_tbl) 4297 return; 4298 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, 4299 MLX5_DEFAULT_COPY_ID, NULL); 4300 if (!entry) 4301 return; 4302 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry); 4303 } 4304 4305 /** 4306 * Add the default copy action in in RX_CP_TBL. 4307 * 4308 * This functions is called in the mlx5_dev_start(). No thread safe 4309 * is guaranteed. 4310 * 4311 * @param dev 4312 * Pointer to Ethernet device. 4313 * @param[out] error 4314 * Perform verbose error reporting if not NULL. 4315 * 4316 * @return 4317 * 0 for success, negative value otherwise and rte_errno is set. 4318 */ 4319 static int 4320 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev, 4321 struct rte_flow_error *error) 4322 { 4323 struct mlx5_priv *priv = dev->data->dev_private; 4324 struct mlx5_flow_mreg_copy_resource *mcp_res; 4325 4326 /* Check whether extensive metadata feature is engaged. */ 4327 if (!priv->config.dv_flow_en || 4328 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4329 !mlx5_flow_ext_mreg_supported(dev) || 4330 !priv->sh->dv_regc0_mask) 4331 return 0; 4332 /* 4333 * Add default mreg copy flow may be called multiple time, but 4334 * only be called once in stop. Avoid register it twice. 4335 */ 4336 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL)) 4337 return 0; 4338 mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error); 4339 if (!mcp_res) 4340 return -rte_errno; 4341 return 0; 4342 } 4343 4344 /** 4345 * Add a flow of copying flow metadata registers in RX_CP_TBL. 4346 * 4347 * All the flow having Q/RSS action should be split by 4348 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL 4349 * performs the following, 4350 * - CQE->flow_tag := reg_c[1] (MARK) 4351 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 4352 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1] 4353 * but there should be a flow per each MARK ID set by MARK action. 4354 * 4355 * For the aforementioned reason, if there's a MARK action in flow's action 4356 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy 4357 * the MARK ID to CQE's flow_tag like, 4358 * - If reg_c[1] is mark_id, 4359 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4360 * 4361 * For SET_META action which stores value in reg_c[0], as the destination is 4362 * also a flow metadata register (reg_b), adding a default flow is enough. Zero 4363 * MARK ID means the default flow. The default flow looks like, 4364 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL. 4365 * 4366 * @param dev 4367 * Pointer to Ethernet device. 4368 * @param flow 4369 * Pointer to flow structure. 4370 * @param[in] actions 4371 * Pointer to the list of actions. 4372 * @param[out] error 4373 * Perform verbose error reporting if not NULL. 4374 * 4375 * @return 4376 * 0 on success, negative value otherwise and rte_errno is set. 4377 */ 4378 static int 4379 flow_mreg_update_copy_table(struct rte_eth_dev *dev, 4380 struct rte_flow *flow, 4381 const struct rte_flow_action *actions, 4382 struct rte_flow_error *error) 4383 { 4384 struct mlx5_priv *priv = dev->data->dev_private; 4385 struct mlx5_dev_config *config = &priv->config; 4386 struct mlx5_flow_mreg_copy_resource *mcp_res; 4387 const struct rte_flow_action_mark *mark; 4388 4389 /* Check whether extensive metadata feature is engaged. */ 4390 if (!config->dv_flow_en || 4391 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 4392 !mlx5_flow_ext_mreg_supported(dev) || 4393 !priv->sh->dv_regc0_mask) 4394 return 0; 4395 /* Find MARK action. */ 4396 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4397 switch (actions->type) { 4398 case RTE_FLOW_ACTION_TYPE_FLAG: 4399 mcp_res = flow_mreg_add_copy_action 4400 (dev, MLX5_FLOW_MARK_DEFAULT, error); 4401 if (!mcp_res) 4402 return -rte_errno; 4403 flow->rix_mreg_copy = mcp_res->idx; 4404 return 0; 4405 case RTE_FLOW_ACTION_TYPE_MARK: 4406 mark = (const struct rte_flow_action_mark *) 4407 actions->conf; 4408 mcp_res = 4409 flow_mreg_add_copy_action(dev, mark->id, error); 4410 if (!mcp_res) 4411 return -rte_errno; 4412 flow->rix_mreg_copy = mcp_res->idx; 4413 return 0; 4414 default: 4415 break; 4416 } 4417 } 4418 return 0; 4419 } 4420 4421 #define MLX5_MAX_SPLIT_ACTIONS 24 4422 #define MLX5_MAX_SPLIT_ITEMS 24 4423 4424 /** 4425 * Split the hairpin flow. 4426 * Since HW can't support encap and push-vlan on Rx, we move these 4427 * actions to Tx. 4428 * If the count action is after the encap then we also 4429 * move the count action. in this case the count will also measure 4430 * the outer bytes. 4431 * 4432 * @param dev 4433 * Pointer to Ethernet device. 4434 * @param[in] actions 4435 * Associated actions (list terminated by the END action). 4436 * @param[out] actions_rx 4437 * Rx flow actions. 4438 * @param[out] actions_tx 4439 * Tx flow actions.. 4440 * @param[out] pattern_tx 4441 * The pattern items for the Tx flow. 4442 * @param[out] flow_id 4443 * The flow ID connected to this flow. 4444 * 4445 * @return 4446 * 0 on success. 4447 */ 4448 static int 4449 flow_hairpin_split(struct rte_eth_dev *dev, 4450 const struct rte_flow_action actions[], 4451 struct rte_flow_action actions_rx[], 4452 struct rte_flow_action actions_tx[], 4453 struct rte_flow_item pattern_tx[], 4454 uint32_t flow_id) 4455 { 4456 const struct rte_flow_action_raw_encap *raw_encap; 4457 const struct rte_flow_action_raw_decap *raw_decap; 4458 struct mlx5_rte_flow_action_set_tag *set_tag; 4459 struct rte_flow_action *tag_action; 4460 struct mlx5_rte_flow_item_tag *tag_item; 4461 struct rte_flow_item *item; 4462 char *addr; 4463 int encap = 0; 4464 4465 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4466 switch (actions->type) { 4467 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP: 4468 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP: 4469 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4470 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4471 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 4472 rte_memcpy(actions_tx, actions, 4473 sizeof(struct rte_flow_action)); 4474 actions_tx++; 4475 break; 4476 case RTE_FLOW_ACTION_TYPE_COUNT: 4477 if (encap) { 4478 rte_memcpy(actions_tx, actions, 4479 sizeof(struct rte_flow_action)); 4480 actions_tx++; 4481 } else { 4482 rte_memcpy(actions_rx, actions, 4483 sizeof(struct rte_flow_action)); 4484 actions_rx++; 4485 } 4486 break; 4487 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4488 raw_encap = actions->conf; 4489 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) { 4490 memcpy(actions_tx, actions, 4491 sizeof(struct rte_flow_action)); 4492 actions_tx++; 4493 encap = 1; 4494 } else { 4495 rte_memcpy(actions_rx, actions, 4496 sizeof(struct rte_flow_action)); 4497 actions_rx++; 4498 } 4499 break; 4500 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4501 raw_decap = actions->conf; 4502 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) { 4503 memcpy(actions_tx, actions, 4504 sizeof(struct rte_flow_action)); 4505 actions_tx++; 4506 } else { 4507 rte_memcpy(actions_rx, actions, 4508 sizeof(struct rte_flow_action)); 4509 actions_rx++; 4510 } 4511 break; 4512 default: 4513 rte_memcpy(actions_rx, actions, 4514 sizeof(struct rte_flow_action)); 4515 actions_rx++; 4516 break; 4517 } 4518 } 4519 /* Add set meta action and end action for the Rx flow. */ 4520 tag_action = actions_rx; 4521 tag_action->type = (enum rte_flow_action_type) 4522 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4523 actions_rx++; 4524 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action)); 4525 actions_rx++; 4526 set_tag = (void *)actions_rx; 4527 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4528 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL), 4529 .data = flow_id, 4530 }; 4531 MLX5_ASSERT(set_tag->id > REG_NON); 4532 tag_action->conf = set_tag; 4533 /* Create Tx item list. */ 4534 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action)); 4535 addr = (void *)&pattern_tx[2]; 4536 item = pattern_tx; 4537 item->type = (enum rte_flow_item_type) 4538 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4539 tag_item = (void *)addr; 4540 tag_item->data = flow_id; 4541 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL); 4542 MLX5_ASSERT(set_tag->id > REG_NON); 4543 item->spec = tag_item; 4544 addr += sizeof(struct mlx5_rte_flow_item_tag); 4545 tag_item = (void *)addr; 4546 tag_item->data = UINT32_MAX; 4547 tag_item->id = UINT16_MAX; 4548 item->mask = tag_item; 4549 item->last = NULL; 4550 item++; 4551 item->type = RTE_FLOW_ITEM_TYPE_END; 4552 return 0; 4553 } 4554 4555 /** 4556 * The last stage of splitting chain, just creates the subflow 4557 * without any modification. 4558 * 4559 * @param[in] dev 4560 * Pointer to Ethernet device. 4561 * @param[in] flow 4562 * Parent flow structure pointer. 4563 * @param[in, out] sub_flow 4564 * Pointer to return the created subflow, may be NULL. 4565 * @param[in] attr 4566 * Flow rule attributes. 4567 * @param[in] items 4568 * Pattern specification (list terminated by the END pattern item). 4569 * @param[in] actions 4570 * Associated actions (list terminated by the END action). 4571 * @param[in] flow_split_info 4572 * Pointer to flow split info structure. 4573 * @param[out] error 4574 * Perform verbose error reporting if not NULL. 4575 * @return 4576 * 0 on success, negative value otherwise 4577 */ 4578 static int 4579 flow_create_split_inner(struct rte_eth_dev *dev, 4580 struct rte_flow *flow, 4581 struct mlx5_flow **sub_flow, 4582 const struct rte_flow_attr *attr, 4583 const struct rte_flow_item items[], 4584 const struct rte_flow_action actions[], 4585 struct mlx5_flow_split_info *flow_split_info, 4586 struct rte_flow_error *error) 4587 { 4588 struct mlx5_flow *dev_flow; 4589 4590 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions, 4591 flow_split_info->flow_idx, error); 4592 if (!dev_flow) 4593 return -rte_errno; 4594 dev_flow->flow = flow; 4595 dev_flow->external = flow_split_info->external; 4596 dev_flow->skip_scale = flow_split_info->skip_scale; 4597 /* Subflow object was created, we must include one in the list. */ 4598 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 4599 dev_flow->handle, next); 4600 /* 4601 * If dev_flow is as one of the suffix flow, some actions in suffix 4602 * flow may need some user defined item layer flags, and pass the 4603 * Metadate rxq mark flag to suffix flow as well. 4604 */ 4605 if (flow_split_info->prefix_layers) 4606 dev_flow->handle->layers = flow_split_info->prefix_layers; 4607 if (flow_split_info->prefix_mark) 4608 dev_flow->handle->mark = 1; 4609 if (sub_flow) 4610 *sub_flow = dev_flow; 4611 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4612 dev_flow->dv.table_id = flow_split_info->table_id; 4613 #endif 4614 return flow_drv_translate(dev, dev_flow, attr, items, actions, error); 4615 } 4616 4617 /** 4618 * Get the sub policy of a meter. 4619 * 4620 * @param[in] dev 4621 * Pointer to Ethernet device. 4622 * @param[in] flow 4623 * Parent flow structure pointer. 4624 * @param wks 4625 * Pointer to thread flow work space. 4626 * @param[in] attr 4627 * Flow rule attributes. 4628 * @param[in] items 4629 * Pattern specification (list terminated by the END pattern item). 4630 * @param[out] error 4631 * Perform verbose error reporting if not NULL. 4632 * 4633 * @return 4634 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set. 4635 */ 4636 static struct mlx5_flow_meter_sub_policy * 4637 get_meter_sub_policy(struct rte_eth_dev *dev, 4638 struct rte_flow *flow, 4639 struct mlx5_flow_workspace *wks, 4640 const struct rte_flow_attr *attr, 4641 const struct rte_flow_item items[], 4642 struct rte_flow_error *error) 4643 { 4644 struct mlx5_flow_meter_policy *policy; 4645 struct mlx5_flow_meter_policy *final_policy; 4646 struct mlx5_flow_meter_sub_policy *sub_policy = NULL; 4647 4648 policy = wks->policy; 4649 final_policy = policy->is_hierarchy ? wks->final_policy : policy; 4650 if (final_policy->is_rss || final_policy->is_queue) { 4651 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS]; 4652 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0}; 4653 uint32_t i; 4654 4655 /** 4656 * This is a tmp dev_flow, 4657 * no need to register any matcher for it in translate. 4658 */ 4659 wks->skip_matcher_reg = 1; 4660 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) { 4661 struct mlx5_flow dev_flow = {0}; 4662 struct mlx5_flow_handle dev_handle = { {0} }; 4663 4664 if (final_policy->is_rss) { 4665 const void *rss_act = 4666 final_policy->act_cnt[i].rss->conf; 4667 struct rte_flow_action rss_actions[2] = { 4668 [0] = { 4669 .type = RTE_FLOW_ACTION_TYPE_RSS, 4670 .conf = rss_act 4671 }, 4672 [1] = { 4673 .type = RTE_FLOW_ACTION_TYPE_END, 4674 .conf = NULL 4675 } 4676 }; 4677 4678 dev_flow.handle = &dev_handle; 4679 dev_flow.ingress = attr->ingress; 4680 dev_flow.flow = flow; 4681 dev_flow.external = 0; 4682 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 4683 dev_flow.dv.transfer = attr->transfer; 4684 #endif 4685 /** 4686 * Translate RSS action to get rss hash fields. 4687 */ 4688 if (flow_drv_translate(dev, &dev_flow, attr, 4689 items, rss_actions, error)) 4690 goto exit; 4691 rss_desc_v[i] = wks->rss_desc; 4692 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN; 4693 rss_desc_v[i].hash_fields = 4694 dev_flow.hash_fields; 4695 rss_desc_v[i].queue_num = 4696 rss_desc_v[i].hash_fields ? 4697 rss_desc_v[i].queue_num : 1; 4698 rss_desc_v[i].tunnel = 4699 !!(dev_flow.handle->layers & 4700 MLX5_FLOW_LAYER_TUNNEL); 4701 } else { 4702 /* This is queue action. */ 4703 rss_desc_v[i] = wks->rss_desc; 4704 rss_desc_v[i].key_len = 0; 4705 rss_desc_v[i].hash_fields = 0; 4706 rss_desc_v[i].queue = 4707 &final_policy->act_cnt[i].queue; 4708 rss_desc_v[i].queue_num = 1; 4709 } 4710 rss_desc[i] = &rss_desc_v[i]; 4711 } 4712 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev, 4713 flow, policy, rss_desc); 4714 } else { 4715 enum mlx5_meter_domain mtr_domain = 4716 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4717 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4718 MLX5_MTR_DOMAIN_INGRESS; 4719 sub_policy = policy->sub_policys[mtr_domain][0]; 4720 } 4721 if (!sub_policy) { 4722 rte_flow_error_set(error, EINVAL, 4723 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4724 "Failed to get meter sub-policy."); 4725 goto exit; 4726 } 4727 exit: 4728 return sub_policy; 4729 } 4730 4731 /** 4732 * Split the meter flow. 4733 * 4734 * As meter flow will split to three sub flow, other than meter 4735 * action, the other actions make sense to only meter accepts 4736 * the packet. If it need to be dropped, no other additional 4737 * actions should be take. 4738 * 4739 * One kind of special action which decapsulates the L3 tunnel 4740 * header will be in the prefix sub flow, as not to take the 4741 * L3 tunnel header into account. 4742 * 4743 * @param[in] dev 4744 * Pointer to Ethernet device. 4745 * @param[in] flow 4746 * Parent flow structure pointer. 4747 * @param wks 4748 * Pointer to thread flow work space. 4749 * @param[in] attr 4750 * Flow rule attributes. 4751 * @param[in] items 4752 * Pattern specification (list terminated by the END pattern item). 4753 * @param[out] sfx_items 4754 * Suffix flow match items (list terminated by the END pattern item). 4755 * @param[in] actions 4756 * Associated actions (list terminated by the END action). 4757 * @param[out] actions_sfx 4758 * Suffix flow actions. 4759 * @param[out] actions_pre 4760 * Prefix flow actions. 4761 * @param[out] mtr_flow_id 4762 * Pointer to meter flow id. 4763 * @param[out] error 4764 * Perform verbose error reporting if not NULL. 4765 * 4766 * @return 4767 * 0 on success, a negative errno value otherwise and rte_errno is set. 4768 */ 4769 static int 4770 flow_meter_split_prep(struct rte_eth_dev *dev, 4771 struct rte_flow *flow, 4772 struct mlx5_flow_workspace *wks, 4773 const struct rte_flow_attr *attr, 4774 const struct rte_flow_item items[], 4775 struct rte_flow_item sfx_items[], 4776 const struct rte_flow_action actions[], 4777 struct rte_flow_action actions_sfx[], 4778 struct rte_flow_action actions_pre[], 4779 uint32_t *mtr_flow_id, 4780 struct rte_flow_error *error) 4781 { 4782 struct mlx5_priv *priv = dev->data->dev_private; 4783 struct mlx5_flow_meter_info *fm = wks->fm; 4784 struct rte_flow_action *tag_action = NULL; 4785 struct rte_flow_item *tag_item; 4786 struct mlx5_rte_flow_action_set_tag *set_tag; 4787 const struct rte_flow_action_raw_encap *raw_encap; 4788 const struct rte_flow_action_raw_decap *raw_decap; 4789 struct mlx5_rte_flow_item_tag *tag_item_spec; 4790 struct mlx5_rte_flow_item_tag *tag_item_mask; 4791 uint32_t tag_id = 0; 4792 struct rte_flow_item *vlan_item_dst = NULL; 4793 const struct rte_flow_item *vlan_item_src = NULL; 4794 struct rte_flow_action *hw_mtr_action; 4795 struct rte_flow_action *action_pre_head = NULL; 4796 int32_t flow_src_port = priv->representor_id; 4797 bool mtr_first; 4798 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0; 4799 uint8_t mtr_reg_bits = priv->mtr_reg_share ? 4800 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS; 4801 uint32_t flow_id = 0; 4802 uint32_t flow_id_reversed = 0; 4803 uint8_t flow_id_bits = 0; 4804 int shift; 4805 4806 /* Prepare the suffix subflow items. */ 4807 tag_item = sfx_items++; 4808 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) { 4809 struct mlx5_priv *port_priv; 4810 const struct rte_flow_item_port_id *pid_v; 4811 int item_type = items->type; 4812 4813 switch (item_type) { 4814 case RTE_FLOW_ITEM_TYPE_PORT_ID: 4815 pid_v = items->spec; 4816 MLX5_ASSERT(pid_v); 4817 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false); 4818 if (!port_priv) 4819 return rte_flow_error_set(error, 4820 rte_errno, 4821 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, 4822 pid_v, 4823 "Failed to get port info."); 4824 flow_src_port = port_priv->representor_id; 4825 if (!fm->def_policy && wks->policy->is_hierarchy && 4826 flow_src_port != priv->representor_id) { 4827 if (flow_drv_mtr_hierarchy_rule_create(dev, 4828 flow, fm, 4829 flow_src_port, 4830 items, 4831 error)) 4832 return -rte_errno; 4833 } 4834 memcpy(sfx_items, items, sizeof(*sfx_items)); 4835 sfx_items++; 4836 break; 4837 case RTE_FLOW_ITEM_TYPE_VLAN: 4838 /* Determine if copy vlan item below. */ 4839 vlan_item_src = items; 4840 vlan_item_dst = sfx_items++; 4841 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID; 4842 break; 4843 default: 4844 break; 4845 } 4846 } 4847 sfx_items->type = RTE_FLOW_ITEM_TYPE_END; 4848 sfx_items++; 4849 mtr_first = priv->sh->meter_aso_en && 4850 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX)); 4851 /* For ASO meter, meter must be before tag in TX direction. */ 4852 if (mtr_first) { 4853 action_pre_head = actions_pre++; 4854 /* Leave space for tag action. */ 4855 tag_action = actions_pre++; 4856 } 4857 /* Prepare the actions for prefix and suffix flow. */ 4858 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 4859 struct rte_flow_action *action_cur = NULL; 4860 4861 switch (actions->type) { 4862 case RTE_FLOW_ACTION_TYPE_METER: 4863 if (mtr_first) { 4864 action_cur = action_pre_head; 4865 } else { 4866 /* Leave space for tag action. */ 4867 tag_action = actions_pre++; 4868 action_cur = actions_pre++; 4869 } 4870 break; 4871 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 4872 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 4873 action_cur = actions_pre++; 4874 break; 4875 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP: 4876 raw_encap = actions->conf; 4877 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE) 4878 action_cur = actions_pre++; 4879 break; 4880 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 4881 raw_decap = actions->conf; 4882 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE) 4883 action_cur = actions_pre++; 4884 break; 4885 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 4886 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 4887 if (vlan_item_dst && vlan_item_src) { 4888 memcpy(vlan_item_dst, vlan_item_src, 4889 sizeof(*vlan_item_dst)); 4890 /* 4891 * Convert to internal match item, it is used 4892 * for vlan push and set vid. 4893 */ 4894 vlan_item_dst->type = (enum rte_flow_item_type) 4895 MLX5_RTE_FLOW_ITEM_TYPE_VLAN; 4896 } 4897 break; 4898 default: 4899 break; 4900 } 4901 if (!action_cur) 4902 action_cur = (fm->def_policy) ? 4903 actions_sfx++ : actions_pre++; 4904 memcpy(action_cur, actions, sizeof(struct rte_flow_action)); 4905 } 4906 /* Add end action to the actions. */ 4907 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END; 4908 if (priv->sh->meter_aso_en) { 4909 /** 4910 * For ASO meter, need to add an extra jump action explicitly, 4911 * to jump from meter to policer table. 4912 */ 4913 struct mlx5_flow_meter_sub_policy *sub_policy; 4914 struct mlx5_flow_tbl_data_entry *tbl_data; 4915 4916 if (!fm->def_policy) { 4917 sub_policy = get_meter_sub_policy(dev, flow, wks, 4918 attr, items, error); 4919 if (!sub_policy) 4920 return -rte_errno; 4921 } else { 4922 enum mlx5_meter_domain mtr_domain = 4923 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER : 4924 attr->egress ? MLX5_MTR_DOMAIN_EGRESS : 4925 MLX5_MTR_DOMAIN_INGRESS; 4926 4927 sub_policy = 4928 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy; 4929 } 4930 tbl_data = container_of(sub_policy->tbl_rsc, 4931 struct mlx5_flow_tbl_data_entry, tbl); 4932 hw_mtr_action = actions_pre++; 4933 hw_mtr_action->type = (enum rte_flow_action_type) 4934 MLX5_RTE_FLOW_ACTION_TYPE_JUMP; 4935 hw_mtr_action->conf = tbl_data->jump.action; 4936 } 4937 actions_pre->type = RTE_FLOW_ACTION_TYPE_END; 4938 actions_pre++; 4939 if (!tag_action) 4940 return rte_flow_error_set(error, ENOMEM, 4941 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4942 "No tag action space."); 4943 if (!mtr_flow_id) { 4944 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID; 4945 goto exit; 4946 } 4947 /* Only default-policy Meter creates mtr flow id. */ 4948 if (fm->def_policy) { 4949 mlx5_ipool_malloc(fm->flow_ipool, &tag_id); 4950 if (!tag_id) 4951 return rte_flow_error_set(error, ENOMEM, 4952 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4953 "Failed to allocate meter flow id."); 4954 flow_id = tag_id - 1; 4955 flow_id_bits = (!flow_id) ? 1 : 4956 (MLX5_REG_BITS - __builtin_clz(flow_id)); 4957 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) > 4958 mtr_reg_bits) { 4959 mlx5_ipool_free(fm->flow_ipool, tag_id); 4960 return rte_flow_error_set(error, EINVAL, 4961 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 4962 "Meter flow id exceeds max limit."); 4963 } 4964 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits) 4965 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits; 4966 } 4967 /* Build tag actions and items for meter_id/meter flow_id. */ 4968 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre; 4969 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items; 4970 tag_item_mask = tag_item_spec + 1; 4971 /* Both flow_id and meter_id share the same register. */ 4972 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 4973 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID, 4974 0, error), 4975 .offset = mtr_id_offset, 4976 .length = mtr_reg_bits, 4977 .data = flow->meter, 4978 }; 4979 /* 4980 * The color Reg bits used by flow_id are growing from 4981 * msb to lsb, so must do bit reverse for flow_id val in RegC. 4982 */ 4983 for (shift = 0; shift < flow_id_bits; shift++) 4984 flow_id_reversed = (flow_id_reversed << 1) | 4985 ((flow_id >> shift) & 0x1); 4986 set_tag->data |= 4987 flow_id_reversed << (mtr_reg_bits - flow_id_bits); 4988 tag_item_spec->id = set_tag->id; 4989 tag_item_spec->data = set_tag->data << mtr_id_offset; 4990 tag_item_mask->data = UINT32_MAX << mtr_id_offset; 4991 tag_action->type = (enum rte_flow_action_type) 4992 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 4993 tag_action->conf = set_tag; 4994 tag_item->type = (enum rte_flow_item_type) 4995 MLX5_RTE_FLOW_ITEM_TYPE_TAG; 4996 tag_item->spec = tag_item_spec; 4997 tag_item->last = NULL; 4998 tag_item->mask = tag_item_mask; 4999 exit: 5000 if (mtr_flow_id) 5001 *mtr_flow_id = tag_id; 5002 return 0; 5003 } 5004 5005 /** 5006 * Split action list having QUEUE/RSS for metadata register copy. 5007 * 5008 * Once Q/RSS action is detected in user's action list, the flow action 5009 * should be split in order to copy metadata registers, which will happen in 5010 * RX_CP_TBL like, 5011 * - CQE->flow_tag := reg_c[1] (MARK) 5012 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META) 5013 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL. 5014 * This is because the last action of each flow must be a terminal action 5015 * (QUEUE, RSS or DROP). 5016 * 5017 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is 5018 * stored and kept in the mlx5_flow structure per each sub_flow. 5019 * 5020 * The Q/RSS action is replaced with, 5021 * - SET_TAG, setting the allocated flow ID to reg_c[2]. 5022 * And the following JUMP action is added at the end, 5023 * - JUMP, to RX_CP_TBL. 5024 * 5025 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by 5026 * flow_create_split_metadata() routine. The flow will look like, 5027 * - If flow ID matches (reg_c[2]), perform Q/RSS. 5028 * 5029 * @param dev 5030 * Pointer to Ethernet device. 5031 * @param[out] split_actions 5032 * Pointer to store split actions to jump to CP_TBL. 5033 * @param[in] actions 5034 * Pointer to the list of original flow actions. 5035 * @param[in] qrss 5036 * Pointer to the Q/RSS action. 5037 * @param[in] actions_n 5038 * Number of original actions. 5039 * @param[out] error 5040 * Perform verbose error reporting if not NULL. 5041 * 5042 * @return 5043 * non-zero unique flow_id on success, otherwise 0 and 5044 * error/rte_error are set. 5045 */ 5046 static uint32_t 5047 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev, 5048 struct rte_flow_action *split_actions, 5049 const struct rte_flow_action *actions, 5050 const struct rte_flow_action *qrss, 5051 int actions_n, struct rte_flow_error *error) 5052 { 5053 struct mlx5_priv *priv = dev->data->dev_private; 5054 struct mlx5_rte_flow_action_set_tag *set_tag; 5055 struct rte_flow_action_jump *jump; 5056 const int qrss_idx = qrss - actions; 5057 uint32_t flow_id = 0; 5058 int ret = 0; 5059 5060 /* 5061 * Given actions will be split 5062 * - Replace QUEUE/RSS action with SET_TAG to set flow ID. 5063 * - Add jump to mreg CP_TBL. 5064 * As a result, there will be one more action. 5065 */ 5066 ++actions_n; 5067 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n); 5068 set_tag = (void *)(split_actions + actions_n); 5069 /* 5070 * If tag action is not set to void(it means we are not the meter 5071 * suffix flow), add the tag action. Since meter suffix flow already 5072 * has the tag added. 5073 */ 5074 if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) { 5075 /* 5076 * Allocate the new subflow ID. This one is unique within 5077 * device and not shared with representors. Otherwise, 5078 * we would have to resolve multi-thread access synch 5079 * issue. Each flow on the shared device is appended 5080 * with source vport identifier, so the resulting 5081 * flows will be unique in the shared (by master and 5082 * representors) domain even if they have coinciding 5083 * IDs. 5084 */ 5085 mlx5_ipool_malloc(priv->sh->ipool 5086 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id); 5087 if (!flow_id) 5088 return rte_flow_error_set(error, ENOMEM, 5089 RTE_FLOW_ERROR_TYPE_ACTION, 5090 NULL, "can't allocate id " 5091 "for split Q/RSS subflow"); 5092 /* Internal SET_TAG action to set flow ID. */ 5093 *set_tag = (struct mlx5_rte_flow_action_set_tag){ 5094 .data = flow_id, 5095 }; 5096 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error); 5097 if (ret < 0) 5098 return ret; 5099 set_tag->id = ret; 5100 /* Construct new actions array. */ 5101 /* Replace QUEUE/RSS action. */ 5102 split_actions[qrss_idx] = (struct rte_flow_action){ 5103 .type = (enum rte_flow_action_type) 5104 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5105 .conf = set_tag, 5106 }; 5107 } 5108 /* JUMP action to jump to mreg copy table (CP_TBL). */ 5109 jump = (void *)(set_tag + 1); 5110 *jump = (struct rte_flow_action_jump){ 5111 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 5112 }; 5113 split_actions[actions_n - 2] = (struct rte_flow_action){ 5114 .type = RTE_FLOW_ACTION_TYPE_JUMP, 5115 .conf = jump, 5116 }; 5117 split_actions[actions_n - 1] = (struct rte_flow_action){ 5118 .type = RTE_FLOW_ACTION_TYPE_END, 5119 }; 5120 return flow_id; 5121 } 5122 5123 /** 5124 * Extend the given action list for Tx metadata copy. 5125 * 5126 * Copy the given action list to the ext_actions and add flow metadata register 5127 * copy action in order to copy reg_a set by WQE to reg_c[0]. 5128 * 5129 * @param[out] ext_actions 5130 * Pointer to the extended action list. 5131 * @param[in] actions 5132 * Pointer to the list of actions. 5133 * @param[in] actions_n 5134 * Number of actions in the list. 5135 * @param[out] error 5136 * Perform verbose error reporting if not NULL. 5137 * @param[in] encap_idx 5138 * The encap action inndex. 5139 * 5140 * @return 5141 * 0 on success, negative value otherwise 5142 */ 5143 static int 5144 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev, 5145 struct rte_flow_action *ext_actions, 5146 const struct rte_flow_action *actions, 5147 int actions_n, struct rte_flow_error *error, 5148 int encap_idx) 5149 { 5150 struct mlx5_flow_action_copy_mreg *cp_mreg = 5151 (struct mlx5_flow_action_copy_mreg *) 5152 (ext_actions + actions_n + 1); 5153 int ret; 5154 5155 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error); 5156 if (ret < 0) 5157 return ret; 5158 cp_mreg->dst = ret; 5159 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error); 5160 if (ret < 0) 5161 return ret; 5162 cp_mreg->src = ret; 5163 if (encap_idx != 0) 5164 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx); 5165 if (encap_idx == actions_n - 1) { 5166 ext_actions[actions_n - 1] = (struct rte_flow_action){ 5167 .type = (enum rte_flow_action_type) 5168 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5169 .conf = cp_mreg, 5170 }; 5171 ext_actions[actions_n] = (struct rte_flow_action){ 5172 .type = RTE_FLOW_ACTION_TYPE_END, 5173 }; 5174 } else { 5175 ext_actions[encap_idx] = (struct rte_flow_action){ 5176 .type = (enum rte_flow_action_type) 5177 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 5178 .conf = cp_mreg, 5179 }; 5180 memcpy(ext_actions + encap_idx + 1, actions + encap_idx, 5181 sizeof(*ext_actions) * (actions_n - encap_idx)); 5182 } 5183 return 0; 5184 } 5185 5186 /** 5187 * Check the match action from the action list. 5188 * 5189 * @param[in] actions 5190 * Pointer to the list of actions. 5191 * @param[in] attr 5192 * Flow rule attributes. 5193 * @param[in] action 5194 * The action to be check if exist. 5195 * @param[out] match_action_pos 5196 * Pointer to the position of the matched action if exists, otherwise is -1. 5197 * @param[out] qrss_action_pos 5198 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1. 5199 * @param[out] modify_after_mirror 5200 * Pointer to the flag of modify action after FDB mirroring. 5201 * 5202 * @return 5203 * > 0 the total number of actions. 5204 * 0 if not found match action in action list. 5205 */ 5206 static int 5207 flow_check_match_action(const struct rte_flow_action actions[], 5208 const struct rte_flow_attr *attr, 5209 enum rte_flow_action_type action, 5210 int *match_action_pos, int *qrss_action_pos, 5211 int *modify_after_mirror) 5212 { 5213 const struct rte_flow_action_sample *sample; 5214 int actions_n = 0; 5215 uint32_t ratio = 0; 5216 int sub_type = 0; 5217 int flag = 0; 5218 int fdb_mirror = 0; 5219 5220 *match_action_pos = -1; 5221 *qrss_action_pos = -1; 5222 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) { 5223 if (actions->type == action) { 5224 flag = 1; 5225 *match_action_pos = actions_n; 5226 } 5227 switch (actions->type) { 5228 case RTE_FLOW_ACTION_TYPE_QUEUE: 5229 case RTE_FLOW_ACTION_TYPE_RSS: 5230 *qrss_action_pos = actions_n; 5231 break; 5232 case RTE_FLOW_ACTION_TYPE_SAMPLE: 5233 sample = actions->conf; 5234 ratio = sample->ratio; 5235 sub_type = ((const struct rte_flow_action *) 5236 (sample->actions))->type; 5237 if (ratio == 1 && attr->transfer) 5238 fdb_mirror = 1; 5239 break; 5240 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC: 5241 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST: 5242 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC: 5243 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST: 5244 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC: 5245 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST: 5246 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC: 5247 case RTE_FLOW_ACTION_TYPE_SET_TP_DST: 5248 case RTE_FLOW_ACTION_TYPE_DEC_TTL: 5249 case RTE_FLOW_ACTION_TYPE_SET_TTL: 5250 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ: 5251 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ: 5252 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK: 5253 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK: 5254 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP: 5255 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP: 5256 case RTE_FLOW_ACTION_TYPE_FLAG: 5257 case RTE_FLOW_ACTION_TYPE_MARK: 5258 case RTE_FLOW_ACTION_TYPE_SET_META: 5259 case RTE_FLOW_ACTION_TYPE_SET_TAG: 5260 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN: 5261 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN: 5262 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID: 5263 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP: 5264 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP: 5265 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP: 5266 case RTE_FLOW_ACTION_TYPE_RAW_DECAP: 5267 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD: 5268 case RTE_FLOW_ACTION_TYPE_METER: 5269 if (fdb_mirror) 5270 *modify_after_mirror = 1; 5271 break; 5272 default: 5273 break; 5274 } 5275 actions_n++; 5276 } 5277 if (flag && fdb_mirror && !*modify_after_mirror) { 5278 /* FDB mirroring uses the destination array to implement 5279 * instead of FLOW_SAMPLER object. 5280 */ 5281 if (sub_type != RTE_FLOW_ACTION_TYPE_END) 5282 flag = 0; 5283 } 5284 /* Count RTE_FLOW_ACTION_TYPE_END. */ 5285 return flag ? actions_n + 1 : 0; 5286 } 5287 5288 #define SAMPLE_SUFFIX_ITEM 2 5289 5290 /** 5291 * Split the sample flow. 5292 * 5293 * As sample flow will split to two sub flow, sample flow with 5294 * sample action, the other actions will move to new suffix flow. 5295 * 5296 * Also add unique tag id with tag action in the sample flow, 5297 * the same tag id will be as match in the suffix flow. 5298 * 5299 * @param dev 5300 * Pointer to Ethernet device. 5301 * @param[in] add_tag 5302 * Add extra tag action flag. 5303 * @param[out] sfx_items 5304 * Suffix flow match items (list terminated by the END pattern item). 5305 * @param[in] actions 5306 * Associated actions (list terminated by the END action). 5307 * @param[out] actions_sfx 5308 * Suffix flow actions. 5309 * @param[out] actions_pre 5310 * Prefix flow actions. 5311 * @param[in] actions_n 5312 * The total number of actions. 5313 * @param[in] sample_action_pos 5314 * The sample action position. 5315 * @param[in] qrss_action_pos 5316 * The Queue/RSS action position. 5317 * @param[in] jump_table 5318 * Add extra jump action flag. 5319 * @param[out] error 5320 * Perform verbose error reporting if not NULL. 5321 * 5322 * @return 5323 * 0 on success, or unique flow_id, a negative errno value 5324 * otherwise and rte_errno is set. 5325 */ 5326 static int 5327 flow_sample_split_prep(struct rte_eth_dev *dev, 5328 int add_tag, 5329 struct rte_flow_item sfx_items[], 5330 const struct rte_flow_action actions[], 5331 struct rte_flow_action actions_sfx[], 5332 struct rte_flow_action actions_pre[], 5333 int actions_n, 5334 int sample_action_pos, 5335 int qrss_action_pos, 5336 int jump_table, 5337 struct rte_flow_error *error) 5338 { 5339 struct mlx5_priv *priv = dev->data->dev_private; 5340 struct mlx5_rte_flow_action_set_tag *set_tag; 5341 struct mlx5_rte_flow_item_tag *tag_spec; 5342 struct mlx5_rte_flow_item_tag *tag_mask; 5343 struct rte_flow_action_jump *jump_action; 5344 uint32_t tag_id = 0; 5345 int index; 5346 int append_index = 0; 5347 int ret; 5348 5349 if (sample_action_pos < 0) 5350 return rte_flow_error_set(error, EINVAL, 5351 RTE_FLOW_ERROR_TYPE_ACTION, 5352 NULL, "invalid position of sample " 5353 "action in list"); 5354 /* Prepare the actions for prefix and suffix flow. */ 5355 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) { 5356 index = qrss_action_pos; 5357 /* Put the preceding the Queue/RSS action into prefix flow. */ 5358 if (index != 0) 5359 memcpy(actions_pre, actions, 5360 sizeof(struct rte_flow_action) * index); 5361 /* Put others preceding the sample action into prefix flow. */ 5362 if (sample_action_pos > index + 1) 5363 memcpy(actions_pre + index, actions + index + 1, 5364 sizeof(struct rte_flow_action) * 5365 (sample_action_pos - index - 1)); 5366 index = sample_action_pos - 1; 5367 /* Put Queue/RSS action into Suffix flow. */ 5368 memcpy(actions_sfx, actions + qrss_action_pos, 5369 sizeof(struct rte_flow_action)); 5370 actions_sfx++; 5371 } else { 5372 index = sample_action_pos; 5373 if (index != 0) 5374 memcpy(actions_pre, actions, 5375 sizeof(struct rte_flow_action) * index); 5376 } 5377 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress. 5378 * For CX6DX and above, metadata registers Cx preserve their value, 5379 * add an extra tag action for NIC-RX and E-Switch Domain. 5380 */ 5381 if (add_tag) { 5382 /* Prepare the prefix tag action. */ 5383 append_index++; 5384 set_tag = (void *)(actions_pre + actions_n + append_index); 5385 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error); 5386 if (ret < 0) 5387 return ret; 5388 mlx5_ipool_malloc(priv->sh->ipool 5389 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id); 5390 *set_tag = (struct mlx5_rte_flow_action_set_tag) { 5391 .id = ret, 5392 .data = tag_id, 5393 }; 5394 /* Prepare the suffix subflow items. */ 5395 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM); 5396 tag_spec->data = tag_id; 5397 tag_spec->id = set_tag->id; 5398 tag_mask = tag_spec + 1; 5399 tag_mask->data = UINT32_MAX; 5400 sfx_items[0] = (struct rte_flow_item){ 5401 .type = (enum rte_flow_item_type) 5402 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5403 .spec = tag_spec, 5404 .last = NULL, 5405 .mask = tag_mask, 5406 }; 5407 sfx_items[1] = (struct rte_flow_item){ 5408 .type = (enum rte_flow_item_type) 5409 RTE_FLOW_ITEM_TYPE_END, 5410 }; 5411 /* Prepare the tag action in prefix subflow. */ 5412 actions_pre[index++] = 5413 (struct rte_flow_action){ 5414 .type = (enum rte_flow_action_type) 5415 MLX5_RTE_FLOW_ACTION_TYPE_TAG, 5416 .conf = set_tag, 5417 }; 5418 } 5419 memcpy(actions_pre + index, actions + sample_action_pos, 5420 sizeof(struct rte_flow_action)); 5421 index += 1; 5422 /* For the modify action after the sample action in E-Switch mirroring, 5423 * Add the extra jump action in prefix subflow and jump into the next 5424 * table, then do the modify action in the new table. 5425 */ 5426 if (jump_table) { 5427 /* Prepare the prefix jump action. */ 5428 append_index++; 5429 jump_action = (void *)(actions_pre + actions_n + append_index); 5430 jump_action->group = jump_table; 5431 actions_pre[index++] = 5432 (struct rte_flow_action){ 5433 .type = (enum rte_flow_action_type) 5434 RTE_FLOW_ACTION_TYPE_JUMP, 5435 .conf = jump_action, 5436 }; 5437 } 5438 actions_pre[index] = (struct rte_flow_action){ 5439 .type = (enum rte_flow_action_type) 5440 RTE_FLOW_ACTION_TYPE_END, 5441 }; 5442 /* Put the actions after sample into Suffix flow. */ 5443 memcpy(actions_sfx, actions + sample_action_pos + 1, 5444 sizeof(struct rte_flow_action) * 5445 (actions_n - sample_action_pos - 1)); 5446 return tag_id; 5447 } 5448 5449 /** 5450 * The splitting for metadata feature. 5451 * 5452 * - Q/RSS action on NIC Rx should be split in order to pass by 5453 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5454 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5455 * 5456 * - All the actions on NIC Tx should have a mreg copy action to 5457 * copy reg_a from WQE to reg_c[0]. 5458 * 5459 * @param dev 5460 * Pointer to Ethernet device. 5461 * @param[in] flow 5462 * Parent flow structure pointer. 5463 * @param[in] attr 5464 * Flow rule attributes. 5465 * @param[in] items 5466 * Pattern specification (list terminated by the END pattern item). 5467 * @param[in] actions 5468 * Associated actions (list terminated by the END action). 5469 * @param[in] flow_split_info 5470 * Pointer to flow split info structure. 5471 * @param[out] error 5472 * Perform verbose error reporting if not NULL. 5473 * @return 5474 * 0 on success, negative value otherwise 5475 */ 5476 static int 5477 flow_create_split_metadata(struct rte_eth_dev *dev, 5478 struct rte_flow *flow, 5479 const struct rte_flow_attr *attr, 5480 const struct rte_flow_item items[], 5481 const struct rte_flow_action actions[], 5482 struct mlx5_flow_split_info *flow_split_info, 5483 struct rte_flow_error *error) 5484 { 5485 struct mlx5_priv *priv = dev->data->dev_private; 5486 struct mlx5_dev_config *config = &priv->config; 5487 const struct rte_flow_action *qrss = NULL; 5488 struct rte_flow_action *ext_actions = NULL; 5489 struct mlx5_flow *dev_flow = NULL; 5490 uint32_t qrss_id = 0; 5491 int mtr_sfx = 0; 5492 size_t act_size; 5493 int actions_n; 5494 int encap_idx; 5495 int ret; 5496 5497 /* Check whether extensive metadata feature is engaged. */ 5498 if (!config->dv_flow_en || 5499 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || 5500 !mlx5_flow_ext_mreg_supported(dev)) 5501 return flow_create_split_inner(dev, flow, NULL, attr, items, 5502 actions, flow_split_info, error); 5503 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss, 5504 &encap_idx); 5505 if (qrss) { 5506 /* Exclude hairpin flows from splitting. */ 5507 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) { 5508 const struct rte_flow_action_queue *queue; 5509 5510 queue = qrss->conf; 5511 if (mlx5_rxq_get_type(dev, queue->index) == 5512 MLX5_RXQ_TYPE_HAIRPIN) 5513 qrss = NULL; 5514 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) { 5515 const struct rte_flow_action_rss *rss; 5516 5517 rss = qrss->conf; 5518 if (mlx5_rxq_get_type(dev, rss->queue[0]) == 5519 MLX5_RXQ_TYPE_HAIRPIN) 5520 qrss = NULL; 5521 } 5522 } 5523 if (qrss) { 5524 /* Check if it is in meter suffix table. */ 5525 mtr_sfx = attr->group == (attr->transfer ? 5526 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5527 MLX5_FLOW_TABLE_LEVEL_METER); 5528 /* 5529 * Q/RSS action on NIC Rx should be split in order to pass by 5530 * the mreg copy table (RX_CP_TBL) and then it jumps to the 5531 * action table (RX_ACT_TBL) which has the split Q/RSS action. 5532 */ 5533 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5534 sizeof(struct rte_flow_action_set_tag) + 5535 sizeof(struct rte_flow_action_jump); 5536 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5537 SOCKET_ID_ANY); 5538 if (!ext_actions) 5539 return rte_flow_error_set(error, ENOMEM, 5540 RTE_FLOW_ERROR_TYPE_ACTION, 5541 NULL, "no memory to split " 5542 "metadata flow"); 5543 /* 5544 * If we are the suffix flow of meter, tag already exist. 5545 * Set the tag action to void. 5546 */ 5547 if (mtr_sfx) 5548 ext_actions[qrss - actions].type = 5549 RTE_FLOW_ACTION_TYPE_VOID; 5550 else 5551 ext_actions[qrss - actions].type = 5552 (enum rte_flow_action_type) 5553 MLX5_RTE_FLOW_ACTION_TYPE_TAG; 5554 /* 5555 * Create the new actions list with removed Q/RSS action 5556 * and appended set tag and jump to register copy table 5557 * (RX_CP_TBL). We should preallocate unique tag ID here 5558 * in advance, because it is needed for set tag action. 5559 */ 5560 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions, 5561 qrss, actions_n, error); 5562 if (!mtr_sfx && !qrss_id) { 5563 ret = -rte_errno; 5564 goto exit; 5565 } 5566 } else if (attr->egress && !attr->transfer) { 5567 /* 5568 * All the actions on NIC Tx should have a metadata register 5569 * copy action to copy reg_a from WQE to reg_c[meta] 5570 */ 5571 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) + 5572 sizeof(struct mlx5_flow_action_copy_mreg); 5573 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0, 5574 SOCKET_ID_ANY); 5575 if (!ext_actions) 5576 return rte_flow_error_set(error, ENOMEM, 5577 RTE_FLOW_ERROR_TYPE_ACTION, 5578 NULL, "no memory to split " 5579 "metadata flow"); 5580 /* Create the action list appended with copy register. */ 5581 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions, 5582 actions_n, error, encap_idx); 5583 if (ret < 0) 5584 goto exit; 5585 } 5586 /* Add the unmodified original or prefix subflow. */ 5587 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 5588 items, ext_actions ? ext_actions : 5589 actions, flow_split_info, error); 5590 if (ret < 0) 5591 goto exit; 5592 MLX5_ASSERT(dev_flow); 5593 if (qrss) { 5594 const struct rte_flow_attr q_attr = { 5595 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 5596 .ingress = 1, 5597 }; 5598 /* Internal PMD action to set register. */ 5599 struct mlx5_rte_flow_item_tag q_tag_spec = { 5600 .data = qrss_id, 5601 .id = REG_NON, 5602 }; 5603 struct rte_flow_item q_items[] = { 5604 { 5605 .type = (enum rte_flow_item_type) 5606 MLX5_RTE_FLOW_ITEM_TYPE_TAG, 5607 .spec = &q_tag_spec, 5608 .last = NULL, 5609 .mask = NULL, 5610 }, 5611 { 5612 .type = RTE_FLOW_ITEM_TYPE_END, 5613 }, 5614 }; 5615 struct rte_flow_action q_actions[] = { 5616 { 5617 .type = qrss->type, 5618 .conf = qrss->conf, 5619 }, 5620 { 5621 .type = RTE_FLOW_ACTION_TYPE_END, 5622 }, 5623 }; 5624 uint64_t layers = flow_get_prefix_layer_flags(dev_flow); 5625 5626 /* 5627 * Configure the tag item only if there is no meter subflow. 5628 * Since tag is already marked in the meter suffix subflow 5629 * we can just use the meter suffix items as is. 5630 */ 5631 if (qrss_id) { 5632 /* Not meter subflow. */ 5633 MLX5_ASSERT(!mtr_sfx); 5634 /* 5635 * Put unique id in prefix flow due to it is destroyed 5636 * after suffix flow and id will be freed after there 5637 * is no actual flows with this id and identifier 5638 * reallocation becomes possible (for example, for 5639 * other flows in other threads). 5640 */ 5641 dev_flow->handle->split_flow_id = qrss_id; 5642 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, 5643 error); 5644 if (ret < 0) 5645 goto exit; 5646 q_tag_spec.id = ret; 5647 } 5648 dev_flow = NULL; 5649 /* Add suffix subflow to execute Q/RSS. */ 5650 flow_split_info->prefix_layers = layers; 5651 flow_split_info->prefix_mark = 0; 5652 ret = flow_create_split_inner(dev, flow, &dev_flow, 5653 &q_attr, mtr_sfx ? items : 5654 q_items, q_actions, 5655 flow_split_info, error); 5656 if (ret < 0) 5657 goto exit; 5658 /* qrss ID should be freed if failed. */ 5659 qrss_id = 0; 5660 MLX5_ASSERT(dev_flow); 5661 } 5662 5663 exit: 5664 /* 5665 * We do not destroy the partially created sub_flows in case of error. 5666 * These ones are included into parent flow list and will be destroyed 5667 * by flow_drv_destroy. 5668 */ 5669 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], 5670 qrss_id); 5671 mlx5_free(ext_actions); 5672 return ret; 5673 } 5674 5675 /** 5676 * Create meter internal drop flow with the original pattern. 5677 * 5678 * @param dev 5679 * Pointer to Ethernet device. 5680 * @param[in] flow 5681 * Parent flow structure pointer. 5682 * @param[in] attr 5683 * Flow rule attributes. 5684 * @param[in] items 5685 * Pattern specification (list terminated by the END pattern item). 5686 * @param[in] flow_split_info 5687 * Pointer to flow split info structure. 5688 * @param[in] fm 5689 * Pointer to flow meter structure. 5690 * @param[out] error 5691 * Perform verbose error reporting if not NULL. 5692 * @return 5693 * 0 on success, negative value otherwise 5694 */ 5695 static uint32_t 5696 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev, 5697 struct rte_flow *flow, 5698 const struct rte_flow_attr *attr, 5699 const struct rte_flow_item items[], 5700 struct mlx5_flow_split_info *flow_split_info, 5701 struct mlx5_flow_meter_info *fm, 5702 struct rte_flow_error *error) 5703 { 5704 struct mlx5_flow *dev_flow = NULL; 5705 struct rte_flow_attr drop_attr = *attr; 5706 struct rte_flow_action drop_actions[3]; 5707 struct mlx5_flow_split_info drop_split_info = *flow_split_info; 5708 5709 MLX5_ASSERT(fm->drop_cnt); 5710 drop_actions[0].type = 5711 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT; 5712 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt; 5713 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP; 5714 drop_actions[1].conf = NULL; 5715 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END; 5716 drop_actions[2].conf = NULL; 5717 drop_split_info.external = false; 5718 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT; 5719 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP; 5720 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER; 5721 return flow_create_split_inner(dev, flow, &dev_flow, 5722 &drop_attr, items, drop_actions, 5723 &drop_split_info, error); 5724 } 5725 5726 /** 5727 * The splitting for meter feature. 5728 * 5729 * - The meter flow will be split to two flows as prefix and 5730 * suffix flow. The packets make sense only it pass the prefix 5731 * meter action. 5732 * 5733 * - Reg_C_5 is used for the packet to match betweend prefix and 5734 * suffix flow. 5735 * 5736 * @param dev 5737 * Pointer to Ethernet device. 5738 * @param[in] flow 5739 * Parent flow structure pointer. 5740 * @param[in] attr 5741 * Flow rule attributes. 5742 * @param[in] items 5743 * Pattern specification (list terminated by the END pattern item). 5744 * @param[in] actions 5745 * Associated actions (list terminated by the END action). 5746 * @param[in] flow_split_info 5747 * Pointer to flow split info structure. 5748 * @param[out] error 5749 * Perform verbose error reporting if not NULL. 5750 * @return 5751 * 0 on success, negative value otherwise 5752 */ 5753 static int 5754 flow_create_split_meter(struct rte_eth_dev *dev, 5755 struct rte_flow *flow, 5756 const struct rte_flow_attr *attr, 5757 const struct rte_flow_item items[], 5758 const struct rte_flow_action actions[], 5759 struct mlx5_flow_split_info *flow_split_info, 5760 struct rte_flow_error *error) 5761 { 5762 struct mlx5_priv *priv = dev->data->dev_private; 5763 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace(); 5764 struct rte_flow_action *sfx_actions = NULL; 5765 struct rte_flow_action *pre_actions = NULL; 5766 struct rte_flow_item *sfx_items = NULL; 5767 struct mlx5_flow *dev_flow = NULL; 5768 struct rte_flow_attr sfx_attr = *attr; 5769 struct mlx5_flow_meter_info *fm = NULL; 5770 uint8_t skip_scale_restore; 5771 bool has_mtr = false; 5772 bool has_modify = false; 5773 bool set_mtr_reg = true; 5774 bool is_mtr_hierarchy = false; 5775 uint32_t meter_id = 0; 5776 uint32_t mtr_idx = 0; 5777 uint32_t mtr_flow_id = 0; 5778 size_t act_size; 5779 size_t item_size; 5780 int actions_n = 0; 5781 int ret = 0; 5782 5783 if (priv->mtr_en) 5784 actions_n = flow_check_meter_action(dev, actions, &has_mtr, 5785 &has_modify, &meter_id); 5786 if (has_mtr) { 5787 if (flow->meter) { 5788 fm = flow_dv_meter_find_by_idx(priv, flow->meter); 5789 if (!fm) 5790 return rte_flow_error_set(error, EINVAL, 5791 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5792 NULL, "Meter not found."); 5793 } else { 5794 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx); 5795 if (!fm) 5796 return rte_flow_error_set(error, EINVAL, 5797 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 5798 NULL, "Meter not found."); 5799 ret = mlx5_flow_meter_attach(priv, fm, 5800 &sfx_attr, error); 5801 if (ret) 5802 return -rte_errno; 5803 flow->meter = mtr_idx; 5804 } 5805 MLX5_ASSERT(wks); 5806 wks->fm = fm; 5807 if (!fm->def_policy) { 5808 wks->policy = mlx5_flow_meter_policy_find(dev, 5809 fm->policy_id, 5810 NULL); 5811 MLX5_ASSERT(wks->policy); 5812 if (wks->policy->is_hierarchy) { 5813 wks->final_policy = 5814 mlx5_flow_meter_hierarchy_get_final_policy(dev, 5815 wks->policy); 5816 if (!wks->final_policy) 5817 return rte_flow_error_set(error, 5818 EINVAL, 5819 RTE_FLOW_ERROR_TYPE_ACTION, NULL, 5820 "Failed to find terminal policy of hierarchy."); 5821 is_mtr_hierarchy = true; 5822 } 5823 } 5824 /* 5825 * If it isn't default-policy Meter, and 5826 * 1. There's no action in flow to change 5827 * packet (modify/encap/decap etc.), OR 5828 * 2. No drop count needed for this meter. 5829 * 3. It's not meter hierarchy. 5830 * Then no need to use regC to save meter id anymore. 5831 */ 5832 if (!fm->def_policy && !is_mtr_hierarchy && 5833 (!has_modify || !fm->drop_cnt)) 5834 set_mtr_reg = false; 5835 /* Prefix actions: meter, decap, encap, tag, jump, end. */ 5836 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) + 5837 sizeof(struct mlx5_rte_flow_action_set_tag); 5838 /* Suffix items: tag, vlan, port id, end. */ 5839 #define METER_SUFFIX_ITEM 4 5840 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM + 5841 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5842 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size), 5843 0, SOCKET_ID_ANY); 5844 if (!sfx_actions) 5845 return rte_flow_error_set(error, ENOMEM, 5846 RTE_FLOW_ERROR_TYPE_ACTION, 5847 NULL, "no memory to split " 5848 "meter flow"); 5849 sfx_items = (struct rte_flow_item *)((char *)sfx_actions + 5850 act_size); 5851 /* There's no suffix flow for meter of non-default policy. */ 5852 if (!fm->def_policy) 5853 pre_actions = sfx_actions + 1; 5854 else 5855 pre_actions = sfx_actions + actions_n; 5856 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr, 5857 items, sfx_items, actions, 5858 sfx_actions, pre_actions, 5859 (set_mtr_reg ? &mtr_flow_id : NULL), 5860 error); 5861 if (ret) { 5862 ret = -rte_errno; 5863 goto exit; 5864 } 5865 /* Add the prefix subflow. */ 5866 flow_split_info->prefix_mark = 0; 5867 skip_scale_restore = flow_split_info->skip_scale; 5868 flow_split_info->skip_scale |= 5869 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 5870 ret = flow_create_split_inner(dev, flow, &dev_flow, 5871 attr, items, pre_actions, 5872 flow_split_info, error); 5873 flow_split_info->skip_scale = skip_scale_restore; 5874 if (ret) { 5875 if (mtr_flow_id) 5876 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id); 5877 ret = -rte_errno; 5878 goto exit; 5879 } 5880 if (mtr_flow_id) { 5881 dev_flow->handle->split_flow_id = mtr_flow_id; 5882 dev_flow->handle->is_meter_flow_id = 1; 5883 } 5884 if (!fm->def_policy) { 5885 if (!set_mtr_reg && fm->drop_cnt) 5886 ret = 5887 flow_meter_create_drop_flow_with_org_pattern(dev, flow, 5888 &sfx_attr, items, 5889 flow_split_info, 5890 fm, error); 5891 goto exit; 5892 } 5893 /* Setting the sfx group atrr. */ 5894 sfx_attr.group = sfx_attr.transfer ? 5895 (MLX5_FLOW_TABLE_LEVEL_METER - 1) : 5896 MLX5_FLOW_TABLE_LEVEL_METER; 5897 flow_split_info->prefix_layers = 5898 flow_get_prefix_layer_flags(dev_flow); 5899 flow_split_info->prefix_mark = dev_flow->handle->mark; 5900 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX; 5901 } 5902 /* Add the prefix subflow. */ 5903 ret = flow_create_split_metadata(dev, flow, 5904 &sfx_attr, sfx_items ? 5905 sfx_items : items, 5906 sfx_actions ? sfx_actions : actions, 5907 flow_split_info, error); 5908 exit: 5909 if (sfx_actions) 5910 mlx5_free(sfx_actions); 5911 return ret; 5912 } 5913 5914 /** 5915 * The splitting for sample feature. 5916 * 5917 * Once Sample action is detected in the action list, the flow actions should 5918 * be split into prefix sub flow and suffix sub flow. 5919 * 5920 * The original items remain in the prefix sub flow, all actions preceding the 5921 * sample action and the sample action itself will be copied to the prefix 5922 * sub flow, the actions following the sample action will be copied to the 5923 * suffix sub flow, Queue action always be located in the suffix sub flow. 5924 * 5925 * In order to make the packet from prefix sub flow matches with suffix sub 5926 * flow, an extra tag action be added into prefix sub flow, and the suffix sub 5927 * flow uses tag item with the unique flow id. 5928 * 5929 * @param dev 5930 * Pointer to Ethernet device. 5931 * @param[in] flow 5932 * Parent flow structure pointer. 5933 * @param[in] attr 5934 * Flow rule attributes. 5935 * @param[in] items 5936 * Pattern specification (list terminated by the END pattern item). 5937 * @param[in] actions 5938 * Associated actions (list terminated by the END action). 5939 * @param[in] flow_split_info 5940 * Pointer to flow split info structure. 5941 * @param[out] error 5942 * Perform verbose error reporting if not NULL. 5943 * @return 5944 * 0 on success, negative value otherwise 5945 */ 5946 static int 5947 flow_create_split_sample(struct rte_eth_dev *dev, 5948 struct rte_flow *flow, 5949 const struct rte_flow_attr *attr, 5950 const struct rte_flow_item items[], 5951 const struct rte_flow_action actions[], 5952 struct mlx5_flow_split_info *flow_split_info, 5953 struct rte_flow_error *error) 5954 { 5955 struct mlx5_priv *priv = dev->data->dev_private; 5956 struct rte_flow_action *sfx_actions = NULL; 5957 struct rte_flow_action *pre_actions = NULL; 5958 struct rte_flow_item *sfx_items = NULL; 5959 struct mlx5_flow *dev_flow = NULL; 5960 struct rte_flow_attr sfx_attr = *attr; 5961 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 5962 struct mlx5_flow_dv_sample_resource *sample_res; 5963 struct mlx5_flow_tbl_data_entry *sfx_tbl_data; 5964 struct mlx5_flow_tbl_resource *sfx_tbl; 5965 #endif 5966 size_t act_size; 5967 size_t item_size; 5968 uint32_t fdb_tx = 0; 5969 int32_t tag_id = 0; 5970 int actions_n = 0; 5971 int sample_action_pos; 5972 int qrss_action_pos; 5973 int add_tag = 0; 5974 int modify_after_mirror = 0; 5975 uint16_t jump_table = 0; 5976 const uint32_t next_ft_step = 1; 5977 int ret = 0; 5978 5979 if (priv->sampler_en) 5980 actions_n = flow_check_match_action(actions, attr, 5981 RTE_FLOW_ACTION_TYPE_SAMPLE, 5982 &sample_action_pos, &qrss_action_pos, 5983 &modify_after_mirror); 5984 if (actions_n) { 5985 /* The prefix actions must includes sample, tag, end. */ 5986 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1) 5987 + sizeof(struct mlx5_rte_flow_action_set_tag); 5988 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM + 5989 sizeof(struct mlx5_rte_flow_item_tag) * 2; 5990 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + 5991 item_size), 0, SOCKET_ID_ANY); 5992 if (!sfx_actions) 5993 return rte_flow_error_set(error, ENOMEM, 5994 RTE_FLOW_ERROR_TYPE_ACTION, 5995 NULL, "no memory to split " 5996 "sample flow"); 5997 /* The representor_id is UINT16_MAX for uplink. */ 5998 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX); 5999 /* 6000 * When reg_c_preserve is set, metadata registers Cx preserve 6001 * their value even through packet duplication. 6002 */ 6003 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve); 6004 if (add_tag) 6005 sfx_items = (struct rte_flow_item *)((char *)sfx_actions 6006 + act_size); 6007 if (modify_after_mirror) 6008 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR + 6009 next_ft_step; 6010 pre_actions = sfx_actions + actions_n; 6011 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items, 6012 actions, sfx_actions, 6013 pre_actions, actions_n, 6014 sample_action_pos, 6015 qrss_action_pos, jump_table, 6016 error); 6017 if (tag_id < 0 || (add_tag && !tag_id)) { 6018 ret = -rte_errno; 6019 goto exit; 6020 } 6021 if (modify_after_mirror) 6022 flow_split_info->skip_scale = 6023 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT; 6024 /* Add the prefix subflow. */ 6025 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, 6026 items, pre_actions, 6027 flow_split_info, error); 6028 if (ret) { 6029 ret = -rte_errno; 6030 goto exit; 6031 } 6032 dev_flow->handle->split_flow_id = tag_id; 6033 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 6034 if (!modify_after_mirror) { 6035 /* Set the sfx group attr. */ 6036 sample_res = (struct mlx5_flow_dv_sample_resource *) 6037 dev_flow->dv.sample_res; 6038 sfx_tbl = (struct mlx5_flow_tbl_resource *) 6039 sample_res->normal_path_tbl; 6040 sfx_tbl_data = container_of(sfx_tbl, 6041 struct mlx5_flow_tbl_data_entry, 6042 tbl); 6043 sfx_attr.group = sfx_attr.transfer ? 6044 (sfx_tbl_data->level - 1) : sfx_tbl_data->level; 6045 } else { 6046 MLX5_ASSERT(attr->transfer); 6047 sfx_attr.group = jump_table; 6048 } 6049 flow_split_info->prefix_layers = 6050 flow_get_prefix_layer_flags(dev_flow); 6051 flow_split_info->prefix_mark = dev_flow->handle->mark; 6052 /* Suffix group level already be scaled with factor, set 6053 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale 6054 * again in translation. 6055 */ 6056 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT; 6057 #endif 6058 } 6059 /* Add the suffix subflow. */ 6060 ret = flow_create_split_meter(dev, flow, &sfx_attr, 6061 sfx_items ? sfx_items : items, 6062 sfx_actions ? sfx_actions : actions, 6063 flow_split_info, error); 6064 exit: 6065 if (sfx_actions) 6066 mlx5_free(sfx_actions); 6067 return ret; 6068 } 6069 6070 /** 6071 * Split the flow to subflow set. The splitters might be linked 6072 * in the chain, like this: 6073 * flow_create_split_outer() calls: 6074 * flow_create_split_meter() calls: 6075 * flow_create_split_metadata(meter_subflow_0) calls: 6076 * flow_create_split_inner(metadata_subflow_0) 6077 * flow_create_split_inner(metadata_subflow_1) 6078 * flow_create_split_inner(metadata_subflow_2) 6079 * flow_create_split_metadata(meter_subflow_1) calls: 6080 * flow_create_split_inner(metadata_subflow_0) 6081 * flow_create_split_inner(metadata_subflow_1) 6082 * flow_create_split_inner(metadata_subflow_2) 6083 * 6084 * This provide flexible way to add new levels of flow splitting. 6085 * The all of successfully created subflows are included to the 6086 * parent flow dev_flow list. 6087 * 6088 * @param dev 6089 * Pointer to Ethernet device. 6090 * @param[in] flow 6091 * Parent flow structure pointer. 6092 * @param[in] attr 6093 * Flow rule attributes. 6094 * @param[in] items 6095 * Pattern specification (list terminated by the END pattern item). 6096 * @param[in] actions 6097 * Associated actions (list terminated by the END action). 6098 * @param[in] flow_split_info 6099 * Pointer to flow split info structure. 6100 * @param[out] error 6101 * Perform verbose error reporting if not NULL. 6102 * @return 6103 * 0 on success, negative value otherwise 6104 */ 6105 static int 6106 flow_create_split_outer(struct rte_eth_dev *dev, 6107 struct rte_flow *flow, 6108 const struct rte_flow_attr *attr, 6109 const struct rte_flow_item items[], 6110 const struct rte_flow_action actions[], 6111 struct mlx5_flow_split_info *flow_split_info, 6112 struct rte_flow_error *error) 6113 { 6114 int ret; 6115 6116 ret = flow_create_split_sample(dev, flow, attr, items, 6117 actions, flow_split_info, error); 6118 MLX5_ASSERT(ret <= 0); 6119 return ret; 6120 } 6121 6122 static inline struct mlx5_flow_tunnel * 6123 flow_tunnel_from_rule(const struct mlx5_flow *flow) 6124 { 6125 struct mlx5_flow_tunnel *tunnel; 6126 6127 #pragma GCC diagnostic push 6128 #pragma GCC diagnostic ignored "-Wcast-qual" 6129 tunnel = (typeof(tunnel))flow->tunnel; 6130 #pragma GCC diagnostic pop 6131 6132 return tunnel; 6133 } 6134 6135 /** 6136 * Adjust flow RSS workspace if needed. 6137 * 6138 * @param wks 6139 * Pointer to thread flow work space. 6140 * @param rss_desc 6141 * Pointer to RSS descriptor. 6142 * @param[in] nrssq_num 6143 * New RSS queue number. 6144 * 6145 * @return 6146 * 0 on success, -1 otherwise and rte_errno is set. 6147 */ 6148 static int 6149 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks, 6150 struct mlx5_flow_rss_desc *rss_desc, 6151 uint32_t nrssq_num) 6152 { 6153 if (likely(nrssq_num <= wks->rssq_num)) 6154 return 0; 6155 rss_desc->queue = realloc(rss_desc->queue, 6156 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2)); 6157 if (!rss_desc->queue) { 6158 rte_errno = ENOMEM; 6159 return -1; 6160 } 6161 wks->rssq_num = RTE_ALIGN(nrssq_num, 2); 6162 return 0; 6163 } 6164 6165 /** 6166 * Create a flow and add it to @p list. 6167 * 6168 * @param dev 6169 * Pointer to Ethernet device. 6170 * @param list 6171 * Pointer to a TAILQ flow list. If this parameter NULL, 6172 * no list insertion occurred, flow is just created, 6173 * this is caller's responsibility to track the 6174 * created flow. 6175 * @param[in] attr 6176 * Flow rule attributes. 6177 * @param[in] items 6178 * Pattern specification (list terminated by the END pattern item). 6179 * @param[in] actions 6180 * Associated actions (list terminated by the END action). 6181 * @param[in] external 6182 * This flow rule is created by request external to PMD. 6183 * @param[out] error 6184 * Perform verbose error reporting if not NULL. 6185 * 6186 * @return 6187 * A flow index on success, 0 otherwise and rte_errno is set. 6188 */ 6189 static uint32_t 6190 flow_list_create(struct rte_eth_dev *dev, uint32_t *list, 6191 const struct rte_flow_attr *attr, 6192 const struct rte_flow_item items[], 6193 const struct rte_flow_action original_actions[], 6194 bool external, struct rte_flow_error *error) 6195 { 6196 struct mlx5_priv *priv = dev->data->dev_private; 6197 struct rte_flow *flow = NULL; 6198 struct mlx5_flow *dev_flow; 6199 const struct rte_flow_action_rss *rss = NULL; 6200 struct mlx5_translated_action_handle 6201 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6202 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6203 union { 6204 struct mlx5_flow_expand_rss buf; 6205 uint8_t buffer[2048]; 6206 } expand_buffer; 6207 union { 6208 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6209 uint8_t buffer[2048]; 6210 } actions_rx; 6211 union { 6212 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS]; 6213 uint8_t buffer[2048]; 6214 } actions_hairpin_tx; 6215 union { 6216 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS]; 6217 uint8_t buffer[2048]; 6218 } items_tx; 6219 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf; 6220 struct mlx5_flow_rss_desc *rss_desc; 6221 const struct rte_flow_action *p_actions_rx; 6222 uint32_t i; 6223 uint32_t idx = 0; 6224 int hairpin_flow; 6225 struct rte_flow_attr attr_tx = { .priority = 0 }; 6226 const struct rte_flow_action *actions; 6227 struct rte_flow_action *translated_actions = NULL; 6228 struct mlx5_flow_tunnel *tunnel; 6229 struct tunnel_default_miss_ctx default_miss_ctx = { 0, }; 6230 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace(); 6231 struct mlx5_flow_split_info flow_split_info = { 6232 .external = !!external, 6233 .skip_scale = 0, 6234 .flow_idx = 0, 6235 .prefix_mark = 0, 6236 .prefix_layers = 0, 6237 .table_id = 0 6238 }; 6239 int ret; 6240 6241 MLX5_ASSERT(wks); 6242 rss_desc = &wks->rss_desc; 6243 ret = flow_action_handles_translate(dev, original_actions, 6244 indir_actions, 6245 &indir_actions_n, 6246 &translated_actions, error); 6247 if (ret < 0) { 6248 MLX5_ASSERT(translated_actions == NULL); 6249 return 0; 6250 } 6251 actions = translated_actions ? translated_actions : original_actions; 6252 p_actions_rx = actions; 6253 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6254 ret = flow_drv_validate(dev, attr, items, p_actions_rx, 6255 external, hairpin_flow, error); 6256 if (ret < 0) 6257 goto error_before_hairpin_split; 6258 flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx); 6259 if (!flow) { 6260 rte_errno = ENOMEM; 6261 goto error_before_hairpin_split; 6262 } 6263 if (hairpin_flow > 0) { 6264 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) { 6265 rte_errno = EINVAL; 6266 goto error_before_hairpin_split; 6267 } 6268 flow_hairpin_split(dev, actions, actions_rx.actions, 6269 actions_hairpin_tx.actions, items_tx.items, 6270 idx); 6271 p_actions_rx = actions_rx.actions; 6272 } 6273 flow_split_info.flow_idx = idx; 6274 flow->drv_type = flow_get_drv_type(dev, attr); 6275 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN && 6276 flow->drv_type < MLX5_FLOW_TYPE_MAX); 6277 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue)); 6278 /* RSS Action only works on NIC RX domain */ 6279 if (attr->ingress && !attr->transfer) 6280 rss = flow_get_rss_action(dev, p_actions_rx); 6281 if (rss) { 6282 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num)) 6283 return 0; 6284 /* 6285 * The following information is required by 6286 * mlx5_flow_hashfields_adjust() in advance. 6287 */ 6288 rss_desc->level = rss->level; 6289 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */ 6290 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types; 6291 } 6292 flow->dev_handles = 0; 6293 if (rss && rss->types) { 6294 unsigned int graph_root; 6295 6296 graph_root = find_graph_root(items, rss->level); 6297 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer), 6298 items, rss->types, 6299 mlx5_support_expansion, graph_root); 6300 MLX5_ASSERT(ret > 0 && 6301 (unsigned int)ret < sizeof(expand_buffer.buffer)); 6302 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) { 6303 for (i = 0; i < buf->entries; ++i) 6304 mlx5_dbg__print_pattern(buf->entry[i].pattern); 6305 } 6306 } else { 6307 buf->entries = 1; 6308 buf->entry[0].pattern = (void *)(uintptr_t)items; 6309 } 6310 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions, 6311 indir_actions_n); 6312 for (i = 0; i < buf->entries; ++i) { 6313 /* Initialize flow split data. */ 6314 flow_split_info.prefix_layers = 0; 6315 flow_split_info.prefix_mark = 0; 6316 flow_split_info.skip_scale = 0; 6317 /* 6318 * The splitter may create multiple dev_flows, 6319 * depending on configuration. In the simplest 6320 * case it just creates unmodified original flow. 6321 */ 6322 ret = flow_create_split_outer(dev, flow, attr, 6323 buf->entry[i].pattern, 6324 p_actions_rx, &flow_split_info, 6325 error); 6326 if (ret < 0) 6327 goto error; 6328 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) { 6329 ret = flow_tunnel_add_default_miss(dev, flow, attr, 6330 p_actions_rx, 6331 idx, 6332 wks->flows[0].tunnel, 6333 &default_miss_ctx, 6334 error); 6335 if (ret < 0) { 6336 mlx5_free(default_miss_ctx.queue); 6337 goto error; 6338 } 6339 } 6340 } 6341 /* Create the tx flow. */ 6342 if (hairpin_flow) { 6343 attr_tx.group = MLX5_HAIRPIN_TX_TABLE; 6344 attr_tx.ingress = 0; 6345 attr_tx.egress = 1; 6346 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items, 6347 actions_hairpin_tx.actions, 6348 idx, error); 6349 if (!dev_flow) 6350 goto error; 6351 dev_flow->flow = flow; 6352 dev_flow->external = 0; 6353 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 6354 dev_flow->handle, next); 6355 ret = flow_drv_translate(dev, dev_flow, &attr_tx, 6356 items_tx.items, 6357 actions_hairpin_tx.actions, error); 6358 if (ret < 0) 6359 goto error; 6360 } 6361 /* 6362 * Update the metadata register copy table. If extensive 6363 * metadata feature is enabled and registers are supported 6364 * we might create the extra rte_flow for each unique 6365 * MARK/FLAG action ID. 6366 * 6367 * The table is updated for ingress Flows only, because 6368 * the egress Flows belong to the different device and 6369 * copy table should be updated in peer NIC Rx domain. 6370 */ 6371 if (attr->ingress && 6372 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) { 6373 ret = flow_mreg_update_copy_table(dev, flow, actions, error); 6374 if (ret) 6375 goto error; 6376 } 6377 /* 6378 * If the flow is external (from application) OR device is started, 6379 * OR mreg discover, then apply immediately. 6380 */ 6381 if (external || dev->data->dev_started || 6382 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP && 6383 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) { 6384 ret = flow_drv_apply(dev, flow, error); 6385 if (ret < 0) 6386 goto error; 6387 } 6388 if (list) { 6389 rte_spinlock_lock(&priv->flow_list_lock); 6390 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx, 6391 flow, next); 6392 rte_spinlock_unlock(&priv->flow_list_lock); 6393 } 6394 flow_rxq_flags_set(dev, flow); 6395 rte_free(translated_actions); 6396 tunnel = flow_tunnel_from_rule(wks->flows); 6397 if (tunnel) { 6398 flow->tunnel = 1; 6399 flow->tunnel_id = tunnel->tunnel_id; 6400 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED); 6401 mlx5_free(default_miss_ctx.queue); 6402 } 6403 mlx5_flow_pop_thread_workspace(); 6404 return idx; 6405 error: 6406 MLX5_ASSERT(flow); 6407 ret = rte_errno; /* Save rte_errno before cleanup. */ 6408 flow_mreg_del_copy_action(dev, flow); 6409 flow_drv_destroy(dev, flow); 6410 if (rss_desc->shared_rss) 6411 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *) 6412 mlx5_ipool_get 6413 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 6414 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED); 6415 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx); 6416 rte_errno = ret; /* Restore rte_errno. */ 6417 ret = rte_errno; 6418 rte_errno = ret; 6419 mlx5_flow_pop_thread_workspace(); 6420 error_before_hairpin_split: 6421 rte_free(translated_actions); 6422 return 0; 6423 } 6424 6425 /** 6426 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all 6427 * incoming packets to table 1. 6428 * 6429 * Other flow rules, requested for group n, will be created in 6430 * e-switch table n+1. 6431 * Jump action to e-switch group n will be created to group n+1. 6432 * 6433 * Used when working in switchdev mode, to utilise advantages of table 1 6434 * and above. 6435 * 6436 * @param dev 6437 * Pointer to Ethernet device. 6438 * 6439 * @return 6440 * Pointer to flow on success, NULL otherwise and rte_errno is set. 6441 */ 6442 struct rte_flow * 6443 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev) 6444 { 6445 const struct rte_flow_attr attr = { 6446 .group = 0, 6447 .priority = 0, 6448 .ingress = 1, 6449 .egress = 0, 6450 .transfer = 1, 6451 }; 6452 const struct rte_flow_item pattern = { 6453 .type = RTE_FLOW_ITEM_TYPE_END, 6454 }; 6455 struct rte_flow_action_jump jump = { 6456 .group = 1, 6457 }; 6458 const struct rte_flow_action actions[] = { 6459 { 6460 .type = RTE_FLOW_ACTION_TYPE_JUMP, 6461 .conf = &jump, 6462 }, 6463 { 6464 .type = RTE_FLOW_ACTION_TYPE_END, 6465 }, 6466 }; 6467 struct mlx5_priv *priv = dev->data->dev_private; 6468 struct rte_flow_error error; 6469 6470 return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows, 6471 &attr, &pattern, 6472 actions, false, &error); 6473 } 6474 6475 /** 6476 * Validate a flow supported by the NIC. 6477 * 6478 * @see rte_flow_validate() 6479 * @see rte_flow_ops 6480 */ 6481 int 6482 mlx5_flow_validate(struct rte_eth_dev *dev, 6483 const struct rte_flow_attr *attr, 6484 const struct rte_flow_item items[], 6485 const struct rte_flow_action original_actions[], 6486 struct rte_flow_error *error) 6487 { 6488 int hairpin_flow; 6489 struct mlx5_translated_action_handle 6490 indir_actions[MLX5_MAX_INDIRECT_ACTIONS]; 6491 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS; 6492 const struct rte_flow_action *actions; 6493 struct rte_flow_action *translated_actions = NULL; 6494 int ret = flow_action_handles_translate(dev, original_actions, 6495 indir_actions, 6496 &indir_actions_n, 6497 &translated_actions, error); 6498 6499 if (ret) 6500 return ret; 6501 actions = translated_actions ? translated_actions : original_actions; 6502 hairpin_flow = flow_check_hairpin_split(dev, attr, actions); 6503 ret = flow_drv_validate(dev, attr, items, actions, 6504 true, hairpin_flow, error); 6505 rte_free(translated_actions); 6506 return ret; 6507 } 6508 6509 /** 6510 * Create a flow. 6511 * 6512 * @see rte_flow_create() 6513 * @see rte_flow_ops 6514 */ 6515 struct rte_flow * 6516 mlx5_flow_create(struct rte_eth_dev *dev, 6517 const struct rte_flow_attr *attr, 6518 const struct rte_flow_item items[], 6519 const struct rte_flow_action actions[], 6520 struct rte_flow_error *error) 6521 { 6522 struct mlx5_priv *priv = dev->data->dev_private; 6523 6524 /* 6525 * If the device is not started yet, it is not allowed to created a 6526 * flow from application. PMD default flows and traffic control flows 6527 * are not affected. 6528 */ 6529 if (unlikely(!dev->data->dev_started)) { 6530 DRV_LOG(DEBUG, "port %u is not started when " 6531 "inserting a flow", dev->data->port_id); 6532 rte_flow_error_set(error, ENODEV, 6533 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 6534 NULL, 6535 "port not started"); 6536 return NULL; 6537 } 6538 6539 return (void *)(uintptr_t)flow_list_create(dev, &priv->flows, 6540 attr, items, actions, true, error); 6541 } 6542 6543 /** 6544 * Destroy a flow in a list. 6545 * 6546 * @param dev 6547 * Pointer to Ethernet device. 6548 * @param list 6549 * Pointer to the Indexed flow list. If this parameter NULL, 6550 * there is no flow removal from the list. Be noted that as 6551 * flow is add to the indexed list, memory of the indexed 6552 * list points to maybe changed as flow destroyed. 6553 * @param[in] flow_idx 6554 * Index of flow to destroy. 6555 */ 6556 static void 6557 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list, 6558 uint32_t flow_idx) 6559 { 6560 struct mlx5_priv *priv = dev->data->dev_private; 6561 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 6562 [MLX5_IPOOL_RTE_FLOW], flow_idx); 6563 6564 if (!flow) 6565 return; 6566 /* 6567 * Update RX queue flags only if port is started, otherwise it is 6568 * already clean. 6569 */ 6570 if (dev->data->dev_started) 6571 flow_rxq_flags_trim(dev, flow); 6572 flow_drv_destroy(dev, flow); 6573 if (list) { 6574 rte_spinlock_lock(&priv->flow_list_lock); 6575 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, 6576 flow_idx, flow, next); 6577 rte_spinlock_unlock(&priv->flow_list_lock); 6578 } 6579 if (flow->tunnel) { 6580 struct mlx5_flow_tunnel *tunnel; 6581 6582 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id); 6583 RTE_VERIFY(tunnel); 6584 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 6585 mlx5_flow_tunnel_free(dev, tunnel); 6586 } 6587 flow_mreg_del_copy_action(dev, flow); 6588 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx); 6589 } 6590 6591 /** 6592 * Destroy all flows. 6593 * 6594 * @param dev 6595 * Pointer to Ethernet device. 6596 * @param list 6597 * Pointer to the Indexed flow list. 6598 * @param active 6599 * If flushing is called avtively. 6600 */ 6601 void 6602 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active) 6603 { 6604 uint32_t num_flushed = 0; 6605 6606 while (*list) { 6607 flow_list_destroy(dev, list, *list); 6608 num_flushed++; 6609 } 6610 if (active) { 6611 DRV_LOG(INFO, "port %u: %u flows flushed before stopping", 6612 dev->data->port_id, num_flushed); 6613 } 6614 } 6615 6616 /** 6617 * Stop all default actions for flows. 6618 * 6619 * @param dev 6620 * Pointer to Ethernet device. 6621 */ 6622 void 6623 mlx5_flow_stop_default(struct rte_eth_dev *dev) 6624 { 6625 flow_mreg_del_default_copy_action(dev); 6626 flow_rxq_flags_clear(dev); 6627 } 6628 6629 /** 6630 * Start all default actions for flows. 6631 * 6632 * @param dev 6633 * Pointer to Ethernet device. 6634 * @return 6635 * 0 on success, a negative errno value otherwise and rte_errno is set. 6636 */ 6637 int 6638 mlx5_flow_start_default(struct rte_eth_dev *dev) 6639 { 6640 struct rte_flow_error error; 6641 6642 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */ 6643 return flow_mreg_add_default_copy_action(dev, &error); 6644 } 6645 6646 /** 6647 * Release key of thread specific flow workspace data. 6648 */ 6649 void 6650 flow_release_workspace(void *data) 6651 { 6652 struct mlx5_flow_workspace *wks = data; 6653 struct mlx5_flow_workspace *next; 6654 6655 while (wks) { 6656 next = wks->next; 6657 free(wks->rss_desc.queue); 6658 free(wks); 6659 wks = next; 6660 } 6661 } 6662 6663 /** 6664 * Get thread specific current flow workspace. 6665 * 6666 * @return pointer to thread specific flow workspace data, NULL on error. 6667 */ 6668 struct mlx5_flow_workspace* 6669 mlx5_flow_get_thread_workspace(void) 6670 { 6671 struct mlx5_flow_workspace *data; 6672 6673 data = mlx5_flow_os_get_specific_workspace(); 6674 MLX5_ASSERT(data && data->inuse); 6675 if (!data || !data->inuse) 6676 DRV_LOG(ERR, "flow workspace not initialized."); 6677 return data; 6678 } 6679 6680 /** 6681 * Allocate and init new flow workspace. 6682 * 6683 * @return pointer to flow workspace data, NULL on error. 6684 */ 6685 static struct mlx5_flow_workspace* 6686 flow_alloc_thread_workspace(void) 6687 { 6688 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data)); 6689 6690 if (!data) { 6691 DRV_LOG(ERR, "Failed to allocate flow workspace " 6692 "memory."); 6693 return NULL; 6694 } 6695 data->rss_desc.queue = calloc(1, 6696 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM); 6697 if (!data->rss_desc.queue) 6698 goto err; 6699 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM; 6700 return data; 6701 err: 6702 if (data->rss_desc.queue) 6703 free(data->rss_desc.queue); 6704 free(data); 6705 return NULL; 6706 } 6707 6708 /** 6709 * Get new thread specific flow workspace. 6710 * 6711 * If current workspace inuse, create new one and set as current. 6712 * 6713 * @return pointer to thread specific flow workspace data, NULL on error. 6714 */ 6715 static struct mlx5_flow_workspace* 6716 mlx5_flow_push_thread_workspace(void) 6717 { 6718 struct mlx5_flow_workspace *curr; 6719 struct mlx5_flow_workspace *data; 6720 6721 curr = mlx5_flow_os_get_specific_workspace(); 6722 if (!curr) { 6723 data = flow_alloc_thread_workspace(); 6724 if (!data) 6725 return NULL; 6726 } else if (!curr->inuse) { 6727 data = curr; 6728 } else if (curr->next) { 6729 data = curr->next; 6730 } else { 6731 data = flow_alloc_thread_workspace(); 6732 if (!data) 6733 return NULL; 6734 curr->next = data; 6735 data->prev = curr; 6736 } 6737 data->inuse = 1; 6738 data->flow_idx = 0; 6739 /* Set as current workspace */ 6740 if (mlx5_flow_os_set_specific_workspace(data)) 6741 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6742 return data; 6743 } 6744 6745 /** 6746 * Close current thread specific flow workspace. 6747 * 6748 * If previous workspace available, set it as current. 6749 * 6750 * @return pointer to thread specific flow workspace data, NULL on error. 6751 */ 6752 static void 6753 mlx5_flow_pop_thread_workspace(void) 6754 { 6755 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace(); 6756 6757 if (!data) 6758 return; 6759 if (!data->inuse) { 6760 DRV_LOG(ERR, "Failed to close unused flow workspace."); 6761 return; 6762 } 6763 data->inuse = 0; 6764 if (!data->prev) 6765 return; 6766 if (mlx5_flow_os_set_specific_workspace(data->prev)) 6767 DRV_LOG(ERR, "Failed to set flow workspace to thread."); 6768 } 6769 6770 /** 6771 * Verify the flow list is empty 6772 * 6773 * @param dev 6774 * Pointer to Ethernet device. 6775 * 6776 * @return the number of flows not released. 6777 */ 6778 int 6779 mlx5_flow_verify(struct rte_eth_dev *dev) 6780 { 6781 struct mlx5_priv *priv = dev->data->dev_private; 6782 struct rte_flow *flow; 6783 uint32_t idx; 6784 int ret = 0; 6785 6786 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx, 6787 flow, next) { 6788 DRV_LOG(DEBUG, "port %u flow %p still referenced", 6789 dev->data->port_id, (void *)flow); 6790 ++ret; 6791 } 6792 return ret; 6793 } 6794 6795 /** 6796 * Enable default hairpin egress flow. 6797 * 6798 * @param dev 6799 * Pointer to Ethernet device. 6800 * @param queue 6801 * The queue index. 6802 * 6803 * @return 6804 * 0 on success, a negative errno value otherwise and rte_errno is set. 6805 */ 6806 int 6807 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev, 6808 uint32_t queue) 6809 { 6810 struct mlx5_priv *priv = dev->data->dev_private; 6811 const struct rte_flow_attr attr = { 6812 .egress = 1, 6813 .priority = 0, 6814 }; 6815 struct mlx5_rte_flow_item_tx_queue queue_spec = { 6816 .queue = queue, 6817 }; 6818 struct mlx5_rte_flow_item_tx_queue queue_mask = { 6819 .queue = UINT32_MAX, 6820 }; 6821 struct rte_flow_item items[] = { 6822 { 6823 .type = (enum rte_flow_item_type) 6824 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE, 6825 .spec = &queue_spec, 6826 .last = NULL, 6827 .mask = &queue_mask, 6828 }, 6829 { 6830 .type = RTE_FLOW_ITEM_TYPE_END, 6831 }, 6832 }; 6833 struct rte_flow_action_jump jump = { 6834 .group = MLX5_HAIRPIN_TX_TABLE, 6835 }; 6836 struct rte_flow_action actions[2]; 6837 uint32_t flow_idx; 6838 struct rte_flow_error error; 6839 6840 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP; 6841 actions[0].conf = &jump; 6842 actions[1].type = RTE_FLOW_ACTION_TYPE_END; 6843 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6844 &attr, items, actions, false, &error); 6845 if (!flow_idx) { 6846 DRV_LOG(DEBUG, 6847 "Failed to create ctrl flow: rte_errno(%d)," 6848 " type(%d), message(%s)", 6849 rte_errno, error.type, 6850 error.message ? error.message : " (no stated reason)"); 6851 return -rte_errno; 6852 } 6853 return 0; 6854 } 6855 6856 /** 6857 * Enable a control flow configured from the control plane. 6858 * 6859 * @param dev 6860 * Pointer to Ethernet device. 6861 * @param eth_spec 6862 * An Ethernet flow spec to apply. 6863 * @param eth_mask 6864 * An Ethernet flow mask to apply. 6865 * @param vlan_spec 6866 * A VLAN flow spec to apply. 6867 * @param vlan_mask 6868 * A VLAN flow mask to apply. 6869 * 6870 * @return 6871 * 0 on success, a negative errno value otherwise and rte_errno is set. 6872 */ 6873 int 6874 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev, 6875 struct rte_flow_item_eth *eth_spec, 6876 struct rte_flow_item_eth *eth_mask, 6877 struct rte_flow_item_vlan *vlan_spec, 6878 struct rte_flow_item_vlan *vlan_mask) 6879 { 6880 struct mlx5_priv *priv = dev->data->dev_private; 6881 const struct rte_flow_attr attr = { 6882 .ingress = 1, 6883 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 6884 }; 6885 struct rte_flow_item items[] = { 6886 { 6887 .type = RTE_FLOW_ITEM_TYPE_ETH, 6888 .spec = eth_spec, 6889 .last = NULL, 6890 .mask = eth_mask, 6891 }, 6892 { 6893 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN : 6894 RTE_FLOW_ITEM_TYPE_END, 6895 .spec = vlan_spec, 6896 .last = NULL, 6897 .mask = vlan_mask, 6898 }, 6899 { 6900 .type = RTE_FLOW_ITEM_TYPE_END, 6901 }, 6902 }; 6903 uint16_t queue[priv->reta_idx_n]; 6904 struct rte_flow_action_rss action_rss = { 6905 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 6906 .level = 0, 6907 .types = priv->rss_conf.rss_hf, 6908 .key_len = priv->rss_conf.rss_key_len, 6909 .queue_num = priv->reta_idx_n, 6910 .key = priv->rss_conf.rss_key, 6911 .queue = queue, 6912 }; 6913 struct rte_flow_action actions[] = { 6914 { 6915 .type = RTE_FLOW_ACTION_TYPE_RSS, 6916 .conf = &action_rss, 6917 }, 6918 { 6919 .type = RTE_FLOW_ACTION_TYPE_END, 6920 }, 6921 }; 6922 uint32_t flow_idx; 6923 struct rte_flow_error error; 6924 unsigned int i; 6925 6926 if (!priv->reta_idx_n || !priv->rxqs_n) { 6927 return 0; 6928 } 6929 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 6930 action_rss.types = 0; 6931 for (i = 0; i != priv->reta_idx_n; ++i) 6932 queue[i] = (*priv->reta_idx)[i]; 6933 flow_idx = flow_list_create(dev, &priv->ctrl_flows, 6934 &attr, items, actions, false, &error); 6935 if (!flow_idx) 6936 return -rte_errno; 6937 return 0; 6938 } 6939 6940 /** 6941 * Enable a flow control configured from the control plane. 6942 * 6943 * @param dev 6944 * Pointer to Ethernet device. 6945 * @param eth_spec 6946 * An Ethernet flow spec to apply. 6947 * @param eth_mask 6948 * An Ethernet flow mask to apply. 6949 * 6950 * @return 6951 * 0 on success, a negative errno value otherwise and rte_errno is set. 6952 */ 6953 int 6954 mlx5_ctrl_flow(struct rte_eth_dev *dev, 6955 struct rte_flow_item_eth *eth_spec, 6956 struct rte_flow_item_eth *eth_mask) 6957 { 6958 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL); 6959 } 6960 6961 /** 6962 * Create default miss flow rule matching lacp traffic 6963 * 6964 * @param dev 6965 * Pointer to Ethernet device. 6966 * @param eth_spec 6967 * An Ethernet flow spec to apply. 6968 * 6969 * @return 6970 * 0 on success, a negative errno value otherwise and rte_errno is set. 6971 */ 6972 int 6973 mlx5_flow_lacp_miss(struct rte_eth_dev *dev) 6974 { 6975 struct mlx5_priv *priv = dev->data->dev_private; 6976 /* 6977 * The LACP matching is done by only using ether type since using 6978 * a multicast dst mac causes kernel to give low priority to this flow. 6979 */ 6980 static const struct rte_flow_item_eth lacp_spec = { 6981 .type = RTE_BE16(0x8809), 6982 }; 6983 static const struct rte_flow_item_eth lacp_mask = { 6984 .type = 0xffff, 6985 }; 6986 const struct rte_flow_attr attr = { 6987 .ingress = 1, 6988 }; 6989 struct rte_flow_item items[] = { 6990 { 6991 .type = RTE_FLOW_ITEM_TYPE_ETH, 6992 .spec = &lacp_spec, 6993 .mask = &lacp_mask, 6994 }, 6995 { 6996 .type = RTE_FLOW_ITEM_TYPE_END, 6997 }, 6998 }; 6999 struct rte_flow_action actions[] = { 7000 { 7001 .type = (enum rte_flow_action_type) 7002 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS, 7003 }, 7004 { 7005 .type = RTE_FLOW_ACTION_TYPE_END, 7006 }, 7007 }; 7008 struct rte_flow_error error; 7009 uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows, 7010 &attr, items, actions, false, &error); 7011 7012 if (!flow_idx) 7013 return -rte_errno; 7014 return 0; 7015 } 7016 7017 /** 7018 * Destroy a flow. 7019 * 7020 * @see rte_flow_destroy() 7021 * @see rte_flow_ops 7022 */ 7023 int 7024 mlx5_flow_destroy(struct rte_eth_dev *dev, 7025 struct rte_flow *flow, 7026 struct rte_flow_error *error __rte_unused) 7027 { 7028 struct mlx5_priv *priv = dev->data->dev_private; 7029 7030 flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow); 7031 return 0; 7032 } 7033 7034 /** 7035 * Destroy all flows. 7036 * 7037 * @see rte_flow_flush() 7038 * @see rte_flow_ops 7039 */ 7040 int 7041 mlx5_flow_flush(struct rte_eth_dev *dev, 7042 struct rte_flow_error *error __rte_unused) 7043 { 7044 struct mlx5_priv *priv = dev->data->dev_private; 7045 7046 mlx5_flow_list_flush(dev, &priv->flows, false); 7047 return 0; 7048 } 7049 7050 /** 7051 * Isolated mode. 7052 * 7053 * @see rte_flow_isolate() 7054 * @see rte_flow_ops 7055 */ 7056 int 7057 mlx5_flow_isolate(struct rte_eth_dev *dev, 7058 int enable, 7059 struct rte_flow_error *error) 7060 { 7061 struct mlx5_priv *priv = dev->data->dev_private; 7062 7063 if (dev->data->dev_started) { 7064 rte_flow_error_set(error, EBUSY, 7065 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7066 NULL, 7067 "port must be stopped first"); 7068 return -rte_errno; 7069 } 7070 priv->isolated = !!enable; 7071 if (enable) 7072 dev->dev_ops = &mlx5_dev_ops_isolate; 7073 else 7074 dev->dev_ops = &mlx5_dev_ops; 7075 7076 dev->rx_descriptor_status = mlx5_rx_descriptor_status; 7077 dev->tx_descriptor_status = mlx5_tx_descriptor_status; 7078 7079 return 0; 7080 } 7081 7082 /** 7083 * Query a flow. 7084 * 7085 * @see rte_flow_query() 7086 * @see rte_flow_ops 7087 */ 7088 static int 7089 flow_drv_query(struct rte_eth_dev *dev, 7090 uint32_t flow_idx, 7091 const struct rte_flow_action *actions, 7092 void *data, 7093 struct rte_flow_error *error) 7094 { 7095 struct mlx5_priv *priv = dev->data->dev_private; 7096 const struct mlx5_flow_driver_ops *fops; 7097 struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool 7098 [MLX5_IPOOL_RTE_FLOW], 7099 flow_idx); 7100 enum mlx5_flow_drv_type ftype; 7101 7102 if (!flow) { 7103 return rte_flow_error_set(error, ENOENT, 7104 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 7105 NULL, 7106 "invalid flow handle"); 7107 } 7108 ftype = flow->drv_type; 7109 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX); 7110 fops = flow_get_drv_ops(ftype); 7111 7112 return fops->query(dev, flow, actions, data, error); 7113 } 7114 7115 /** 7116 * Query a flow. 7117 * 7118 * @see rte_flow_query() 7119 * @see rte_flow_ops 7120 */ 7121 int 7122 mlx5_flow_query(struct rte_eth_dev *dev, 7123 struct rte_flow *flow, 7124 const struct rte_flow_action *actions, 7125 void *data, 7126 struct rte_flow_error *error) 7127 { 7128 int ret; 7129 7130 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data, 7131 error); 7132 if (ret < 0) 7133 return ret; 7134 return 0; 7135 } 7136 7137 /** 7138 * Get rte_flow callbacks. 7139 * 7140 * @param dev 7141 * Pointer to Ethernet device structure. 7142 * @param ops 7143 * Pointer to operation-specific structure. 7144 * 7145 * @return 0 7146 */ 7147 int 7148 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused, 7149 const struct rte_flow_ops **ops) 7150 { 7151 *ops = &mlx5_flow_ops; 7152 return 0; 7153 } 7154 7155 /** 7156 * Validate meter policy actions. 7157 * Dispatcher for action type specific validation. 7158 * 7159 * @param[in] dev 7160 * Pointer to the Ethernet device structure. 7161 * @param[in] action 7162 * The meter policy action object to validate. 7163 * @param[in] attr 7164 * Attributes of flow to determine steering domain. 7165 * @param[out] is_rss 7166 * Is RSS or not. 7167 * @param[out] domain_bitmap 7168 * Domain bitmap. 7169 * @param[out] is_def_policy 7170 * Is default policy or not. 7171 * @param[out] error 7172 * Perform verbose error reporting if not NULL. Initialized in case of 7173 * error only. 7174 * 7175 * @return 7176 * 0 on success, otherwise negative errno value. 7177 */ 7178 int 7179 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev, 7180 const struct rte_flow_action *actions[RTE_COLORS], 7181 struct rte_flow_attr *attr, 7182 bool *is_rss, 7183 uint8_t *domain_bitmap, 7184 bool *is_def_policy, 7185 struct rte_mtr_error *error) 7186 { 7187 const struct mlx5_flow_driver_ops *fops; 7188 7189 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7190 return fops->validate_mtr_acts(dev, actions, attr, 7191 is_rss, domain_bitmap, is_def_policy, error); 7192 } 7193 7194 /** 7195 * Destroy the meter table set. 7196 * 7197 * @param[in] dev 7198 * Pointer to Ethernet device. 7199 * @param[in] mtr_policy 7200 * Meter policy struct. 7201 */ 7202 void 7203 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev, 7204 struct mlx5_flow_meter_policy *mtr_policy) 7205 { 7206 const struct mlx5_flow_driver_ops *fops; 7207 7208 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7209 fops->destroy_mtr_acts(dev, mtr_policy); 7210 } 7211 7212 /** 7213 * Create policy action, lock free, 7214 * (mutex should be acquired by caller). 7215 * Dispatcher for action type specific call. 7216 * 7217 * @param[in] dev 7218 * Pointer to the Ethernet device structure. 7219 * @param[in] mtr_policy 7220 * Meter policy struct. 7221 * @param[in] action 7222 * Action specification used to create meter actions. 7223 * @param[out] error 7224 * Perform verbose error reporting if not NULL. Initialized in case of 7225 * error only. 7226 * 7227 * @return 7228 * 0 on success, otherwise negative errno value. 7229 */ 7230 int 7231 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev, 7232 struct mlx5_flow_meter_policy *mtr_policy, 7233 const struct rte_flow_action *actions[RTE_COLORS], 7234 struct rte_mtr_error *error) 7235 { 7236 const struct mlx5_flow_driver_ops *fops; 7237 7238 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7239 return fops->create_mtr_acts(dev, mtr_policy, actions, error); 7240 } 7241 7242 /** 7243 * Create policy rules, lock free, 7244 * (mutex should be acquired by caller). 7245 * Dispatcher for action type specific call. 7246 * 7247 * @param[in] dev 7248 * Pointer to the Ethernet device structure. 7249 * @param[in] mtr_policy 7250 * Meter policy struct. 7251 * 7252 * @return 7253 * 0 on success, -1 otherwise. 7254 */ 7255 int 7256 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev, 7257 struct mlx5_flow_meter_policy *mtr_policy) 7258 { 7259 const struct mlx5_flow_driver_ops *fops; 7260 7261 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7262 return fops->create_policy_rules(dev, mtr_policy); 7263 } 7264 7265 /** 7266 * Destroy policy rules, lock free, 7267 * (mutex should be acquired by caller). 7268 * Dispatcher for action type specific call. 7269 * 7270 * @param[in] dev 7271 * Pointer to the Ethernet device structure. 7272 * @param[in] mtr_policy 7273 * Meter policy struct. 7274 */ 7275 void 7276 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev, 7277 struct mlx5_flow_meter_policy *mtr_policy) 7278 { 7279 const struct mlx5_flow_driver_ops *fops; 7280 7281 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7282 fops->destroy_policy_rules(dev, mtr_policy); 7283 } 7284 7285 /** 7286 * Destroy the default policy table set. 7287 * 7288 * @param[in] dev 7289 * Pointer to Ethernet device. 7290 */ 7291 void 7292 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev) 7293 { 7294 const struct mlx5_flow_driver_ops *fops; 7295 7296 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7297 fops->destroy_def_policy(dev); 7298 } 7299 7300 /** 7301 * Destroy the default policy table set. 7302 * 7303 * @param[in] dev 7304 * Pointer to Ethernet device. 7305 * 7306 * @return 7307 * 0 on success, -1 otherwise. 7308 */ 7309 int 7310 mlx5_flow_create_def_policy(struct rte_eth_dev *dev) 7311 { 7312 const struct mlx5_flow_driver_ops *fops; 7313 7314 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7315 return fops->create_def_policy(dev); 7316 } 7317 7318 /** 7319 * Create the needed meter and suffix tables. 7320 * 7321 * @param[in] dev 7322 * Pointer to Ethernet device. 7323 * 7324 * @return 7325 * 0 on success, -1 otherwise. 7326 */ 7327 int 7328 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev, 7329 struct mlx5_flow_meter_info *fm, 7330 uint32_t mtr_idx, 7331 uint8_t domain_bitmap) 7332 { 7333 const struct mlx5_flow_driver_ops *fops; 7334 7335 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7336 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap); 7337 } 7338 7339 /** 7340 * Destroy the meter table set. 7341 * 7342 * @param[in] dev 7343 * Pointer to Ethernet device. 7344 * @param[in] tbl 7345 * Pointer to the meter table set. 7346 */ 7347 void 7348 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev, 7349 struct mlx5_flow_meter_info *fm) 7350 { 7351 const struct mlx5_flow_driver_ops *fops; 7352 7353 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7354 fops->destroy_mtr_tbls(dev, fm); 7355 } 7356 7357 /** 7358 * Destroy the global meter drop table. 7359 * 7360 * @param[in] dev 7361 * Pointer to Ethernet device. 7362 */ 7363 void 7364 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev) 7365 { 7366 const struct mlx5_flow_driver_ops *fops; 7367 7368 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7369 fops->destroy_mtr_drop_tbls(dev); 7370 } 7371 7372 /** 7373 * Destroy the sub policy table with RX queue. 7374 * 7375 * @param[in] dev 7376 * Pointer to Ethernet device. 7377 * @param[in] mtr_policy 7378 * Pointer to meter policy table. 7379 */ 7380 void 7381 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev, 7382 struct mlx5_flow_meter_policy *mtr_policy) 7383 { 7384 const struct mlx5_flow_driver_ops *fops; 7385 7386 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7387 fops->destroy_sub_policy_with_rxq(dev, mtr_policy); 7388 } 7389 7390 /** 7391 * Allocate the needed aso flow meter id. 7392 * 7393 * @param[in] dev 7394 * Pointer to Ethernet device. 7395 * 7396 * @return 7397 * Index to aso flow meter on success, NULL otherwise. 7398 */ 7399 uint32_t 7400 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev) 7401 { 7402 const struct mlx5_flow_driver_ops *fops; 7403 7404 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7405 return fops->create_meter(dev); 7406 } 7407 7408 /** 7409 * Free the aso flow meter id. 7410 * 7411 * @param[in] dev 7412 * Pointer to Ethernet device. 7413 * @param[in] mtr_idx 7414 * Index to aso flow meter to be free. 7415 * 7416 * @return 7417 * 0 on success. 7418 */ 7419 void 7420 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx) 7421 { 7422 const struct mlx5_flow_driver_ops *fops; 7423 7424 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7425 fops->free_meter(dev, mtr_idx); 7426 } 7427 7428 /** 7429 * Allocate a counter. 7430 * 7431 * @param[in] dev 7432 * Pointer to Ethernet device structure. 7433 * 7434 * @return 7435 * Index to allocated counter on success, 0 otherwise. 7436 */ 7437 uint32_t 7438 mlx5_counter_alloc(struct rte_eth_dev *dev) 7439 { 7440 const struct mlx5_flow_driver_ops *fops; 7441 struct rte_flow_attr attr = { .transfer = 0 }; 7442 7443 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7444 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7445 return fops->counter_alloc(dev); 7446 } 7447 DRV_LOG(ERR, 7448 "port %u counter allocate is not supported.", 7449 dev->data->port_id); 7450 return 0; 7451 } 7452 7453 /** 7454 * Free a counter. 7455 * 7456 * @param[in] dev 7457 * Pointer to Ethernet device structure. 7458 * @param[in] cnt 7459 * Index to counter to be free. 7460 */ 7461 void 7462 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt) 7463 { 7464 const struct mlx5_flow_driver_ops *fops; 7465 struct rte_flow_attr attr = { .transfer = 0 }; 7466 7467 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7468 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7469 fops->counter_free(dev, cnt); 7470 return; 7471 } 7472 DRV_LOG(ERR, 7473 "port %u counter free is not supported.", 7474 dev->data->port_id); 7475 } 7476 7477 /** 7478 * Query counter statistics. 7479 * 7480 * @param[in] dev 7481 * Pointer to Ethernet device structure. 7482 * @param[in] cnt 7483 * Index to counter to query. 7484 * @param[in] clear 7485 * Set to clear counter statistics. 7486 * @param[out] pkts 7487 * The counter hits packets number to save. 7488 * @param[out] bytes 7489 * The counter hits bytes number to save. 7490 * 7491 * @return 7492 * 0 on success, a negative errno value otherwise. 7493 */ 7494 int 7495 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt, 7496 bool clear, uint64_t *pkts, uint64_t *bytes) 7497 { 7498 const struct mlx5_flow_driver_ops *fops; 7499 struct rte_flow_attr attr = { .transfer = 0 }; 7500 7501 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 7502 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 7503 return fops->counter_query(dev, cnt, clear, pkts, bytes); 7504 } 7505 DRV_LOG(ERR, 7506 "port %u counter query is not supported.", 7507 dev->data->port_id); 7508 return -ENOTSUP; 7509 } 7510 7511 /** 7512 * Allocate a new memory for the counter values wrapped by all the needed 7513 * management. 7514 * 7515 * @param[in] sh 7516 * Pointer to mlx5_dev_ctx_shared object. 7517 * 7518 * @return 7519 * 0 on success, a negative errno value otherwise. 7520 */ 7521 static int 7522 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh) 7523 { 7524 struct mlx5_devx_mkey_attr mkey_attr; 7525 struct mlx5_counter_stats_mem_mng *mem_mng; 7526 volatile struct flow_counter_stats *raw_data; 7527 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES; 7528 int size = (sizeof(struct flow_counter_stats) * 7529 MLX5_COUNTERS_PER_POOL + 7530 sizeof(struct mlx5_counter_stats_raw)) * raws_n + 7531 sizeof(struct mlx5_counter_stats_mem_mng); 7532 size_t pgsize = rte_mem_page_size(); 7533 uint8_t *mem; 7534 int i; 7535 7536 if (pgsize == (size_t)-1) { 7537 DRV_LOG(ERR, "Failed to get mem page size"); 7538 rte_errno = ENOMEM; 7539 return -ENOMEM; 7540 } 7541 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); 7542 if (!mem) { 7543 rte_errno = ENOMEM; 7544 return -ENOMEM; 7545 } 7546 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1; 7547 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n; 7548 mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size, 7549 IBV_ACCESS_LOCAL_WRITE); 7550 if (!mem_mng->umem) { 7551 rte_errno = errno; 7552 mlx5_free(mem); 7553 return -rte_errno; 7554 } 7555 memset(&mkey_attr, 0, sizeof(mkey_attr)); 7556 mkey_attr.addr = (uintptr_t)mem; 7557 mkey_attr.size = size; 7558 mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem); 7559 mkey_attr.pd = sh->pdn; 7560 mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write; 7561 mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read; 7562 mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr); 7563 if (!mem_mng->dm) { 7564 mlx5_os_umem_dereg(mem_mng->umem); 7565 rte_errno = errno; 7566 mlx5_free(mem); 7567 return -rte_errno; 7568 } 7569 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size); 7570 raw_data = (volatile struct flow_counter_stats *)mem; 7571 for (i = 0; i < raws_n; ++i) { 7572 mem_mng->raws[i].mem_mng = mem_mng; 7573 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL; 7574 } 7575 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i) 7576 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, 7577 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i, 7578 next); 7579 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next); 7580 sh->cmng.mem_mng = mem_mng; 7581 return 0; 7582 } 7583 7584 /** 7585 * Set the statistic memory to the new counter pool. 7586 * 7587 * @param[in] sh 7588 * Pointer to mlx5_dev_ctx_shared object. 7589 * @param[in] pool 7590 * Pointer to the pool to set the statistic memory. 7591 * 7592 * @return 7593 * 0 on success, a negative errno value otherwise. 7594 */ 7595 static int 7596 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh, 7597 struct mlx5_flow_counter_pool *pool) 7598 { 7599 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7600 /* Resize statistic memory once used out. */ 7601 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) && 7602 mlx5_flow_create_counter_stat_mem_mng(sh)) { 7603 DRV_LOG(ERR, "Cannot resize counter stat mem."); 7604 return -1; 7605 } 7606 rte_spinlock_lock(&pool->sl); 7607 pool->raw = cmng->mem_mng->raws + pool->index % 7608 MLX5_CNT_CONTAINER_RESIZE; 7609 rte_spinlock_unlock(&pool->sl); 7610 pool->raw_hw = NULL; 7611 return 0; 7612 } 7613 7614 #define MLX5_POOL_QUERY_FREQ_US 1000000 7615 7616 /** 7617 * Set the periodic procedure for triggering asynchronous batch queries for all 7618 * the counter pools. 7619 * 7620 * @param[in] sh 7621 * Pointer to mlx5_dev_ctx_shared object. 7622 */ 7623 void 7624 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh) 7625 { 7626 uint32_t pools_n, us; 7627 7628 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED); 7629 us = MLX5_POOL_QUERY_FREQ_US / pools_n; 7630 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us); 7631 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) { 7632 sh->cmng.query_thread_on = 0; 7633 DRV_LOG(ERR, "Cannot reinitialize query alarm"); 7634 } else { 7635 sh->cmng.query_thread_on = 1; 7636 } 7637 } 7638 7639 /** 7640 * The periodic procedure for triggering asynchronous batch queries for all the 7641 * counter pools. This function is probably called by the host thread. 7642 * 7643 * @param[in] arg 7644 * The parameter for the alarm process. 7645 */ 7646 void 7647 mlx5_flow_query_alarm(void *arg) 7648 { 7649 struct mlx5_dev_ctx_shared *sh = arg; 7650 int ret; 7651 uint16_t pool_index = sh->cmng.pool_index; 7652 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7653 struct mlx5_flow_counter_pool *pool; 7654 uint16_t n_valid; 7655 7656 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES) 7657 goto set_alarm; 7658 rte_spinlock_lock(&cmng->pool_update_sl); 7659 pool = cmng->pools[pool_index]; 7660 n_valid = cmng->n_valid; 7661 rte_spinlock_unlock(&cmng->pool_update_sl); 7662 /* Set the statistic memory to the new created pool. */ 7663 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool))) 7664 goto set_alarm; 7665 if (pool->raw_hw) 7666 /* There is a pool query in progress. */ 7667 goto set_alarm; 7668 pool->raw_hw = 7669 LIST_FIRST(&sh->cmng.free_stat_raws); 7670 if (!pool->raw_hw) 7671 /* No free counter statistics raw memory. */ 7672 goto set_alarm; 7673 /* 7674 * Identify the counters released between query trigger and query 7675 * handle more efficiently. The counter released in this gap period 7676 * should wait for a new round of query as the new arrived packets 7677 * will not be taken into account. 7678 */ 7679 pool->query_gen++; 7680 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0, 7681 MLX5_COUNTERS_PER_POOL, 7682 NULL, NULL, 7683 pool->raw_hw->mem_mng->dm->id, 7684 (void *)(uintptr_t) 7685 pool->raw_hw->data, 7686 sh->devx_comp, 7687 (uint64_t)(uintptr_t)pool); 7688 if (ret) { 7689 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID" 7690 " %d", pool->min_dcs->id); 7691 pool->raw_hw = NULL; 7692 goto set_alarm; 7693 } 7694 LIST_REMOVE(pool->raw_hw, next); 7695 sh->cmng.pending_queries++; 7696 pool_index++; 7697 if (pool_index >= n_valid) 7698 pool_index = 0; 7699 set_alarm: 7700 sh->cmng.pool_index = pool_index; 7701 mlx5_set_query_alarm(sh); 7702 } 7703 7704 /** 7705 * Check and callback event for new aged flow in the counter pool 7706 * 7707 * @param[in] sh 7708 * Pointer to mlx5_dev_ctx_shared object. 7709 * @param[in] pool 7710 * Pointer to Current counter pool. 7711 */ 7712 static void 7713 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh, 7714 struct mlx5_flow_counter_pool *pool) 7715 { 7716 struct mlx5_priv *priv; 7717 struct mlx5_flow_counter *cnt; 7718 struct mlx5_age_info *age_info; 7719 struct mlx5_age_param *age_param; 7720 struct mlx5_counter_stats_raw *cur = pool->raw_hw; 7721 struct mlx5_counter_stats_raw *prev = pool->raw; 7722 const uint64_t curr_time = MLX5_CURR_TIME_SEC; 7723 const uint32_t time_delta = curr_time - pool->time_of_last_age_check; 7724 uint16_t expected = AGE_CANDIDATE; 7725 uint32_t i; 7726 7727 pool->time_of_last_age_check = curr_time; 7728 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) { 7729 cnt = MLX5_POOL_GET_CNT(pool, i); 7730 age_param = MLX5_CNT_TO_AGE(cnt); 7731 if (__atomic_load_n(&age_param->state, 7732 __ATOMIC_RELAXED) != AGE_CANDIDATE) 7733 continue; 7734 if (cur->data[i].hits != prev->data[i].hits) { 7735 __atomic_store_n(&age_param->sec_since_last_hit, 0, 7736 __ATOMIC_RELAXED); 7737 continue; 7738 } 7739 if (__atomic_add_fetch(&age_param->sec_since_last_hit, 7740 time_delta, 7741 __ATOMIC_RELAXED) <= age_param->timeout) 7742 continue; 7743 /** 7744 * Hold the lock first, or if between the 7745 * state AGE_TMOUT and tailq operation the 7746 * release happened, the release procedure 7747 * may delete a non-existent tailq node. 7748 */ 7749 priv = rte_eth_devices[age_param->port_id].data->dev_private; 7750 age_info = GET_PORT_AGE_INFO(priv); 7751 rte_spinlock_lock(&age_info->aged_sl); 7752 if (__atomic_compare_exchange_n(&age_param->state, &expected, 7753 AGE_TMOUT, false, 7754 __ATOMIC_RELAXED, 7755 __ATOMIC_RELAXED)) { 7756 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next); 7757 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW); 7758 } 7759 rte_spinlock_unlock(&age_info->aged_sl); 7760 } 7761 mlx5_age_event_prepare(sh); 7762 } 7763 7764 /** 7765 * Handler for the HW respond about ready values from an asynchronous batch 7766 * query. This function is probably called by the host thread. 7767 * 7768 * @param[in] sh 7769 * The pointer to the shared device context. 7770 * @param[in] async_id 7771 * The Devx async ID. 7772 * @param[in] status 7773 * The status of the completion. 7774 */ 7775 void 7776 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh, 7777 uint64_t async_id, int status) 7778 { 7779 struct mlx5_flow_counter_pool *pool = 7780 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id; 7781 struct mlx5_counter_stats_raw *raw_to_free; 7782 uint8_t query_gen = pool->query_gen ^ 1; 7783 struct mlx5_flow_counter_mng *cmng = &sh->cmng; 7784 enum mlx5_counter_type cnt_type = 7785 pool->is_aged ? MLX5_COUNTER_TYPE_AGE : 7786 MLX5_COUNTER_TYPE_ORIGIN; 7787 7788 if (unlikely(status)) { 7789 raw_to_free = pool->raw_hw; 7790 } else { 7791 raw_to_free = pool->raw; 7792 if (pool->is_aged) 7793 mlx5_flow_aging_check(sh, pool); 7794 rte_spinlock_lock(&pool->sl); 7795 pool->raw = pool->raw_hw; 7796 rte_spinlock_unlock(&pool->sl); 7797 /* Be sure the new raw counters data is updated in memory. */ 7798 rte_io_wmb(); 7799 if (!TAILQ_EMPTY(&pool->counters[query_gen])) { 7800 rte_spinlock_lock(&cmng->csl[cnt_type]); 7801 TAILQ_CONCAT(&cmng->counters[cnt_type], 7802 &pool->counters[query_gen], next); 7803 rte_spinlock_unlock(&cmng->csl[cnt_type]); 7804 } 7805 } 7806 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next); 7807 pool->raw_hw = NULL; 7808 sh->cmng.pending_queries--; 7809 } 7810 7811 static int 7812 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table, 7813 const struct flow_grp_info *grp_info, 7814 struct rte_flow_error *error) 7815 { 7816 if (grp_info->transfer && grp_info->external && 7817 grp_info->fdb_def_rule) { 7818 if (group == UINT32_MAX) 7819 return rte_flow_error_set 7820 (error, EINVAL, 7821 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 7822 NULL, 7823 "group index not supported"); 7824 *table = group + 1; 7825 } else { 7826 *table = group; 7827 } 7828 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table); 7829 return 0; 7830 } 7831 7832 /** 7833 * Translate the rte_flow group index to HW table value. 7834 * 7835 * If tunnel offload is disabled, all group ids converted to flow table 7836 * id using the standard method. 7837 * If tunnel offload is enabled, group id can be converted using the 7838 * standard or tunnel conversion method. Group conversion method 7839 * selection depends on flags in `grp_info` parameter: 7840 * - Internal (grp_info.external == 0) groups conversion uses the 7841 * standard method. 7842 * - Group ids in JUMP action converted with the tunnel conversion. 7843 * - Group id in rule attribute conversion depends on a rule type and 7844 * group id value: 7845 * ** non zero group attributes converted with the tunnel method 7846 * ** zero group attribute in non-tunnel rule is converted using the 7847 * standard method - there's only one root table 7848 * ** zero group attribute in steer tunnel rule is converted with the 7849 * standard method - single root table 7850 * ** zero group attribute in match tunnel rule is a special OvS 7851 * case: that value is used for portability reasons. That group 7852 * id is converted with the tunnel conversion method. 7853 * 7854 * @param[in] dev 7855 * Port device 7856 * @param[in] tunnel 7857 * PMD tunnel offload object 7858 * @param[in] group 7859 * rte_flow group index value. 7860 * @param[out] table 7861 * HW table value. 7862 * @param[in] grp_info 7863 * flags used for conversion 7864 * @param[out] error 7865 * Pointer to error structure. 7866 * 7867 * @return 7868 * 0 on success, a negative errno value otherwise and rte_errno is set. 7869 */ 7870 int 7871 mlx5_flow_group_to_table(struct rte_eth_dev *dev, 7872 const struct mlx5_flow_tunnel *tunnel, 7873 uint32_t group, uint32_t *table, 7874 const struct flow_grp_info *grp_info, 7875 struct rte_flow_error *error) 7876 { 7877 int ret; 7878 bool standard_translation; 7879 7880 if (!grp_info->skip_scale && grp_info->external && 7881 group < MLX5_MAX_TABLES_EXTERNAL) 7882 group *= MLX5_FLOW_TABLE_FACTOR; 7883 if (is_tunnel_offload_active(dev)) { 7884 standard_translation = !grp_info->external || 7885 grp_info->std_tbl_fix; 7886 } else { 7887 standard_translation = true; 7888 } 7889 DRV_LOG(DEBUG, 7890 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s", 7891 dev->data->port_id, group, grp_info->transfer, 7892 grp_info->external, grp_info->fdb_def_rule, 7893 standard_translation ? "STANDARD" : "TUNNEL"); 7894 if (standard_translation) 7895 ret = flow_group_to_table(dev->data->port_id, group, table, 7896 grp_info, error); 7897 else 7898 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group, 7899 table, error); 7900 7901 return ret; 7902 } 7903 7904 /** 7905 * Discover availability of metadata reg_c's. 7906 * 7907 * Iteratively use test flows to check availability. 7908 * 7909 * @param[in] dev 7910 * Pointer to the Ethernet device structure. 7911 * 7912 * @return 7913 * 0 on success, a negative errno value otherwise and rte_errno is set. 7914 */ 7915 int 7916 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev) 7917 { 7918 struct mlx5_priv *priv = dev->data->dev_private; 7919 struct mlx5_dev_config *config = &priv->config; 7920 enum modify_reg idx; 7921 int n = 0; 7922 7923 /* reg_c[0] and reg_c[1] are reserved. */ 7924 config->flow_mreg_c[n++] = REG_C_0; 7925 config->flow_mreg_c[n++] = REG_C_1; 7926 /* Discover availability of other reg_c's. */ 7927 for (idx = REG_C_2; idx <= REG_C_7; ++idx) { 7928 struct rte_flow_attr attr = { 7929 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP, 7930 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR, 7931 .ingress = 1, 7932 }; 7933 struct rte_flow_item items[] = { 7934 [0] = { 7935 .type = RTE_FLOW_ITEM_TYPE_END, 7936 }, 7937 }; 7938 struct rte_flow_action actions[] = { 7939 [0] = { 7940 .type = (enum rte_flow_action_type) 7941 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG, 7942 .conf = &(struct mlx5_flow_action_copy_mreg){ 7943 .src = REG_C_1, 7944 .dst = idx, 7945 }, 7946 }, 7947 [1] = { 7948 .type = RTE_FLOW_ACTION_TYPE_JUMP, 7949 .conf = &(struct rte_flow_action_jump){ 7950 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP, 7951 }, 7952 }, 7953 [2] = { 7954 .type = RTE_FLOW_ACTION_TYPE_END, 7955 }, 7956 }; 7957 uint32_t flow_idx; 7958 struct rte_flow *flow; 7959 struct rte_flow_error error; 7960 7961 if (!config->dv_flow_en) 7962 break; 7963 /* Create internal flow, validation skips copy action. */ 7964 flow_idx = flow_list_create(dev, NULL, &attr, items, 7965 actions, false, &error); 7966 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 7967 flow_idx); 7968 if (!flow) 7969 continue; 7970 config->flow_mreg_c[n++] = idx; 7971 flow_list_destroy(dev, NULL, flow_idx); 7972 } 7973 for (; n < MLX5_MREG_C_NUM; ++n) 7974 config->flow_mreg_c[n] = REG_NON; 7975 return 0; 7976 } 7977 7978 int 7979 save_dump_file(const uint8_t *data, uint32_t size, 7980 uint32_t type, uint32_t id, void *arg, FILE *file) 7981 { 7982 char line[BUF_SIZE]; 7983 uint32_t out = 0; 7984 uint32_t k; 7985 uint32_t actions_num; 7986 struct rte_flow_query_count *count; 7987 7988 memset(line, 0, BUF_SIZE); 7989 switch (type) { 7990 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR: 7991 actions_num = *(uint32_t *)(arg); 7992 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,%d,", 7993 type, id, actions_num); 7994 break; 7995 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT: 7996 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%x,", 7997 type, id); 7998 break; 7999 case DR_DUMP_REC_TYPE_PMD_COUNTER: 8000 count = (struct rte_flow_query_count *)arg; 8001 fprintf(file, "%d,0x%x,%" PRIu64 ",%" PRIu64 "\n", type, 8002 id, count->hits, count->bytes); 8003 return 0; 8004 default: 8005 return -1; 8006 } 8007 8008 for (k = 0; k < size; k++) { 8009 /* Make sure we do not overrun the line buffer length. */ 8010 if (out >= BUF_SIZE - 4) { 8011 line[out] = '\0'; 8012 break; 8013 } 8014 out += snprintf(line + out, BUF_SIZE - out, "%02x", 8015 (data[k]) & 0xff); 8016 } 8017 fprintf(file, "%s\n", line); 8018 return 0; 8019 } 8020 8021 int 8022 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow, 8023 struct rte_flow_query_count *count, struct rte_flow_error *error) 8024 { 8025 struct rte_flow_action action[2]; 8026 enum mlx5_flow_drv_type ftype; 8027 const struct mlx5_flow_driver_ops *fops; 8028 8029 if (!flow) { 8030 return rte_flow_error_set(error, ENOENT, 8031 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8032 NULL, 8033 "invalid flow handle"); 8034 } 8035 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT; 8036 action[1].type = RTE_FLOW_ACTION_TYPE_END; 8037 if (flow->counter) { 8038 memset(count, 0, sizeof(struct rte_flow_query_count)); 8039 ftype = (enum mlx5_flow_drv_type)(flow->drv_type); 8040 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && 8041 ftype < MLX5_FLOW_TYPE_MAX); 8042 fops = flow_get_drv_ops(ftype); 8043 return fops->query(dev, flow, action, count, error); 8044 } 8045 return -1; 8046 } 8047 8048 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8049 /** 8050 * Dump flow ipool data to file 8051 * 8052 * @param[in] dev 8053 * The pointer to Ethernet device. 8054 * @param[in] file 8055 * A pointer to a file for output. 8056 * @param[out] error 8057 * Perform verbose error reporting if not NULL. PMDs initialize this 8058 * structure in case of error only. 8059 * @return 8060 * 0 on success, a negative value otherwise. 8061 */ 8062 int 8063 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev, 8064 struct rte_flow *flow, FILE *file, 8065 struct rte_flow_error *error) 8066 { 8067 struct mlx5_priv *priv = dev->data->dev_private; 8068 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr; 8069 struct mlx5_flow_dv_encap_decap_resource *encap_decap; 8070 uint32_t handle_idx; 8071 struct mlx5_flow_handle *dh; 8072 struct rte_flow_query_count count; 8073 uint32_t actions_num; 8074 const uint8_t *data; 8075 size_t size; 8076 uint32_t id; 8077 uint32_t type; 8078 8079 if (!flow) { 8080 return rte_flow_error_set(error, ENOENT, 8081 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, 8082 NULL, 8083 "invalid flow handle"); 8084 } 8085 handle_idx = flow->dev_handles; 8086 while (handle_idx) { 8087 dh = mlx5_ipool_get(priv->sh->ipool 8088 [MLX5_IPOOL_MLX5_FLOW], handle_idx); 8089 if (!dh) 8090 continue; 8091 handle_idx = dh->next.next; 8092 id = (uint32_t)(uintptr_t)dh->drv_flow; 8093 8094 /* query counter */ 8095 type = DR_DUMP_REC_TYPE_PMD_COUNTER; 8096 if (!mlx5_flow_query_counter(dev, flow, &count, error)) 8097 save_dump_file(NULL, 0, type, 8098 id, (void *)&count, file); 8099 8100 /* Get modify_hdr and encap_decap buf from ipools. */ 8101 encap_decap = NULL; 8102 modify_hdr = dh->dvh.modify_hdr; 8103 8104 if (dh->dvh.rix_encap_decap) { 8105 encap_decap = mlx5_ipool_get(priv->sh->ipool 8106 [MLX5_IPOOL_DECAP_ENCAP], 8107 dh->dvh.rix_encap_decap); 8108 } 8109 if (modify_hdr) { 8110 data = (const uint8_t *)modify_hdr->actions; 8111 size = (size_t)(modify_hdr->actions_num) * 8; 8112 actions_num = modify_hdr->actions_num; 8113 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR; 8114 save_dump_file(data, size, type, id, 8115 (void *)(&actions_num), file); 8116 } 8117 if (encap_decap) { 8118 data = encap_decap->buf; 8119 size = encap_decap->size; 8120 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT; 8121 save_dump_file(data, size, type, 8122 id, NULL, file); 8123 } 8124 } 8125 return 0; 8126 } 8127 #endif 8128 8129 /** 8130 * Dump flow raw hw data to file 8131 * 8132 * @param[in] dev 8133 * The pointer to Ethernet device. 8134 * @param[in] file 8135 * A pointer to a file for output. 8136 * @param[out] error 8137 * Perform verbose error reporting if not NULL. PMDs initialize this 8138 * structure in case of error only. 8139 * @return 8140 * 0 on success, a nagative value otherwise. 8141 */ 8142 int 8143 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx, 8144 FILE *file, 8145 struct rte_flow_error *error __rte_unused) 8146 { 8147 struct mlx5_priv *priv = dev->data->dev_private; 8148 struct mlx5_dev_ctx_shared *sh = priv->sh; 8149 uint32_t handle_idx; 8150 int ret; 8151 struct mlx5_flow_handle *dh; 8152 struct rte_flow *flow; 8153 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8154 uint32_t idx; 8155 #endif 8156 8157 if (!priv->config.dv_flow_en) { 8158 if (fputs("device dv flow disabled\n", file) <= 0) 8159 return -errno; 8160 return -ENOTSUP; 8161 } 8162 8163 /* dump all */ 8164 if (!flow_idx) { 8165 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8166 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], 8167 priv->flows, idx, flow, next) 8168 mlx5_flow_dev_dump_ipool(dev, flow, file, error); 8169 #endif 8170 return mlx5_devx_cmd_flow_dump(sh->fdb_domain, 8171 sh->rx_domain, 8172 sh->tx_domain, file); 8173 } 8174 /* dump one */ 8175 flow = mlx5_ipool_get(priv->sh->ipool 8176 [MLX5_IPOOL_RTE_FLOW], (uintptr_t)(void *)flow_idx); 8177 if (!flow) 8178 return -ENOENT; 8179 8180 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8181 mlx5_flow_dev_dump_ipool(dev, flow, file, error); 8182 #endif 8183 handle_idx = flow->dev_handles; 8184 while (handle_idx) { 8185 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], 8186 handle_idx); 8187 if (!dh) 8188 return -ENOENT; 8189 if (dh->drv_flow) { 8190 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow, 8191 file); 8192 if (ret) 8193 return -ENOENT; 8194 } 8195 handle_idx = dh->next.next; 8196 } 8197 return 0; 8198 } 8199 8200 /** 8201 * Get aged-out flows. 8202 * 8203 * @param[in] dev 8204 * Pointer to the Ethernet device structure. 8205 * @param[in] context 8206 * The address of an array of pointers to the aged-out flows contexts. 8207 * @param[in] nb_countexts 8208 * The length of context array pointers. 8209 * @param[out] error 8210 * Perform verbose error reporting if not NULL. Initialized in case of 8211 * error only. 8212 * 8213 * @return 8214 * how many contexts get in success, otherwise negative errno value. 8215 * if nb_contexts is 0, return the amount of all aged contexts. 8216 * if nb_contexts is not 0 , return the amount of aged flows reported 8217 * in the context array. 8218 */ 8219 int 8220 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts, 8221 uint32_t nb_contexts, struct rte_flow_error *error) 8222 { 8223 const struct mlx5_flow_driver_ops *fops; 8224 struct rte_flow_attr attr = { .transfer = 0 }; 8225 8226 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) { 8227 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV); 8228 return fops->get_aged_flows(dev, contexts, nb_contexts, 8229 error); 8230 } 8231 DRV_LOG(ERR, 8232 "port %u get aged flows is not supported.", 8233 dev->data->port_id); 8234 return -ENOTSUP; 8235 } 8236 8237 /* Wrapper for driver action_validate op callback */ 8238 static int 8239 flow_drv_action_validate(struct rte_eth_dev *dev, 8240 const struct rte_flow_indir_action_conf *conf, 8241 const struct rte_flow_action *action, 8242 const struct mlx5_flow_driver_ops *fops, 8243 struct rte_flow_error *error) 8244 { 8245 static const char err_msg[] = "indirect action validation unsupported"; 8246 8247 if (!fops->action_validate) { 8248 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8249 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8250 NULL, err_msg); 8251 return -rte_errno; 8252 } 8253 return fops->action_validate(dev, conf, action, error); 8254 } 8255 8256 /** 8257 * Destroys the shared action by handle. 8258 * 8259 * @param dev 8260 * Pointer to Ethernet device structure. 8261 * @param[in] handle 8262 * Handle for the indirect action object to be destroyed. 8263 * @param[out] error 8264 * Perform verbose error reporting if not NULL. PMDs initialize this 8265 * structure in case of error only. 8266 * 8267 * @return 8268 * 0 on success, a negative errno value otherwise and rte_errno is set. 8269 * 8270 * @note: wrapper for driver action_create op callback. 8271 */ 8272 static int 8273 mlx5_action_handle_destroy(struct rte_eth_dev *dev, 8274 struct rte_flow_action_handle *handle, 8275 struct rte_flow_error *error) 8276 { 8277 static const char err_msg[] = "indirect action destruction unsupported"; 8278 struct rte_flow_attr attr = { .transfer = 0 }; 8279 const struct mlx5_flow_driver_ops *fops = 8280 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8281 8282 if (!fops->action_destroy) { 8283 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8284 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8285 NULL, err_msg); 8286 return -rte_errno; 8287 } 8288 return fops->action_destroy(dev, handle, error); 8289 } 8290 8291 /* Wrapper for driver action_destroy op callback */ 8292 static int 8293 flow_drv_action_update(struct rte_eth_dev *dev, 8294 struct rte_flow_action_handle *handle, 8295 const void *update, 8296 const struct mlx5_flow_driver_ops *fops, 8297 struct rte_flow_error *error) 8298 { 8299 static const char err_msg[] = "indirect action update unsupported"; 8300 8301 if (!fops->action_update) { 8302 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8303 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8304 NULL, err_msg); 8305 return -rte_errno; 8306 } 8307 return fops->action_update(dev, handle, update, error); 8308 } 8309 8310 /* Wrapper for driver action_destroy op callback */ 8311 static int 8312 flow_drv_action_query(struct rte_eth_dev *dev, 8313 const struct rte_flow_action_handle *handle, 8314 void *data, 8315 const struct mlx5_flow_driver_ops *fops, 8316 struct rte_flow_error *error) 8317 { 8318 static const char err_msg[] = "indirect action query unsupported"; 8319 8320 if (!fops->action_query) { 8321 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8322 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8323 NULL, err_msg); 8324 return -rte_errno; 8325 } 8326 return fops->action_query(dev, handle, data, error); 8327 } 8328 8329 /** 8330 * Create indirect action for reuse in multiple flow rules. 8331 * 8332 * @param dev 8333 * Pointer to Ethernet device structure. 8334 * @param conf 8335 * Pointer to indirect action object configuration. 8336 * @param[in] action 8337 * Action configuration for indirect action object creation. 8338 * @param[out] error 8339 * Perform verbose error reporting if not NULL. PMDs initialize this 8340 * structure in case of error only. 8341 * @return 8342 * A valid handle in case of success, NULL otherwise and rte_errno is set. 8343 */ 8344 static struct rte_flow_action_handle * 8345 mlx5_action_handle_create(struct rte_eth_dev *dev, 8346 const struct rte_flow_indir_action_conf *conf, 8347 const struct rte_flow_action *action, 8348 struct rte_flow_error *error) 8349 { 8350 static const char err_msg[] = "indirect action creation unsupported"; 8351 struct rte_flow_attr attr = { .transfer = 0 }; 8352 const struct mlx5_flow_driver_ops *fops = 8353 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8354 8355 if (flow_drv_action_validate(dev, conf, action, fops, error)) 8356 return NULL; 8357 if (!fops->action_create) { 8358 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg); 8359 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 8360 NULL, err_msg); 8361 return NULL; 8362 } 8363 return fops->action_create(dev, conf, action, error); 8364 } 8365 8366 /** 8367 * Updates inplace the indirect action configuration pointed by *handle* 8368 * with the configuration provided as *update* argument. 8369 * The update of the indirect action configuration effects all flow rules 8370 * reusing the action via handle. 8371 * 8372 * @param dev 8373 * Pointer to Ethernet device structure. 8374 * @param[in] handle 8375 * Handle for the indirect action to be updated. 8376 * @param[in] update 8377 * Action specification used to modify the action pointed by handle. 8378 * *update* could be of same type with the action pointed by the *handle* 8379 * handle argument, or some other structures like a wrapper, depending on 8380 * the indirect action type. 8381 * @param[out] error 8382 * Perform verbose error reporting if not NULL. PMDs initialize this 8383 * structure in case of error only. 8384 * 8385 * @return 8386 * 0 on success, a negative errno value otherwise and rte_errno is set. 8387 */ 8388 static int 8389 mlx5_action_handle_update(struct rte_eth_dev *dev, 8390 struct rte_flow_action_handle *handle, 8391 const void *update, 8392 struct rte_flow_error *error) 8393 { 8394 struct rte_flow_attr attr = { .transfer = 0 }; 8395 const struct mlx5_flow_driver_ops *fops = 8396 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8397 int ret; 8398 8399 ret = flow_drv_action_validate(dev, NULL, 8400 (const struct rte_flow_action *)update, fops, error); 8401 if (ret) 8402 return ret; 8403 return flow_drv_action_update(dev, handle, update, fops, 8404 error); 8405 } 8406 8407 /** 8408 * Query the indirect action by handle. 8409 * 8410 * This function allows retrieving action-specific data such as counters. 8411 * Data is gathered by special action which may be present/referenced in 8412 * more than one flow rule definition. 8413 * 8414 * see @RTE_FLOW_ACTION_TYPE_COUNT 8415 * 8416 * @param dev 8417 * Pointer to Ethernet device structure. 8418 * @param[in] handle 8419 * Handle for the indirect action to query. 8420 * @param[in, out] data 8421 * Pointer to storage for the associated query data type. 8422 * @param[out] error 8423 * Perform verbose error reporting if not NULL. PMDs initialize this 8424 * structure in case of error only. 8425 * 8426 * @return 8427 * 0 on success, a negative errno value otherwise and rte_errno is set. 8428 */ 8429 static int 8430 mlx5_action_handle_query(struct rte_eth_dev *dev, 8431 const struct rte_flow_action_handle *handle, 8432 void *data, 8433 struct rte_flow_error *error) 8434 { 8435 struct rte_flow_attr attr = { .transfer = 0 }; 8436 const struct mlx5_flow_driver_ops *fops = 8437 flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8438 8439 return flow_drv_action_query(dev, handle, data, fops, error); 8440 } 8441 8442 /** 8443 * Destroy all indirect actions (shared RSS). 8444 * 8445 * @param dev 8446 * Pointer to Ethernet device. 8447 * 8448 * @return 8449 * 0 on success, a negative errno value otherwise and rte_errno is set. 8450 */ 8451 int 8452 mlx5_action_handle_flush(struct rte_eth_dev *dev) 8453 { 8454 struct rte_flow_error error; 8455 struct mlx5_priv *priv = dev->data->dev_private; 8456 struct mlx5_shared_action_rss *shared_rss; 8457 int ret = 0; 8458 uint32_t idx; 8459 8460 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], 8461 priv->rss_shared_actions, idx, shared_rss, next) { 8462 ret |= mlx5_action_handle_destroy(dev, 8463 (struct rte_flow_action_handle *)(uintptr_t)idx, &error); 8464 } 8465 return ret; 8466 } 8467 8468 #ifndef HAVE_MLX5DV_DR 8469 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1)) 8470 #else 8471 #define MLX5_DOMAIN_SYNC_FLOW \ 8472 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW) 8473 #endif 8474 8475 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains) 8476 { 8477 struct rte_eth_dev *dev = &rte_eth_devices[port_id]; 8478 const struct mlx5_flow_driver_ops *fops; 8479 int ret; 8480 struct rte_flow_attr attr = { .transfer = 0 }; 8481 8482 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr)); 8483 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW); 8484 if (ret > 0) 8485 ret = -ret; 8486 return ret; 8487 } 8488 8489 const struct mlx5_flow_tunnel * 8490 mlx5_get_tof(const struct rte_flow_item *item, 8491 const struct rte_flow_action *action, 8492 enum mlx5_tof_rule_type *rule_type) 8493 { 8494 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 8495 if (item->type == (typeof(item->type)) 8496 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) { 8497 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE; 8498 return flow_items_to_tunnel(item); 8499 } 8500 } 8501 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) { 8502 if (action->type == (typeof(action->type)) 8503 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) { 8504 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE; 8505 return flow_actions_to_tunnel(action); 8506 } 8507 } 8508 return NULL; 8509 } 8510 8511 /** 8512 * tunnel offload functionalilty is defined for DV environment only 8513 */ 8514 #ifdef HAVE_IBV_FLOW_DV_SUPPORT 8515 __extension__ 8516 union tunnel_offload_mark { 8517 uint32_t val; 8518 struct { 8519 uint32_t app_reserve:8; 8520 uint32_t table_id:15; 8521 uint32_t transfer:1; 8522 uint32_t _unused_:8; 8523 }; 8524 }; 8525 8526 static bool 8527 mlx5_access_tunnel_offload_db 8528 (struct rte_eth_dev *dev, 8529 bool (*match)(struct rte_eth_dev *, 8530 struct mlx5_flow_tunnel *, const void *), 8531 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8532 void (*miss)(struct rte_eth_dev *, void *), 8533 void *ctx, bool lock_op); 8534 8535 static int 8536 flow_tunnel_add_default_miss(struct rte_eth_dev *dev, 8537 struct rte_flow *flow, 8538 const struct rte_flow_attr *attr, 8539 const struct rte_flow_action *app_actions, 8540 uint32_t flow_idx, 8541 const struct mlx5_flow_tunnel *tunnel, 8542 struct tunnel_default_miss_ctx *ctx, 8543 struct rte_flow_error *error) 8544 { 8545 struct mlx5_priv *priv = dev->data->dev_private; 8546 struct mlx5_flow *dev_flow; 8547 struct rte_flow_attr miss_attr = *attr; 8548 const struct rte_flow_item miss_items[2] = { 8549 { 8550 .type = RTE_FLOW_ITEM_TYPE_ETH, 8551 .spec = NULL, 8552 .last = NULL, 8553 .mask = NULL 8554 }, 8555 { 8556 .type = RTE_FLOW_ITEM_TYPE_END, 8557 .spec = NULL, 8558 .last = NULL, 8559 .mask = NULL 8560 } 8561 }; 8562 union tunnel_offload_mark mark_id; 8563 struct rte_flow_action_mark miss_mark; 8564 struct rte_flow_action miss_actions[3] = { 8565 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark }, 8566 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL } 8567 }; 8568 const struct rte_flow_action_jump *jump_data; 8569 uint32_t i, flow_table = 0; /* prevent compilation warning */ 8570 struct flow_grp_info grp_info = { 8571 .external = 1, 8572 .transfer = attr->transfer, 8573 .fdb_def_rule = !!priv->fdb_def_rule, 8574 .std_tbl_fix = 0, 8575 }; 8576 int ret; 8577 8578 if (!attr->transfer) { 8579 uint32_t q_size; 8580 8581 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS; 8582 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]); 8583 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size, 8584 0, SOCKET_ID_ANY); 8585 if (!ctx->queue) 8586 return rte_flow_error_set 8587 (error, ENOMEM, 8588 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8589 NULL, "invalid default miss RSS"); 8590 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT, 8591 ctx->action_rss.level = 0, 8592 ctx->action_rss.types = priv->rss_conf.rss_hf, 8593 ctx->action_rss.key_len = priv->rss_conf.rss_key_len, 8594 ctx->action_rss.queue_num = priv->reta_idx_n, 8595 ctx->action_rss.key = priv->rss_conf.rss_key, 8596 ctx->action_rss.queue = ctx->queue; 8597 if (!priv->reta_idx_n || !priv->rxqs_n) 8598 return rte_flow_error_set 8599 (error, EINVAL, 8600 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8601 NULL, "invalid port configuration"); 8602 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)) 8603 ctx->action_rss.types = 0; 8604 for (i = 0; i != priv->reta_idx_n; ++i) 8605 ctx->queue[i] = (*priv->reta_idx)[i]; 8606 } else { 8607 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP; 8608 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP; 8609 } 8610 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw; 8611 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++); 8612 jump_data = app_actions->conf; 8613 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY; 8614 miss_attr.group = jump_data->group; 8615 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group, 8616 &flow_table, &grp_info, error); 8617 if (ret) 8618 return rte_flow_error_set(error, EINVAL, 8619 RTE_FLOW_ERROR_TYPE_ACTION_CONF, 8620 NULL, "invalid tunnel id"); 8621 mark_id.app_reserve = 0; 8622 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table); 8623 mark_id.transfer = !!attr->transfer; 8624 mark_id._unused_ = 0; 8625 miss_mark.id = mark_id.val; 8626 dev_flow = flow_drv_prepare(dev, flow, &miss_attr, 8627 miss_items, miss_actions, flow_idx, error); 8628 if (!dev_flow) 8629 return -rte_errno; 8630 dev_flow->flow = flow; 8631 dev_flow->external = true; 8632 dev_flow->tunnel = tunnel; 8633 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE; 8634 /* Subflow object was created, we must include one in the list. */ 8635 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx, 8636 dev_flow->handle, next); 8637 DRV_LOG(DEBUG, 8638 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u", 8639 dev->data->port_id, tunnel->app_tunnel.type, 8640 tunnel->tunnel_id, miss_attr.priority, miss_attr.group); 8641 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items, 8642 miss_actions, error); 8643 if (!ret) 8644 ret = flow_mreg_update_copy_table(dev, flow, miss_actions, 8645 error); 8646 8647 return ret; 8648 } 8649 8650 static const struct mlx5_flow_tbl_data_entry * 8651 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark) 8652 { 8653 struct mlx5_priv *priv = dev->data->dev_private; 8654 struct mlx5_dev_ctx_shared *sh = priv->sh; 8655 struct mlx5_hlist_entry *he; 8656 union tunnel_offload_mark mbits = { .val = mark }; 8657 union mlx5_flow_tbl_key table_key = { 8658 { 8659 .level = tunnel_id_to_flow_tbl(mbits.table_id), 8660 .id = 0, 8661 .reserved = 0, 8662 .dummy = 0, 8663 .is_fdb = !!mbits.transfer, 8664 .is_egress = 0, 8665 } 8666 }; 8667 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL); 8668 return he ? 8669 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL; 8670 } 8671 8672 static void 8673 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list, 8674 struct mlx5_hlist_entry *entry) 8675 { 8676 struct mlx5_dev_ctx_shared *sh = list->ctx; 8677 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8678 8679 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8680 tunnel_flow_tbl_to_id(tte->flow_table)); 8681 mlx5_free(tte); 8682 } 8683 8684 static int 8685 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused, 8686 struct mlx5_hlist_entry *entry, 8687 uint64_t key, void *cb_ctx __rte_unused) 8688 { 8689 union tunnel_tbl_key tbl = { 8690 .val = key, 8691 }; 8692 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash); 8693 8694 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group; 8695 } 8696 8697 static struct mlx5_hlist_entry * 8698 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key, 8699 void *ctx __rte_unused) 8700 { 8701 struct mlx5_dev_ctx_shared *sh = list->ctx; 8702 struct tunnel_tbl_entry *tte; 8703 union tunnel_tbl_key tbl = { 8704 .val = key, 8705 }; 8706 8707 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, 8708 sizeof(*tte), 0, 8709 SOCKET_ID_ANY); 8710 if (!tte) 8711 goto err; 8712 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8713 &tte->flow_table); 8714 if (tte->flow_table >= MLX5_MAX_TABLES) { 8715 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.", 8716 tte->flow_table); 8717 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID], 8718 tte->flow_table); 8719 goto err; 8720 } else if (!tte->flow_table) { 8721 goto err; 8722 } 8723 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table); 8724 tte->tunnel_id = tbl.tunnel_id; 8725 tte->group = tbl.group; 8726 return &tte->hash; 8727 err: 8728 if (tte) 8729 mlx5_free(tte); 8730 return NULL; 8731 } 8732 8733 static uint32_t 8734 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev, 8735 const struct mlx5_flow_tunnel *tunnel, 8736 uint32_t group, uint32_t *table, 8737 struct rte_flow_error *error) 8738 { 8739 struct mlx5_hlist_entry *he; 8740 struct tunnel_tbl_entry *tte; 8741 union tunnel_tbl_key key = { 8742 .tunnel_id = tunnel ? tunnel->tunnel_id : 0, 8743 .group = group 8744 }; 8745 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8746 struct mlx5_hlist *group_hash; 8747 8748 group_hash = tunnel ? tunnel->groups : thub->groups; 8749 he = mlx5_hlist_register(group_hash, key.val, NULL); 8750 if (!he) 8751 return rte_flow_error_set(error, EINVAL, 8752 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 8753 NULL, 8754 "tunnel group index not supported"); 8755 tte = container_of(he, typeof(*tte), hash); 8756 *table = tte->flow_table; 8757 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x", 8758 dev->data->port_id, key.tunnel_id, group, *table); 8759 return 0; 8760 } 8761 8762 static void 8763 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, 8764 struct mlx5_flow_tunnel *tunnel) 8765 { 8766 struct mlx5_priv *priv = dev->data->dev_private; 8767 struct mlx5_indexed_pool *ipool; 8768 8769 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x", 8770 dev->data->port_id, tunnel->tunnel_id); 8771 LIST_REMOVE(tunnel, chain); 8772 mlx5_hlist_destroy(tunnel->groups); 8773 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8774 mlx5_ipool_free(ipool, tunnel->tunnel_id); 8775 } 8776 8777 static bool 8778 mlx5_access_tunnel_offload_db 8779 (struct rte_eth_dev *dev, 8780 bool (*match)(struct rte_eth_dev *, 8781 struct mlx5_flow_tunnel *, const void *), 8782 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *), 8783 void (*miss)(struct rte_eth_dev *, void *), 8784 void *ctx, bool lock_op) 8785 { 8786 bool verdict = false; 8787 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8788 struct mlx5_flow_tunnel *tunnel; 8789 8790 rte_spinlock_lock(&thub->sl); 8791 LIST_FOREACH(tunnel, &thub->tunnels, chain) { 8792 verdict = match(dev, tunnel, (const void *)ctx); 8793 if (verdict) 8794 break; 8795 } 8796 if (!lock_op) 8797 rte_spinlock_unlock(&thub->sl); 8798 if (verdict && hit) 8799 hit(dev, tunnel, ctx); 8800 if (!verdict && miss) 8801 miss(dev, ctx); 8802 if (lock_op) 8803 rte_spinlock_unlock(&thub->sl); 8804 8805 return verdict; 8806 } 8807 8808 struct tunnel_db_find_tunnel_id_ctx { 8809 uint32_t tunnel_id; 8810 struct mlx5_flow_tunnel *tunnel; 8811 }; 8812 8813 static bool 8814 find_tunnel_id_match(struct rte_eth_dev *dev, 8815 struct mlx5_flow_tunnel *tunnel, const void *x) 8816 { 8817 const struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8818 8819 RTE_SET_USED(dev); 8820 return tunnel->tunnel_id == ctx->tunnel_id; 8821 } 8822 8823 static void 8824 find_tunnel_id_hit(struct rte_eth_dev *dev, 8825 struct mlx5_flow_tunnel *tunnel, void *x) 8826 { 8827 struct tunnel_db_find_tunnel_id_ctx *ctx = x; 8828 RTE_SET_USED(dev); 8829 ctx->tunnel = tunnel; 8830 } 8831 8832 static struct mlx5_flow_tunnel * 8833 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id) 8834 { 8835 struct tunnel_db_find_tunnel_id_ctx ctx = { 8836 .tunnel_id = id, 8837 }; 8838 8839 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match, 8840 find_tunnel_id_hit, NULL, &ctx, true); 8841 8842 return ctx.tunnel; 8843 } 8844 8845 static struct mlx5_flow_tunnel * 8846 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev, 8847 const struct rte_flow_tunnel *app_tunnel) 8848 { 8849 struct mlx5_priv *priv = dev->data->dev_private; 8850 struct mlx5_indexed_pool *ipool; 8851 struct mlx5_flow_tunnel *tunnel; 8852 uint32_t id; 8853 8854 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID]; 8855 tunnel = mlx5_ipool_zmalloc(ipool, &id); 8856 if (!tunnel) 8857 return NULL; 8858 if (id >= MLX5_MAX_TUNNELS) { 8859 mlx5_ipool_free(ipool, id); 8860 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id); 8861 return NULL; 8862 } 8863 tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0, 8864 mlx5_flow_tunnel_grp2tbl_create_cb, 8865 mlx5_flow_tunnel_grp2tbl_match_cb, 8866 mlx5_flow_tunnel_grp2tbl_remove_cb); 8867 if (!tunnel->groups) { 8868 mlx5_ipool_free(ipool, id); 8869 return NULL; 8870 } 8871 tunnel->groups->ctx = priv->sh; 8872 /* initiate new PMD tunnel */ 8873 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel)); 8874 tunnel->tunnel_id = id; 8875 tunnel->action.type = (typeof(tunnel->action.type)) 8876 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET; 8877 tunnel->action.conf = tunnel; 8878 tunnel->item.type = (typeof(tunnel->item.type)) 8879 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL; 8880 tunnel->item.spec = tunnel; 8881 tunnel->item.last = NULL; 8882 tunnel->item.mask = NULL; 8883 8884 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x", 8885 dev->data->port_id, tunnel->tunnel_id); 8886 8887 return tunnel; 8888 } 8889 8890 struct tunnel_db_get_tunnel_ctx { 8891 const struct rte_flow_tunnel *app_tunnel; 8892 struct mlx5_flow_tunnel *tunnel; 8893 }; 8894 8895 static bool get_tunnel_match(struct rte_eth_dev *dev, 8896 struct mlx5_flow_tunnel *tunnel, const void *x) 8897 { 8898 const struct tunnel_db_get_tunnel_ctx *ctx = x; 8899 8900 RTE_SET_USED(dev); 8901 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel, 8902 sizeof(*ctx->app_tunnel)); 8903 } 8904 8905 static void get_tunnel_hit(struct rte_eth_dev *dev, 8906 struct mlx5_flow_tunnel *tunnel, void *x) 8907 { 8908 /* called under tunnel spinlock protection */ 8909 struct tunnel_db_get_tunnel_ctx *ctx = x; 8910 8911 RTE_SET_USED(dev); 8912 tunnel->refctn++; 8913 ctx->tunnel = tunnel; 8914 } 8915 8916 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x) 8917 { 8918 /* called under tunnel spinlock protection */ 8919 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev); 8920 struct tunnel_db_get_tunnel_ctx *ctx = x; 8921 8922 rte_spinlock_unlock(&thub->sl); 8923 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel); 8924 rte_spinlock_lock(&thub->sl); 8925 if (ctx->tunnel) { 8926 ctx->tunnel->refctn = 1; 8927 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain); 8928 } 8929 } 8930 8931 8932 static int 8933 mlx5_get_flow_tunnel(struct rte_eth_dev *dev, 8934 const struct rte_flow_tunnel *app_tunnel, 8935 struct mlx5_flow_tunnel **tunnel) 8936 { 8937 struct tunnel_db_get_tunnel_ctx ctx = { 8938 .app_tunnel = app_tunnel, 8939 }; 8940 8941 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit, 8942 get_tunnel_miss, &ctx, true); 8943 *tunnel = ctx.tunnel; 8944 return ctx.tunnel ? 0 : -ENOMEM; 8945 } 8946 8947 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id) 8948 { 8949 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub; 8950 8951 if (!thub) 8952 return; 8953 if (!LIST_EMPTY(&thub->tunnels)) 8954 DRV_LOG(WARNING, "port %u tunnels present", port_id); 8955 mlx5_hlist_destroy(thub->groups); 8956 mlx5_free(thub); 8957 } 8958 8959 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh) 8960 { 8961 int err; 8962 struct mlx5_flow_tunnel_hub *thub; 8963 8964 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub), 8965 0, SOCKET_ID_ANY); 8966 if (!thub) 8967 return -ENOMEM; 8968 LIST_INIT(&thub->tunnels); 8969 rte_spinlock_init(&thub->sl); 8970 thub->groups = mlx5_hlist_create("flow groups", 8971 rte_align32pow2(MLX5_MAX_TABLES), 0, 8972 0, mlx5_flow_tunnel_grp2tbl_create_cb, 8973 mlx5_flow_tunnel_grp2tbl_match_cb, 8974 mlx5_flow_tunnel_grp2tbl_remove_cb); 8975 if (!thub->groups) { 8976 err = -rte_errno; 8977 goto err; 8978 } 8979 thub->groups->ctx = sh; 8980 sh->tunnel_hub = thub; 8981 8982 return 0; 8983 8984 err: 8985 if (thub->groups) 8986 mlx5_hlist_destroy(thub->groups); 8987 if (thub) 8988 mlx5_free(thub); 8989 return err; 8990 } 8991 8992 static inline bool 8993 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev, 8994 struct rte_flow_tunnel *tunnel, 8995 const char *err_msg) 8996 { 8997 err_msg = NULL; 8998 if (!is_tunnel_offload_active(dev)) { 8999 err_msg = "tunnel offload was not activated"; 9000 goto out; 9001 } else if (!tunnel) { 9002 err_msg = "no application tunnel"; 9003 goto out; 9004 } 9005 9006 switch (tunnel->type) { 9007 default: 9008 err_msg = "unsupported tunnel type"; 9009 goto out; 9010 case RTE_FLOW_ITEM_TYPE_VXLAN: 9011 break; 9012 } 9013 9014 out: 9015 return !err_msg; 9016 } 9017 9018 static int 9019 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev, 9020 struct rte_flow_tunnel *app_tunnel, 9021 struct rte_flow_action **actions, 9022 uint32_t *num_of_actions, 9023 struct rte_flow_error *error) 9024 { 9025 int ret; 9026 struct mlx5_flow_tunnel *tunnel; 9027 const char *err_msg = NULL; 9028 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 9029 9030 if (!verdict) 9031 return rte_flow_error_set(error, EINVAL, 9032 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9033 err_msg); 9034 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9035 if (ret < 0) { 9036 return rte_flow_error_set(error, ret, 9037 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL, 9038 "failed to initialize pmd tunnel"); 9039 } 9040 *actions = &tunnel->action; 9041 *num_of_actions = 1; 9042 return 0; 9043 } 9044 9045 static int 9046 mlx5_flow_tunnel_match(struct rte_eth_dev *dev, 9047 struct rte_flow_tunnel *app_tunnel, 9048 struct rte_flow_item **items, 9049 uint32_t *num_of_items, 9050 struct rte_flow_error *error) 9051 { 9052 int ret; 9053 struct mlx5_flow_tunnel *tunnel; 9054 const char *err_msg = NULL; 9055 bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg); 9056 9057 if (!verdict) 9058 return rte_flow_error_set(error, EINVAL, 9059 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9060 err_msg); 9061 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel); 9062 if (ret < 0) { 9063 return rte_flow_error_set(error, ret, 9064 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9065 "failed to initialize pmd tunnel"); 9066 } 9067 *items = &tunnel->item; 9068 *num_of_items = 1; 9069 return 0; 9070 } 9071 9072 struct tunnel_db_element_release_ctx { 9073 struct rte_flow_item *items; 9074 struct rte_flow_action *actions; 9075 uint32_t num_elements; 9076 struct rte_flow_error *error; 9077 int ret; 9078 }; 9079 9080 static bool 9081 tunnel_element_release_match(struct rte_eth_dev *dev, 9082 struct mlx5_flow_tunnel *tunnel, const void *x) 9083 { 9084 const struct tunnel_db_element_release_ctx *ctx = x; 9085 9086 RTE_SET_USED(dev); 9087 if (ctx->num_elements != 1) 9088 return false; 9089 else if (ctx->items) 9090 return ctx->items == &tunnel->item; 9091 else if (ctx->actions) 9092 return ctx->actions == &tunnel->action; 9093 9094 return false; 9095 } 9096 9097 static void 9098 tunnel_element_release_hit(struct rte_eth_dev *dev, 9099 struct mlx5_flow_tunnel *tunnel, void *x) 9100 { 9101 struct tunnel_db_element_release_ctx *ctx = x; 9102 ctx->ret = 0; 9103 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED)) 9104 mlx5_flow_tunnel_free(dev, tunnel); 9105 } 9106 9107 static void 9108 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x) 9109 { 9110 struct tunnel_db_element_release_ctx *ctx = x; 9111 RTE_SET_USED(dev); 9112 ctx->ret = rte_flow_error_set(ctx->error, EINVAL, 9113 RTE_FLOW_ERROR_TYPE_HANDLE, NULL, 9114 "invalid argument"); 9115 } 9116 9117 static int 9118 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev, 9119 struct rte_flow_item *pmd_items, 9120 uint32_t num_items, struct rte_flow_error *err) 9121 { 9122 struct tunnel_db_element_release_ctx ctx = { 9123 .items = pmd_items, 9124 .actions = NULL, 9125 .num_elements = num_items, 9126 .error = err, 9127 }; 9128 9129 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9130 tunnel_element_release_hit, 9131 tunnel_element_release_miss, &ctx, false); 9132 9133 return ctx.ret; 9134 } 9135 9136 static int 9137 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev, 9138 struct rte_flow_action *pmd_actions, 9139 uint32_t num_actions, struct rte_flow_error *err) 9140 { 9141 struct tunnel_db_element_release_ctx ctx = { 9142 .items = NULL, 9143 .actions = pmd_actions, 9144 .num_elements = num_actions, 9145 .error = err, 9146 }; 9147 9148 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match, 9149 tunnel_element_release_hit, 9150 tunnel_element_release_miss, &ctx, false); 9151 9152 return ctx.ret; 9153 } 9154 9155 static int 9156 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev, 9157 struct rte_mbuf *m, 9158 struct rte_flow_restore_info *info, 9159 struct rte_flow_error *err) 9160 { 9161 uint64_t ol_flags = m->ol_flags; 9162 const struct mlx5_flow_tbl_data_entry *tble; 9163 const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID; 9164 9165 if (!is_tunnel_offload_active(dev)) { 9166 info->flags = 0; 9167 return 0; 9168 } 9169 9170 if ((ol_flags & mask) != mask) 9171 goto err; 9172 tble = tunnel_mark_decode(dev, m->hash.fdir.hi); 9173 if (!tble) { 9174 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x", 9175 dev->data->port_id, m->hash.fdir.hi); 9176 goto err; 9177 } 9178 MLX5_ASSERT(tble->tunnel); 9179 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel)); 9180 info->group_id = tble->group_id; 9181 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL | 9182 RTE_FLOW_RESTORE_INFO_GROUP_ID | 9183 RTE_FLOW_RESTORE_INFO_ENCAPSULATED; 9184 9185 return 0; 9186 9187 err: 9188 return rte_flow_error_set(err, EINVAL, 9189 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9190 "failed to get restore info"); 9191 } 9192 9193 #else /* HAVE_IBV_FLOW_DV_SUPPORT */ 9194 static int 9195 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev, 9196 __rte_unused struct rte_flow_tunnel *app_tunnel, 9197 __rte_unused struct rte_flow_action **actions, 9198 __rte_unused uint32_t *num_of_actions, 9199 __rte_unused struct rte_flow_error *error) 9200 { 9201 return -ENOTSUP; 9202 } 9203 9204 static int 9205 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev, 9206 __rte_unused struct rte_flow_tunnel *app_tunnel, 9207 __rte_unused struct rte_flow_item **items, 9208 __rte_unused uint32_t *num_of_items, 9209 __rte_unused struct rte_flow_error *error) 9210 { 9211 return -ENOTSUP; 9212 } 9213 9214 static int 9215 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev, 9216 __rte_unused struct rte_flow_item *pmd_items, 9217 __rte_unused uint32_t num_items, 9218 __rte_unused struct rte_flow_error *err) 9219 { 9220 return -ENOTSUP; 9221 } 9222 9223 static int 9224 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev, 9225 __rte_unused struct rte_flow_action *pmd_action, 9226 __rte_unused uint32_t num_actions, 9227 __rte_unused struct rte_flow_error *err) 9228 { 9229 return -ENOTSUP; 9230 } 9231 9232 static int 9233 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev, 9234 __rte_unused struct rte_mbuf *m, 9235 __rte_unused struct rte_flow_restore_info *i, 9236 __rte_unused struct rte_flow_error *err) 9237 { 9238 return -ENOTSUP; 9239 } 9240 9241 static int 9242 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev, 9243 __rte_unused struct rte_flow *flow, 9244 __rte_unused const struct rte_flow_attr *attr, 9245 __rte_unused const struct rte_flow_action *actions, 9246 __rte_unused uint32_t flow_idx, 9247 __rte_unused const struct mlx5_flow_tunnel *tunnel, 9248 __rte_unused struct tunnel_default_miss_ctx *ctx, 9249 __rte_unused struct rte_flow_error *error) 9250 { 9251 return -ENOTSUP; 9252 } 9253 9254 static struct mlx5_flow_tunnel * 9255 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev, 9256 __rte_unused uint32_t id) 9257 { 9258 return NULL; 9259 } 9260 9261 static void 9262 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev, 9263 __rte_unused struct mlx5_flow_tunnel *tunnel) 9264 { 9265 } 9266 9267 static uint32_t 9268 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev, 9269 __rte_unused const struct mlx5_flow_tunnel *t, 9270 __rte_unused uint32_t group, 9271 __rte_unused uint32_t *table, 9272 struct rte_flow_error *error) 9273 { 9274 return rte_flow_error_set(error, ENOTSUP, 9275 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 9276 "tunnel offload requires DV support"); 9277 } 9278 9279 void 9280 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh, 9281 __rte_unused uint16_t port_id) 9282 { 9283 } 9284 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */ 9285 9286 static void 9287 mlx5_dbg__print_pattern(const struct rte_flow_item *item) 9288 { 9289 int ret; 9290 struct rte_flow_error error; 9291 9292 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) { 9293 char *item_name; 9294 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name, 9295 sizeof(item_name), 9296 (void *)(uintptr_t)item->type, &error); 9297 if (ret > 0) 9298 printf("%s ", item_name); 9299 else 9300 printf("%d\n", (int)item->type); 9301 } 9302 printf("END\n"); 9303 } 9304