1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright 2017 6WIND S.A. 3 * Copyright 2017 Mellanox Technologies, Ltd 4 */ 5 6 /** 7 * @file 8 * Flow API operations for mlx4 driver. 9 */ 10 11 #include <arpa/inet.h> 12 #include <assert.h> 13 #include <errno.h> 14 #include <stdalign.h> 15 #include <stddef.h> 16 #include <stdint.h> 17 #include <string.h> 18 #include <sys/queue.h> 19 20 /* Verbs headers do not support -pedantic. */ 21 #ifdef PEDANTIC 22 #pragma GCC diagnostic ignored "-Wpedantic" 23 #endif 24 #include <infiniband/verbs.h> 25 #ifdef PEDANTIC 26 #pragma GCC diagnostic error "-Wpedantic" 27 #endif 28 29 #include <rte_byteorder.h> 30 #include <rte_errno.h> 31 #include <rte_eth_ctrl.h> 32 #include <rte_ethdev_driver.h> 33 #include <rte_ether.h> 34 #include <rte_flow.h> 35 #include <rte_flow_driver.h> 36 #include <rte_malloc.h> 37 38 /* PMD headers. */ 39 #include "mlx4.h" 40 #include "mlx4_glue.h" 41 #include "mlx4_flow.h" 42 #include "mlx4_rxtx.h" 43 #include "mlx4_utils.h" 44 45 /** Static initializer for a list of subsequent item types. */ 46 #define NEXT_ITEM(...) \ 47 (const enum rte_flow_item_type []){ \ 48 __VA_ARGS__, RTE_FLOW_ITEM_TYPE_END, \ 49 } 50 51 /** Processor structure associated with a flow item. */ 52 struct mlx4_flow_proc_item { 53 /** Bit-mask for fields supported by this PMD. */ 54 const void *mask_support; 55 /** Bit-mask to use when @p item->mask is not provided. */ 56 const void *mask_default; 57 /** Size in bytes for @p mask_support and @p mask_default. */ 58 const unsigned int mask_sz; 59 /** Merge a pattern item into a flow rule handle. */ 60 int (*merge)(struct rte_flow *flow, 61 const struct rte_flow_item *item, 62 const struct mlx4_flow_proc_item *proc, 63 struct rte_flow_error *error); 64 /** Size in bytes of the destination structure. */ 65 const unsigned int dst_sz; 66 /** List of possible subsequent items. */ 67 const enum rte_flow_item_type *const next_item; 68 }; 69 70 /** Shared resources for drop flow rules. */ 71 struct mlx4_drop { 72 struct ibv_qp *qp; /**< QP target. */ 73 struct ibv_cq *cq; /**< CQ associated with above QP. */ 74 struct mlx4_priv *priv; /**< Back pointer to private data. */ 75 uint32_t refcnt; /**< Reference count. */ 76 }; 77 78 /** 79 * Convert supported RSS hash field types between DPDK and Verbs formats. 80 * 81 * This function returns the supported (default) set when @p types has 82 * special value 0. 83 * 84 * @param priv 85 * Pointer to private structure. 86 * @param types 87 * Depending on @p verbs_to_dpdk, hash types in either DPDK (see struct 88 * rte_eth_rss_conf) or Verbs format. 89 * @param verbs_to_dpdk 90 * A zero value converts @p types from DPDK to Verbs, a nonzero value 91 * performs the reverse operation. 92 * 93 * @return 94 * Converted RSS hash fields on success, (uint64_t)-1 otherwise and 95 * rte_errno is set. 96 */ 97 uint64_t 98 mlx4_conv_rss_types(struct mlx4_priv *priv, uint64_t types, int verbs_to_dpdk) 99 { 100 enum { 101 INNER, 102 IPV4, IPV4_1, IPV4_2, IPV6, IPV6_1, IPV6_2, IPV6_3, 103 TCP, UDP, 104 IPV4_TCP, IPV4_UDP, IPV6_TCP, IPV6_TCP_1, IPV6_UDP, IPV6_UDP_1, 105 }; 106 enum { 107 VERBS_IPV4 = IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_DST_IPV4, 108 VERBS_IPV6 = IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6, 109 VERBS_TCP = IBV_RX_HASH_SRC_PORT_TCP | IBV_RX_HASH_DST_PORT_TCP, 110 VERBS_UDP = IBV_RX_HASH_SRC_PORT_UDP | IBV_RX_HASH_DST_PORT_UDP, 111 }; 112 static const uint64_t dpdk[] = { 113 [INNER] = 0, 114 [IPV4] = ETH_RSS_IPV4, 115 [IPV4_1] = ETH_RSS_FRAG_IPV4, 116 [IPV4_2] = ETH_RSS_NONFRAG_IPV4_OTHER, 117 [IPV6] = ETH_RSS_IPV6, 118 [IPV6_1] = ETH_RSS_FRAG_IPV6, 119 [IPV6_2] = ETH_RSS_NONFRAG_IPV6_OTHER, 120 [IPV6_3] = ETH_RSS_IPV6_EX, 121 [TCP] = 0, 122 [UDP] = 0, 123 [IPV4_TCP] = ETH_RSS_NONFRAG_IPV4_TCP, 124 [IPV4_UDP] = ETH_RSS_NONFRAG_IPV4_UDP, 125 [IPV6_TCP] = ETH_RSS_NONFRAG_IPV6_TCP, 126 [IPV6_TCP_1] = ETH_RSS_IPV6_TCP_EX, 127 [IPV6_UDP] = ETH_RSS_NONFRAG_IPV6_UDP, 128 [IPV6_UDP_1] = ETH_RSS_IPV6_UDP_EX, 129 }; 130 static const uint64_t verbs[RTE_DIM(dpdk)] = { 131 [INNER] = IBV_RX_HASH_INNER, 132 [IPV4] = VERBS_IPV4, 133 [IPV4_1] = VERBS_IPV4, 134 [IPV4_2] = VERBS_IPV4, 135 [IPV6] = VERBS_IPV6, 136 [IPV6_1] = VERBS_IPV6, 137 [IPV6_2] = VERBS_IPV6, 138 [IPV6_3] = VERBS_IPV6, 139 [TCP] = VERBS_TCP, 140 [UDP] = VERBS_UDP, 141 [IPV4_TCP] = VERBS_IPV4 | VERBS_TCP, 142 [IPV4_UDP] = VERBS_IPV4 | VERBS_UDP, 143 [IPV6_TCP] = VERBS_IPV6 | VERBS_TCP, 144 [IPV6_TCP_1] = VERBS_IPV6 | VERBS_TCP, 145 [IPV6_UDP] = VERBS_IPV6 | VERBS_UDP, 146 [IPV6_UDP_1] = VERBS_IPV6 | VERBS_UDP, 147 }; 148 const uint64_t *in = verbs_to_dpdk ? verbs : dpdk; 149 const uint64_t *out = verbs_to_dpdk ? dpdk : verbs; 150 uint64_t seen = 0; 151 uint64_t conv = 0; 152 unsigned int i; 153 154 if (!types) { 155 if (!verbs_to_dpdk) 156 return priv->hw_rss_sup; 157 types = priv->hw_rss_sup; 158 } 159 for (i = 0; i != RTE_DIM(dpdk); ++i) 160 if (in[i] && (types & in[i]) == in[i]) { 161 seen |= types & in[i]; 162 conv |= out[i]; 163 } 164 if ((verbs_to_dpdk || (conv & priv->hw_rss_sup) == conv) && 165 !(types & ~seen)) 166 return conv; 167 rte_errno = ENOTSUP; 168 return (uint64_t)-1; 169 } 170 171 /** 172 * Merge Ethernet pattern item into flow rule handle. 173 * 174 * Additional mlx4-specific constraints on supported fields: 175 * 176 * - No support for partial masks, except in the specific case of matching 177 * all multicast traffic (@p spec->dst and @p mask->dst equal to 178 * 01:00:00:00:00:00). 179 * - Not providing @p item->spec or providing an empty @p mask->dst is 180 * *only* supported if the rule doesn't specify additional matching 181 * criteria (i.e. rule is promiscuous-like). 182 * 183 * @param[in, out] flow 184 * Flow rule handle to update. 185 * @param[in] item 186 * Pattern item to merge. 187 * @param[in] proc 188 * Associated item-processing object. 189 * @param[out] error 190 * Perform verbose error reporting if not NULL. 191 * 192 * @return 193 * 0 on success, a negative errno value otherwise and rte_errno is set. 194 */ 195 static int 196 mlx4_flow_merge_eth(struct rte_flow *flow, 197 const struct rte_flow_item *item, 198 const struct mlx4_flow_proc_item *proc, 199 struct rte_flow_error *error) 200 { 201 const struct rte_flow_item_eth *spec = item->spec; 202 const struct rte_flow_item_eth *mask = 203 spec ? (item->mask ? item->mask : proc->mask_default) : NULL; 204 struct ibv_flow_spec_eth *eth; 205 const char *msg; 206 unsigned int i; 207 208 if (mask) { 209 uint32_t sum_dst = 0; 210 uint32_t sum_src = 0; 211 212 for (i = 0; i != sizeof(mask->dst.addr_bytes); ++i) { 213 sum_dst += mask->dst.addr_bytes[i]; 214 sum_src += mask->src.addr_bytes[i]; 215 } 216 if (sum_src) { 217 msg = "mlx4 does not support source MAC matching"; 218 goto error; 219 } else if (!sum_dst) { 220 flow->promisc = 1; 221 } else if (sum_dst == 1 && mask->dst.addr_bytes[0] == 1) { 222 if (!(spec->dst.addr_bytes[0] & 1)) { 223 msg = "mlx4 does not support the explicit" 224 " exclusion of all multicast traffic"; 225 goto error; 226 } 227 flow->allmulti = 1; 228 } else if (sum_dst != (UINT8_C(0xff) * ETHER_ADDR_LEN)) { 229 msg = "mlx4 does not support matching partial" 230 " Ethernet fields"; 231 goto error; 232 } 233 } 234 if (!flow->ibv_attr) 235 return 0; 236 if (flow->promisc) { 237 flow->ibv_attr->type = IBV_FLOW_ATTR_ALL_DEFAULT; 238 return 0; 239 } 240 if (flow->allmulti) { 241 flow->ibv_attr->type = IBV_FLOW_ATTR_MC_DEFAULT; 242 return 0; 243 } 244 ++flow->ibv_attr->num_of_specs; 245 eth = (void *)((uintptr_t)flow->ibv_attr + flow->ibv_attr_size); 246 *eth = (struct ibv_flow_spec_eth) { 247 .type = IBV_FLOW_SPEC_ETH, 248 .size = sizeof(*eth), 249 }; 250 if (!mask) { 251 eth->val.dst_mac[0] = 0xff; 252 flow->ibv_attr->type = IBV_FLOW_ATTR_ALL_DEFAULT; 253 return 0; 254 } 255 memcpy(eth->val.dst_mac, spec->dst.addr_bytes, ETHER_ADDR_LEN); 256 memcpy(eth->mask.dst_mac, mask->dst.addr_bytes, ETHER_ADDR_LEN); 257 /* Remove unwanted bits from values. */ 258 for (i = 0; i < ETHER_ADDR_LEN; ++i) { 259 eth->val.dst_mac[i] &= eth->mask.dst_mac[i]; 260 } 261 return 0; 262 error: 263 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 264 item, msg); 265 } 266 267 /** 268 * Merge VLAN pattern item into flow rule handle. 269 * 270 * Additional mlx4-specific constraints on supported fields: 271 * 272 * - Matching *all* VLAN traffic by omitting @p item->spec or providing an 273 * empty @p item->mask would also include non-VLAN traffic. Doing so is 274 * therefore unsupported. 275 * - No support for partial masks. 276 * 277 * @param[in, out] flow 278 * Flow rule handle to update. 279 * @param[in] item 280 * Pattern item to merge. 281 * @param[in] proc 282 * Associated item-processing object. 283 * @param[out] error 284 * Perform verbose error reporting if not NULL. 285 * 286 * @return 287 * 0 on success, a negative errno value otherwise and rte_errno is set. 288 */ 289 static int 290 mlx4_flow_merge_vlan(struct rte_flow *flow, 291 const struct rte_flow_item *item, 292 const struct mlx4_flow_proc_item *proc, 293 struct rte_flow_error *error) 294 { 295 const struct rte_flow_item_vlan *spec = item->spec; 296 const struct rte_flow_item_vlan *mask = 297 spec ? (item->mask ? item->mask : proc->mask_default) : NULL; 298 struct ibv_flow_spec_eth *eth; 299 const char *msg; 300 301 if (!mask || !mask->tci) { 302 msg = "mlx4 cannot match all VLAN traffic while excluding" 303 " non-VLAN traffic, TCI VID must be specified"; 304 goto error; 305 } 306 if (mask->tci != RTE_BE16(0x0fff)) { 307 msg = "mlx4 does not support partial TCI VID matching"; 308 goto error; 309 } 310 if (!flow->ibv_attr) 311 return 0; 312 eth = (void *)((uintptr_t)flow->ibv_attr + flow->ibv_attr_size - 313 sizeof(*eth)); 314 eth->val.vlan_tag = spec->tci; 315 eth->mask.vlan_tag = mask->tci; 316 eth->val.vlan_tag &= eth->mask.vlan_tag; 317 if (flow->ibv_attr->type == IBV_FLOW_ATTR_ALL_DEFAULT) 318 flow->ibv_attr->type = IBV_FLOW_ATTR_NORMAL; 319 return 0; 320 error: 321 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 322 item, msg); 323 } 324 325 /** 326 * Merge IPv4 pattern item into flow rule handle. 327 * 328 * Additional mlx4-specific constraints on supported fields: 329 * 330 * - No support for partial masks. 331 * 332 * @param[in, out] flow 333 * Flow rule handle to update. 334 * @param[in] item 335 * Pattern item to merge. 336 * @param[in] proc 337 * Associated item-processing object. 338 * @param[out] error 339 * Perform verbose error reporting if not NULL. 340 * 341 * @return 342 * 0 on success, a negative errno value otherwise and rte_errno is set. 343 */ 344 static int 345 mlx4_flow_merge_ipv4(struct rte_flow *flow, 346 const struct rte_flow_item *item, 347 const struct mlx4_flow_proc_item *proc, 348 struct rte_flow_error *error) 349 { 350 const struct rte_flow_item_ipv4 *spec = item->spec; 351 const struct rte_flow_item_ipv4 *mask = 352 spec ? (item->mask ? item->mask : proc->mask_default) : NULL; 353 struct ibv_flow_spec_ipv4 *ipv4; 354 const char *msg; 355 356 if (mask && 357 ((uint32_t)(mask->hdr.src_addr + 1) > UINT32_C(1) || 358 (uint32_t)(mask->hdr.dst_addr + 1) > UINT32_C(1))) { 359 msg = "mlx4 does not support matching partial IPv4 fields"; 360 goto error; 361 } 362 if (!flow->ibv_attr) 363 return 0; 364 ++flow->ibv_attr->num_of_specs; 365 ipv4 = (void *)((uintptr_t)flow->ibv_attr + flow->ibv_attr_size); 366 *ipv4 = (struct ibv_flow_spec_ipv4) { 367 .type = IBV_FLOW_SPEC_IPV4, 368 .size = sizeof(*ipv4), 369 }; 370 if (!spec) 371 return 0; 372 ipv4->val = (struct ibv_flow_ipv4_filter) { 373 .src_ip = spec->hdr.src_addr, 374 .dst_ip = spec->hdr.dst_addr, 375 }; 376 ipv4->mask = (struct ibv_flow_ipv4_filter) { 377 .src_ip = mask->hdr.src_addr, 378 .dst_ip = mask->hdr.dst_addr, 379 }; 380 /* Remove unwanted bits from values. */ 381 ipv4->val.src_ip &= ipv4->mask.src_ip; 382 ipv4->val.dst_ip &= ipv4->mask.dst_ip; 383 return 0; 384 error: 385 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 386 item, msg); 387 } 388 389 /** 390 * Merge UDP pattern item into flow rule handle. 391 * 392 * Additional mlx4-specific constraints on supported fields: 393 * 394 * - No support for partial masks. 395 * - Due to HW/FW limitation, flow rule priority is not taken into account 396 * when matching UDP destination ports, doing is therefore only supported 397 * at the highest priority level (0). 398 * 399 * @param[in, out] flow 400 * Flow rule handle to update. 401 * @param[in] item 402 * Pattern item to merge. 403 * @param[in] proc 404 * Associated item-processing object. 405 * @param[out] error 406 * Perform verbose error reporting if not NULL. 407 * 408 * @return 409 * 0 on success, a negative errno value otherwise and rte_errno is set. 410 */ 411 static int 412 mlx4_flow_merge_udp(struct rte_flow *flow, 413 const struct rte_flow_item *item, 414 const struct mlx4_flow_proc_item *proc, 415 struct rte_flow_error *error) 416 { 417 const struct rte_flow_item_udp *spec = item->spec; 418 const struct rte_flow_item_udp *mask = 419 spec ? (item->mask ? item->mask : proc->mask_default) : NULL; 420 struct ibv_flow_spec_tcp_udp *udp; 421 const char *msg; 422 423 if (mask && 424 ((uint16_t)(mask->hdr.src_port + 1) > UINT16_C(1) || 425 (uint16_t)(mask->hdr.dst_port + 1) > UINT16_C(1))) { 426 msg = "mlx4 does not support matching partial UDP fields"; 427 goto error; 428 } 429 if (mask && mask->hdr.dst_port && flow->priority) { 430 msg = "combining UDP destination port matching with a nonzero" 431 " priority level is not supported"; 432 goto error; 433 } 434 if (!flow->ibv_attr) 435 return 0; 436 ++flow->ibv_attr->num_of_specs; 437 udp = (void *)((uintptr_t)flow->ibv_attr + flow->ibv_attr_size); 438 *udp = (struct ibv_flow_spec_tcp_udp) { 439 .type = IBV_FLOW_SPEC_UDP, 440 .size = sizeof(*udp), 441 }; 442 if (!spec) 443 return 0; 444 udp->val.dst_port = spec->hdr.dst_port; 445 udp->val.src_port = spec->hdr.src_port; 446 udp->mask.dst_port = mask->hdr.dst_port; 447 udp->mask.src_port = mask->hdr.src_port; 448 /* Remove unwanted bits from values. */ 449 udp->val.src_port &= udp->mask.src_port; 450 udp->val.dst_port &= udp->mask.dst_port; 451 return 0; 452 error: 453 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 454 item, msg); 455 } 456 457 /** 458 * Merge TCP pattern item into flow rule handle. 459 * 460 * Additional mlx4-specific constraints on supported fields: 461 * 462 * - No support for partial masks. 463 * 464 * @param[in, out] flow 465 * Flow rule handle to update. 466 * @param[in] item 467 * Pattern item to merge. 468 * @param[in] proc 469 * Associated item-processing object. 470 * @param[out] error 471 * Perform verbose error reporting if not NULL. 472 * 473 * @return 474 * 0 on success, a negative errno value otherwise and rte_errno is set. 475 */ 476 static int 477 mlx4_flow_merge_tcp(struct rte_flow *flow, 478 const struct rte_flow_item *item, 479 const struct mlx4_flow_proc_item *proc, 480 struct rte_flow_error *error) 481 { 482 const struct rte_flow_item_tcp *spec = item->spec; 483 const struct rte_flow_item_tcp *mask = 484 spec ? (item->mask ? item->mask : proc->mask_default) : NULL; 485 struct ibv_flow_spec_tcp_udp *tcp; 486 const char *msg; 487 488 if (mask && 489 ((uint16_t)(mask->hdr.src_port + 1) > UINT16_C(1) || 490 (uint16_t)(mask->hdr.dst_port + 1) > UINT16_C(1))) { 491 msg = "mlx4 does not support matching partial TCP fields"; 492 goto error; 493 } 494 if (!flow->ibv_attr) 495 return 0; 496 ++flow->ibv_attr->num_of_specs; 497 tcp = (void *)((uintptr_t)flow->ibv_attr + flow->ibv_attr_size); 498 *tcp = (struct ibv_flow_spec_tcp_udp) { 499 .type = IBV_FLOW_SPEC_TCP, 500 .size = sizeof(*tcp), 501 }; 502 if (!spec) 503 return 0; 504 tcp->val.dst_port = spec->hdr.dst_port; 505 tcp->val.src_port = spec->hdr.src_port; 506 tcp->mask.dst_port = mask->hdr.dst_port; 507 tcp->mask.src_port = mask->hdr.src_port; 508 /* Remove unwanted bits from values. */ 509 tcp->val.src_port &= tcp->mask.src_port; 510 tcp->val.dst_port &= tcp->mask.dst_port; 511 return 0; 512 error: 513 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 514 item, msg); 515 } 516 517 /** 518 * Perform basic sanity checks on a pattern item. 519 * 520 * @param[in] item 521 * Item specification. 522 * @param[in] proc 523 * Associated item-processing object. 524 * @param[out] error 525 * Perform verbose error reporting if not NULL. 526 * 527 * @return 528 * 0 on success, a negative errno value otherwise and rte_errno is set. 529 */ 530 static int 531 mlx4_flow_item_check(const struct rte_flow_item *item, 532 const struct mlx4_flow_proc_item *proc, 533 struct rte_flow_error *error) 534 { 535 const uint8_t *mask; 536 unsigned int i; 537 538 /* item->last and item->mask cannot exist without item->spec. */ 539 if (!item->spec && (item->mask || item->last)) 540 return rte_flow_error_set 541 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM, item, 542 "\"mask\" or \"last\" field provided without a" 543 " corresponding \"spec\""); 544 /* No spec, no mask, no problem. */ 545 if (!item->spec) 546 return 0; 547 mask = item->mask ? 548 (const uint8_t *)item->mask : 549 (const uint8_t *)proc->mask_default; 550 assert(mask); 551 /* 552 * Single-pass check to make sure that: 553 * - Mask is supported, no bits are set outside proc->mask_support. 554 * - Both item->spec and item->last are included in mask. 555 */ 556 for (i = 0; i != proc->mask_sz; ++i) { 557 if (!mask[i]) 558 continue; 559 if ((mask[i] | ((const uint8_t *)proc->mask_support)[i]) != 560 ((const uint8_t *)proc->mask_support)[i]) 561 return rte_flow_error_set 562 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 563 item, "unsupported field found in \"mask\""); 564 if (item->last && 565 (((const uint8_t *)item->spec)[i] & mask[i]) != 566 (((const uint8_t *)item->last)[i] & mask[i])) 567 return rte_flow_error_set 568 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 569 item, 570 "range between \"spec\" and \"last\"" 571 " is larger than \"mask\""); 572 } 573 return 0; 574 } 575 576 /** Graph of supported items and associated actions. */ 577 static const struct mlx4_flow_proc_item mlx4_flow_proc_item_list[] = { 578 [RTE_FLOW_ITEM_TYPE_END] = { 579 .next_item = NEXT_ITEM(RTE_FLOW_ITEM_TYPE_ETH), 580 }, 581 [RTE_FLOW_ITEM_TYPE_ETH] = { 582 .next_item = NEXT_ITEM(RTE_FLOW_ITEM_TYPE_VLAN, 583 RTE_FLOW_ITEM_TYPE_IPV4), 584 .mask_support = &(const struct rte_flow_item_eth){ 585 /* Only destination MAC can be matched. */ 586 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 587 }, 588 .mask_default = &rte_flow_item_eth_mask, 589 .mask_sz = sizeof(struct rte_flow_item_eth), 590 .merge = mlx4_flow_merge_eth, 591 .dst_sz = sizeof(struct ibv_flow_spec_eth), 592 }, 593 [RTE_FLOW_ITEM_TYPE_VLAN] = { 594 .next_item = NEXT_ITEM(RTE_FLOW_ITEM_TYPE_IPV4), 595 .mask_support = &(const struct rte_flow_item_vlan){ 596 /* Only TCI VID matching is supported. */ 597 .tci = RTE_BE16(0x0fff), 598 }, 599 .mask_default = &rte_flow_item_vlan_mask, 600 .mask_sz = sizeof(struct rte_flow_item_vlan), 601 .merge = mlx4_flow_merge_vlan, 602 .dst_sz = 0, 603 }, 604 [RTE_FLOW_ITEM_TYPE_IPV4] = { 605 .next_item = NEXT_ITEM(RTE_FLOW_ITEM_TYPE_UDP, 606 RTE_FLOW_ITEM_TYPE_TCP), 607 .mask_support = &(const struct rte_flow_item_ipv4){ 608 .hdr = { 609 .src_addr = RTE_BE32(0xffffffff), 610 .dst_addr = RTE_BE32(0xffffffff), 611 }, 612 }, 613 .mask_default = &rte_flow_item_ipv4_mask, 614 .mask_sz = sizeof(struct rte_flow_item_ipv4), 615 .merge = mlx4_flow_merge_ipv4, 616 .dst_sz = sizeof(struct ibv_flow_spec_ipv4), 617 }, 618 [RTE_FLOW_ITEM_TYPE_UDP] = { 619 .mask_support = &(const struct rte_flow_item_udp){ 620 .hdr = { 621 .src_port = RTE_BE16(0xffff), 622 .dst_port = RTE_BE16(0xffff), 623 }, 624 }, 625 .mask_default = &rte_flow_item_udp_mask, 626 .mask_sz = sizeof(struct rte_flow_item_udp), 627 .merge = mlx4_flow_merge_udp, 628 .dst_sz = sizeof(struct ibv_flow_spec_tcp_udp), 629 }, 630 [RTE_FLOW_ITEM_TYPE_TCP] = { 631 .mask_support = &(const struct rte_flow_item_tcp){ 632 .hdr = { 633 .src_port = RTE_BE16(0xffff), 634 .dst_port = RTE_BE16(0xffff), 635 }, 636 }, 637 .mask_default = &rte_flow_item_tcp_mask, 638 .mask_sz = sizeof(struct rte_flow_item_tcp), 639 .merge = mlx4_flow_merge_tcp, 640 .dst_sz = sizeof(struct ibv_flow_spec_tcp_udp), 641 }, 642 }; 643 644 /** 645 * Make sure a flow rule is supported and initialize associated structure. 646 * 647 * @param priv 648 * Pointer to private structure. 649 * @param[in] attr 650 * Flow rule attributes. 651 * @param[in] pattern 652 * Pattern specification (list terminated by the END pattern item). 653 * @param[in] actions 654 * Associated actions (list terminated by the END action). 655 * @param[out] error 656 * Perform verbose error reporting if not NULL. 657 * @param[in, out] addr 658 * Buffer where the resulting flow rule handle pointer must be stored. 659 * If NULL, stop processing after validation stage. 660 * 661 * @return 662 * 0 on success, a negative errno value otherwise and rte_errno is set. 663 */ 664 static int 665 mlx4_flow_prepare(struct mlx4_priv *priv, 666 const struct rte_flow_attr *attr, 667 const struct rte_flow_item pattern[], 668 const struct rte_flow_action actions[], 669 struct rte_flow_error *error, 670 struct rte_flow **addr) 671 { 672 const struct rte_flow_item *item; 673 const struct rte_flow_action *action; 674 const struct mlx4_flow_proc_item *proc; 675 struct rte_flow temp = { .ibv_attr_size = sizeof(*temp.ibv_attr) }; 676 struct rte_flow *flow = &temp; 677 const char *msg = NULL; 678 int overlap; 679 680 if (attr->group) 681 return rte_flow_error_set 682 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_GROUP, 683 NULL, "groups are not supported"); 684 if (attr->priority > MLX4_FLOW_PRIORITY_LAST) 685 return rte_flow_error_set 686 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, 687 NULL, "maximum priority level is " 688 MLX4_STR_EXPAND(MLX4_FLOW_PRIORITY_LAST)); 689 if (attr->egress) 690 return rte_flow_error_set 691 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, 692 NULL, "egress is not supported"); 693 if (attr->transfer) 694 return rte_flow_error_set 695 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER, 696 NULL, "transfer is not supported"); 697 if (!attr->ingress) 698 return rte_flow_error_set 699 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, 700 NULL, "only ingress is supported"); 701 fill: 702 overlap = 0; 703 proc = mlx4_flow_proc_item_list; 704 flow->priority = attr->priority; 705 /* Go over pattern. */ 706 for (item = pattern; item->type; ++item) { 707 const struct mlx4_flow_proc_item *next = NULL; 708 unsigned int i; 709 int err; 710 711 if (item->type == RTE_FLOW_ITEM_TYPE_VOID) 712 continue; 713 if (item->type == MLX4_FLOW_ITEM_TYPE_INTERNAL) { 714 flow->internal = 1; 715 continue; 716 } 717 if (flow->promisc || flow->allmulti) { 718 msg = "mlx4 does not support additional matching" 719 " criteria combined with indiscriminate" 720 " matching on Ethernet headers"; 721 goto exit_item_not_supported; 722 } 723 for (i = 0; proc->next_item && proc->next_item[i]; ++i) { 724 if (proc->next_item[i] == item->type) { 725 next = &mlx4_flow_proc_item_list[item->type]; 726 break; 727 } 728 } 729 if (!next) 730 goto exit_item_not_supported; 731 proc = next; 732 /* 733 * Perform basic sanity checks only once, while handle is 734 * not allocated. 735 */ 736 if (flow == &temp) { 737 err = mlx4_flow_item_check(item, proc, error); 738 if (err) 739 return err; 740 } 741 if (proc->merge) { 742 err = proc->merge(flow, item, proc, error); 743 if (err) 744 return err; 745 } 746 flow->ibv_attr_size += proc->dst_sz; 747 } 748 /* Go over actions list. */ 749 for (action = actions; action->type; ++action) { 750 /* This one may appear anywhere multiple times. */ 751 if (action->type == RTE_FLOW_ACTION_TYPE_VOID) 752 continue; 753 /* Fate-deciding actions may appear exactly once. */ 754 if (overlap) { 755 msg = "cannot combine several fate-deciding actions," 756 " choose between DROP, QUEUE or RSS"; 757 goto exit_action_not_supported; 758 } 759 overlap = 1; 760 switch (action->type) { 761 const struct rte_flow_action_queue *queue; 762 const struct rte_flow_action_rss *rss; 763 const uint8_t *rss_key; 764 uint32_t rss_key_len; 765 uint64_t fields; 766 unsigned int i; 767 768 case RTE_FLOW_ACTION_TYPE_DROP: 769 flow->drop = 1; 770 break; 771 case RTE_FLOW_ACTION_TYPE_QUEUE: 772 if (flow->rss) 773 break; 774 queue = action->conf; 775 if (queue->index >= priv->dev->data->nb_rx_queues) { 776 msg = "queue target index beyond number of" 777 " configured Rx queues"; 778 goto exit_action_not_supported; 779 } 780 flow->rss = mlx4_rss_get 781 (priv, 0, mlx4_rss_hash_key_default, 1, 782 &queue->index); 783 if (!flow->rss) { 784 msg = "not enough resources for additional" 785 " single-queue RSS context"; 786 goto exit_action_not_supported; 787 } 788 break; 789 case RTE_FLOW_ACTION_TYPE_RSS: 790 if (flow->rss) 791 break; 792 rss = action->conf; 793 /* Default RSS configuration if none is provided. */ 794 if (rss->key_len) { 795 rss_key = rss->key; 796 rss_key_len = rss->key_len; 797 } else { 798 rss_key = mlx4_rss_hash_key_default; 799 rss_key_len = MLX4_RSS_HASH_KEY_SIZE; 800 } 801 /* Sanity checks. */ 802 for (i = 0; i < rss->queue_num; ++i) 803 if (rss->queue[i] >= 804 priv->dev->data->nb_rx_queues) 805 break; 806 if (i != rss->queue_num) { 807 msg = "queue index target beyond number of" 808 " configured Rx queues"; 809 goto exit_action_not_supported; 810 } 811 if (!rte_is_power_of_2(rss->queue_num)) { 812 msg = "for RSS, mlx4 requires the number of" 813 " queues to be a power of two"; 814 goto exit_action_not_supported; 815 } 816 if (rss_key_len != sizeof(flow->rss->key)) { 817 msg = "mlx4 supports exactly one RSS hash key" 818 " length: " 819 MLX4_STR_EXPAND(MLX4_RSS_HASH_KEY_SIZE); 820 goto exit_action_not_supported; 821 } 822 for (i = 1; i < rss->queue_num; ++i) 823 if (rss->queue[i] - rss->queue[i - 1] != 1) 824 break; 825 if (i != rss->queue_num) { 826 msg = "mlx4 requires RSS contexts to use" 827 " consecutive queue indices only"; 828 goto exit_action_not_supported; 829 } 830 if (rss->queue[0] % rss->queue_num) { 831 msg = "mlx4 requires the first queue of a RSS" 832 " context to be aligned on a multiple" 833 " of the context size"; 834 goto exit_action_not_supported; 835 } 836 if (rss->func && 837 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ) { 838 msg = "the only supported RSS hash function" 839 " is Toeplitz"; 840 goto exit_action_not_supported; 841 } 842 if (rss->level) { 843 msg = "a nonzero RSS encapsulation level is" 844 " not supported"; 845 goto exit_action_not_supported; 846 } 847 rte_errno = 0; 848 fields = mlx4_conv_rss_types(priv, rss->types, 0); 849 if (fields == (uint64_t)-1 && rte_errno) { 850 msg = "unsupported RSS hash type requested"; 851 goto exit_action_not_supported; 852 } 853 flow->rss = mlx4_rss_get 854 (priv, fields, rss_key, rss->queue_num, 855 rss->queue); 856 if (!flow->rss) { 857 msg = "either invalid parameters or not enough" 858 " resources for additional multi-queue" 859 " RSS context"; 860 goto exit_action_not_supported; 861 } 862 break; 863 default: 864 goto exit_action_not_supported; 865 } 866 } 867 /* When fate is unknown, drop traffic. */ 868 if (!overlap) 869 flow->drop = 1; 870 /* Validation ends here. */ 871 if (!addr) { 872 if (flow->rss) 873 mlx4_rss_put(flow->rss); 874 return 0; 875 } 876 if (flow == &temp) { 877 /* Allocate proper handle based on collected data. */ 878 const struct mlx4_malloc_vec vec[] = { 879 { 880 .align = alignof(struct rte_flow), 881 .size = sizeof(*flow), 882 .addr = (void **)&flow, 883 }, 884 { 885 .align = alignof(struct ibv_flow_attr), 886 .size = temp.ibv_attr_size, 887 .addr = (void **)&temp.ibv_attr, 888 }, 889 }; 890 891 if (!mlx4_zmallocv(__func__, vec, RTE_DIM(vec))) { 892 if (temp.rss) 893 mlx4_rss_put(temp.rss); 894 return rte_flow_error_set 895 (error, -rte_errno, 896 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 897 "flow rule handle allocation failure"); 898 } 899 /* Most fields will be updated by second pass. */ 900 *flow = (struct rte_flow){ 901 .ibv_attr = temp.ibv_attr, 902 .ibv_attr_size = sizeof(*flow->ibv_attr), 903 .rss = temp.rss, 904 }; 905 *flow->ibv_attr = (struct ibv_flow_attr){ 906 .type = IBV_FLOW_ATTR_NORMAL, 907 .size = sizeof(*flow->ibv_attr), 908 .priority = attr->priority, 909 .port = priv->port, 910 }; 911 goto fill; 912 } 913 *addr = flow; 914 return 0; 915 exit_item_not_supported: 916 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, 917 item, msg ? msg : "item not supported"); 918 exit_action_not_supported: 919 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, 920 action, msg ? msg : "action not supported"); 921 } 922 923 /** 924 * Validate a flow supported by the NIC. 925 * 926 * @see rte_flow_validate() 927 * @see rte_flow_ops 928 */ 929 static int 930 mlx4_flow_validate(struct rte_eth_dev *dev, 931 const struct rte_flow_attr *attr, 932 const struct rte_flow_item pattern[], 933 const struct rte_flow_action actions[], 934 struct rte_flow_error *error) 935 { 936 struct mlx4_priv *priv = dev->data->dev_private; 937 938 return mlx4_flow_prepare(priv, attr, pattern, actions, error, NULL); 939 } 940 941 /** 942 * Get a drop flow rule resources instance. 943 * 944 * @param priv 945 * Pointer to private structure. 946 * 947 * @return 948 * Pointer to drop flow resources on success, NULL otherwise and rte_errno 949 * is set. 950 */ 951 static struct mlx4_drop * 952 mlx4_drop_get(struct mlx4_priv *priv) 953 { 954 struct mlx4_drop *drop = priv->drop; 955 956 if (drop) { 957 assert(drop->refcnt); 958 assert(drop->priv == priv); 959 ++drop->refcnt; 960 return drop; 961 } 962 drop = rte_malloc(__func__, sizeof(*drop), 0); 963 if (!drop) 964 goto error; 965 *drop = (struct mlx4_drop){ 966 .priv = priv, 967 .refcnt = 1, 968 }; 969 drop->cq = mlx4_glue->create_cq(priv->ctx, 1, NULL, NULL, 0); 970 if (!drop->cq) 971 goto error; 972 drop->qp = mlx4_glue->create_qp 973 (priv->pd, 974 &(struct ibv_qp_init_attr){ 975 .send_cq = drop->cq, 976 .recv_cq = drop->cq, 977 .qp_type = IBV_QPT_RAW_PACKET, 978 }); 979 if (!drop->qp) 980 goto error; 981 priv->drop = drop; 982 return drop; 983 error: 984 if (drop->qp) 985 claim_zero(mlx4_glue->destroy_qp(drop->qp)); 986 if (drop->cq) 987 claim_zero(mlx4_glue->destroy_cq(drop->cq)); 988 if (drop) 989 rte_free(drop); 990 rte_errno = ENOMEM; 991 return NULL; 992 } 993 994 /** 995 * Give back a drop flow rule resources instance. 996 * 997 * @param drop 998 * Pointer to drop flow rule resources. 999 */ 1000 static void 1001 mlx4_drop_put(struct mlx4_drop *drop) 1002 { 1003 assert(drop->refcnt); 1004 if (--drop->refcnt) 1005 return; 1006 drop->priv->drop = NULL; 1007 claim_zero(mlx4_glue->destroy_qp(drop->qp)); 1008 claim_zero(mlx4_glue->destroy_cq(drop->cq)); 1009 rte_free(drop); 1010 } 1011 1012 /** 1013 * Toggle a configured flow rule. 1014 * 1015 * @param priv 1016 * Pointer to private structure. 1017 * @param flow 1018 * Flow rule handle to toggle. 1019 * @param enable 1020 * Whether associated Verbs flow must be created or removed. 1021 * @param[out] error 1022 * Perform verbose error reporting if not NULL. 1023 * 1024 * @return 1025 * 0 on success, a negative errno value otherwise and rte_errno is set. 1026 */ 1027 static int 1028 mlx4_flow_toggle(struct mlx4_priv *priv, 1029 struct rte_flow *flow, 1030 int enable, 1031 struct rte_flow_error *error) 1032 { 1033 struct ibv_qp *qp = NULL; 1034 const char *msg; 1035 int err; 1036 1037 if (!enable) { 1038 if (!flow->ibv_flow) 1039 return 0; 1040 claim_zero(mlx4_glue->destroy_flow(flow->ibv_flow)); 1041 flow->ibv_flow = NULL; 1042 if (flow->drop) 1043 mlx4_drop_put(priv->drop); 1044 else if (flow->rss) 1045 mlx4_rss_detach(flow->rss); 1046 return 0; 1047 } 1048 assert(flow->ibv_attr); 1049 if (!flow->internal && 1050 !priv->isolated && 1051 flow->ibv_attr->priority == MLX4_FLOW_PRIORITY_LAST) { 1052 if (flow->ibv_flow) { 1053 claim_zero(mlx4_glue->destroy_flow(flow->ibv_flow)); 1054 flow->ibv_flow = NULL; 1055 if (flow->drop) 1056 mlx4_drop_put(priv->drop); 1057 else if (flow->rss) 1058 mlx4_rss_detach(flow->rss); 1059 } 1060 err = EACCES; 1061 msg = ("priority level " 1062 MLX4_STR_EXPAND(MLX4_FLOW_PRIORITY_LAST) 1063 " is reserved when not in isolated mode"); 1064 goto error; 1065 } 1066 if (flow->rss) { 1067 struct mlx4_rss *rss = flow->rss; 1068 int missing = 0; 1069 unsigned int i; 1070 1071 /* Stop at the first nonexistent target queue. */ 1072 for (i = 0; i != rss->queues; ++i) 1073 if (rss->queue_id[i] >= 1074 priv->dev->data->nb_rx_queues || 1075 !priv->dev->data->rx_queues[rss->queue_id[i]]) { 1076 missing = 1; 1077 break; 1078 } 1079 if (flow->ibv_flow) { 1080 if (missing ^ !flow->drop) 1081 return 0; 1082 /* Verbs flow needs updating. */ 1083 claim_zero(mlx4_glue->destroy_flow(flow->ibv_flow)); 1084 flow->ibv_flow = NULL; 1085 if (flow->drop) 1086 mlx4_drop_put(priv->drop); 1087 else 1088 mlx4_rss_detach(rss); 1089 } 1090 if (!missing) { 1091 err = mlx4_rss_attach(rss); 1092 if (err) { 1093 err = -err; 1094 msg = "cannot create indirection table or hash" 1095 " QP to associate flow rule with"; 1096 goto error; 1097 } 1098 qp = rss->qp; 1099 } 1100 /* A missing target queue drops traffic implicitly. */ 1101 flow->drop = missing; 1102 } 1103 if (flow->drop) { 1104 if (flow->ibv_flow) 1105 return 0; 1106 mlx4_drop_get(priv); 1107 if (!priv->drop) { 1108 err = rte_errno; 1109 msg = "resources for drop flow rule cannot be created"; 1110 goto error; 1111 } 1112 qp = priv->drop->qp; 1113 } 1114 assert(qp); 1115 if (flow->ibv_flow) 1116 return 0; 1117 flow->ibv_flow = mlx4_glue->create_flow(qp, flow->ibv_attr); 1118 if (flow->ibv_flow) 1119 return 0; 1120 if (flow->drop) 1121 mlx4_drop_put(priv->drop); 1122 else if (flow->rss) 1123 mlx4_rss_detach(flow->rss); 1124 err = errno; 1125 msg = "flow rule rejected by device"; 1126 error: 1127 return rte_flow_error_set 1128 (error, err, RTE_FLOW_ERROR_TYPE_HANDLE, flow, msg); 1129 } 1130 1131 /** 1132 * Create a flow. 1133 * 1134 * @see rte_flow_create() 1135 * @see rte_flow_ops 1136 */ 1137 static struct rte_flow * 1138 mlx4_flow_create(struct rte_eth_dev *dev, 1139 const struct rte_flow_attr *attr, 1140 const struct rte_flow_item pattern[], 1141 const struct rte_flow_action actions[], 1142 struct rte_flow_error *error) 1143 { 1144 struct mlx4_priv *priv = dev->data->dev_private; 1145 struct rte_flow *flow; 1146 int err; 1147 1148 err = mlx4_flow_prepare(priv, attr, pattern, actions, error, &flow); 1149 if (err) 1150 return NULL; 1151 err = mlx4_flow_toggle(priv, flow, priv->started, error); 1152 if (!err) { 1153 struct rte_flow *curr = LIST_FIRST(&priv->flows); 1154 1155 /* New rules are inserted after internal ones. */ 1156 if (!curr || !curr->internal) { 1157 LIST_INSERT_HEAD(&priv->flows, flow, next); 1158 } else { 1159 while (LIST_NEXT(curr, next) && 1160 LIST_NEXT(curr, next)->internal) 1161 curr = LIST_NEXT(curr, next); 1162 LIST_INSERT_AFTER(curr, flow, next); 1163 } 1164 return flow; 1165 } 1166 if (flow->rss) 1167 mlx4_rss_put(flow->rss); 1168 rte_flow_error_set(error, -err, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, 1169 error->message); 1170 rte_free(flow); 1171 return NULL; 1172 } 1173 1174 /** 1175 * Configure isolated mode. 1176 * 1177 * @see rte_flow_isolate() 1178 * @see rte_flow_ops 1179 */ 1180 static int 1181 mlx4_flow_isolate(struct rte_eth_dev *dev, 1182 int enable, 1183 struct rte_flow_error *error) 1184 { 1185 struct mlx4_priv *priv = dev->data->dev_private; 1186 1187 if (!!enable == !!priv->isolated) 1188 return 0; 1189 priv->isolated = !!enable; 1190 if (mlx4_flow_sync(priv, error)) { 1191 priv->isolated = !enable; 1192 return -rte_errno; 1193 } 1194 return 0; 1195 } 1196 1197 /** 1198 * Destroy a flow rule. 1199 * 1200 * @see rte_flow_destroy() 1201 * @see rte_flow_ops 1202 */ 1203 static int 1204 mlx4_flow_destroy(struct rte_eth_dev *dev, 1205 struct rte_flow *flow, 1206 struct rte_flow_error *error) 1207 { 1208 struct mlx4_priv *priv = dev->data->dev_private; 1209 int err = mlx4_flow_toggle(priv, flow, 0, error); 1210 1211 if (err) 1212 return err; 1213 LIST_REMOVE(flow, next); 1214 if (flow->rss) 1215 mlx4_rss_put(flow->rss); 1216 rte_free(flow); 1217 return 0; 1218 } 1219 1220 /** 1221 * Destroy user-configured flow rules. 1222 * 1223 * This function skips internal flows rules. 1224 * 1225 * @see rte_flow_flush() 1226 * @see rte_flow_ops 1227 */ 1228 static int 1229 mlx4_flow_flush(struct rte_eth_dev *dev, 1230 struct rte_flow_error *error) 1231 { 1232 struct mlx4_priv *priv = dev->data->dev_private; 1233 struct rte_flow *flow = LIST_FIRST(&priv->flows); 1234 1235 while (flow) { 1236 struct rte_flow *next = LIST_NEXT(flow, next); 1237 1238 if (!flow->internal) 1239 mlx4_flow_destroy(dev, flow, error); 1240 flow = next; 1241 } 1242 return 0; 1243 } 1244 1245 /** 1246 * Helper function to determine the next configured VLAN filter. 1247 * 1248 * @param priv 1249 * Pointer to private structure. 1250 * @param vlan 1251 * VLAN ID to use as a starting point. 1252 * 1253 * @return 1254 * Next configured VLAN ID or a high value (>= 4096) if there is none. 1255 */ 1256 static uint16_t 1257 mlx4_flow_internal_next_vlan(struct mlx4_priv *priv, uint16_t vlan) 1258 { 1259 while (vlan < 4096) { 1260 if (priv->dev->data->vlan_filter_conf.ids[vlan / 64] & 1261 (UINT64_C(1) << (vlan % 64))) 1262 return vlan; 1263 ++vlan; 1264 } 1265 return vlan; 1266 } 1267 1268 /** 1269 * Generate internal flow rules. 1270 * 1271 * Various flow rules are created depending on the mode the device is in: 1272 * 1273 * 1. Promiscuous: 1274 * port MAC + broadcast + catch-all (VLAN filtering is ignored). 1275 * 2. All multicast: 1276 * port MAC/VLAN + broadcast + catch-all multicast. 1277 * 3. Otherwise: 1278 * port MAC/VLAN + broadcast MAC/VLAN. 1279 * 1280 * About MAC flow rules: 1281 * 1282 * - MAC flow rules are generated from @p dev->data->mac_addrs 1283 * (@p priv->mac array). 1284 * - An additional flow rule for Ethernet broadcasts is also generated. 1285 * - All these are per-VLAN if @p DEV_RX_OFFLOAD_VLAN_FILTER 1286 * is enabled and VLAN filters are configured. 1287 * 1288 * @param priv 1289 * Pointer to private structure. 1290 * @param[out] error 1291 * Perform verbose error reporting if not NULL. 1292 * 1293 * @return 1294 * 0 on success, a negative errno value otherwise and rte_errno is set. 1295 */ 1296 static int 1297 mlx4_flow_internal(struct mlx4_priv *priv, struct rte_flow_error *error) 1298 { 1299 struct rte_flow_attr attr = { 1300 .priority = MLX4_FLOW_PRIORITY_LAST, 1301 .ingress = 1, 1302 }; 1303 struct rte_flow_item_eth eth_spec; 1304 const struct rte_flow_item_eth eth_mask = { 1305 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff", 1306 }; 1307 const struct rte_flow_item_eth eth_allmulti = { 1308 .dst.addr_bytes = "\x01\x00\x00\x00\x00\x00", 1309 }; 1310 struct rte_flow_item_vlan vlan_spec; 1311 const struct rte_flow_item_vlan vlan_mask = { 1312 .tci = RTE_BE16(0x0fff), 1313 }; 1314 struct rte_flow_item pattern[] = { 1315 { 1316 .type = MLX4_FLOW_ITEM_TYPE_INTERNAL, 1317 }, 1318 { 1319 .type = RTE_FLOW_ITEM_TYPE_ETH, 1320 .spec = ð_spec, 1321 .mask = ð_mask, 1322 }, 1323 { 1324 /* Replaced with VLAN if filtering is enabled. */ 1325 .type = RTE_FLOW_ITEM_TYPE_END, 1326 }, 1327 { 1328 .type = RTE_FLOW_ITEM_TYPE_END, 1329 }, 1330 }; 1331 /* 1332 * Round number of queues down to their previous power of 2 to 1333 * comply with RSS context limitations. Extra queues silently do not 1334 * get RSS by default. 1335 */ 1336 uint32_t queues = 1337 rte_align32pow2(priv->dev->data->nb_rx_queues + 1) >> 1; 1338 uint16_t queue[queues]; 1339 struct rte_flow_action_rss action_rss = { 1340 .func = RTE_ETH_HASH_FUNCTION_DEFAULT, 1341 .level = 0, 1342 .types = 0, 1343 .key_len = MLX4_RSS_HASH_KEY_SIZE, 1344 .queue_num = queues, 1345 .key = mlx4_rss_hash_key_default, 1346 .queue = queue, 1347 }; 1348 struct rte_flow_action actions[] = { 1349 { 1350 .type = RTE_FLOW_ACTION_TYPE_RSS, 1351 .conf = &action_rss, 1352 }, 1353 { 1354 .type = RTE_FLOW_ACTION_TYPE_END, 1355 }, 1356 }; 1357 struct ether_addr *rule_mac = ð_spec.dst; 1358 rte_be16_t *rule_vlan = 1359 (priv->dev->data->dev_conf.rxmode.offloads & 1360 DEV_RX_OFFLOAD_VLAN_FILTER) && 1361 !priv->dev->data->promiscuous ? 1362 &vlan_spec.tci : 1363 NULL; 1364 uint16_t vlan = 0; 1365 struct rte_flow *flow; 1366 unsigned int i; 1367 int err = 0; 1368 1369 /* Nothing to be done if there are no Rx queues. */ 1370 if (!queues) 1371 goto error; 1372 /* Prepare default RSS configuration. */ 1373 for (i = 0; i != queues; ++i) 1374 queue[i] = i; 1375 /* 1376 * Set up VLAN item if filtering is enabled and at least one VLAN 1377 * filter is configured. 1378 */ 1379 if (rule_vlan) { 1380 vlan = mlx4_flow_internal_next_vlan(priv, 0); 1381 if (vlan < 4096) { 1382 pattern[2] = (struct rte_flow_item){ 1383 .type = RTE_FLOW_ITEM_TYPE_VLAN, 1384 .spec = &vlan_spec, 1385 .mask = &vlan_mask, 1386 }; 1387 next_vlan: 1388 *rule_vlan = rte_cpu_to_be_16(vlan); 1389 } else { 1390 rule_vlan = NULL; 1391 } 1392 } 1393 for (i = 0; i != RTE_DIM(priv->mac) + 1; ++i) { 1394 const struct ether_addr *mac; 1395 1396 /* Broadcasts are handled by an extra iteration. */ 1397 if (i < RTE_DIM(priv->mac)) 1398 mac = &priv->mac[i]; 1399 else 1400 mac = ð_mask.dst; 1401 if (is_zero_ether_addr(mac)) 1402 continue; 1403 /* Check if MAC flow rule is already present. */ 1404 for (flow = LIST_FIRST(&priv->flows); 1405 flow && flow->internal; 1406 flow = LIST_NEXT(flow, next)) { 1407 const struct ibv_flow_spec_eth *eth = 1408 (const void *)((uintptr_t)flow->ibv_attr + 1409 sizeof(*flow->ibv_attr)); 1410 unsigned int j; 1411 1412 if (!flow->mac) 1413 continue; 1414 assert(flow->ibv_attr->type == IBV_FLOW_ATTR_NORMAL); 1415 assert(flow->ibv_attr->num_of_specs == 1); 1416 assert(eth->type == IBV_FLOW_SPEC_ETH); 1417 assert(flow->rss); 1418 if (rule_vlan && 1419 (eth->val.vlan_tag != *rule_vlan || 1420 eth->mask.vlan_tag != RTE_BE16(0x0fff))) 1421 continue; 1422 if (!rule_vlan && eth->mask.vlan_tag) 1423 continue; 1424 for (j = 0; j != sizeof(mac->addr_bytes); ++j) 1425 if (eth->val.dst_mac[j] != mac->addr_bytes[j] || 1426 eth->mask.dst_mac[j] != UINT8_C(0xff) || 1427 eth->val.src_mac[j] != UINT8_C(0x00) || 1428 eth->mask.src_mac[j] != UINT8_C(0x00)) 1429 break; 1430 if (j != sizeof(mac->addr_bytes)) 1431 continue; 1432 if (flow->rss->queues != queues || 1433 memcmp(flow->rss->queue_id, action_rss.queue, 1434 queues * sizeof(flow->rss->queue_id[0]))) 1435 continue; 1436 break; 1437 } 1438 if (!flow || !flow->internal) { 1439 /* Not found, create a new flow rule. */ 1440 memcpy(rule_mac, mac, sizeof(*mac)); 1441 flow = mlx4_flow_create(priv->dev, &attr, pattern, 1442 actions, error); 1443 if (!flow) { 1444 err = -rte_errno; 1445 goto error; 1446 } 1447 } 1448 flow->select = 1; 1449 flow->mac = 1; 1450 } 1451 if (rule_vlan) { 1452 vlan = mlx4_flow_internal_next_vlan(priv, vlan + 1); 1453 if (vlan < 4096) 1454 goto next_vlan; 1455 } 1456 /* Take care of promiscuous and all multicast flow rules. */ 1457 if (priv->dev->data->promiscuous || priv->dev->data->all_multicast) { 1458 for (flow = LIST_FIRST(&priv->flows); 1459 flow && flow->internal; 1460 flow = LIST_NEXT(flow, next)) { 1461 if (priv->dev->data->promiscuous) { 1462 if (flow->promisc) 1463 break; 1464 } else { 1465 assert(priv->dev->data->all_multicast); 1466 if (flow->allmulti) 1467 break; 1468 } 1469 } 1470 if (flow && flow->internal) { 1471 assert(flow->rss); 1472 if (flow->rss->queues != queues || 1473 memcmp(flow->rss->queue_id, action_rss.queue, 1474 queues * sizeof(flow->rss->queue_id[0]))) 1475 flow = NULL; 1476 } 1477 if (!flow || !flow->internal) { 1478 /* Not found, create a new flow rule. */ 1479 if (priv->dev->data->promiscuous) { 1480 pattern[1].spec = NULL; 1481 pattern[1].mask = NULL; 1482 } else { 1483 assert(priv->dev->data->all_multicast); 1484 pattern[1].spec = ð_allmulti; 1485 pattern[1].mask = ð_allmulti; 1486 } 1487 pattern[2] = pattern[3]; 1488 flow = mlx4_flow_create(priv->dev, &attr, pattern, 1489 actions, error); 1490 if (!flow) { 1491 err = -rte_errno; 1492 goto error; 1493 } 1494 } 1495 assert(flow->promisc || flow->allmulti); 1496 flow->select = 1; 1497 } 1498 error: 1499 /* Clear selection and clean up stale internal flow rules. */ 1500 flow = LIST_FIRST(&priv->flows); 1501 while (flow && flow->internal) { 1502 struct rte_flow *next = LIST_NEXT(flow, next); 1503 1504 if (!flow->select) 1505 claim_zero(mlx4_flow_destroy(priv->dev, flow, error)); 1506 else 1507 flow->select = 0; 1508 flow = next; 1509 } 1510 return err; 1511 } 1512 1513 /** 1514 * Synchronize flow rules. 1515 * 1516 * This function synchronizes flow rules with the state of the device by 1517 * taking into account isolated mode and whether target queues are 1518 * configured. 1519 * 1520 * @param priv 1521 * Pointer to private structure. 1522 * @param[out] error 1523 * Perform verbose error reporting if not NULL. 1524 * 1525 * @return 1526 * 0 on success, a negative errno value otherwise and rte_errno is set. 1527 */ 1528 int 1529 mlx4_flow_sync(struct mlx4_priv *priv, struct rte_flow_error *error) 1530 { 1531 struct rte_flow *flow; 1532 int ret; 1533 1534 /* Internal flow rules are guaranteed to come first in the list. */ 1535 if (priv->isolated) { 1536 /* 1537 * Get rid of them in isolated mode, stop at the first 1538 * non-internal rule found. 1539 */ 1540 for (flow = LIST_FIRST(&priv->flows); 1541 flow && flow->internal; 1542 flow = LIST_FIRST(&priv->flows)) 1543 claim_zero(mlx4_flow_destroy(priv->dev, flow, error)); 1544 } else { 1545 /* Refresh internal rules. */ 1546 ret = mlx4_flow_internal(priv, error); 1547 if (ret) 1548 return ret; 1549 } 1550 /* Toggle the remaining flow rules . */ 1551 LIST_FOREACH(flow, &priv->flows, next) { 1552 ret = mlx4_flow_toggle(priv, flow, priv->started, error); 1553 if (ret) 1554 return ret; 1555 } 1556 if (!priv->started) 1557 assert(!priv->drop); 1558 return 0; 1559 } 1560 1561 /** 1562 * Clean up all flow rules. 1563 * 1564 * Unlike mlx4_flow_flush(), this function takes care of all remaining flow 1565 * rules regardless of whether they are internal or user-configured. 1566 * 1567 * @param priv 1568 * Pointer to private structure. 1569 */ 1570 void 1571 mlx4_flow_clean(struct mlx4_priv *priv) 1572 { 1573 struct rte_flow *flow; 1574 1575 while ((flow = LIST_FIRST(&priv->flows))) 1576 mlx4_flow_destroy(priv->dev, flow, NULL); 1577 assert(LIST_EMPTY(&priv->rss)); 1578 } 1579 1580 static const struct rte_flow_ops mlx4_flow_ops = { 1581 .validate = mlx4_flow_validate, 1582 .create = mlx4_flow_create, 1583 .destroy = mlx4_flow_destroy, 1584 .flush = mlx4_flow_flush, 1585 .isolate = mlx4_flow_isolate, 1586 }; 1587 1588 /** 1589 * Manage filter operations. 1590 * 1591 * @param dev 1592 * Pointer to Ethernet device structure. 1593 * @param filter_type 1594 * Filter type. 1595 * @param filter_op 1596 * Operation to perform. 1597 * @param arg 1598 * Pointer to operation-specific structure. 1599 * 1600 * @return 1601 * 0 on success, negative errno value otherwise and rte_errno is set. 1602 */ 1603 int 1604 mlx4_filter_ctrl(struct rte_eth_dev *dev, 1605 enum rte_filter_type filter_type, 1606 enum rte_filter_op filter_op, 1607 void *arg) 1608 { 1609 switch (filter_type) { 1610 case RTE_ETH_FILTER_GENERIC: 1611 if (filter_op != RTE_ETH_FILTER_GET) 1612 break; 1613 *(const void **)arg = &mlx4_flow_ops; 1614 return 0; 1615 default: 1616 ERROR("%p: filter type (%d) not supported", 1617 (void *)dev, filter_type); 1618 break; 1619 } 1620 rte_errno = ENOTSUP; 1621 return -rte_errno; 1622 } 1623