1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) 2 * Copyright(c) 2018-2019 Pensando Systems, Inc. All rights reserved. 3 */ 4 5 #include <stdbool.h> 6 7 #include <rte_memzone.h> 8 9 #include "ionic.h" 10 #include "ionic_ethdev.h" 11 #include "ionic_lif.h" 12 13 static const char * 14 ionic_error_to_str(enum ionic_status_code code) 15 { 16 switch (code) { 17 case IONIC_RC_SUCCESS: 18 return "IONIC_RC_SUCCESS"; 19 case IONIC_RC_EVERSION: 20 return "IONIC_RC_EVERSION"; 21 case IONIC_RC_EOPCODE: 22 return "IONIC_RC_EOPCODE"; 23 case IONIC_RC_EIO: 24 return "IONIC_RC_EIO"; 25 case IONIC_RC_EPERM: 26 return "IONIC_RC_EPERM"; 27 case IONIC_RC_EQID: 28 return "IONIC_RC_EQID"; 29 case IONIC_RC_EQTYPE: 30 return "IONIC_RC_EQTYPE"; 31 case IONIC_RC_ENOENT: 32 return "IONIC_RC_ENOENT"; 33 case IONIC_RC_EINTR: 34 return "IONIC_RC_EINTR"; 35 case IONIC_RC_EAGAIN: 36 return "IONIC_RC_EAGAIN"; 37 case IONIC_RC_ENOMEM: 38 return "IONIC_RC_ENOMEM"; 39 case IONIC_RC_EFAULT: 40 return "IONIC_RC_EFAULT"; 41 case IONIC_RC_EBUSY: 42 return "IONIC_RC_EBUSY"; 43 case IONIC_RC_EEXIST: 44 return "IONIC_RC_EEXIST"; 45 case IONIC_RC_EINVAL: 46 return "IONIC_RC_EINVAL"; 47 case IONIC_RC_ENOSPC: 48 return "IONIC_RC_ENOSPC"; 49 case IONIC_RC_ERANGE: 50 return "IONIC_RC_ERANGE"; 51 case IONIC_RC_BAD_ADDR: 52 return "IONIC_RC_BAD_ADDR"; 53 case IONIC_RC_DEV_CMD: 54 return "IONIC_RC_DEV_CMD"; 55 case IONIC_RC_ERROR: 56 return "IONIC_RC_ERROR"; 57 case IONIC_RC_ERDMA: 58 return "IONIC_RC_ERDMA"; 59 default: 60 return "IONIC_RC_UNKNOWN"; 61 } 62 } 63 64 static const char * 65 ionic_opcode_to_str(enum ionic_cmd_opcode opcode) 66 { 67 switch (opcode) { 68 case IONIC_CMD_NOP: 69 return "IONIC_CMD_NOP"; 70 case IONIC_CMD_INIT: 71 return "IONIC_CMD_INIT"; 72 case IONIC_CMD_RESET: 73 return "IONIC_CMD_RESET"; 74 case IONIC_CMD_IDENTIFY: 75 return "IONIC_CMD_IDENTIFY"; 76 case IONIC_CMD_GETATTR: 77 return "IONIC_CMD_GETATTR"; 78 case IONIC_CMD_SETATTR: 79 return "IONIC_CMD_SETATTR"; 80 case IONIC_CMD_PORT_IDENTIFY: 81 return "IONIC_CMD_PORT_IDENTIFY"; 82 case IONIC_CMD_PORT_INIT: 83 return "IONIC_CMD_PORT_INIT"; 84 case IONIC_CMD_PORT_RESET: 85 return "IONIC_CMD_PORT_RESET"; 86 case IONIC_CMD_PORT_GETATTR: 87 return "IONIC_CMD_PORT_GETATTR"; 88 case IONIC_CMD_PORT_SETATTR: 89 return "IONIC_CMD_PORT_SETATTR"; 90 case IONIC_CMD_LIF_INIT: 91 return "IONIC_CMD_LIF_INIT"; 92 case IONIC_CMD_LIF_RESET: 93 return "IONIC_CMD_LIF_RESET"; 94 case IONIC_CMD_LIF_IDENTIFY: 95 return "IONIC_CMD_LIF_IDENTIFY"; 96 case IONIC_CMD_LIF_SETATTR: 97 return "IONIC_CMD_LIF_SETATTR"; 98 case IONIC_CMD_LIF_GETATTR: 99 return "IONIC_CMD_LIF_GETATTR"; 100 case IONIC_CMD_RX_MODE_SET: 101 return "IONIC_CMD_RX_MODE_SET"; 102 case IONIC_CMD_RX_FILTER_ADD: 103 return "IONIC_CMD_RX_FILTER_ADD"; 104 case IONIC_CMD_RX_FILTER_DEL: 105 return "IONIC_CMD_RX_FILTER_DEL"; 106 case IONIC_CMD_Q_INIT: 107 return "IONIC_CMD_Q_INIT"; 108 case IONIC_CMD_Q_CONTROL: 109 return "IONIC_CMD_Q_CONTROL"; 110 case IONIC_CMD_RDMA_RESET_LIF: 111 return "IONIC_CMD_RDMA_RESET_LIF"; 112 case IONIC_CMD_RDMA_CREATE_EQ: 113 return "IONIC_CMD_RDMA_CREATE_EQ"; 114 case IONIC_CMD_RDMA_CREATE_CQ: 115 return "IONIC_CMD_RDMA_CREATE_CQ"; 116 case IONIC_CMD_RDMA_CREATE_ADMINQ: 117 return "IONIC_CMD_RDMA_CREATE_ADMINQ"; 118 default: 119 return "DEVCMD_UNKNOWN"; 120 } 121 } 122 123 int 124 ionic_adminq_check_err(struct ionic_admin_ctx *ctx, bool timeout) 125 { 126 const char *name; 127 const char *status; 128 129 if (ctx->comp.comp.status || timeout) { 130 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode); 131 status = ionic_error_to_str(ctx->comp.comp.status); 132 IONIC_PRINT(ERR, "%s (%d) failed: %s (%d)", 133 name, 134 ctx->cmd.cmd.opcode, 135 timeout ? "TIMEOUT" : status, 136 timeout ? -1 : ctx->comp.comp.status); 137 return -EIO; 138 } 139 140 return 0; 141 } 142 143 static int 144 ionic_wait_ctx_for_completion(struct ionic_lif *lif, struct ionic_qcq *qcq, 145 struct ionic_admin_ctx *ctx, unsigned long max_wait) 146 { 147 unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US; 148 unsigned long max_wait_usec = max_wait * 1000000L; 149 unsigned long elapsed_usec = 0; 150 int budget = 8; 151 152 while (ctx->pending_work && elapsed_usec < max_wait_usec) { 153 /* 154 * Locking here as adminq is served inline (this could be called 155 * from multiple places) 156 */ 157 rte_spinlock_lock(&lif->adminq_service_lock); 158 159 ionic_qcq_service(qcq, budget, ionic_adminq_service, NULL); 160 161 rte_spinlock_unlock(&lif->adminq_service_lock); 162 163 rte_delay_us_block(step_usec); 164 elapsed_usec += step_usec; 165 } 166 167 return (!ctx->pending_work); 168 } 169 170 int 171 ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx) 172 { 173 struct ionic_qcq *qcq = lif->adminqcq; 174 bool done; 175 int err; 176 177 IONIC_PRINT(DEBUG, "Sending %s to the admin queue", 178 ionic_opcode_to_str(ctx->cmd.cmd.opcode)); 179 180 err = ionic_adminq_post(lif, ctx); 181 if (err) { 182 IONIC_PRINT(ERR, "Failure posting to the admin queue %d (%d)", 183 ctx->cmd.cmd.opcode, err); 184 185 return err; 186 } 187 188 done = ionic_wait_ctx_for_completion(lif, qcq, ctx, 189 IONIC_DEVCMD_TIMEOUT); 190 191 return ionic_adminq_check_err(ctx, !done /* timed out */); 192 } 193 194 static int 195 ionic_dev_cmd_wait(struct ionic_dev *idev, unsigned long max_wait) 196 { 197 unsigned long step_usec = IONIC_DEVCMD_CHECK_PERIOD_US; 198 unsigned long max_wait_usec = max_wait * 1000000L; 199 unsigned long elapsed_usec = 0; 200 int done; 201 202 /* Wait for dev cmd to complete.. but no more than max_wait sec */ 203 204 do { 205 done = ionic_dev_cmd_done(idev); 206 if (done) { 207 IONIC_PRINT(DEBUG, "DEVCMD %d done took %ld usecs", 208 ioread8(&idev->dev_cmd->cmd.cmd.opcode), 209 elapsed_usec); 210 return 0; 211 } 212 213 rte_delay_us_block(step_usec); 214 215 elapsed_usec += step_usec; 216 } while (elapsed_usec < max_wait_usec); 217 218 IONIC_PRINT(ERR, "DEVCMD %d timeout after %ld usecs", 219 ioread8(&idev->dev_cmd->cmd.cmd.opcode), 220 elapsed_usec); 221 222 return -ETIMEDOUT; 223 } 224 225 static int 226 ionic_dev_cmd_check_error(struct ionic_dev *idev) 227 { 228 uint8_t status; 229 230 status = ionic_dev_cmd_status(idev); 231 if (status == 0) 232 return 0; 233 234 return -EIO; 235 } 236 237 int 238 ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait) 239 { 240 int err; 241 242 err = ionic_dev_cmd_wait(idev, max_wait); 243 244 if (!err) 245 err = ionic_dev_cmd_check_error(idev); 246 247 return err; 248 } 249 250 int 251 ionic_setup(struct ionic_adapter *adapter) 252 { 253 return ionic_dev_setup(adapter); 254 } 255 256 int 257 ionic_identify(struct ionic_adapter *adapter) 258 { 259 struct ionic_dev *idev = &adapter->idev; 260 struct ionic_identity *ident = &adapter->ident; 261 int err = 0; 262 uint32_t i; 263 unsigned int nwords; 264 uint32_t drv_size = sizeof(ident->drv.words) / 265 sizeof(ident->drv.words[0]); 266 uint32_t cmd_size = sizeof(idev->dev_cmd->data) / 267 sizeof(idev->dev_cmd->data[0]); 268 uint32_t dev_size = sizeof(ident->dev.words) / 269 sizeof(ident->dev.words[0]); 270 271 memset(ident, 0, sizeof(*ident)); 272 273 ident->drv.os_type = IONIC_OS_TYPE_LINUX; 274 ident->drv.os_dist = 0; 275 snprintf(ident->drv.os_dist_str, 276 sizeof(ident->drv.os_dist_str), "Unknown"); 277 ident->drv.kernel_ver = 0; 278 snprintf(ident->drv.kernel_ver_str, 279 sizeof(ident->drv.kernel_ver_str), "DPDK"); 280 strncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION, 281 sizeof(ident->drv.driver_ver_str) - 1); 282 283 nwords = RTE_MIN(drv_size, cmd_size); 284 for (i = 0; i < nwords; i++) 285 iowrite32(ident->drv.words[i], &idev->dev_cmd->data[i]); 286 287 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1); 288 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 289 if (!err) { 290 nwords = RTE_MIN(dev_size, cmd_size); 291 for (i = 0; i < nwords; i++) 292 ident->dev.words[i] = ioread32(&idev->dev_cmd->data[i]); 293 } 294 295 return err; 296 } 297 298 int 299 ionic_init(struct ionic_adapter *adapter) 300 { 301 struct ionic_dev *idev = &adapter->idev; 302 303 ionic_dev_cmd_init(idev); 304 return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 305 } 306 307 int 308 ionic_reset(struct ionic_adapter *adapter) 309 { 310 struct ionic_dev *idev = &adapter->idev; 311 312 ionic_dev_cmd_reset(idev); 313 return ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 314 } 315 316 int 317 ionic_port_identify(struct ionic_adapter *adapter) 318 { 319 struct ionic_dev *idev = &adapter->idev; 320 struct ionic_identity *ident = &adapter->ident; 321 unsigned int port_words = sizeof(ident->port.words) / 322 sizeof(ident->port.words[0]); 323 unsigned int cmd_words = sizeof(idev->dev_cmd->data) / 324 sizeof(idev->dev_cmd->data[0]); 325 unsigned int i; 326 unsigned int nwords; 327 int err; 328 329 ionic_dev_cmd_port_identify(idev); 330 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 331 if (!err) { 332 nwords = RTE_MIN(port_words, cmd_words); 333 for (i = 0; i < nwords; i++) 334 ident->port.words[i] = 335 ioread32(&idev->dev_cmd->data[i]); 336 } 337 338 IONIC_PRINT(INFO, "speed %d ", ident->port.config.speed); 339 IONIC_PRINT(INFO, "mtu %d ", ident->port.config.mtu); 340 IONIC_PRINT(INFO, "state %d ", ident->port.config.state); 341 IONIC_PRINT(INFO, "an_enable %d ", ident->port.config.an_enable); 342 IONIC_PRINT(INFO, "fec_type %d ", ident->port.config.fec_type); 343 IONIC_PRINT(INFO, "pause_type %d ", ident->port.config.pause_type); 344 IONIC_PRINT(INFO, "loopback_mode %d", 345 ident->port.config.loopback_mode); 346 347 return err; 348 } 349 350 static const struct rte_memzone * 351 ionic_memzone_reserve(const char *name, uint32_t len, int socket_id) 352 { 353 const struct rte_memzone *mz; 354 355 mz = rte_memzone_lookup(name); 356 if (mz) 357 return mz; 358 359 mz = rte_memzone_reserve_aligned(name, len, socket_id, 360 RTE_MEMZONE_IOVA_CONTIG, IONIC_ALIGN); 361 return mz; 362 } 363 364 int 365 ionic_port_init(struct ionic_adapter *adapter) 366 { 367 struct ionic_dev *idev = &adapter->idev; 368 struct ionic_identity *ident = &adapter->ident; 369 char z_name[RTE_MEMZONE_NAMESIZE]; 370 unsigned int config_words = sizeof(ident->port.config.words) / 371 sizeof(ident->port.config.words[0]); 372 unsigned int cmd_words = sizeof(idev->dev_cmd->data) / 373 sizeof(idev->dev_cmd->data[0]); 374 unsigned int nwords; 375 unsigned int i; 376 int err; 377 378 if (idev->port_info) 379 return 0; 380 381 idev->port_info_sz = RTE_ALIGN(sizeof(*idev->port_info), PAGE_SIZE); 382 383 snprintf(z_name, sizeof(z_name), "%s_port_%s_info", 384 IONIC_DRV_NAME, 385 adapter->pci_dev->device.name); 386 387 idev->port_info_z = ionic_memzone_reserve(z_name, idev->port_info_sz, 388 SOCKET_ID_ANY); 389 if (!idev->port_info_z) { 390 IONIC_PRINT(ERR, "Cannot reserve port info DMA memory"); 391 return -ENOMEM; 392 } 393 394 idev->port_info = idev->port_info_z->addr; 395 idev->port_info_pa = idev->port_info_z->iova; 396 397 nwords = RTE_MIN(config_words, cmd_words); 398 399 for (i = 0; i < nwords; i++) 400 iowrite32(ident->port.config.words[i], &idev->dev_cmd->data[i]); 401 402 ionic_dev_cmd_port_init(idev); 403 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 404 if (err) { 405 IONIC_PRINT(ERR, "Failed to init port"); 406 return err; 407 } 408 409 ionic_dev_cmd_port_state(idev, IONIC_PORT_ADMIN_STATE_UP); 410 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 411 if (err) { 412 IONIC_PRINT(WARNING, "Failed to bring port UP"); 413 return err; 414 } 415 416 return 0; 417 } 418 419 int 420 ionic_port_reset(struct ionic_adapter *adapter) 421 { 422 struct ionic_dev *idev = &adapter->idev; 423 int err; 424 425 if (!idev->port_info) 426 return 0; 427 428 ionic_dev_cmd_port_reset(idev); 429 err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT); 430 if (err) { 431 IONIC_PRINT(ERR, "Failed to reset port"); 432 return err; 433 } 434 435 idev->port_info = NULL; 436 idev->port_info_pa = 0; 437 438 return 0; 439 } 440