1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 #include "iavf_generic_flow.h" 31 32 static int iavf_dev_configure(struct rte_eth_dev *dev); 33 static int iavf_dev_start(struct rte_eth_dev *dev); 34 static void iavf_dev_stop(struct rte_eth_dev *dev); 35 static void iavf_dev_close(struct rte_eth_dev *dev); 36 static int iavf_dev_reset(struct rte_eth_dev *dev); 37 static int iavf_dev_info_get(struct rte_eth_dev *dev, 38 struct rte_eth_dev_info *dev_info); 39 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 40 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 41 struct rte_eth_stats *stats); 42 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 43 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 44 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 45 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 46 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 47 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 48 struct rte_ether_addr *addr, 49 uint32_t index, 50 uint32_t pool); 51 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 52 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 53 uint16_t vlan_id, int on); 54 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 55 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 56 struct rte_eth_rss_reta_entry64 *reta_conf, 57 uint16_t reta_size); 58 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 59 struct rte_eth_rss_reta_entry64 *reta_conf, 60 uint16_t reta_size); 61 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 62 struct rte_eth_rss_conf *rss_conf); 63 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 64 struct rte_eth_rss_conf *rss_conf); 65 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 66 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 67 struct rte_ether_addr *mac_addr); 68 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 69 uint16_t queue_id); 70 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 71 uint16_t queue_id); 72 static int iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 73 enum rte_filter_type filter_type, 74 enum rte_filter_op filter_op, 75 void *arg); 76 77 static const struct rte_pci_id pci_id_iavf_map[] = { 78 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 79 { .vendor_id = 0, /* sentinel */ }, 80 }; 81 82 static const struct eth_dev_ops iavf_eth_dev_ops = { 83 .dev_configure = iavf_dev_configure, 84 .dev_start = iavf_dev_start, 85 .dev_stop = iavf_dev_stop, 86 .dev_close = iavf_dev_close, 87 .dev_reset = iavf_dev_reset, 88 .dev_infos_get = iavf_dev_info_get, 89 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 90 .link_update = iavf_dev_link_update, 91 .stats_get = iavf_dev_stats_get, 92 .stats_reset = iavf_dev_stats_reset, 93 .promiscuous_enable = iavf_dev_promiscuous_enable, 94 .promiscuous_disable = iavf_dev_promiscuous_disable, 95 .allmulticast_enable = iavf_dev_allmulticast_enable, 96 .allmulticast_disable = iavf_dev_allmulticast_disable, 97 .mac_addr_add = iavf_dev_add_mac_addr, 98 .mac_addr_remove = iavf_dev_del_mac_addr, 99 .vlan_filter_set = iavf_dev_vlan_filter_set, 100 .vlan_offload_set = iavf_dev_vlan_offload_set, 101 .rx_queue_start = iavf_dev_rx_queue_start, 102 .rx_queue_stop = iavf_dev_rx_queue_stop, 103 .tx_queue_start = iavf_dev_tx_queue_start, 104 .tx_queue_stop = iavf_dev_tx_queue_stop, 105 .rx_queue_setup = iavf_dev_rx_queue_setup, 106 .rx_queue_release = iavf_dev_rx_queue_release, 107 .tx_queue_setup = iavf_dev_tx_queue_setup, 108 .tx_queue_release = iavf_dev_tx_queue_release, 109 .mac_addr_set = iavf_dev_set_default_mac_addr, 110 .reta_update = iavf_dev_rss_reta_update, 111 .reta_query = iavf_dev_rss_reta_query, 112 .rss_hash_update = iavf_dev_rss_hash_update, 113 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 114 .rxq_info_get = iavf_dev_rxq_info_get, 115 .txq_info_get = iavf_dev_txq_info_get, 116 .rx_queue_count = iavf_dev_rxq_count, 117 .rx_descriptor_status = iavf_dev_rx_desc_status, 118 .tx_descriptor_status = iavf_dev_tx_desc_status, 119 .mtu_set = iavf_dev_mtu_set, 120 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 121 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 122 .filter_ctrl = iavf_dev_filter_ctrl, 123 }; 124 125 static int 126 iavf_init_rss(struct iavf_adapter *adapter) 127 { 128 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 129 struct rte_eth_rss_conf *rss_conf; 130 uint8_t i, j, nb_q; 131 int ret; 132 133 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 134 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 135 IAVF_MAX_NUM_QUEUES); 136 137 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 138 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 139 return -ENOTSUP; 140 } 141 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 142 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 143 /* set all lut items to default queue */ 144 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 145 vf->rss_lut[i] = 0; 146 ret = iavf_configure_rss_lut(adapter); 147 return ret; 148 } 149 150 /* In IAVF, RSS enablement is set by PF driver. It is not supported 151 * to set based on rss_conf->rss_hf. 152 */ 153 154 /* configure RSS key */ 155 if (!rss_conf->rss_key) { 156 /* Calculate the default hash key */ 157 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 158 vf->rss_key[i] = (uint8_t)rte_rand(); 159 } else 160 rte_memcpy(vf->rss_key, rss_conf->rss_key, 161 RTE_MIN(rss_conf->rss_key_len, 162 vf->vf_res->rss_key_size)); 163 164 /* init RSS LUT table */ 165 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 166 if (j >= nb_q) 167 j = 0; 168 vf->rss_lut[i] = j; 169 } 170 /* send virtchnnl ops to configure rss*/ 171 ret = iavf_configure_rss_lut(adapter); 172 if (ret) 173 return ret; 174 ret = iavf_configure_rss_key(adapter); 175 if (ret) 176 return ret; 177 178 return 0; 179 } 180 181 static int 182 iavf_dev_configure(struct rte_eth_dev *dev) 183 { 184 struct iavf_adapter *ad = 185 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 186 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 187 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 188 189 ad->rx_bulk_alloc_allowed = true; 190 /* Initialize to TRUE. If any of Rx queues doesn't meet the 191 * vector Rx/Tx preconditions, it will be reset. 192 */ 193 ad->rx_vec_allowed = true; 194 ad->tx_vec_allowed = true; 195 196 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 197 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 198 199 /* Vlan stripping setting */ 200 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { 201 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 202 iavf_enable_vlan_strip(ad); 203 else 204 iavf_disable_vlan_strip(ad); 205 } 206 207 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 208 if (iavf_init_rss(ad) != 0) { 209 PMD_DRV_LOG(ERR, "configure rss failed"); 210 return -1; 211 } 212 } 213 return 0; 214 } 215 216 static int 217 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 218 { 219 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 220 struct rte_eth_dev_data *dev_data = dev->data; 221 uint16_t buf_size, max_pkt_len, len; 222 223 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 224 225 /* Calculate the maximum packet length allowed */ 226 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 227 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 228 229 /* Check if the jumbo frame and maximum packet length are set 230 * correctly. 231 */ 232 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 233 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 234 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 235 PMD_DRV_LOG(ERR, "maximum packet length must be " 236 "larger than %u and smaller than %u, " 237 "as jumbo frame is enabled", 238 (uint32_t)RTE_ETHER_MAX_LEN, 239 (uint32_t)IAVF_FRAME_SIZE_MAX); 240 return -EINVAL; 241 } 242 } else { 243 if (max_pkt_len < RTE_ETHER_MIN_LEN || 244 max_pkt_len > RTE_ETHER_MAX_LEN) { 245 PMD_DRV_LOG(ERR, "maximum packet length must be " 246 "larger than %u and smaller than %u, " 247 "as jumbo frame is disabled", 248 (uint32_t)RTE_ETHER_MIN_LEN, 249 (uint32_t)RTE_ETHER_MAX_LEN); 250 return -EINVAL; 251 } 252 } 253 254 rxq->max_pkt_len = max_pkt_len; 255 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 256 (rxq->max_pkt_len + 2 * IAVF_VLAN_TAG_SIZE) > buf_size) { 257 dev_data->scattered_rx = 1; 258 } 259 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 260 IAVF_WRITE_FLUSH(hw); 261 262 return 0; 263 } 264 265 static int 266 iavf_init_queues(struct rte_eth_dev *dev) 267 { 268 struct iavf_rx_queue **rxq = 269 (struct iavf_rx_queue **)dev->data->rx_queues; 270 int i, ret = IAVF_SUCCESS; 271 272 for (i = 0; i < dev->data->nb_rx_queues; i++) { 273 if (!rxq[i] || !rxq[i]->q_set) 274 continue; 275 ret = iavf_init_rxq(dev, rxq[i]); 276 if (ret != IAVF_SUCCESS) 277 break; 278 } 279 /* set rx/tx function to vector/scatter/single-segment 280 * according to parameters 281 */ 282 iavf_set_rx_function(dev); 283 iavf_set_tx_function(dev); 284 285 return ret; 286 } 287 288 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 289 struct rte_intr_handle *intr_handle) 290 { 291 struct iavf_adapter *adapter = 292 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 293 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 294 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 295 uint16_t interval, i; 296 int vec; 297 298 if (rte_intr_cap_multiple(intr_handle) && 299 dev->data->dev_conf.intr_conf.rxq) { 300 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 301 return -1; 302 } 303 304 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 305 intr_handle->intr_vec = 306 rte_zmalloc("intr_vec", 307 dev->data->nb_rx_queues * sizeof(int), 0); 308 if (!intr_handle->intr_vec) { 309 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 310 dev->data->nb_rx_queues); 311 return -1; 312 } 313 } 314 315 if (!dev->data->dev_conf.intr_conf.rxq || 316 !rte_intr_dp_is_en(intr_handle)) { 317 /* Rx interrupt disabled, Map interrupt only for writeback */ 318 vf->nb_msix = 1; 319 if (vf->vf_res->vf_cap_flags & 320 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 321 /* If WB_ON_ITR supports, enable it */ 322 vf->msix_base = IAVF_RX_VEC_START; 323 IAVF_WRITE_REG(hw, 324 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 325 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK | 326 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK); 327 } else { 328 /* If no WB_ON_ITR offload flags, need to set 329 * interrupt for descriptor write back. 330 */ 331 vf->msix_base = IAVF_MISC_VEC_ID; 332 333 /* set ITR to max */ 334 interval = iavf_calc_itr_interval( 335 IAVF_QUEUE_ITR_INTERVAL_MAX); 336 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 337 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 338 (IAVF_ITR_INDEX_DEFAULT << 339 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 340 (interval << 341 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 342 } 343 IAVF_WRITE_FLUSH(hw); 344 /* map all queues to the same interrupt */ 345 for (i = 0; i < dev->data->nb_rx_queues; i++) 346 vf->rxq_map[vf->msix_base] |= 1 << i; 347 } else { 348 if (!rte_intr_allow_others(intr_handle)) { 349 vf->nb_msix = 1; 350 vf->msix_base = IAVF_MISC_VEC_ID; 351 for (i = 0; i < dev->data->nb_rx_queues; i++) { 352 vf->rxq_map[vf->msix_base] |= 1 << i; 353 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 354 } 355 PMD_DRV_LOG(DEBUG, 356 "vector %u are mapping to all Rx queues", 357 vf->msix_base); 358 } else { 359 /* If Rx interrupt is reuquired, and we can use 360 * multi interrupts, then the vec is from 1 361 */ 362 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 363 intr_handle->nb_efd); 364 vf->msix_base = IAVF_RX_VEC_START; 365 vec = IAVF_RX_VEC_START; 366 for (i = 0; i < dev->data->nb_rx_queues; i++) { 367 vf->rxq_map[vec] |= 1 << i; 368 intr_handle->intr_vec[i] = vec++; 369 if (vec >= vf->nb_msix) 370 vec = IAVF_RX_VEC_START; 371 } 372 PMD_DRV_LOG(DEBUG, 373 "%u vectors are mapping to %u Rx queues", 374 vf->nb_msix, dev->data->nb_rx_queues); 375 } 376 } 377 378 if (iavf_config_irq_map(adapter)) { 379 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 380 return -1; 381 } 382 return 0; 383 } 384 385 static int 386 iavf_start_queues(struct rte_eth_dev *dev) 387 { 388 struct iavf_rx_queue *rxq; 389 struct iavf_tx_queue *txq; 390 int i; 391 392 for (i = 0; i < dev->data->nb_tx_queues; i++) { 393 txq = dev->data->tx_queues[i]; 394 if (txq->tx_deferred_start) 395 continue; 396 if (iavf_dev_tx_queue_start(dev, i) != 0) { 397 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 398 return -1; 399 } 400 } 401 402 for (i = 0; i < dev->data->nb_rx_queues; i++) { 403 rxq = dev->data->rx_queues[i]; 404 if (rxq->rx_deferred_start) 405 continue; 406 if (iavf_dev_rx_queue_start(dev, i) != 0) { 407 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 408 return -1; 409 } 410 } 411 412 return 0; 413 } 414 415 static int 416 iavf_dev_start(struct rte_eth_dev *dev) 417 { 418 struct iavf_adapter *adapter = 419 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 420 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 421 struct rte_intr_handle *intr_handle = dev->intr_handle; 422 423 PMD_INIT_FUNC_TRACE(); 424 425 adapter->stopped = 0; 426 427 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 428 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 429 dev->data->nb_tx_queues); 430 431 if (iavf_init_queues(dev) != 0) { 432 PMD_DRV_LOG(ERR, "failed to do Queue init"); 433 return -1; 434 } 435 436 if (iavf_configure_queues(adapter) != 0) { 437 PMD_DRV_LOG(ERR, "configure queues failed"); 438 goto err_queue; 439 } 440 441 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 442 PMD_DRV_LOG(ERR, "configure irq failed"); 443 goto err_queue; 444 } 445 /* re-enable intr again, because efd assign may change */ 446 if (dev->data->dev_conf.intr_conf.rxq != 0) { 447 rte_intr_disable(intr_handle); 448 rte_intr_enable(intr_handle); 449 } 450 451 /* Set all mac addrs */ 452 iavf_add_del_all_mac_addr(adapter, true); 453 454 if (iavf_start_queues(dev) != 0) { 455 PMD_DRV_LOG(ERR, "enable queues failed"); 456 goto err_mac; 457 } 458 459 return 0; 460 461 err_mac: 462 iavf_add_del_all_mac_addr(adapter, false); 463 err_queue: 464 return -1; 465 } 466 467 static void 468 iavf_dev_stop(struct rte_eth_dev *dev) 469 { 470 struct iavf_adapter *adapter = 471 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 472 struct rte_intr_handle *intr_handle = dev->intr_handle; 473 474 PMD_INIT_FUNC_TRACE(); 475 476 if (adapter->stopped == 1) 477 return; 478 479 iavf_stop_queues(dev); 480 481 /* Disable the interrupt for Rx */ 482 rte_intr_efd_disable(intr_handle); 483 /* Rx interrupt vector mapping free */ 484 if (intr_handle->intr_vec) { 485 rte_free(intr_handle->intr_vec); 486 intr_handle->intr_vec = NULL; 487 } 488 489 /* remove all mac addrs */ 490 iavf_add_del_all_mac_addr(adapter, false); 491 adapter->stopped = 1; 492 } 493 494 static int 495 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 496 { 497 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 498 499 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs; 500 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs; 501 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 502 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 503 dev_info->hash_key_size = vf->vf_res->rss_key_size; 504 dev_info->reta_size = vf->vf_res->rss_lut_size; 505 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 506 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 507 dev_info->rx_offload_capa = 508 DEV_RX_OFFLOAD_VLAN_STRIP | 509 DEV_RX_OFFLOAD_QINQ_STRIP | 510 DEV_RX_OFFLOAD_IPV4_CKSUM | 511 DEV_RX_OFFLOAD_UDP_CKSUM | 512 DEV_RX_OFFLOAD_TCP_CKSUM | 513 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 514 DEV_RX_OFFLOAD_SCATTER | 515 DEV_RX_OFFLOAD_JUMBO_FRAME | 516 DEV_RX_OFFLOAD_VLAN_FILTER | 517 DEV_RX_OFFLOAD_RSS_HASH; 518 dev_info->tx_offload_capa = 519 DEV_TX_OFFLOAD_VLAN_INSERT | 520 DEV_TX_OFFLOAD_QINQ_INSERT | 521 DEV_TX_OFFLOAD_IPV4_CKSUM | 522 DEV_TX_OFFLOAD_UDP_CKSUM | 523 DEV_TX_OFFLOAD_TCP_CKSUM | 524 DEV_TX_OFFLOAD_SCTP_CKSUM | 525 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 526 DEV_TX_OFFLOAD_TCP_TSO | 527 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 528 DEV_TX_OFFLOAD_GRE_TNL_TSO | 529 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 530 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 531 DEV_TX_OFFLOAD_MULTI_SEGS; 532 533 dev_info->default_rxconf = (struct rte_eth_rxconf) { 534 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 535 .rx_drop_en = 0, 536 .offloads = 0, 537 }; 538 539 dev_info->default_txconf = (struct rte_eth_txconf) { 540 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 541 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 542 .offloads = 0, 543 }; 544 545 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 546 .nb_max = IAVF_MAX_RING_DESC, 547 .nb_min = IAVF_MIN_RING_DESC, 548 .nb_align = IAVF_ALIGN_RING_DESC, 549 }; 550 551 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 552 .nb_max = IAVF_MAX_RING_DESC, 553 .nb_min = IAVF_MIN_RING_DESC, 554 .nb_align = IAVF_ALIGN_RING_DESC, 555 }; 556 557 return 0; 558 } 559 560 static const uint32_t * 561 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 562 { 563 static const uint32_t ptypes[] = { 564 RTE_PTYPE_L2_ETHER, 565 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 566 RTE_PTYPE_L4_FRAG, 567 RTE_PTYPE_L4_ICMP, 568 RTE_PTYPE_L4_NONFRAG, 569 RTE_PTYPE_L4_SCTP, 570 RTE_PTYPE_L4_TCP, 571 RTE_PTYPE_L4_UDP, 572 RTE_PTYPE_UNKNOWN 573 }; 574 return ptypes; 575 } 576 577 int 578 iavf_dev_link_update(struct rte_eth_dev *dev, 579 __rte_unused int wait_to_complete) 580 { 581 struct rte_eth_link new_link; 582 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 583 584 memset(&new_link, 0, sizeof(new_link)); 585 586 /* Only read status info stored in VF, and the info is updated 587 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 588 */ 589 switch (vf->link_speed) { 590 case 10: 591 new_link.link_speed = ETH_SPEED_NUM_10M; 592 break; 593 case 100: 594 new_link.link_speed = ETH_SPEED_NUM_100M; 595 break; 596 case 1000: 597 new_link.link_speed = ETH_SPEED_NUM_1G; 598 break; 599 case 10000: 600 new_link.link_speed = ETH_SPEED_NUM_10G; 601 break; 602 case 20000: 603 new_link.link_speed = ETH_SPEED_NUM_20G; 604 break; 605 case 25000: 606 new_link.link_speed = ETH_SPEED_NUM_25G; 607 break; 608 case 40000: 609 new_link.link_speed = ETH_SPEED_NUM_40G; 610 break; 611 case 50000: 612 new_link.link_speed = ETH_SPEED_NUM_50G; 613 break; 614 case 100000: 615 new_link.link_speed = ETH_SPEED_NUM_100G; 616 break; 617 default: 618 new_link.link_speed = ETH_SPEED_NUM_NONE; 619 break; 620 } 621 622 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 623 new_link.link_status = vf->link_up ? ETH_LINK_UP : 624 ETH_LINK_DOWN; 625 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 626 ETH_LINK_SPEED_FIXED); 627 628 if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link, 629 *(uint64_t *)&dev->data->dev_link, 630 *(uint64_t *)&new_link) == 0) 631 return -1; 632 633 return 0; 634 } 635 636 static int 637 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 638 { 639 struct iavf_adapter *adapter = 640 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 641 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 642 int ret; 643 644 if (vf->promisc_unicast_enabled) 645 return 0; 646 647 ret = iavf_config_promisc(adapter, true, vf->promisc_multicast_enabled); 648 if (!ret) 649 vf->promisc_unicast_enabled = true; 650 else 651 ret = -EAGAIN; 652 653 return ret; 654 } 655 656 static int 657 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 658 { 659 struct iavf_adapter *adapter = 660 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 661 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 662 int ret; 663 664 if (!vf->promisc_unicast_enabled) 665 return 0; 666 667 ret = iavf_config_promisc(adapter, false, 668 vf->promisc_multicast_enabled); 669 if (!ret) 670 vf->promisc_unicast_enabled = false; 671 else 672 ret = -EAGAIN; 673 674 return ret; 675 } 676 677 static int 678 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 679 { 680 struct iavf_adapter *adapter = 681 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 682 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 683 int ret; 684 685 if (vf->promisc_multicast_enabled) 686 return 0; 687 688 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, true); 689 if (!ret) 690 vf->promisc_multicast_enabled = true; 691 else 692 ret = -EAGAIN; 693 694 return ret; 695 } 696 697 static int 698 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 699 { 700 struct iavf_adapter *adapter = 701 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 702 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 703 int ret; 704 705 if (!vf->promisc_multicast_enabled) 706 return 0; 707 708 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, false); 709 if (!ret) 710 vf->promisc_multicast_enabled = false; 711 else 712 ret = -EAGAIN; 713 714 return ret; 715 } 716 717 static int 718 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 719 __rte_unused uint32_t index, 720 __rte_unused uint32_t pool) 721 { 722 struct iavf_adapter *adapter = 723 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 724 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 725 int err; 726 727 if (rte_is_zero_ether_addr(addr)) { 728 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 729 return -EINVAL; 730 } 731 732 err = iavf_add_del_eth_addr(adapter, addr, true); 733 if (err) { 734 PMD_DRV_LOG(ERR, "fail to add MAC address"); 735 return -EIO; 736 } 737 738 vf->mac_num++; 739 740 return 0; 741 } 742 743 static void 744 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 745 { 746 struct iavf_adapter *adapter = 747 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 748 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 749 struct rte_ether_addr *addr; 750 int err; 751 752 addr = &dev->data->mac_addrs[index]; 753 754 err = iavf_add_del_eth_addr(adapter, addr, false); 755 if (err) 756 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 757 758 vf->mac_num--; 759 } 760 761 static int 762 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 763 { 764 struct iavf_adapter *adapter = 765 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 766 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 767 int err; 768 769 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 770 return -ENOTSUP; 771 772 err = iavf_add_del_vlan(adapter, vlan_id, on); 773 if (err) 774 return -EIO; 775 return 0; 776 } 777 778 static int 779 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 780 { 781 struct iavf_adapter *adapter = 782 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 783 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 784 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 785 int err; 786 787 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 788 return -ENOTSUP; 789 790 /* Vlan stripping setting */ 791 if (mask & ETH_VLAN_STRIP_MASK) { 792 /* Enable or disable VLAN stripping */ 793 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 794 err = iavf_enable_vlan_strip(adapter); 795 else 796 err = iavf_disable_vlan_strip(adapter); 797 798 if (err) 799 return -EIO; 800 } 801 return 0; 802 } 803 804 static int 805 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 806 struct rte_eth_rss_reta_entry64 *reta_conf, 807 uint16_t reta_size) 808 { 809 struct iavf_adapter *adapter = 810 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 811 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 812 uint8_t *lut; 813 uint16_t i, idx, shift; 814 int ret; 815 816 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 817 return -ENOTSUP; 818 819 if (reta_size != vf->vf_res->rss_lut_size) { 820 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 821 "(%d) doesn't match the number of hardware can " 822 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 823 return -EINVAL; 824 } 825 826 lut = rte_zmalloc("rss_lut", reta_size, 0); 827 if (!lut) { 828 PMD_DRV_LOG(ERR, "No memory can be allocated"); 829 return -ENOMEM; 830 } 831 /* store the old lut table temporarily */ 832 rte_memcpy(lut, vf->rss_lut, reta_size); 833 834 for (i = 0; i < reta_size; i++) { 835 idx = i / RTE_RETA_GROUP_SIZE; 836 shift = i % RTE_RETA_GROUP_SIZE; 837 if (reta_conf[idx].mask & (1ULL << shift)) 838 lut[i] = reta_conf[idx].reta[shift]; 839 } 840 841 rte_memcpy(vf->rss_lut, lut, reta_size); 842 /* send virtchnnl ops to configure rss*/ 843 ret = iavf_configure_rss_lut(adapter); 844 if (ret) /* revert back */ 845 rte_memcpy(vf->rss_lut, lut, reta_size); 846 rte_free(lut); 847 848 return ret; 849 } 850 851 static int 852 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 853 struct rte_eth_rss_reta_entry64 *reta_conf, 854 uint16_t reta_size) 855 { 856 struct iavf_adapter *adapter = 857 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 858 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 859 uint16_t i, idx, shift; 860 861 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 862 return -ENOTSUP; 863 864 if (reta_size != vf->vf_res->rss_lut_size) { 865 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 866 "(%d) doesn't match the number of hardware can " 867 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 868 return -EINVAL; 869 } 870 871 for (i = 0; i < reta_size; i++) { 872 idx = i / RTE_RETA_GROUP_SIZE; 873 shift = i % RTE_RETA_GROUP_SIZE; 874 if (reta_conf[idx].mask & (1ULL << shift)) 875 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 876 } 877 878 return 0; 879 } 880 881 static int 882 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 883 struct rte_eth_rss_conf *rss_conf) 884 { 885 struct iavf_adapter *adapter = 886 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 887 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 888 889 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 890 return -ENOTSUP; 891 892 /* HENA setting, it is enabled by default, no change */ 893 if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) { 894 PMD_DRV_LOG(DEBUG, "No key to be configured"); 895 return 0; 896 } else if (rss_conf->rss_key_len != vf->vf_res->rss_key_size) { 897 PMD_DRV_LOG(ERR, "The size of hash key configured " 898 "(%d) doesn't match the size of hardware can " 899 "support (%d)", rss_conf->rss_key_len, 900 vf->vf_res->rss_key_size); 901 return -EINVAL; 902 } 903 904 rte_memcpy(vf->rss_key, rss_conf->rss_key, rss_conf->rss_key_len); 905 906 return iavf_configure_rss_key(adapter); 907 } 908 909 static int 910 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 911 struct rte_eth_rss_conf *rss_conf) 912 { 913 struct iavf_adapter *adapter = 914 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 915 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 916 917 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 918 return -ENOTSUP; 919 920 /* Just set it to default value now. */ 921 rss_conf->rss_hf = IAVF_RSS_OFFLOAD_ALL; 922 923 if (!rss_conf->rss_key) 924 return 0; 925 926 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 927 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 928 929 return 0; 930 } 931 932 static int 933 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 934 { 935 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 936 int ret = 0; 937 938 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 939 return -EINVAL; 940 941 /* mtu setting is forbidden if port is start */ 942 if (dev->data->dev_started) { 943 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 944 return -EBUSY; 945 } 946 947 if (frame_size > RTE_ETHER_MAX_LEN) 948 dev->data->dev_conf.rxmode.offloads |= 949 DEV_RX_OFFLOAD_JUMBO_FRAME; 950 else 951 dev->data->dev_conf.rxmode.offloads &= 952 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 953 954 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 955 956 return ret; 957 } 958 959 static int 960 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 961 struct rte_ether_addr *mac_addr) 962 { 963 struct iavf_adapter *adapter = 964 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 965 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 966 struct rte_ether_addr *perm_addr, *old_addr; 967 int ret; 968 969 old_addr = (struct rte_ether_addr *)hw->mac.addr; 970 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 971 972 if (rte_is_same_ether_addr(mac_addr, old_addr)) 973 return 0; 974 975 /* If the MAC address is configured by host, skip the setting */ 976 if (rte_is_valid_assigned_ether_addr(perm_addr)) 977 return -EPERM; 978 979 ret = iavf_add_del_eth_addr(adapter, old_addr, false); 980 if (ret) 981 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 982 " %02X:%02X:%02X:%02X:%02X:%02X", 983 old_addr->addr_bytes[0], 984 old_addr->addr_bytes[1], 985 old_addr->addr_bytes[2], 986 old_addr->addr_bytes[3], 987 old_addr->addr_bytes[4], 988 old_addr->addr_bytes[5]); 989 990 ret = iavf_add_del_eth_addr(adapter, mac_addr, true); 991 if (ret) 992 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 993 " %02X:%02X:%02X:%02X:%02X:%02X", 994 mac_addr->addr_bytes[0], 995 mac_addr->addr_bytes[1], 996 mac_addr->addr_bytes[2], 997 mac_addr->addr_bytes[3], 998 mac_addr->addr_bytes[4], 999 mac_addr->addr_bytes[5]); 1000 1001 if (ret) 1002 return -EIO; 1003 1004 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1005 return 0; 1006 } 1007 1008 static void 1009 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1010 { 1011 if (*stat >= *offset) 1012 *stat = *stat - *offset; 1013 else 1014 *stat = (uint64_t)((*stat + 1015 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1016 1017 *stat &= IAVF_48_BIT_MASK; 1018 } 1019 1020 static void 1021 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1022 { 1023 if (*stat >= *offset) 1024 *stat = (uint64_t)(*stat - *offset); 1025 else 1026 *stat = (uint64_t)((*stat + 1027 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1028 } 1029 1030 static void 1031 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1032 { 1033 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1034 1035 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1036 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1037 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1038 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1039 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1040 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1041 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1042 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1043 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1044 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1045 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1046 } 1047 1048 static int 1049 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1050 { 1051 struct iavf_adapter *adapter = 1052 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1053 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1054 struct iavf_vsi *vsi = &vf->vsi; 1055 struct virtchnl_eth_stats *pstats = NULL; 1056 int ret; 1057 1058 ret = iavf_query_stats(adapter, &pstats); 1059 if (ret == 0) { 1060 iavf_update_stats(vsi, pstats); 1061 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1062 pstats->rx_broadcast - pstats->rx_discards; 1063 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1064 pstats->tx_unicast; 1065 stats->imissed = pstats->rx_discards; 1066 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1067 stats->ibytes = pstats->rx_bytes; 1068 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 1069 stats->obytes = pstats->tx_bytes; 1070 } else { 1071 PMD_DRV_LOG(ERR, "Get statistics failed"); 1072 } 1073 return ret; 1074 } 1075 1076 static int 1077 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1078 { 1079 int ret; 1080 struct iavf_adapter *adapter = 1081 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1082 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1083 struct iavf_vsi *vsi = &vf->vsi; 1084 struct virtchnl_eth_stats *pstats = NULL; 1085 1086 /* read stat values to clear hardware registers */ 1087 ret = iavf_query_stats(adapter, &pstats); 1088 if (ret != 0) 1089 return ret; 1090 1091 /* set stats offset base on current values */ 1092 vsi->eth_stats_offset = *pstats; 1093 1094 return 0; 1095 } 1096 1097 static int 1098 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1099 { 1100 struct iavf_adapter *adapter = 1101 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1102 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1103 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1104 uint16_t msix_intr; 1105 1106 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1107 if (msix_intr == IAVF_MISC_VEC_ID) { 1108 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1109 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1110 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1111 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1112 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1113 } else { 1114 IAVF_WRITE_REG(hw, 1115 IAVF_VFINT_DYN_CTLN1 1116 (msix_intr - IAVF_RX_VEC_START), 1117 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1118 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1119 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1120 } 1121 1122 IAVF_WRITE_FLUSH(hw); 1123 1124 rte_intr_ack(&pci_dev->intr_handle); 1125 1126 return 0; 1127 } 1128 1129 static int 1130 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1131 { 1132 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1133 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1134 uint16_t msix_intr; 1135 1136 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1137 if (msix_intr == IAVF_MISC_VEC_ID) { 1138 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1139 return -EIO; 1140 } 1141 1142 IAVF_WRITE_REG(hw, 1143 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1144 0); 1145 1146 IAVF_WRITE_FLUSH(hw); 1147 return 0; 1148 } 1149 1150 static int 1151 iavf_check_vf_reset_done(struct iavf_hw *hw) 1152 { 1153 int i, reset; 1154 1155 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1156 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1157 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1158 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1159 if (reset == VIRTCHNL_VFR_VFACTIVE || 1160 reset == VIRTCHNL_VFR_COMPLETED) 1161 break; 1162 rte_delay_ms(20); 1163 } 1164 1165 if (i >= IAVF_RESET_WAIT_CNT) 1166 return -1; 1167 1168 return 0; 1169 } 1170 1171 static int 1172 iavf_init_vf(struct rte_eth_dev *dev) 1173 { 1174 int err, bufsz; 1175 struct iavf_adapter *adapter = 1176 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1177 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1178 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1179 1180 err = iavf_set_mac_type(hw); 1181 if (err) { 1182 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1183 goto err; 1184 } 1185 1186 err = iavf_check_vf_reset_done(hw); 1187 if (err) { 1188 PMD_INIT_LOG(ERR, "VF is still resetting"); 1189 goto err; 1190 } 1191 1192 iavf_init_adminq_parameter(hw); 1193 err = iavf_init_adminq(hw); 1194 if (err) { 1195 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1196 goto err; 1197 } 1198 1199 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1200 if (!vf->aq_resp) { 1201 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1202 goto err_aq; 1203 } 1204 if (iavf_check_api_version(adapter) != 0) { 1205 PMD_INIT_LOG(ERR, "check_api version failed"); 1206 goto err_api; 1207 } 1208 1209 bufsz = sizeof(struct virtchnl_vf_resource) + 1210 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1211 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1212 if (!vf->vf_res) { 1213 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1214 goto err_api; 1215 } 1216 if (iavf_get_vf_resource(adapter) != 0) { 1217 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1218 goto err_alloc; 1219 } 1220 /* Allocate memort for RSS info */ 1221 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1222 vf->rss_key = rte_zmalloc("rss_key", 1223 vf->vf_res->rss_key_size, 0); 1224 if (!vf->rss_key) { 1225 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1226 goto err_rss; 1227 } 1228 vf->rss_lut = rte_zmalloc("rss_lut", 1229 vf->vf_res->rss_lut_size, 0); 1230 if (!vf->rss_lut) { 1231 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1232 goto err_rss; 1233 } 1234 } 1235 1236 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 1237 if (iavf_get_supported_rxdid(adapter) != 0) { 1238 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 1239 goto err_rss; 1240 } 1241 } 1242 1243 return 0; 1244 err_rss: 1245 rte_free(vf->rss_key); 1246 rte_free(vf->rss_lut); 1247 err_alloc: 1248 rte_free(vf->vf_res); 1249 vf->vsi_res = NULL; 1250 err_api: 1251 rte_free(vf->aq_resp); 1252 err_aq: 1253 iavf_shutdown_adminq(hw); 1254 err: 1255 return -1; 1256 } 1257 1258 /* Enable default admin queue interrupt setting */ 1259 static inline void 1260 iavf_enable_irq0(struct iavf_hw *hw) 1261 { 1262 /* Enable admin queue interrupt trigger */ 1263 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 1264 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 1265 1266 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1267 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1268 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1269 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1270 1271 IAVF_WRITE_FLUSH(hw); 1272 } 1273 1274 static inline void 1275 iavf_disable_irq0(struct iavf_hw *hw) 1276 { 1277 /* Disable all interrupt types */ 1278 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 1279 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1280 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1281 IAVF_WRITE_FLUSH(hw); 1282 } 1283 1284 static void 1285 iavf_dev_interrupt_handler(void *param) 1286 { 1287 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1288 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1289 1290 iavf_disable_irq0(hw); 1291 1292 iavf_handle_virtchnl_msg(dev); 1293 1294 iavf_enable_irq0(hw); 1295 } 1296 1297 static int 1298 iavf_dev_filter_ctrl(struct rte_eth_dev *dev, 1299 enum rte_filter_type filter_type, 1300 enum rte_filter_op filter_op, 1301 void *arg) 1302 { 1303 int ret = 0; 1304 1305 if (!dev) 1306 return -EINVAL; 1307 1308 switch (filter_type) { 1309 case RTE_ETH_FILTER_GENERIC: 1310 if (filter_op != RTE_ETH_FILTER_GET) 1311 return -EINVAL; 1312 *(const void **)arg = &iavf_flow_ops; 1313 break; 1314 default: 1315 PMD_DRV_LOG(WARNING, "Filter type (%d) not supported", 1316 filter_type); 1317 ret = -EINVAL; 1318 break; 1319 } 1320 1321 return ret; 1322 } 1323 1324 1325 static int 1326 iavf_dev_init(struct rte_eth_dev *eth_dev) 1327 { 1328 struct iavf_adapter *adapter = 1329 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1330 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1331 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1332 int ret = 0; 1333 1334 PMD_INIT_FUNC_TRACE(); 1335 1336 /* assign ops func pointer */ 1337 eth_dev->dev_ops = &iavf_eth_dev_ops; 1338 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 1339 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 1340 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 1341 1342 /* For secondary processes, we don't initialise any further as primary 1343 * has already done this work. Only check if we need a different RX 1344 * and TX function. 1345 */ 1346 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1347 iavf_set_rx_function(eth_dev); 1348 iavf_set_tx_function(eth_dev); 1349 return 0; 1350 } 1351 rte_eth_copy_pci_info(eth_dev, pci_dev); 1352 1353 hw->vendor_id = pci_dev->id.vendor_id; 1354 hw->device_id = pci_dev->id.device_id; 1355 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 1356 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 1357 hw->bus.bus_id = pci_dev->addr.bus; 1358 hw->bus.device = pci_dev->addr.devid; 1359 hw->bus.func = pci_dev->addr.function; 1360 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 1361 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1362 adapter->eth_dev = eth_dev; 1363 adapter->stopped = 1; 1364 1365 if (iavf_init_vf(eth_dev) != 0) { 1366 PMD_INIT_LOG(ERR, "Init vf failed"); 1367 return -1; 1368 } 1369 1370 /* set default ptype table */ 1371 adapter->ptype_tbl = iavf_get_default_ptype_table(); 1372 1373 /* copy mac addr */ 1374 eth_dev->data->mac_addrs = rte_zmalloc( 1375 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 1376 if (!eth_dev->data->mac_addrs) { 1377 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 1378 " store MAC addresses", 1379 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 1380 return -ENOMEM; 1381 } 1382 /* If the MAC address is not configured by host, 1383 * generate a random one. 1384 */ 1385 if (!rte_is_valid_assigned_ether_addr( 1386 (struct rte_ether_addr *)hw->mac.addr)) 1387 rte_eth_random_addr(hw->mac.addr); 1388 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 1389 ð_dev->data->mac_addrs[0]); 1390 1391 /* register callback func to eal lib */ 1392 rte_intr_callback_register(&pci_dev->intr_handle, 1393 iavf_dev_interrupt_handler, 1394 (void *)eth_dev); 1395 1396 /* enable uio intr after callback register */ 1397 rte_intr_enable(&pci_dev->intr_handle); 1398 1399 /* configure and enable device interrupt */ 1400 iavf_enable_irq0(hw); 1401 1402 ret = iavf_flow_init(adapter); 1403 if (ret) { 1404 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 1405 return ret; 1406 } 1407 1408 return 0; 1409 } 1410 1411 static void 1412 iavf_dev_close(struct rte_eth_dev *dev) 1413 { 1414 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1415 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1416 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 1417 struct iavf_adapter *adapter = 1418 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1419 1420 iavf_dev_stop(dev); 1421 iavf_flow_flush(dev, NULL); 1422 iavf_flow_uninit(adapter); 1423 iavf_shutdown_adminq(hw); 1424 /* disable uio intr before callback unregister */ 1425 rte_intr_disable(intr_handle); 1426 1427 /* unregister callback func from eal lib */ 1428 rte_intr_callback_unregister(intr_handle, 1429 iavf_dev_interrupt_handler, dev); 1430 iavf_disable_irq0(hw); 1431 } 1432 1433 static int 1434 iavf_dev_uninit(struct rte_eth_dev *dev) 1435 { 1436 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1437 1438 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1439 return -EPERM; 1440 1441 dev->dev_ops = NULL; 1442 dev->rx_pkt_burst = NULL; 1443 dev->tx_pkt_burst = NULL; 1444 iavf_dev_close(dev); 1445 1446 rte_free(vf->vf_res); 1447 vf->vsi_res = NULL; 1448 vf->vf_res = NULL; 1449 1450 rte_free(vf->aq_resp); 1451 vf->aq_resp = NULL; 1452 1453 if (vf->rss_lut) { 1454 rte_free(vf->rss_lut); 1455 vf->rss_lut = NULL; 1456 } 1457 if (vf->rss_key) { 1458 rte_free(vf->rss_key); 1459 vf->rss_key = NULL; 1460 } 1461 1462 return 0; 1463 } 1464 1465 /* 1466 * Reset VF device only to re-initialize resources in PMD layer 1467 */ 1468 static int 1469 iavf_dev_reset(struct rte_eth_dev *dev) 1470 { 1471 int ret; 1472 1473 ret = iavf_dev_uninit(dev); 1474 if (ret) 1475 return ret; 1476 1477 return iavf_dev_init(dev); 1478 } 1479 1480 static int 1481 iavf_dcf_cap_check_handler(__rte_unused const char *key, 1482 const char *value, __rte_unused void *opaque) 1483 { 1484 if (strcmp(value, "dcf")) 1485 return -1; 1486 1487 return 0; 1488 } 1489 1490 static int 1491 iavf_dcf_cap_selected(struct rte_devargs *devargs) 1492 { 1493 struct rte_kvargs *kvlist; 1494 const char *key = "cap"; 1495 int ret = 0; 1496 1497 if (devargs == NULL) 1498 return 0; 1499 1500 kvlist = rte_kvargs_parse(devargs->args, NULL); 1501 if (kvlist == NULL) 1502 return 0; 1503 1504 if (!rte_kvargs_count(kvlist, key)) 1505 goto exit; 1506 1507 /* dcf capability selected when there's a key-value pair: cap=dcf */ 1508 if (rte_kvargs_process(kvlist, key, 1509 iavf_dcf_cap_check_handler, NULL) < 0) 1510 goto exit; 1511 1512 ret = 1; 1513 1514 exit: 1515 rte_kvargs_free(kvlist); 1516 return ret; 1517 } 1518 1519 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1520 struct rte_pci_device *pci_dev) 1521 { 1522 if (iavf_dcf_cap_selected(pci_dev->device.devargs)) 1523 return 1; 1524 1525 return rte_eth_dev_pci_generic_probe(pci_dev, 1526 sizeof(struct iavf_adapter), iavf_dev_init); 1527 } 1528 1529 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 1530 { 1531 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 1532 } 1533 1534 /* Adaptive virtual function driver struct */ 1535 static struct rte_pci_driver rte_iavf_pmd = { 1536 .id_table = pci_id_iavf_map, 1537 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 1538 .probe = eth_iavf_pci_probe, 1539 .remove = eth_iavf_pci_remove, 1540 }; 1541 1542 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 1543 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 1544 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 1545 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf"); 1546 RTE_LOG_REGISTER(iavf_logtype_init, pmd.net.iavf.init, NOTICE); 1547 RTE_LOG_REGISTER(iavf_logtype_driver, pmd.net.iavf.driver, NOTICE); 1548 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 1549 RTE_LOG_REGISTER(iavf_logtype_rx, pmd.net.iavf.rx, DEBUG); 1550 #endif 1551 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 1552 RTE_LOG_REGISTER(iavf_logtype_tx, pmd.net.iavf.tx, DEBUG); 1553 #endif 1554 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 1555 RTE_LOG_REGISTER(iavf_logtype_tx_free, pmd.net.iavf.tx_free, DEBUG); 1556 #endif 1557