1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 31 static int iavf_dev_configure(struct rte_eth_dev *dev); 32 static int iavf_dev_start(struct rte_eth_dev *dev); 33 static void iavf_dev_stop(struct rte_eth_dev *dev); 34 static void iavf_dev_close(struct rte_eth_dev *dev); 35 static int iavf_dev_info_get(struct rte_eth_dev *dev, 36 struct rte_eth_dev_info *dev_info); 37 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 38 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 39 struct rte_eth_stats *stats); 40 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 41 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 42 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 43 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 44 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 45 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 46 struct rte_ether_addr *addr, 47 uint32_t index, 48 uint32_t pool); 49 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 50 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 51 uint16_t vlan_id, int on); 52 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 53 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 54 struct rte_eth_rss_reta_entry64 *reta_conf, 55 uint16_t reta_size); 56 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 57 struct rte_eth_rss_reta_entry64 *reta_conf, 58 uint16_t reta_size); 59 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 60 struct rte_eth_rss_conf *rss_conf); 61 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 62 struct rte_eth_rss_conf *rss_conf); 63 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 64 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 65 struct rte_ether_addr *mac_addr); 66 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 67 uint16_t queue_id); 68 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 69 uint16_t queue_id); 70 71 int iavf_logtype_init; 72 int iavf_logtype_driver; 73 74 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 75 int iavf_logtype_rx; 76 #endif 77 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 78 int iavf_logtype_tx; 79 #endif 80 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 81 int iavf_logtype_tx_free; 82 #endif 83 84 static const struct rte_pci_id pci_id_iavf_map[] = { 85 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 86 { .vendor_id = 0, /* sentinel */ }, 87 }; 88 89 static const struct eth_dev_ops iavf_eth_dev_ops = { 90 .dev_configure = iavf_dev_configure, 91 .dev_start = iavf_dev_start, 92 .dev_stop = iavf_dev_stop, 93 .dev_close = iavf_dev_close, 94 .dev_infos_get = iavf_dev_info_get, 95 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 96 .link_update = iavf_dev_link_update, 97 .stats_get = iavf_dev_stats_get, 98 .stats_reset = iavf_dev_stats_reset, 99 .promiscuous_enable = iavf_dev_promiscuous_enable, 100 .promiscuous_disable = iavf_dev_promiscuous_disable, 101 .allmulticast_enable = iavf_dev_allmulticast_enable, 102 .allmulticast_disable = iavf_dev_allmulticast_disable, 103 .mac_addr_add = iavf_dev_add_mac_addr, 104 .mac_addr_remove = iavf_dev_del_mac_addr, 105 .vlan_filter_set = iavf_dev_vlan_filter_set, 106 .vlan_offload_set = iavf_dev_vlan_offload_set, 107 .rx_queue_start = iavf_dev_rx_queue_start, 108 .rx_queue_stop = iavf_dev_rx_queue_stop, 109 .tx_queue_start = iavf_dev_tx_queue_start, 110 .tx_queue_stop = iavf_dev_tx_queue_stop, 111 .rx_queue_setup = iavf_dev_rx_queue_setup, 112 .rx_queue_release = iavf_dev_rx_queue_release, 113 .tx_queue_setup = iavf_dev_tx_queue_setup, 114 .tx_queue_release = iavf_dev_tx_queue_release, 115 .mac_addr_set = iavf_dev_set_default_mac_addr, 116 .reta_update = iavf_dev_rss_reta_update, 117 .reta_query = iavf_dev_rss_reta_query, 118 .rss_hash_update = iavf_dev_rss_hash_update, 119 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 120 .rxq_info_get = iavf_dev_rxq_info_get, 121 .txq_info_get = iavf_dev_txq_info_get, 122 .rx_queue_count = iavf_dev_rxq_count, 123 .rx_descriptor_status = iavf_dev_rx_desc_status, 124 .tx_descriptor_status = iavf_dev_tx_desc_status, 125 .mtu_set = iavf_dev_mtu_set, 126 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 127 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 128 }; 129 130 static int 131 iavf_dev_configure(struct rte_eth_dev *dev) 132 { 133 struct iavf_adapter *ad = 134 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 135 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 136 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 137 138 ad->rx_bulk_alloc_allowed = true; 139 /* Initialize to TRUE. If any of Rx queues doesn't meet the 140 * vector Rx/Tx preconditions, it will be reset. 141 */ 142 ad->rx_vec_allowed = true; 143 ad->tx_vec_allowed = true; 144 145 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 146 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 147 148 /* Vlan stripping setting */ 149 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { 150 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 151 iavf_enable_vlan_strip(ad); 152 else 153 iavf_disable_vlan_strip(ad); 154 } 155 return 0; 156 } 157 158 static int 159 iavf_init_rss(struct iavf_adapter *adapter) 160 { 161 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 162 struct rte_eth_rss_conf *rss_conf; 163 uint8_t i, j, nb_q; 164 int ret; 165 166 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 167 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 168 IAVF_MAX_NUM_QUEUES); 169 170 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 171 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 172 return -ENOTSUP; 173 } 174 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 175 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 176 /* set all lut items to default queue */ 177 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 178 vf->rss_lut[i] = 0; 179 ret = iavf_configure_rss_lut(adapter); 180 return ret; 181 } 182 183 /* In IAVF, RSS enablement is set by PF driver. It is not supported 184 * to set based on rss_conf->rss_hf. 185 */ 186 187 /* configure RSS key */ 188 if (!rss_conf->rss_key) { 189 /* Calculate the default hash key */ 190 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 191 vf->rss_key[i] = (uint8_t)rte_rand(); 192 } else 193 rte_memcpy(vf->rss_key, rss_conf->rss_key, 194 RTE_MIN(rss_conf->rss_key_len, 195 vf->vf_res->rss_key_size)); 196 197 /* init RSS LUT table */ 198 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 199 if (j >= nb_q) 200 j = 0; 201 vf->rss_lut[i] = j; 202 } 203 /* send virtchnnl ops to configure rss*/ 204 ret = iavf_configure_rss_lut(adapter); 205 if (ret) 206 return ret; 207 ret = iavf_configure_rss_key(adapter); 208 if (ret) 209 return ret; 210 211 return 0; 212 } 213 214 static int 215 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 216 { 217 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 218 struct rte_eth_dev_data *dev_data = dev->data; 219 uint16_t buf_size, max_pkt_len, len; 220 221 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 222 223 /* Calculate the maximum packet length allowed */ 224 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 225 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 226 227 /* Check if the jumbo frame and maximum packet length are set 228 * correctly. 229 */ 230 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 231 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 232 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 233 PMD_DRV_LOG(ERR, "maximum packet length must be " 234 "larger than %u and smaller than %u, " 235 "as jumbo frame is enabled", 236 (uint32_t)RTE_ETHER_MAX_LEN, 237 (uint32_t)IAVF_FRAME_SIZE_MAX); 238 return -EINVAL; 239 } 240 } else { 241 if (max_pkt_len < RTE_ETHER_MIN_LEN || 242 max_pkt_len > RTE_ETHER_MAX_LEN) { 243 PMD_DRV_LOG(ERR, "maximum packet length must be " 244 "larger than %u and smaller than %u, " 245 "as jumbo frame is disabled", 246 (uint32_t)RTE_ETHER_MIN_LEN, 247 (uint32_t)RTE_ETHER_MAX_LEN); 248 return -EINVAL; 249 } 250 } 251 252 rxq->max_pkt_len = max_pkt_len; 253 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 254 (rxq->max_pkt_len + 2 * IAVF_VLAN_TAG_SIZE) > buf_size) { 255 dev_data->scattered_rx = 1; 256 } 257 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 258 IAVF_WRITE_FLUSH(hw); 259 260 return 0; 261 } 262 263 static int 264 iavf_init_queues(struct rte_eth_dev *dev) 265 { 266 struct iavf_rx_queue **rxq = 267 (struct iavf_rx_queue **)dev->data->rx_queues; 268 int i, ret = IAVF_SUCCESS; 269 270 for (i = 0; i < dev->data->nb_rx_queues; i++) { 271 if (!rxq[i] || !rxq[i]->q_set) 272 continue; 273 ret = iavf_init_rxq(dev, rxq[i]); 274 if (ret != IAVF_SUCCESS) 275 break; 276 } 277 /* set rx/tx function to vector/scatter/single-segment 278 * according to parameters 279 */ 280 iavf_set_rx_function(dev); 281 iavf_set_tx_function(dev); 282 283 return ret; 284 } 285 286 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 287 struct rte_intr_handle *intr_handle) 288 { 289 struct iavf_adapter *adapter = 290 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 291 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 292 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 293 uint16_t interval, i; 294 int vec; 295 296 if (rte_intr_cap_multiple(intr_handle) && 297 dev->data->dev_conf.intr_conf.rxq) { 298 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 299 return -1; 300 } 301 302 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 303 intr_handle->intr_vec = 304 rte_zmalloc("intr_vec", 305 dev->data->nb_rx_queues * sizeof(int), 0); 306 if (!intr_handle->intr_vec) { 307 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 308 dev->data->nb_rx_queues); 309 return -1; 310 } 311 } 312 313 if (!dev->data->dev_conf.intr_conf.rxq || 314 !rte_intr_dp_is_en(intr_handle)) { 315 /* Rx interrupt disabled, Map interrupt only for writeback */ 316 vf->nb_msix = 1; 317 if (vf->vf_res->vf_cap_flags & 318 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 319 /* If WB_ON_ITR supports, enable it */ 320 vf->msix_base = IAVF_RX_VEC_START; 321 IAVF_WRITE_REG(hw, 322 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 323 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK | 324 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK); 325 } else { 326 /* If no WB_ON_ITR offload flags, need to set 327 * interrupt for descriptor write back. 328 */ 329 vf->msix_base = IAVF_MISC_VEC_ID; 330 331 /* set ITR to max */ 332 interval = iavf_calc_itr_interval( 333 IAVF_QUEUE_ITR_INTERVAL_MAX); 334 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 335 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 336 (IAVF_ITR_INDEX_DEFAULT << 337 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 338 (interval << 339 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 340 } 341 IAVF_WRITE_FLUSH(hw); 342 /* map all queues to the same interrupt */ 343 for (i = 0; i < dev->data->nb_rx_queues; i++) 344 vf->rxq_map[vf->msix_base] |= 1 << i; 345 } else { 346 if (!rte_intr_allow_others(intr_handle)) { 347 vf->nb_msix = 1; 348 vf->msix_base = IAVF_MISC_VEC_ID; 349 for (i = 0; i < dev->data->nb_rx_queues; i++) { 350 vf->rxq_map[vf->msix_base] |= 1 << i; 351 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 352 } 353 PMD_DRV_LOG(DEBUG, 354 "vector %u are mapping to all Rx queues", 355 vf->msix_base); 356 } else { 357 /* If Rx interrupt is reuquired, and we can use 358 * multi interrupts, then the vec is from 1 359 */ 360 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 361 intr_handle->nb_efd); 362 vf->msix_base = IAVF_RX_VEC_START; 363 vec = IAVF_RX_VEC_START; 364 for (i = 0; i < dev->data->nb_rx_queues; i++) { 365 vf->rxq_map[vec] |= 1 << i; 366 intr_handle->intr_vec[i] = vec++; 367 if (vec >= vf->nb_msix) 368 vec = IAVF_RX_VEC_START; 369 } 370 PMD_DRV_LOG(DEBUG, 371 "%u vectors are mapping to %u Rx queues", 372 vf->nb_msix, dev->data->nb_rx_queues); 373 } 374 } 375 376 if (iavf_config_irq_map(adapter)) { 377 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 378 return -1; 379 } 380 return 0; 381 } 382 383 static int 384 iavf_start_queues(struct rte_eth_dev *dev) 385 { 386 struct iavf_rx_queue *rxq; 387 struct iavf_tx_queue *txq; 388 int i; 389 390 for (i = 0; i < dev->data->nb_tx_queues; i++) { 391 txq = dev->data->tx_queues[i]; 392 if (txq->tx_deferred_start) 393 continue; 394 if (iavf_dev_tx_queue_start(dev, i) != 0) { 395 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 396 return -1; 397 } 398 } 399 400 for (i = 0; i < dev->data->nb_rx_queues; i++) { 401 rxq = dev->data->rx_queues[i]; 402 if (rxq->rx_deferred_start) 403 continue; 404 if (iavf_dev_rx_queue_start(dev, i) != 0) { 405 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 406 return -1; 407 } 408 } 409 410 return 0; 411 } 412 413 static int 414 iavf_dev_start(struct rte_eth_dev *dev) 415 { 416 struct iavf_adapter *adapter = 417 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 418 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 419 struct rte_intr_handle *intr_handle = dev->intr_handle; 420 421 PMD_INIT_FUNC_TRACE(); 422 423 adapter->stopped = 0; 424 425 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 426 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 427 dev->data->nb_tx_queues); 428 429 if (iavf_init_queues(dev) != 0) { 430 PMD_DRV_LOG(ERR, "failed to do Queue init"); 431 return -1; 432 } 433 434 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 435 if (iavf_init_rss(adapter) != 0) { 436 PMD_DRV_LOG(ERR, "configure rss failed"); 437 goto err_rss; 438 } 439 } 440 441 if (iavf_configure_queues(adapter) != 0) { 442 PMD_DRV_LOG(ERR, "configure queues failed"); 443 goto err_queue; 444 } 445 446 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 447 PMD_DRV_LOG(ERR, "configure irq failed"); 448 goto err_queue; 449 } 450 /* re-enable intr again, because efd assign may change */ 451 if (dev->data->dev_conf.intr_conf.rxq != 0) { 452 rte_intr_disable(intr_handle); 453 rte_intr_enable(intr_handle); 454 } 455 456 /* Set all mac addrs */ 457 iavf_add_del_all_mac_addr(adapter, true); 458 459 if (iavf_start_queues(dev) != 0) { 460 PMD_DRV_LOG(ERR, "enable queues failed"); 461 goto err_mac; 462 } 463 464 return 0; 465 466 err_mac: 467 iavf_add_del_all_mac_addr(adapter, false); 468 err_queue: 469 err_rss: 470 return -1; 471 } 472 473 static void 474 iavf_dev_stop(struct rte_eth_dev *dev) 475 { 476 struct iavf_adapter *adapter = 477 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 478 struct rte_intr_handle *intr_handle = dev->intr_handle; 479 480 PMD_INIT_FUNC_TRACE(); 481 482 if (adapter->stopped == 1) 483 return; 484 485 iavf_stop_queues(dev); 486 487 /* Disable the interrupt for Rx */ 488 rte_intr_efd_disable(intr_handle); 489 /* Rx interrupt vector mapping free */ 490 if (intr_handle->intr_vec) { 491 rte_free(intr_handle->intr_vec); 492 intr_handle->intr_vec = NULL; 493 } 494 495 /* remove all mac addrs */ 496 iavf_add_del_all_mac_addr(adapter, false); 497 adapter->stopped = 1; 498 } 499 500 static int 501 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 502 { 503 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 504 505 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs; 506 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs; 507 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 508 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 509 dev_info->hash_key_size = vf->vf_res->rss_key_size; 510 dev_info->reta_size = vf->vf_res->rss_lut_size; 511 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 512 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 513 dev_info->rx_offload_capa = 514 DEV_RX_OFFLOAD_VLAN_STRIP | 515 DEV_RX_OFFLOAD_QINQ_STRIP | 516 DEV_RX_OFFLOAD_IPV4_CKSUM | 517 DEV_RX_OFFLOAD_UDP_CKSUM | 518 DEV_RX_OFFLOAD_TCP_CKSUM | 519 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 520 DEV_RX_OFFLOAD_SCATTER | 521 DEV_RX_OFFLOAD_JUMBO_FRAME | 522 DEV_RX_OFFLOAD_VLAN_FILTER | 523 DEV_RX_OFFLOAD_RSS_HASH; 524 dev_info->tx_offload_capa = 525 DEV_TX_OFFLOAD_VLAN_INSERT | 526 DEV_TX_OFFLOAD_QINQ_INSERT | 527 DEV_TX_OFFLOAD_IPV4_CKSUM | 528 DEV_TX_OFFLOAD_UDP_CKSUM | 529 DEV_TX_OFFLOAD_TCP_CKSUM | 530 DEV_TX_OFFLOAD_SCTP_CKSUM | 531 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 532 DEV_TX_OFFLOAD_TCP_TSO | 533 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 534 DEV_TX_OFFLOAD_GRE_TNL_TSO | 535 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 536 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 537 DEV_TX_OFFLOAD_MULTI_SEGS; 538 539 dev_info->default_rxconf = (struct rte_eth_rxconf) { 540 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 541 .rx_drop_en = 0, 542 .offloads = 0, 543 }; 544 545 dev_info->default_txconf = (struct rte_eth_txconf) { 546 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 547 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 548 .offloads = 0, 549 }; 550 551 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 552 .nb_max = IAVF_MAX_RING_DESC, 553 .nb_min = IAVF_MIN_RING_DESC, 554 .nb_align = IAVF_ALIGN_RING_DESC, 555 }; 556 557 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 558 .nb_max = IAVF_MAX_RING_DESC, 559 .nb_min = IAVF_MIN_RING_DESC, 560 .nb_align = IAVF_ALIGN_RING_DESC, 561 }; 562 563 return 0; 564 } 565 566 static const uint32_t * 567 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 568 { 569 static const uint32_t ptypes[] = { 570 RTE_PTYPE_L2_ETHER, 571 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 572 RTE_PTYPE_L4_FRAG, 573 RTE_PTYPE_L4_ICMP, 574 RTE_PTYPE_L4_NONFRAG, 575 RTE_PTYPE_L4_SCTP, 576 RTE_PTYPE_L4_TCP, 577 RTE_PTYPE_L4_UDP, 578 RTE_PTYPE_UNKNOWN 579 }; 580 return ptypes; 581 } 582 583 int 584 iavf_dev_link_update(struct rte_eth_dev *dev, 585 __rte_unused int wait_to_complete) 586 { 587 struct rte_eth_link new_link; 588 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 589 590 /* Only read status info stored in VF, and the info is updated 591 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 592 */ 593 switch (vf->link_speed) { 594 case 10: 595 new_link.link_speed = ETH_SPEED_NUM_10M; 596 break; 597 case 100: 598 new_link.link_speed = ETH_SPEED_NUM_100M; 599 break; 600 case 1000: 601 new_link.link_speed = ETH_SPEED_NUM_1G; 602 break; 603 case 10000: 604 new_link.link_speed = ETH_SPEED_NUM_10G; 605 break; 606 case 20000: 607 new_link.link_speed = ETH_SPEED_NUM_20G; 608 break; 609 case 25000: 610 new_link.link_speed = ETH_SPEED_NUM_25G; 611 break; 612 case 40000: 613 new_link.link_speed = ETH_SPEED_NUM_40G; 614 break; 615 case 50000: 616 new_link.link_speed = ETH_SPEED_NUM_50G; 617 break; 618 case 100000: 619 new_link.link_speed = ETH_SPEED_NUM_100G; 620 break; 621 default: 622 new_link.link_speed = ETH_SPEED_NUM_NONE; 623 break; 624 } 625 626 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 627 new_link.link_status = vf->link_up ? ETH_LINK_UP : 628 ETH_LINK_DOWN; 629 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 630 ETH_LINK_SPEED_FIXED); 631 632 if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link, 633 *(uint64_t *)&dev->data->dev_link, 634 *(uint64_t *)&new_link) == 0) 635 return -1; 636 637 return 0; 638 } 639 640 static int 641 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 642 { 643 struct iavf_adapter *adapter = 644 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 645 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 646 int ret; 647 648 if (vf->promisc_unicast_enabled) 649 return 0; 650 651 ret = iavf_config_promisc(adapter, true, vf->promisc_multicast_enabled); 652 if (!ret) 653 vf->promisc_unicast_enabled = true; 654 else 655 ret = -EAGAIN; 656 657 return ret; 658 } 659 660 static int 661 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 662 { 663 struct iavf_adapter *adapter = 664 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 665 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 666 int ret; 667 668 if (!vf->promisc_unicast_enabled) 669 return 0; 670 671 ret = iavf_config_promisc(adapter, false, 672 vf->promisc_multicast_enabled); 673 if (!ret) 674 vf->promisc_unicast_enabled = false; 675 else 676 ret = -EAGAIN; 677 678 return ret; 679 } 680 681 static int 682 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 683 { 684 struct iavf_adapter *adapter = 685 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 686 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 687 int ret; 688 689 if (vf->promisc_multicast_enabled) 690 return 0; 691 692 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, true); 693 if (!ret) 694 vf->promisc_multicast_enabled = true; 695 else 696 ret = -EAGAIN; 697 698 return ret; 699 } 700 701 static int 702 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 703 { 704 struct iavf_adapter *adapter = 705 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 706 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 707 int ret; 708 709 if (!vf->promisc_multicast_enabled) 710 return 0; 711 712 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, false); 713 if (!ret) 714 vf->promisc_multicast_enabled = false; 715 else 716 ret = -EAGAIN; 717 718 return ret; 719 } 720 721 static int 722 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 723 __rte_unused uint32_t index, 724 __rte_unused uint32_t pool) 725 { 726 struct iavf_adapter *adapter = 727 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 728 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 729 int err; 730 731 if (rte_is_zero_ether_addr(addr)) { 732 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 733 return -EINVAL; 734 } 735 736 err = iavf_add_del_eth_addr(adapter, addr, true); 737 if (err) { 738 PMD_DRV_LOG(ERR, "fail to add MAC address"); 739 return -EIO; 740 } 741 742 vf->mac_num++; 743 744 return 0; 745 } 746 747 static void 748 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 749 { 750 struct iavf_adapter *adapter = 751 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 752 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 753 struct rte_ether_addr *addr; 754 int err; 755 756 addr = &dev->data->mac_addrs[index]; 757 758 err = iavf_add_del_eth_addr(adapter, addr, false); 759 if (err) 760 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 761 762 vf->mac_num--; 763 } 764 765 static int 766 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 767 { 768 struct iavf_adapter *adapter = 769 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 770 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 771 int err; 772 773 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 774 return -ENOTSUP; 775 776 err = iavf_add_del_vlan(adapter, vlan_id, on); 777 if (err) 778 return -EIO; 779 return 0; 780 } 781 782 static int 783 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 784 { 785 struct iavf_adapter *adapter = 786 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 787 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 788 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 789 int err; 790 791 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 792 return -ENOTSUP; 793 794 /* Vlan stripping setting */ 795 if (mask & ETH_VLAN_STRIP_MASK) { 796 /* Enable or disable VLAN stripping */ 797 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 798 err = iavf_enable_vlan_strip(adapter); 799 else 800 err = iavf_disable_vlan_strip(adapter); 801 802 if (err) 803 return -EIO; 804 } 805 return 0; 806 } 807 808 static int 809 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 810 struct rte_eth_rss_reta_entry64 *reta_conf, 811 uint16_t reta_size) 812 { 813 struct iavf_adapter *adapter = 814 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 815 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 816 uint8_t *lut; 817 uint16_t i, idx, shift; 818 int ret; 819 820 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 821 return -ENOTSUP; 822 823 if (reta_size != vf->vf_res->rss_lut_size) { 824 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 825 "(%d) doesn't match the number of hardware can " 826 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 827 return -EINVAL; 828 } 829 830 lut = rte_zmalloc("rss_lut", reta_size, 0); 831 if (!lut) { 832 PMD_DRV_LOG(ERR, "No memory can be allocated"); 833 return -ENOMEM; 834 } 835 /* store the old lut table temporarily */ 836 rte_memcpy(lut, vf->rss_lut, reta_size); 837 838 for (i = 0; i < reta_size; i++) { 839 idx = i / RTE_RETA_GROUP_SIZE; 840 shift = i % RTE_RETA_GROUP_SIZE; 841 if (reta_conf[idx].mask & (1ULL << shift)) 842 lut[i] = reta_conf[idx].reta[shift]; 843 } 844 845 rte_memcpy(vf->rss_lut, lut, reta_size); 846 /* send virtchnnl ops to configure rss*/ 847 ret = iavf_configure_rss_lut(adapter); 848 if (ret) /* revert back */ 849 rte_memcpy(vf->rss_lut, lut, reta_size); 850 rte_free(lut); 851 852 return ret; 853 } 854 855 static int 856 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 857 struct rte_eth_rss_reta_entry64 *reta_conf, 858 uint16_t reta_size) 859 { 860 struct iavf_adapter *adapter = 861 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 862 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 863 uint16_t i, idx, shift; 864 865 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 866 return -ENOTSUP; 867 868 if (reta_size != vf->vf_res->rss_lut_size) { 869 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 870 "(%d) doesn't match the number of hardware can " 871 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 872 return -EINVAL; 873 } 874 875 for (i = 0; i < reta_size; i++) { 876 idx = i / RTE_RETA_GROUP_SIZE; 877 shift = i % RTE_RETA_GROUP_SIZE; 878 if (reta_conf[idx].mask & (1ULL << shift)) 879 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 880 } 881 882 return 0; 883 } 884 885 static int 886 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 887 struct rte_eth_rss_conf *rss_conf) 888 { 889 struct iavf_adapter *adapter = 890 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 891 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 892 893 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 894 return -ENOTSUP; 895 896 /* HENA setting, it is enabled by default, no change */ 897 if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) { 898 PMD_DRV_LOG(DEBUG, "No key to be configured"); 899 return 0; 900 } else if (rss_conf->rss_key_len != vf->vf_res->rss_key_size) { 901 PMD_DRV_LOG(ERR, "The size of hash key configured " 902 "(%d) doesn't match the size of hardware can " 903 "support (%d)", rss_conf->rss_key_len, 904 vf->vf_res->rss_key_size); 905 return -EINVAL; 906 } 907 908 rte_memcpy(vf->rss_key, rss_conf->rss_key, rss_conf->rss_key_len); 909 910 return iavf_configure_rss_key(adapter); 911 } 912 913 static int 914 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 915 struct rte_eth_rss_conf *rss_conf) 916 { 917 struct iavf_adapter *adapter = 918 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 919 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 920 921 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 922 return -ENOTSUP; 923 924 /* Just set it to default value now. */ 925 rss_conf->rss_hf = IAVF_RSS_OFFLOAD_ALL; 926 927 if (!rss_conf->rss_key) 928 return 0; 929 930 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 931 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 932 933 return 0; 934 } 935 936 static int 937 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 938 { 939 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 940 int ret = 0; 941 942 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 943 return -EINVAL; 944 945 /* mtu setting is forbidden if port is start */ 946 if (dev->data->dev_started) { 947 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 948 return -EBUSY; 949 } 950 951 if (frame_size > RTE_ETHER_MAX_LEN) 952 dev->data->dev_conf.rxmode.offloads |= 953 DEV_RX_OFFLOAD_JUMBO_FRAME; 954 else 955 dev->data->dev_conf.rxmode.offloads &= 956 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 957 958 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 959 960 return ret; 961 } 962 963 static int 964 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 965 struct rte_ether_addr *mac_addr) 966 { 967 struct iavf_adapter *adapter = 968 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 969 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 970 struct rte_ether_addr *perm_addr, *old_addr; 971 int ret; 972 973 old_addr = (struct rte_ether_addr *)hw->mac.addr; 974 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 975 976 if (rte_is_same_ether_addr(mac_addr, old_addr)) 977 return 0; 978 979 /* If the MAC address is configured by host, skip the setting */ 980 if (rte_is_valid_assigned_ether_addr(perm_addr)) 981 return -EPERM; 982 983 ret = iavf_add_del_eth_addr(adapter, old_addr, false); 984 if (ret) 985 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 986 " %02X:%02X:%02X:%02X:%02X:%02X", 987 old_addr->addr_bytes[0], 988 old_addr->addr_bytes[1], 989 old_addr->addr_bytes[2], 990 old_addr->addr_bytes[3], 991 old_addr->addr_bytes[4], 992 old_addr->addr_bytes[5]); 993 994 ret = iavf_add_del_eth_addr(adapter, mac_addr, true); 995 if (ret) 996 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 997 " %02X:%02X:%02X:%02X:%02X:%02X", 998 mac_addr->addr_bytes[0], 999 mac_addr->addr_bytes[1], 1000 mac_addr->addr_bytes[2], 1001 mac_addr->addr_bytes[3], 1002 mac_addr->addr_bytes[4], 1003 mac_addr->addr_bytes[5]); 1004 1005 if (ret) 1006 return -EIO; 1007 1008 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1009 return 0; 1010 } 1011 1012 static void 1013 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1014 { 1015 if (*stat >= *offset) 1016 *stat = *stat - *offset; 1017 else 1018 *stat = (uint64_t)((*stat + 1019 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1020 1021 *stat &= IAVF_48_BIT_MASK; 1022 } 1023 1024 static void 1025 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1026 { 1027 if (*stat >= *offset) 1028 *stat = (uint64_t)(*stat - *offset); 1029 else 1030 *stat = (uint64_t)((*stat + 1031 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1032 } 1033 1034 static void 1035 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1036 { 1037 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1038 1039 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1040 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1041 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1042 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1043 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1044 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1045 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1046 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1047 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1048 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1049 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1050 } 1051 1052 static int 1053 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1054 { 1055 struct iavf_adapter *adapter = 1056 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1057 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1058 struct iavf_vsi *vsi = &vf->vsi; 1059 struct virtchnl_eth_stats *pstats = NULL; 1060 int ret; 1061 1062 ret = iavf_query_stats(adapter, &pstats); 1063 if (ret == 0) { 1064 iavf_update_stats(vsi, pstats); 1065 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1066 pstats->rx_broadcast - pstats->rx_discards; 1067 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1068 pstats->tx_unicast; 1069 stats->imissed = pstats->rx_discards; 1070 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1071 stats->ibytes = pstats->rx_bytes; 1072 stats->ibytes -= stats->ipackets * RTE_ETHER_CRC_LEN; 1073 stats->obytes = pstats->tx_bytes; 1074 } else { 1075 PMD_DRV_LOG(ERR, "Get statistics failed"); 1076 } 1077 return -EIO; 1078 } 1079 1080 static int 1081 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1082 { 1083 int ret; 1084 struct iavf_adapter *adapter = 1085 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1086 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1087 struct iavf_vsi *vsi = &vf->vsi; 1088 struct virtchnl_eth_stats *pstats = NULL; 1089 1090 /* read stat values to clear hardware registers */ 1091 ret = iavf_query_stats(adapter, &pstats); 1092 if (ret != 0) 1093 return ret; 1094 1095 /* set stats offset base on current values */ 1096 vsi->eth_stats_offset = *pstats; 1097 1098 return 0; 1099 } 1100 1101 static int 1102 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1103 { 1104 struct iavf_adapter *adapter = 1105 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1106 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1107 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1108 uint16_t msix_intr; 1109 1110 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1111 if (msix_intr == IAVF_MISC_VEC_ID) { 1112 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1113 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1114 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1115 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1116 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1117 } else { 1118 IAVF_WRITE_REG(hw, 1119 IAVF_VFINT_DYN_CTLN1 1120 (msix_intr - IAVF_RX_VEC_START), 1121 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1122 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1123 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1124 } 1125 1126 IAVF_WRITE_FLUSH(hw); 1127 1128 rte_intr_ack(&pci_dev->intr_handle); 1129 1130 return 0; 1131 } 1132 1133 static int 1134 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1135 { 1136 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1137 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1138 uint16_t msix_intr; 1139 1140 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1141 if (msix_intr == IAVF_MISC_VEC_ID) { 1142 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1143 return -EIO; 1144 } 1145 1146 IAVF_WRITE_REG(hw, 1147 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1148 0); 1149 1150 IAVF_WRITE_FLUSH(hw); 1151 return 0; 1152 } 1153 1154 static int 1155 iavf_check_vf_reset_done(struct iavf_hw *hw) 1156 { 1157 int i, reset; 1158 1159 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1160 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1161 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1162 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1163 if (reset == VIRTCHNL_VFR_VFACTIVE || 1164 reset == VIRTCHNL_VFR_COMPLETED) 1165 break; 1166 rte_delay_ms(20); 1167 } 1168 1169 if (i >= IAVF_RESET_WAIT_CNT) 1170 return -1; 1171 1172 return 0; 1173 } 1174 1175 static int 1176 iavf_init_vf(struct rte_eth_dev *dev) 1177 { 1178 int err, bufsz; 1179 struct iavf_adapter *adapter = 1180 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1181 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1182 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1183 1184 err = iavf_set_mac_type(hw); 1185 if (err) { 1186 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1187 goto err; 1188 } 1189 1190 err = iavf_check_vf_reset_done(hw); 1191 if (err) { 1192 PMD_INIT_LOG(ERR, "VF is still resetting"); 1193 goto err; 1194 } 1195 1196 iavf_init_adminq_parameter(hw); 1197 err = iavf_init_adminq(hw); 1198 if (err) { 1199 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1200 goto err; 1201 } 1202 1203 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1204 if (!vf->aq_resp) { 1205 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1206 goto err_aq; 1207 } 1208 if (iavf_check_api_version(adapter) != 0) { 1209 PMD_INIT_LOG(ERR, "check_api version failed"); 1210 goto err_api; 1211 } 1212 1213 bufsz = sizeof(struct virtchnl_vf_resource) + 1214 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1215 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1216 if (!vf->vf_res) { 1217 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1218 goto err_api; 1219 } 1220 if (iavf_get_vf_resource(adapter) != 0) { 1221 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1222 goto err_alloc; 1223 } 1224 /* Allocate memort for RSS info */ 1225 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1226 vf->rss_key = rte_zmalloc("rss_key", 1227 vf->vf_res->rss_key_size, 0); 1228 if (!vf->rss_key) { 1229 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1230 goto err_rss; 1231 } 1232 vf->rss_lut = rte_zmalloc("rss_lut", 1233 vf->vf_res->rss_lut_size, 0); 1234 if (!vf->rss_lut) { 1235 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1236 goto err_rss; 1237 } 1238 } 1239 return 0; 1240 err_rss: 1241 rte_free(vf->rss_key); 1242 rte_free(vf->rss_lut); 1243 err_alloc: 1244 rte_free(vf->vf_res); 1245 vf->vsi_res = NULL; 1246 err_api: 1247 rte_free(vf->aq_resp); 1248 err_aq: 1249 iavf_shutdown_adminq(hw); 1250 err: 1251 return -1; 1252 } 1253 1254 /* Enable default admin queue interrupt setting */ 1255 static inline void 1256 iavf_enable_irq0(struct iavf_hw *hw) 1257 { 1258 /* Enable admin queue interrupt trigger */ 1259 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 1260 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 1261 1262 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1263 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1264 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1265 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1266 1267 IAVF_WRITE_FLUSH(hw); 1268 } 1269 1270 static inline void 1271 iavf_disable_irq0(struct iavf_hw *hw) 1272 { 1273 /* Disable all interrupt types */ 1274 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 1275 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1276 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1277 IAVF_WRITE_FLUSH(hw); 1278 } 1279 1280 static void 1281 iavf_dev_interrupt_handler(void *param) 1282 { 1283 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1284 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1285 1286 iavf_disable_irq0(hw); 1287 1288 iavf_handle_virtchnl_msg(dev); 1289 1290 iavf_enable_irq0(hw); 1291 } 1292 1293 static int 1294 iavf_dev_init(struct rte_eth_dev *eth_dev) 1295 { 1296 struct iavf_adapter *adapter = 1297 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1298 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1299 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1300 1301 PMD_INIT_FUNC_TRACE(); 1302 1303 /* assign ops func pointer */ 1304 eth_dev->dev_ops = &iavf_eth_dev_ops; 1305 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 1306 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 1307 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 1308 1309 /* For secondary processes, we don't initialise any further as primary 1310 * has already done this work. Only check if we need a different RX 1311 * and TX function. 1312 */ 1313 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1314 iavf_set_rx_function(eth_dev); 1315 iavf_set_tx_function(eth_dev); 1316 return 0; 1317 } 1318 rte_eth_copy_pci_info(eth_dev, pci_dev); 1319 1320 hw->vendor_id = pci_dev->id.vendor_id; 1321 hw->device_id = pci_dev->id.device_id; 1322 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 1323 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 1324 hw->bus.bus_id = pci_dev->addr.bus; 1325 hw->bus.device = pci_dev->addr.devid; 1326 hw->bus.func = pci_dev->addr.function; 1327 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 1328 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1329 adapter->eth_dev = eth_dev; 1330 adapter->stopped = 1; 1331 1332 if (iavf_init_vf(eth_dev) != 0) { 1333 PMD_INIT_LOG(ERR, "Init vf failed"); 1334 return -1; 1335 } 1336 1337 /* copy mac addr */ 1338 eth_dev->data->mac_addrs = rte_zmalloc( 1339 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 1340 if (!eth_dev->data->mac_addrs) { 1341 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 1342 " store MAC addresses", 1343 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 1344 return -ENOMEM; 1345 } 1346 /* If the MAC address is not configured by host, 1347 * generate a random one. 1348 */ 1349 if (!rte_is_valid_assigned_ether_addr( 1350 (struct rte_ether_addr *)hw->mac.addr)) 1351 rte_eth_random_addr(hw->mac.addr); 1352 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 1353 ð_dev->data->mac_addrs[0]); 1354 1355 /* register callback func to eal lib */ 1356 rte_intr_callback_register(&pci_dev->intr_handle, 1357 iavf_dev_interrupt_handler, 1358 (void *)eth_dev); 1359 1360 /* enable uio intr after callback register */ 1361 rte_intr_enable(&pci_dev->intr_handle); 1362 1363 /* configure and enable device interrupt */ 1364 iavf_enable_irq0(hw); 1365 1366 return 0; 1367 } 1368 1369 static void 1370 iavf_dev_close(struct rte_eth_dev *dev) 1371 { 1372 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1373 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1374 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 1375 1376 iavf_dev_stop(dev); 1377 iavf_shutdown_adminq(hw); 1378 /* disable uio intr before callback unregister */ 1379 rte_intr_disable(intr_handle); 1380 1381 /* unregister callback func from eal lib */ 1382 rte_intr_callback_unregister(intr_handle, 1383 iavf_dev_interrupt_handler, dev); 1384 iavf_disable_irq0(hw); 1385 } 1386 1387 static int 1388 iavf_dev_uninit(struct rte_eth_dev *dev) 1389 { 1390 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1391 1392 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1393 return -EPERM; 1394 1395 dev->dev_ops = NULL; 1396 dev->rx_pkt_burst = NULL; 1397 dev->tx_pkt_burst = NULL; 1398 iavf_dev_close(dev); 1399 1400 rte_free(vf->vf_res); 1401 vf->vsi_res = NULL; 1402 vf->vf_res = NULL; 1403 1404 rte_free(vf->aq_resp); 1405 vf->aq_resp = NULL; 1406 1407 if (vf->rss_lut) { 1408 rte_free(vf->rss_lut); 1409 vf->rss_lut = NULL; 1410 } 1411 if (vf->rss_key) { 1412 rte_free(vf->rss_key); 1413 vf->rss_key = NULL; 1414 } 1415 1416 return 0; 1417 } 1418 1419 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1420 struct rte_pci_device *pci_dev) 1421 { 1422 return rte_eth_dev_pci_generic_probe(pci_dev, 1423 sizeof(struct iavf_adapter), iavf_dev_init); 1424 } 1425 1426 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 1427 { 1428 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 1429 } 1430 1431 /* Adaptive virtual function driver struct */ 1432 static struct rte_pci_driver rte_iavf_pmd = { 1433 .id_table = pci_id_iavf_map, 1434 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 1435 .probe = eth_iavf_pci_probe, 1436 .remove = eth_iavf_pci_remove, 1437 }; 1438 1439 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 1440 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 1441 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 1442 RTE_INIT(iavf_init_log) 1443 { 1444 iavf_logtype_init = rte_log_register("pmd.net.iavf.init"); 1445 if (iavf_logtype_init >= 0) 1446 rte_log_set_level(iavf_logtype_init, RTE_LOG_NOTICE); 1447 iavf_logtype_driver = rte_log_register("pmd.net.iavf.driver"); 1448 if (iavf_logtype_driver >= 0) 1449 rte_log_set_level(iavf_logtype_driver, RTE_LOG_NOTICE); 1450 1451 #ifdef RTE_LIBRTE_IAVF_DEBUG_RX 1452 iavf_logtype_rx = rte_log_register("pmd.net.iavf.rx"); 1453 if (iavf_logtype_rx >= 0) 1454 rte_log_set_level(iavf_logtype_rx, RTE_LOG_DEBUG); 1455 #endif 1456 1457 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX 1458 iavf_logtype_tx = rte_log_register("pmd.net.iavf.tx"); 1459 if (iavf_logtype_tx >= 0) 1460 rte_log_set_level(iavf_logtype_tx, RTE_LOG_DEBUG); 1461 #endif 1462 1463 #ifdef RTE_LIBRTE_IAVF_DEBUG_TX_FREE 1464 iavf_logtype_tx_free = rte_log_register("pmd.net.iavf.tx_free"); 1465 if (iavf_logtype_tx_free >= 0) 1466 rte_log_set_level(iavf_logtype_tx_free, RTE_LOG_DEBUG); 1467 #endif 1468 } 1469