1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <rte_ethdev_driver.h> 23 #include <rte_ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf_log.h" 29 #include "base/iavf_prototype.h" 30 #include "base/iavf_adminq_cmd.h" 31 #include "base/iavf_type.h" 32 33 #include "iavf.h" 34 #include "iavf_rxtx.h" 35 36 static int iavf_dev_configure(struct rte_eth_dev *dev); 37 static int iavf_dev_start(struct rte_eth_dev *dev); 38 static void iavf_dev_stop(struct rte_eth_dev *dev); 39 static void iavf_dev_close(struct rte_eth_dev *dev); 40 static void iavf_dev_info_get(struct rte_eth_dev *dev, 41 struct rte_eth_dev_info *dev_info); 42 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 43 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 44 struct rte_eth_stats *stats); 45 static void iavf_dev_stats_reset(struct rte_eth_dev *dev); 46 static void iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 47 static void iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 48 static void iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 49 static void iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 50 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 51 struct rte_ether_addr *addr, 52 uint32_t index, 53 uint32_t pool); 54 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 55 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 56 uint16_t vlan_id, int on); 57 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 58 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 59 struct rte_eth_rss_reta_entry64 *reta_conf, 60 uint16_t reta_size); 61 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 62 struct rte_eth_rss_reta_entry64 *reta_conf, 63 uint16_t reta_size); 64 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 65 struct rte_eth_rss_conf *rss_conf); 66 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 67 struct rte_eth_rss_conf *rss_conf); 68 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 69 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 70 struct rte_ether_addr *mac_addr); 71 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 72 uint16_t queue_id); 73 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 74 uint16_t queue_id); 75 76 int iavf_logtype_init; 77 int iavf_logtype_driver; 78 79 static const struct rte_pci_id pci_id_iavf_map[] = { 80 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 81 { .vendor_id = 0, /* sentinel */ }, 82 }; 83 84 static const struct eth_dev_ops iavf_eth_dev_ops = { 85 .dev_configure = iavf_dev_configure, 86 .dev_start = iavf_dev_start, 87 .dev_stop = iavf_dev_stop, 88 .dev_close = iavf_dev_close, 89 .dev_infos_get = iavf_dev_info_get, 90 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 91 .link_update = iavf_dev_link_update, 92 .stats_get = iavf_dev_stats_get, 93 .stats_reset = iavf_dev_stats_reset, 94 .promiscuous_enable = iavf_dev_promiscuous_enable, 95 .promiscuous_disable = iavf_dev_promiscuous_disable, 96 .allmulticast_enable = iavf_dev_allmulticast_enable, 97 .allmulticast_disable = iavf_dev_allmulticast_disable, 98 .mac_addr_add = iavf_dev_add_mac_addr, 99 .mac_addr_remove = iavf_dev_del_mac_addr, 100 .vlan_filter_set = iavf_dev_vlan_filter_set, 101 .vlan_offload_set = iavf_dev_vlan_offload_set, 102 .rx_queue_start = iavf_dev_rx_queue_start, 103 .rx_queue_stop = iavf_dev_rx_queue_stop, 104 .tx_queue_start = iavf_dev_tx_queue_start, 105 .tx_queue_stop = iavf_dev_tx_queue_stop, 106 .rx_queue_setup = iavf_dev_rx_queue_setup, 107 .rx_queue_release = iavf_dev_rx_queue_release, 108 .tx_queue_setup = iavf_dev_tx_queue_setup, 109 .tx_queue_release = iavf_dev_tx_queue_release, 110 .mac_addr_set = iavf_dev_set_default_mac_addr, 111 .reta_update = iavf_dev_rss_reta_update, 112 .reta_query = iavf_dev_rss_reta_query, 113 .rss_hash_update = iavf_dev_rss_hash_update, 114 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 115 .rxq_info_get = iavf_dev_rxq_info_get, 116 .txq_info_get = iavf_dev_txq_info_get, 117 .rx_queue_count = iavf_dev_rxq_count, 118 .rx_descriptor_status = iavf_dev_rx_desc_status, 119 .tx_descriptor_status = iavf_dev_tx_desc_status, 120 .mtu_set = iavf_dev_mtu_set, 121 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 122 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 123 }; 124 125 static int 126 iavf_dev_configure(struct rte_eth_dev *dev) 127 { 128 struct iavf_adapter *ad = 129 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 130 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 131 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 132 133 ad->rx_bulk_alloc_allowed = true; 134 #ifdef RTE_LIBRTE_IAVF_INC_VECTOR 135 /* Initialize to TRUE. If any of Rx queues doesn't meet the 136 * vector Rx/Tx preconditions, it will be reset. 137 */ 138 ad->rx_vec_allowed = true; 139 ad->tx_vec_allowed = true; 140 #else 141 ad->rx_vec_allowed = false; 142 ad->tx_vec_allowed = false; 143 #endif 144 145 /* Vlan stripping setting */ 146 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN) { 147 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 148 iavf_enable_vlan_strip(ad); 149 else 150 iavf_disable_vlan_strip(ad); 151 } 152 return 0; 153 } 154 155 static int 156 iavf_init_rss(struct iavf_adapter *adapter) 157 { 158 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 159 struct rte_eth_rss_conf *rss_conf; 160 uint8_t i, j, nb_q; 161 int ret; 162 163 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 164 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 165 IAVF_MAX_NUM_QUEUES); 166 167 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 168 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 169 return -ENOTSUP; 170 } 171 if (adapter->eth_dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { 172 PMD_DRV_LOG(WARNING, "RSS is enabled by PF by default"); 173 /* set all lut items to default queue */ 174 for (i = 0; i < vf->vf_res->rss_lut_size; i++) 175 vf->rss_lut[i] = 0; 176 ret = iavf_configure_rss_lut(adapter); 177 return ret; 178 } 179 180 /* In IAVF, RSS enablement is set by PF driver. It is not supported 181 * to set based on rss_conf->rss_hf. 182 */ 183 184 /* configure RSS key */ 185 if (!rss_conf->rss_key) { 186 /* Calculate the default hash key */ 187 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 188 vf->rss_key[i] = (uint8_t)rte_rand(); 189 } else 190 rte_memcpy(vf->rss_key, rss_conf->rss_key, 191 RTE_MIN(rss_conf->rss_key_len, 192 vf->vf_res->rss_key_size)); 193 194 /* init RSS LUT table */ 195 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 196 if (j >= nb_q) 197 j = 0; 198 vf->rss_lut[i] = j; 199 } 200 /* send virtchnnl ops to configure rss*/ 201 ret = iavf_configure_rss_lut(adapter); 202 if (ret) 203 return ret; 204 ret = iavf_configure_rss_key(adapter); 205 if (ret) 206 return ret; 207 208 return 0; 209 } 210 211 static int 212 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 213 { 214 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 215 struct rte_eth_dev_data *dev_data = dev->data; 216 uint16_t buf_size, max_pkt_len, len; 217 218 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 219 220 /* Calculate the maximum packet length allowed */ 221 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 222 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 223 224 /* Check if the jumbo frame and maximum packet length are set 225 * correctly. 226 */ 227 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 228 if (max_pkt_len <= RTE_ETHER_MAX_LEN || 229 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 230 PMD_DRV_LOG(ERR, "maximum packet length must be " 231 "larger than %u and smaller than %u, " 232 "as jumbo frame is enabled", 233 (uint32_t)RTE_ETHER_MAX_LEN, 234 (uint32_t)IAVF_FRAME_SIZE_MAX); 235 return -EINVAL; 236 } 237 } else { 238 if (max_pkt_len < RTE_ETHER_MIN_LEN || 239 max_pkt_len > RTE_ETHER_MAX_LEN) { 240 PMD_DRV_LOG(ERR, "maximum packet length must be " 241 "larger than %u and smaller than %u, " 242 "as jumbo frame is disabled", 243 (uint32_t)RTE_ETHER_MIN_LEN, 244 (uint32_t)RTE_ETHER_MAX_LEN); 245 return -EINVAL; 246 } 247 } 248 249 rxq->max_pkt_len = max_pkt_len; 250 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 251 (rxq->max_pkt_len + 2 * IAVF_VLAN_TAG_SIZE) > buf_size) { 252 dev_data->scattered_rx = 1; 253 } 254 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 255 IAVF_WRITE_FLUSH(hw); 256 257 return 0; 258 } 259 260 static int 261 iavf_init_queues(struct rte_eth_dev *dev) 262 { 263 struct iavf_rx_queue **rxq = 264 (struct iavf_rx_queue **)dev->data->rx_queues; 265 int i, ret = IAVF_SUCCESS; 266 267 for (i = 0; i < dev->data->nb_rx_queues; i++) { 268 if (!rxq[i] || !rxq[i]->q_set) 269 continue; 270 ret = iavf_init_rxq(dev, rxq[i]); 271 if (ret != IAVF_SUCCESS) 272 break; 273 } 274 /* set rx/tx function to vector/scatter/single-segment 275 * according to parameters 276 */ 277 iavf_set_rx_function(dev); 278 iavf_set_tx_function(dev); 279 280 return ret; 281 } 282 283 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 284 struct rte_intr_handle *intr_handle) 285 { 286 struct iavf_adapter *adapter = 287 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 288 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 289 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 290 uint16_t interval, i; 291 int vec; 292 293 if (rte_intr_cap_multiple(intr_handle) && 294 dev->data->dev_conf.intr_conf.rxq) { 295 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 296 return -1; 297 } 298 299 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 300 intr_handle->intr_vec = 301 rte_zmalloc("intr_vec", 302 dev->data->nb_rx_queues * sizeof(int), 0); 303 if (!intr_handle->intr_vec) { 304 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 305 dev->data->nb_rx_queues); 306 return -1; 307 } 308 } 309 310 if (!dev->data->dev_conf.intr_conf.rxq || 311 !rte_intr_dp_is_en(intr_handle)) { 312 /* Rx interrupt disabled, Map interrupt only for writeback */ 313 vf->nb_msix = 1; 314 if (vf->vf_res->vf_cap_flags & 315 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 316 /* If WB_ON_ITR supports, enable it */ 317 vf->msix_base = IAVF_RX_VEC_START; 318 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTLN1(vf->msix_base - 1), 319 IAVFINT_DYN_CTLN1_ITR_INDX_MASK | 320 IAVFINT_DYN_CTLN1_WB_ON_ITR_MASK); 321 } else { 322 /* If no WB_ON_ITR offload flags, need to set 323 * interrupt for descriptor write back. 324 */ 325 vf->msix_base = IAVF_MISC_VEC_ID; 326 327 /* set ITR to max */ 328 interval = iavf_calc_itr_interval( 329 IAVF_QUEUE_ITR_INTERVAL_MAX); 330 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, 331 IAVFINT_DYN_CTL01_INTENA_MASK | 332 (IAVF_ITR_INDEX_DEFAULT << 333 IAVFINT_DYN_CTL01_ITR_INDX_SHIFT) | 334 (interval << 335 IAVFINT_DYN_CTL01_INTERVAL_SHIFT)); 336 } 337 IAVF_WRITE_FLUSH(hw); 338 /* map all queues to the same interrupt */ 339 for (i = 0; i < dev->data->nb_rx_queues; i++) 340 vf->rxq_map[vf->msix_base] |= 1 << i; 341 } else { 342 if (!rte_intr_allow_others(intr_handle)) { 343 vf->nb_msix = 1; 344 vf->msix_base = IAVF_MISC_VEC_ID; 345 for (i = 0; i < dev->data->nb_rx_queues; i++) { 346 vf->rxq_map[vf->msix_base] |= 1 << i; 347 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 348 } 349 PMD_DRV_LOG(DEBUG, 350 "vector %u are mapping to all Rx queues", 351 vf->msix_base); 352 } else { 353 /* If Rx interrupt is reuquired, and we can use 354 * multi interrupts, then the vec is from 1 355 */ 356 vf->nb_msix = RTE_MIN(vf->vf_res->max_vectors, 357 intr_handle->nb_efd); 358 vf->msix_base = IAVF_RX_VEC_START; 359 vec = IAVF_RX_VEC_START; 360 for (i = 0; i < dev->data->nb_rx_queues; i++) { 361 vf->rxq_map[vec] |= 1 << i; 362 intr_handle->intr_vec[i] = vec++; 363 if (vec >= vf->nb_msix) 364 vec = IAVF_RX_VEC_START; 365 } 366 PMD_DRV_LOG(DEBUG, 367 "%u vectors are mapping to %u Rx queues", 368 vf->nb_msix, dev->data->nb_rx_queues); 369 } 370 } 371 372 if (iavf_config_irq_map(adapter)) { 373 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 374 return -1; 375 } 376 return 0; 377 } 378 379 static int 380 iavf_start_queues(struct rte_eth_dev *dev) 381 { 382 struct iavf_rx_queue *rxq; 383 struct iavf_tx_queue *txq; 384 int i; 385 386 for (i = 0; i < dev->data->nb_tx_queues; i++) { 387 txq = dev->data->tx_queues[i]; 388 if (txq->tx_deferred_start) 389 continue; 390 if (iavf_dev_tx_queue_start(dev, i) != 0) { 391 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 392 return -1; 393 } 394 } 395 396 for (i = 0; i < dev->data->nb_rx_queues; i++) { 397 rxq = dev->data->rx_queues[i]; 398 if (rxq->rx_deferred_start) 399 continue; 400 if (iavf_dev_rx_queue_start(dev, i) != 0) { 401 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 402 return -1; 403 } 404 } 405 406 return 0; 407 } 408 409 static int 410 iavf_dev_start(struct rte_eth_dev *dev) 411 { 412 struct iavf_adapter *adapter = 413 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 414 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 415 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 416 struct rte_intr_handle *intr_handle = dev->intr_handle; 417 418 PMD_INIT_FUNC_TRACE(); 419 420 hw->adapter_stopped = 0; 421 422 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 423 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 424 dev->data->nb_tx_queues); 425 426 if (iavf_init_queues(dev) != 0) { 427 PMD_DRV_LOG(ERR, "failed to do Queue init"); 428 return -1; 429 } 430 431 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 432 if (iavf_init_rss(adapter) != 0) { 433 PMD_DRV_LOG(ERR, "configure rss failed"); 434 goto err_rss; 435 } 436 } 437 438 if (iavf_configure_queues(adapter) != 0) { 439 PMD_DRV_LOG(ERR, "configure queues failed"); 440 goto err_queue; 441 } 442 443 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 444 PMD_DRV_LOG(ERR, "configure irq failed"); 445 goto err_queue; 446 } 447 /* re-enable intr again, because efd assign may change */ 448 if (dev->data->dev_conf.intr_conf.rxq != 0) { 449 rte_intr_disable(intr_handle); 450 rte_intr_enable(intr_handle); 451 } 452 453 /* Set all mac addrs */ 454 iavf_add_del_all_mac_addr(adapter, TRUE); 455 456 if (iavf_start_queues(dev) != 0) { 457 PMD_DRV_LOG(ERR, "enable queues failed"); 458 goto err_mac; 459 } 460 461 return 0; 462 463 err_mac: 464 iavf_add_del_all_mac_addr(adapter, FALSE); 465 err_queue: 466 err_rss: 467 return -1; 468 } 469 470 static void 471 iavf_dev_stop(struct rte_eth_dev *dev) 472 { 473 struct iavf_adapter *adapter = 474 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 475 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 476 struct rte_intr_handle *intr_handle = dev->intr_handle; 477 478 PMD_INIT_FUNC_TRACE(); 479 480 if (hw->adapter_stopped == 1) 481 return; 482 483 iavf_stop_queues(dev); 484 485 /* Disable the interrupt for Rx */ 486 rte_intr_efd_disable(intr_handle); 487 /* Rx interrupt vector mapping free */ 488 if (intr_handle->intr_vec) { 489 rte_free(intr_handle->intr_vec); 490 intr_handle->intr_vec = NULL; 491 } 492 493 /* remove all mac addrs */ 494 iavf_add_del_all_mac_addr(adapter, FALSE); 495 hw->adapter_stopped = 1; 496 } 497 498 static void 499 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 500 { 501 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 502 503 dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs; 504 dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs; 505 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 506 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 507 dev_info->hash_key_size = vf->vf_res->rss_key_size; 508 dev_info->reta_size = vf->vf_res->rss_lut_size; 509 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 510 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 511 dev_info->rx_offload_capa = 512 DEV_RX_OFFLOAD_VLAN_STRIP | 513 DEV_RX_OFFLOAD_QINQ_STRIP | 514 DEV_RX_OFFLOAD_IPV4_CKSUM | 515 DEV_RX_OFFLOAD_UDP_CKSUM | 516 DEV_RX_OFFLOAD_TCP_CKSUM | 517 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 518 DEV_RX_OFFLOAD_SCATTER | 519 DEV_RX_OFFLOAD_JUMBO_FRAME | 520 DEV_RX_OFFLOAD_VLAN_FILTER; 521 dev_info->tx_offload_capa = 522 DEV_TX_OFFLOAD_VLAN_INSERT | 523 DEV_TX_OFFLOAD_QINQ_INSERT | 524 DEV_TX_OFFLOAD_IPV4_CKSUM | 525 DEV_TX_OFFLOAD_UDP_CKSUM | 526 DEV_TX_OFFLOAD_TCP_CKSUM | 527 DEV_TX_OFFLOAD_SCTP_CKSUM | 528 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 529 DEV_TX_OFFLOAD_TCP_TSO | 530 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 531 DEV_TX_OFFLOAD_GRE_TNL_TSO | 532 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 533 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 534 DEV_TX_OFFLOAD_MULTI_SEGS; 535 536 dev_info->default_rxconf = (struct rte_eth_rxconf) { 537 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 538 .rx_drop_en = 0, 539 .offloads = 0, 540 }; 541 542 dev_info->default_txconf = (struct rte_eth_txconf) { 543 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 544 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 545 .offloads = 0, 546 }; 547 548 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 549 .nb_max = IAVF_MAX_RING_DESC, 550 .nb_min = IAVF_MIN_RING_DESC, 551 .nb_align = IAVF_ALIGN_RING_DESC, 552 }; 553 554 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 555 .nb_max = IAVF_MAX_RING_DESC, 556 .nb_min = IAVF_MIN_RING_DESC, 557 .nb_align = IAVF_ALIGN_RING_DESC, 558 }; 559 } 560 561 static const uint32_t * 562 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 563 { 564 static const uint32_t ptypes[] = { 565 RTE_PTYPE_L2_ETHER, 566 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 567 RTE_PTYPE_L4_FRAG, 568 RTE_PTYPE_L4_ICMP, 569 RTE_PTYPE_L4_NONFRAG, 570 RTE_PTYPE_L4_SCTP, 571 RTE_PTYPE_L4_TCP, 572 RTE_PTYPE_L4_UDP, 573 RTE_PTYPE_UNKNOWN 574 }; 575 return ptypes; 576 } 577 578 int 579 iavf_dev_link_update(struct rte_eth_dev *dev, 580 __rte_unused int wait_to_complete) 581 { 582 struct rte_eth_link new_link; 583 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 584 585 /* Only read status info stored in VF, and the info is updated 586 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 587 */ 588 switch (vf->link_speed) { 589 case 10: 590 new_link.link_speed = ETH_SPEED_NUM_10M; 591 break; 592 case 100: 593 new_link.link_speed = ETH_SPEED_NUM_100M; 594 break; 595 case 1000: 596 new_link.link_speed = ETH_SPEED_NUM_1G; 597 break; 598 case 10000: 599 new_link.link_speed = ETH_SPEED_NUM_10G; 600 break; 601 case 20000: 602 new_link.link_speed = ETH_SPEED_NUM_20G; 603 break; 604 case 25000: 605 new_link.link_speed = ETH_SPEED_NUM_25G; 606 break; 607 case 40000: 608 new_link.link_speed = ETH_SPEED_NUM_40G; 609 break; 610 case 50000: 611 new_link.link_speed = ETH_SPEED_NUM_50G; 612 break; 613 case 100000: 614 new_link.link_speed = ETH_SPEED_NUM_100G; 615 break; 616 default: 617 new_link.link_speed = ETH_SPEED_NUM_NONE; 618 break; 619 } 620 621 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 622 new_link.link_status = vf->link_up ? ETH_LINK_UP : 623 ETH_LINK_DOWN; 624 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 625 ETH_LINK_SPEED_FIXED); 626 627 if (rte_atomic64_cmpset((uint64_t *)&dev->data->dev_link, 628 *(uint64_t *)&dev->data->dev_link, 629 *(uint64_t *)&new_link) == 0) 630 return -1; 631 632 return 0; 633 } 634 635 static void 636 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 637 { 638 struct iavf_adapter *adapter = 639 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 640 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 641 int ret; 642 643 if (vf->promisc_unicast_enabled) 644 return; 645 646 ret = iavf_config_promisc(adapter, TRUE, vf->promisc_multicast_enabled); 647 if (!ret) 648 vf->promisc_unicast_enabled = TRUE; 649 } 650 651 static void 652 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 653 { 654 struct iavf_adapter *adapter = 655 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 656 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 657 int ret; 658 659 if (!vf->promisc_unicast_enabled) 660 return; 661 662 ret = iavf_config_promisc(adapter, FALSE, vf->promisc_multicast_enabled); 663 if (!ret) 664 vf->promisc_unicast_enabled = FALSE; 665 } 666 667 static void 668 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 669 { 670 struct iavf_adapter *adapter = 671 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 672 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 673 int ret; 674 675 if (vf->promisc_multicast_enabled) 676 return; 677 678 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, TRUE); 679 if (!ret) 680 vf->promisc_multicast_enabled = TRUE; 681 } 682 683 static void 684 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 685 { 686 struct iavf_adapter *adapter = 687 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 688 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 689 int ret; 690 691 if (!vf->promisc_multicast_enabled) 692 return; 693 694 ret = iavf_config_promisc(adapter, vf->promisc_unicast_enabled, FALSE); 695 if (!ret) 696 vf->promisc_multicast_enabled = FALSE; 697 } 698 699 static int 700 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 701 __rte_unused uint32_t index, 702 __rte_unused uint32_t pool) 703 { 704 struct iavf_adapter *adapter = 705 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 706 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 707 int err; 708 709 if (rte_is_zero_ether_addr(addr)) { 710 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 711 return -EINVAL; 712 } 713 714 err = iavf_add_del_eth_addr(adapter, addr, TRUE); 715 if (err) { 716 PMD_DRV_LOG(ERR, "fail to add MAC address"); 717 return -EIO; 718 } 719 720 vf->mac_num++; 721 722 return 0; 723 } 724 725 static void 726 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 727 { 728 struct iavf_adapter *adapter = 729 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 730 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 731 struct rte_ether_addr *addr; 732 int err; 733 734 addr = &dev->data->mac_addrs[index]; 735 736 err = iavf_add_del_eth_addr(adapter, addr, FALSE); 737 if (err) 738 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 739 740 vf->mac_num--; 741 } 742 743 static int 744 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 745 { 746 struct iavf_adapter *adapter = 747 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 748 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 749 int err; 750 751 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 752 return -ENOTSUP; 753 754 err = iavf_add_del_vlan(adapter, vlan_id, on); 755 if (err) 756 return -EIO; 757 return 0; 758 } 759 760 static int 761 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 762 { 763 struct iavf_adapter *adapter = 764 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 765 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 766 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 767 int err; 768 769 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 770 return -ENOTSUP; 771 772 /* Vlan stripping setting */ 773 if (mask & ETH_VLAN_STRIP_MASK) { 774 /* Enable or disable VLAN stripping */ 775 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 776 err = iavf_enable_vlan_strip(adapter); 777 else 778 err = iavf_disable_vlan_strip(adapter); 779 780 if (err) 781 return -EIO; 782 } 783 return 0; 784 } 785 786 static int 787 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 788 struct rte_eth_rss_reta_entry64 *reta_conf, 789 uint16_t reta_size) 790 { 791 struct iavf_adapter *adapter = 792 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 793 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 794 uint8_t *lut; 795 uint16_t i, idx, shift; 796 int ret; 797 798 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 799 return -ENOTSUP; 800 801 if (reta_size != vf->vf_res->rss_lut_size) { 802 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 803 "(%d) doesn't match the number of hardware can " 804 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 805 return -EINVAL; 806 } 807 808 lut = rte_zmalloc("rss_lut", reta_size, 0); 809 if (!lut) { 810 PMD_DRV_LOG(ERR, "No memory can be allocated"); 811 return -ENOMEM; 812 } 813 /* store the old lut table temporarily */ 814 rte_memcpy(lut, vf->rss_lut, reta_size); 815 816 for (i = 0; i < reta_size; i++) { 817 idx = i / RTE_RETA_GROUP_SIZE; 818 shift = i % RTE_RETA_GROUP_SIZE; 819 if (reta_conf[idx].mask & (1ULL << shift)) 820 lut[i] = reta_conf[idx].reta[shift]; 821 } 822 823 rte_memcpy(vf->rss_lut, lut, reta_size); 824 /* send virtchnnl ops to configure rss*/ 825 ret = iavf_configure_rss_lut(adapter); 826 if (ret) /* revert back */ 827 rte_memcpy(vf->rss_lut, lut, reta_size); 828 rte_free(lut); 829 830 return ret; 831 } 832 833 static int 834 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 835 struct rte_eth_rss_reta_entry64 *reta_conf, 836 uint16_t reta_size) 837 { 838 struct iavf_adapter *adapter = 839 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 840 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 841 uint16_t i, idx, shift; 842 843 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 844 return -ENOTSUP; 845 846 if (reta_size != vf->vf_res->rss_lut_size) { 847 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 848 "(%d) doesn't match the number of hardware can " 849 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 850 return -EINVAL; 851 } 852 853 for (i = 0; i < reta_size; i++) { 854 idx = i / RTE_RETA_GROUP_SIZE; 855 shift = i % RTE_RETA_GROUP_SIZE; 856 if (reta_conf[idx].mask & (1ULL << shift)) 857 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 858 } 859 860 return 0; 861 } 862 863 static int 864 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 865 struct rte_eth_rss_conf *rss_conf) 866 { 867 struct iavf_adapter *adapter = 868 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 869 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 870 871 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 872 return -ENOTSUP; 873 874 /* HENA setting, it is enabled by default, no change */ 875 if (!rss_conf->rss_key || rss_conf->rss_key_len == 0) { 876 PMD_DRV_LOG(DEBUG, "No key to be configured"); 877 return 0; 878 } else if (rss_conf->rss_key_len != vf->vf_res->rss_key_size) { 879 PMD_DRV_LOG(ERR, "The size of hash key configured " 880 "(%d) doesn't match the size of hardware can " 881 "support (%d)", rss_conf->rss_key_len, 882 vf->vf_res->rss_key_size); 883 return -EINVAL; 884 } 885 886 rte_memcpy(vf->rss_key, rss_conf->rss_key, rss_conf->rss_key_len); 887 888 return iavf_configure_rss_key(adapter); 889 } 890 891 static int 892 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 893 struct rte_eth_rss_conf *rss_conf) 894 { 895 struct iavf_adapter *adapter = 896 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 897 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 898 899 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 900 return -ENOTSUP; 901 902 /* Just set it to default value now. */ 903 rss_conf->rss_hf = IAVF_RSS_OFFLOAD_ALL; 904 905 if (!rss_conf->rss_key) 906 return 0; 907 908 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 909 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 910 911 return 0; 912 } 913 914 static int 915 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 916 { 917 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 918 int ret = 0; 919 920 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 921 return -EINVAL; 922 923 /* mtu setting is forbidden if port is start */ 924 if (dev->data->dev_started) { 925 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 926 return -EBUSY; 927 } 928 929 if (frame_size > RTE_ETHER_MAX_LEN) 930 dev->data->dev_conf.rxmode.offloads |= 931 DEV_RX_OFFLOAD_JUMBO_FRAME; 932 else 933 dev->data->dev_conf.rxmode.offloads &= 934 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 935 936 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 937 938 return ret; 939 } 940 941 static int 942 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 943 struct rte_ether_addr *mac_addr) 944 { 945 struct iavf_adapter *adapter = 946 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 947 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 948 struct rte_ether_addr *perm_addr, *old_addr; 949 int ret; 950 951 old_addr = (struct rte_ether_addr *)hw->mac.addr; 952 perm_addr = (struct rte_ether_addr *)hw->mac.perm_addr; 953 954 if (rte_is_same_ether_addr(mac_addr, old_addr)) 955 return 0; 956 957 /* If the MAC address is configured by host, skip the setting */ 958 if (rte_is_valid_assigned_ether_addr(perm_addr)) 959 return -EPERM; 960 961 ret = iavf_add_del_eth_addr(adapter, old_addr, FALSE); 962 if (ret) 963 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 964 " %02X:%02X:%02X:%02X:%02X:%02X", 965 old_addr->addr_bytes[0], 966 old_addr->addr_bytes[1], 967 old_addr->addr_bytes[2], 968 old_addr->addr_bytes[3], 969 old_addr->addr_bytes[4], 970 old_addr->addr_bytes[5]); 971 972 ret = iavf_add_del_eth_addr(adapter, mac_addr, TRUE); 973 if (ret) 974 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 975 " %02X:%02X:%02X:%02X:%02X:%02X", 976 mac_addr->addr_bytes[0], 977 mac_addr->addr_bytes[1], 978 mac_addr->addr_bytes[2], 979 mac_addr->addr_bytes[3], 980 mac_addr->addr_bytes[4], 981 mac_addr->addr_bytes[5]); 982 983 if (ret) 984 return -EIO; 985 986 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 987 return 0; 988 } 989 990 static void 991 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 992 { 993 if (*stat >= *offset) 994 *stat = *stat - *offset; 995 else 996 *stat = (uint64_t)((*stat + 997 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 998 999 *stat &= IAVF_48_BIT_MASK; 1000 } 1001 1002 static void 1003 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1004 { 1005 if (*stat >= *offset) 1006 *stat = (uint64_t)(*stat - *offset); 1007 else 1008 *stat = (uint64_t)((*stat + 1009 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1010 } 1011 1012 static void 1013 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1014 { 1015 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1016 1017 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1018 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1019 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1020 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1021 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1022 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1023 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1024 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1025 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1026 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1027 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1028 } 1029 1030 static int 1031 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1032 { 1033 struct iavf_adapter *adapter = 1034 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1035 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1036 struct iavf_vsi *vsi = &vf->vsi; 1037 struct virtchnl_eth_stats *pstats = NULL; 1038 int ret; 1039 1040 ret = iavf_query_stats(adapter, &pstats); 1041 if (ret == 0) { 1042 iavf_update_stats(vsi, pstats); 1043 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1044 pstats->rx_broadcast; 1045 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1046 pstats->tx_unicast; 1047 stats->imissed = pstats->rx_discards; 1048 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1049 stats->ibytes = pstats->rx_bytes; 1050 stats->obytes = pstats->tx_bytes; 1051 } else { 1052 PMD_DRV_LOG(ERR, "Get statistics failed"); 1053 } 1054 return -EIO; 1055 } 1056 1057 static void 1058 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1059 { 1060 int ret; 1061 struct iavf_adapter *adapter = 1062 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1063 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1064 struct iavf_vsi *vsi = &vf->vsi; 1065 struct virtchnl_eth_stats *pstats = NULL; 1066 1067 /* read stat values to clear hardware registers */ 1068 ret = iavf_query_stats(adapter, &pstats); 1069 1070 /* set stats offset base on current values */ 1071 if (ret == 0) 1072 vsi->eth_stats_offset = *pstats; 1073 } 1074 1075 static int 1076 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1077 { 1078 struct iavf_adapter *adapter = 1079 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1080 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1081 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1082 uint16_t msix_intr; 1083 1084 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1085 if (msix_intr == IAVF_MISC_VEC_ID) { 1086 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1087 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, 1088 IAVFINT_DYN_CTL01_INTENA_MASK | 1089 IAVFINT_DYN_CTL01_CLEARPBA_MASK | 1090 IAVFINT_DYN_CTL01_ITR_INDX_MASK); 1091 } else { 1092 IAVF_WRITE_REG(hw, 1093 IAVFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1094 IAVFINT_DYN_CTLN1_INTENA_MASK | 1095 IAVFINT_DYN_CTL01_CLEARPBA_MASK | 1096 IAVFINT_DYN_CTLN1_ITR_INDX_MASK); 1097 } 1098 1099 IAVF_WRITE_FLUSH(hw); 1100 1101 rte_intr_enable(&pci_dev->intr_handle); 1102 1103 return 0; 1104 } 1105 1106 static int 1107 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1108 { 1109 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1110 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1111 uint16_t msix_intr; 1112 1113 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1114 if (msix_intr == IAVF_MISC_VEC_ID) { 1115 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1116 return -EIO; 1117 } 1118 1119 IAVF_WRITE_REG(hw, 1120 IAVFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1121 0); 1122 1123 IAVF_WRITE_FLUSH(hw); 1124 return 0; 1125 } 1126 1127 static int 1128 iavf_check_vf_reset_done(struct iavf_hw *hw) 1129 { 1130 int i, reset; 1131 1132 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1133 reset = IAVF_READ_REG(hw, IAVFGEN_RSTAT) & 1134 IAVFGEN_RSTAT_VFR_STATE_MASK; 1135 reset = reset >> IAVFGEN_RSTAT_VFR_STATE_SHIFT; 1136 if (reset == VIRTCHNL_VFR_VFACTIVE || 1137 reset == VIRTCHNL_VFR_COMPLETED) 1138 break; 1139 rte_delay_ms(20); 1140 } 1141 1142 if (i >= IAVF_RESET_WAIT_CNT) 1143 return -1; 1144 1145 return 0; 1146 } 1147 1148 static int 1149 iavf_init_vf(struct rte_eth_dev *dev) 1150 { 1151 int err, bufsz; 1152 struct iavf_adapter *adapter = 1153 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1154 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1155 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1156 1157 err = iavf_set_mac_type(hw); 1158 if (err) { 1159 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 1160 goto err; 1161 } 1162 1163 err = iavf_check_vf_reset_done(hw); 1164 if (err) { 1165 PMD_INIT_LOG(ERR, "VF is still resetting"); 1166 goto err; 1167 } 1168 1169 iavf_init_adminq_parameter(hw); 1170 err = iavf_init_adminq(hw); 1171 if (err) { 1172 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 1173 goto err; 1174 } 1175 1176 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 1177 if (!vf->aq_resp) { 1178 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 1179 goto err_aq; 1180 } 1181 if (iavf_check_api_version(adapter) != 0) { 1182 PMD_INIT_LOG(ERR, "check_api version failed"); 1183 goto err_api; 1184 } 1185 1186 bufsz = sizeof(struct virtchnl_vf_resource) + 1187 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 1188 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 1189 if (!vf->vf_res) { 1190 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 1191 goto err_api; 1192 } 1193 if (iavf_get_vf_resource(adapter) != 0) { 1194 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 1195 goto err_alloc; 1196 } 1197 /* Allocate memort for RSS info */ 1198 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 1199 vf->rss_key = rte_zmalloc("rss_key", 1200 vf->vf_res->rss_key_size, 0); 1201 if (!vf->rss_key) { 1202 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 1203 goto err_rss; 1204 } 1205 vf->rss_lut = rte_zmalloc("rss_lut", 1206 vf->vf_res->rss_lut_size, 0); 1207 if (!vf->rss_lut) { 1208 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 1209 goto err_rss; 1210 } 1211 } 1212 return 0; 1213 err_rss: 1214 rte_free(vf->rss_key); 1215 rte_free(vf->rss_lut); 1216 err_alloc: 1217 rte_free(vf->vf_res); 1218 vf->vsi_res = NULL; 1219 err_api: 1220 rte_free(vf->aq_resp); 1221 err_aq: 1222 iavf_shutdown_adminq(hw); 1223 err: 1224 return -1; 1225 } 1226 1227 /* Enable default admin queue interrupt setting */ 1228 static inline void 1229 iavf_enable_irq0(struct iavf_hw *hw) 1230 { 1231 /* Enable admin queue interrupt trigger */ 1232 IAVF_WRITE_REG(hw, IAVFINT_ICR0_ENA1, IAVFINT_ICR0_ENA1_ADMINQ_MASK); 1233 1234 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, IAVFINT_DYN_CTL01_INTENA_MASK | 1235 IAVFINT_DYN_CTL01_CLEARPBA_MASK | IAVFINT_DYN_CTL01_ITR_INDX_MASK); 1236 1237 IAVF_WRITE_FLUSH(hw); 1238 } 1239 1240 static inline void 1241 iavf_disable_irq0(struct iavf_hw *hw) 1242 { 1243 /* Disable all interrupt types */ 1244 IAVF_WRITE_REG(hw, IAVFINT_ICR0_ENA1, 0); 1245 IAVF_WRITE_REG(hw, IAVFINT_DYN_CTL01, 1246 IAVFINT_DYN_CTL01_ITR_INDX_MASK); 1247 IAVF_WRITE_FLUSH(hw); 1248 } 1249 1250 static void 1251 iavf_dev_interrupt_handler(void *param) 1252 { 1253 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 1254 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1255 1256 iavf_disable_irq0(hw); 1257 1258 iavf_handle_virtchnl_msg(dev); 1259 1260 iavf_enable_irq0(hw); 1261 } 1262 1263 static int 1264 iavf_dev_init(struct rte_eth_dev *eth_dev) 1265 { 1266 struct iavf_adapter *adapter = 1267 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1268 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1269 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 1270 1271 PMD_INIT_FUNC_TRACE(); 1272 1273 /* assign ops func pointer */ 1274 eth_dev->dev_ops = &iavf_eth_dev_ops; 1275 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 1276 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 1277 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 1278 1279 /* For secondary processes, we don't initialise any further as primary 1280 * has already done this work. Only check if we need a different RX 1281 * and TX function. 1282 */ 1283 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 1284 iavf_set_rx_function(eth_dev); 1285 iavf_set_tx_function(eth_dev); 1286 return 0; 1287 } 1288 rte_eth_copy_pci_info(eth_dev, pci_dev); 1289 1290 hw->vendor_id = pci_dev->id.vendor_id; 1291 hw->device_id = pci_dev->id.device_id; 1292 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 1293 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 1294 hw->bus.bus_id = pci_dev->addr.bus; 1295 hw->bus.device = pci_dev->addr.devid; 1296 hw->bus.func = pci_dev->addr.function; 1297 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 1298 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 1299 adapter->eth_dev = eth_dev; 1300 1301 if (iavf_init_vf(eth_dev) != 0) { 1302 PMD_INIT_LOG(ERR, "Init vf failed"); 1303 return -1; 1304 } 1305 1306 /* copy mac addr */ 1307 eth_dev->data->mac_addrs = rte_zmalloc( 1308 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 1309 if (!eth_dev->data->mac_addrs) { 1310 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 1311 " store MAC addresses", 1312 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 1313 return -ENOMEM; 1314 } 1315 /* If the MAC address is not configured by host, 1316 * generate a random one. 1317 */ 1318 if (!rte_is_valid_assigned_ether_addr( 1319 (struct rte_ether_addr *)hw->mac.addr)) 1320 rte_eth_random_addr(hw->mac.addr); 1321 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 1322 ð_dev->data->mac_addrs[0]); 1323 1324 /* register callback func to eal lib */ 1325 rte_intr_callback_register(&pci_dev->intr_handle, 1326 iavf_dev_interrupt_handler, 1327 (void *)eth_dev); 1328 1329 /* enable uio intr after callback register */ 1330 rte_intr_enable(&pci_dev->intr_handle); 1331 1332 /* configure and enable device interrupt */ 1333 iavf_enable_irq0(hw); 1334 1335 return 0; 1336 } 1337 1338 static void 1339 iavf_dev_close(struct rte_eth_dev *dev) 1340 { 1341 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1342 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1343 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 1344 1345 iavf_dev_stop(dev); 1346 iavf_shutdown_adminq(hw); 1347 /* disable uio intr before callback unregister */ 1348 rte_intr_disable(intr_handle); 1349 1350 /* unregister callback func from eal lib */ 1351 rte_intr_callback_unregister(intr_handle, 1352 iavf_dev_interrupt_handler, dev); 1353 iavf_disable_irq0(hw); 1354 } 1355 1356 static int 1357 iavf_dev_uninit(struct rte_eth_dev *dev) 1358 { 1359 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1360 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1361 1362 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 1363 return -EPERM; 1364 1365 dev->dev_ops = NULL; 1366 dev->rx_pkt_burst = NULL; 1367 dev->tx_pkt_burst = NULL; 1368 if (hw->adapter_stopped == 0) 1369 iavf_dev_close(dev); 1370 1371 rte_free(vf->vf_res); 1372 vf->vsi_res = NULL; 1373 vf->vf_res = NULL; 1374 1375 rte_free(vf->aq_resp); 1376 vf->aq_resp = NULL; 1377 1378 if (vf->rss_lut) { 1379 rte_free(vf->rss_lut); 1380 vf->rss_lut = NULL; 1381 } 1382 if (vf->rss_key) { 1383 rte_free(vf->rss_key); 1384 vf->rss_key = NULL; 1385 } 1386 1387 return 0; 1388 } 1389 1390 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 1391 struct rte_pci_device *pci_dev) 1392 { 1393 return rte_eth_dev_pci_generic_probe(pci_dev, 1394 sizeof(struct iavf_adapter), iavf_dev_init); 1395 } 1396 1397 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 1398 { 1399 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 1400 } 1401 1402 /* Adaptive virtual function driver struct */ 1403 static struct rte_pci_driver rte_iavf_pmd = { 1404 .id_table = pci_id_iavf_map, 1405 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC | 1406 RTE_PCI_DRV_IOVA_AS_VA, 1407 .probe = eth_iavf_pci_probe, 1408 .remove = eth_iavf_pci_remove, 1409 }; 1410 1411 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 1412 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 1413 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 1414 RTE_INIT(iavf_init_log) 1415 { 1416 iavf_logtype_init = rte_log_register("pmd.net.iavf.init"); 1417 if (iavf_logtype_init >= 0) 1418 rte_log_set_level(iavf_logtype_init, RTE_LOG_NOTICE); 1419 iavf_logtype_driver = rte_log_register("pmd.net.iavf.driver"); 1420 if (iavf_logtype_driver >= 0) 1421 rte_log_set_level(iavf_logtype_driver, RTE_LOG_NOTICE); 1422 } 1423 1424 /* memory func for base code */ 1425 enum iavf_status_code 1426 iavf_allocate_dma_mem_d(__rte_unused struct iavf_hw *hw, 1427 struct iavf_dma_mem *mem, 1428 u64 size, 1429 u32 alignment) 1430 { 1431 const struct rte_memzone *mz = NULL; 1432 char z_name[RTE_MEMZONE_NAMESIZE]; 1433 1434 if (!mem) 1435 return IAVF_ERR_PARAM; 1436 1437 snprintf(z_name, sizeof(z_name), "iavf_dma_%"PRIu64, rte_rand()); 1438 mz = rte_memzone_reserve_bounded(z_name, size, SOCKET_ID_ANY, 1439 RTE_MEMZONE_IOVA_CONTIG, alignment, RTE_PGSIZE_2M); 1440 if (!mz) 1441 return IAVF_ERR_NO_MEMORY; 1442 1443 mem->size = size; 1444 mem->va = mz->addr; 1445 mem->pa = mz->phys_addr; 1446 mem->zone = (const void *)mz; 1447 PMD_DRV_LOG(DEBUG, 1448 "memzone %s allocated with physical address: %"PRIu64, 1449 mz->name, mem->pa); 1450 1451 return IAVF_SUCCESS; 1452 } 1453 1454 enum iavf_status_code 1455 iavf_free_dma_mem_d(__rte_unused struct iavf_hw *hw, 1456 struct iavf_dma_mem *mem) 1457 { 1458 if (!mem) 1459 return IAVF_ERR_PARAM; 1460 1461 PMD_DRV_LOG(DEBUG, 1462 "memzone %s to be freed with physical address: %"PRIu64, 1463 ((const struct rte_memzone *)mem->zone)->name, mem->pa); 1464 rte_memzone_free((const struct rte_memzone *)mem->zone); 1465 mem->zone = NULL; 1466 mem->va = NULL; 1467 mem->pa = (u64)0; 1468 1469 return IAVF_SUCCESS; 1470 } 1471 1472 enum iavf_status_code 1473 iavf_allocate_virt_mem_d(__rte_unused struct iavf_hw *hw, 1474 struct iavf_virt_mem *mem, 1475 u32 size) 1476 { 1477 if (!mem) 1478 return IAVF_ERR_PARAM; 1479 1480 mem->size = size; 1481 mem->va = rte_zmalloc("iavf", size, 0); 1482 1483 if (mem->va) 1484 return IAVF_SUCCESS; 1485 else 1486 return IAVF_ERR_NO_MEMORY; 1487 } 1488 1489 enum iavf_status_code 1490 iavf_free_virt_mem_d(__rte_unused struct iavf_hw *hw, 1491 struct iavf_virt_mem *mem) 1492 { 1493 if (!mem) 1494 return IAVF_ERR_PARAM; 1495 1496 rte_free(mem->va); 1497 mem->va = NULL; 1498 1499 return IAVF_SUCCESS; 1500 } 1501