1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_alarm.h> 20 #include <rte_atomic.h> 21 #include <rte_eal.h> 22 #include <rte_ether.h> 23 #include <ethdev_driver.h> 24 #include <ethdev_pci.h> 25 #include <rte_malloc.h> 26 #include <rte_memzone.h> 27 #include <rte_dev.h> 28 29 #include "iavf.h" 30 #include "iavf_rxtx.h" 31 #include "iavf_generic_flow.h" 32 #include "rte_pmd_iavf.h" 33 34 /* devargs */ 35 #define IAVF_PROTO_XTR_ARG "proto_xtr" 36 37 static const char * const iavf_valid_args[] = { 38 IAVF_PROTO_XTR_ARG, 39 NULL 40 }; 41 42 static const struct rte_mbuf_dynfield iavf_proto_xtr_metadata_param = { 43 .name = "intel_pmd_dynfield_proto_xtr_metadata", 44 .size = sizeof(uint32_t), 45 .align = __alignof__(uint32_t), 46 .flags = 0, 47 }; 48 49 struct iavf_proto_xtr_ol { 50 const struct rte_mbuf_dynflag param; 51 uint64_t *ol_flag; 52 bool required; 53 }; 54 55 static struct iavf_proto_xtr_ol iavf_proto_xtr_params[] = { 56 [IAVF_PROTO_XTR_VLAN] = { 57 .param = { .name = "intel_pmd_dynflag_proto_xtr_vlan" }, 58 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_vlan_mask }, 59 [IAVF_PROTO_XTR_IPV4] = { 60 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv4" }, 61 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv4_mask }, 62 [IAVF_PROTO_XTR_IPV6] = { 63 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6" }, 64 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_mask }, 65 [IAVF_PROTO_XTR_IPV6_FLOW] = { 66 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6_flow" }, 67 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_flow_mask }, 68 [IAVF_PROTO_XTR_TCP] = { 69 .param = { .name = "intel_pmd_dynflag_proto_xtr_tcp" }, 70 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_tcp_mask }, 71 [IAVF_PROTO_XTR_IP_OFFSET] = { 72 .param = { .name = "intel_pmd_dynflag_proto_xtr_ip_offset" }, 73 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ip_offset_mask }, 74 }; 75 76 static int iavf_dev_configure(struct rte_eth_dev *dev); 77 static int iavf_dev_start(struct rte_eth_dev *dev); 78 static int iavf_dev_stop(struct rte_eth_dev *dev); 79 static int iavf_dev_close(struct rte_eth_dev *dev); 80 static int iavf_dev_reset(struct rte_eth_dev *dev); 81 static int iavf_dev_info_get(struct rte_eth_dev *dev, 82 struct rte_eth_dev_info *dev_info); 83 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 84 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 85 struct rte_eth_stats *stats); 86 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 87 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 88 struct rte_eth_xstat *xstats, unsigned int n); 89 static int iavf_dev_xstats_get_names(struct rte_eth_dev *dev, 90 struct rte_eth_xstat_name *xstats_names, 91 unsigned int limit); 92 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 93 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 94 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 95 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 96 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 97 struct rte_ether_addr *addr, 98 uint32_t index, 99 uint32_t pool); 100 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 101 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 102 uint16_t vlan_id, int on); 103 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 104 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 105 struct rte_eth_rss_reta_entry64 *reta_conf, 106 uint16_t reta_size); 107 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 108 struct rte_eth_rss_reta_entry64 *reta_conf, 109 uint16_t reta_size); 110 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 111 struct rte_eth_rss_conf *rss_conf); 112 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 113 struct rte_eth_rss_conf *rss_conf); 114 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 115 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 116 struct rte_ether_addr *mac_addr); 117 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 118 uint16_t queue_id); 119 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 120 uint16_t queue_id); 121 static int iavf_dev_flow_ops_get(struct rte_eth_dev *dev, 122 const struct rte_flow_ops **ops); 123 static int iavf_set_mc_addr_list(struct rte_eth_dev *dev, 124 struct rte_ether_addr *mc_addrs, 125 uint32_t mc_addrs_num); 126 static int iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused, void *arg); 127 128 static const struct rte_pci_id pci_id_iavf_map[] = { 129 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 130 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF) }, 131 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF_HV) }, 132 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_VF) }, 133 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_A0_VF) }, 134 { .vendor_id = 0, /* sentinel */ }, 135 }; 136 137 struct rte_iavf_xstats_name_off { 138 char name[RTE_ETH_XSTATS_NAME_SIZE]; 139 unsigned int offset; 140 }; 141 142 static const struct rte_iavf_xstats_name_off rte_iavf_stats_strings[] = { 143 {"rx_bytes", offsetof(struct iavf_eth_stats, rx_bytes)}, 144 {"rx_unicast_packets", offsetof(struct iavf_eth_stats, rx_unicast)}, 145 {"rx_multicast_packets", offsetof(struct iavf_eth_stats, rx_multicast)}, 146 {"rx_broadcast_packets", offsetof(struct iavf_eth_stats, rx_broadcast)}, 147 {"rx_dropped_packets", offsetof(struct iavf_eth_stats, rx_discards)}, 148 {"rx_unknown_protocol_packets", offsetof(struct iavf_eth_stats, 149 rx_unknown_protocol)}, 150 {"tx_bytes", offsetof(struct iavf_eth_stats, tx_bytes)}, 151 {"tx_unicast_packets", offsetof(struct iavf_eth_stats, tx_unicast)}, 152 {"tx_multicast_packets", offsetof(struct iavf_eth_stats, tx_multicast)}, 153 {"tx_broadcast_packets", offsetof(struct iavf_eth_stats, tx_broadcast)}, 154 {"tx_dropped_packets", offsetof(struct iavf_eth_stats, tx_discards)}, 155 {"tx_error_packets", offsetof(struct iavf_eth_stats, tx_errors)}, 156 }; 157 158 #define IAVF_NB_XSTATS (sizeof(rte_iavf_stats_strings) / \ 159 sizeof(rte_iavf_stats_strings[0])) 160 161 static const struct eth_dev_ops iavf_eth_dev_ops = { 162 .dev_configure = iavf_dev_configure, 163 .dev_start = iavf_dev_start, 164 .dev_stop = iavf_dev_stop, 165 .dev_close = iavf_dev_close, 166 .dev_reset = iavf_dev_reset, 167 .dev_infos_get = iavf_dev_info_get, 168 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 169 .link_update = iavf_dev_link_update, 170 .stats_get = iavf_dev_stats_get, 171 .stats_reset = iavf_dev_stats_reset, 172 .xstats_get = iavf_dev_xstats_get, 173 .xstats_get_names = iavf_dev_xstats_get_names, 174 .xstats_reset = iavf_dev_stats_reset, 175 .promiscuous_enable = iavf_dev_promiscuous_enable, 176 .promiscuous_disable = iavf_dev_promiscuous_disable, 177 .allmulticast_enable = iavf_dev_allmulticast_enable, 178 .allmulticast_disable = iavf_dev_allmulticast_disable, 179 .mac_addr_add = iavf_dev_add_mac_addr, 180 .mac_addr_remove = iavf_dev_del_mac_addr, 181 .set_mc_addr_list = iavf_set_mc_addr_list, 182 .vlan_filter_set = iavf_dev_vlan_filter_set, 183 .vlan_offload_set = iavf_dev_vlan_offload_set, 184 .rx_queue_start = iavf_dev_rx_queue_start, 185 .rx_queue_stop = iavf_dev_rx_queue_stop, 186 .tx_queue_start = iavf_dev_tx_queue_start, 187 .tx_queue_stop = iavf_dev_tx_queue_stop, 188 .rx_queue_setup = iavf_dev_rx_queue_setup, 189 .rx_queue_release = iavf_dev_rx_queue_release, 190 .tx_queue_setup = iavf_dev_tx_queue_setup, 191 .tx_queue_release = iavf_dev_tx_queue_release, 192 .mac_addr_set = iavf_dev_set_default_mac_addr, 193 .reta_update = iavf_dev_rss_reta_update, 194 .reta_query = iavf_dev_rss_reta_query, 195 .rss_hash_update = iavf_dev_rss_hash_update, 196 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 197 .rxq_info_get = iavf_dev_rxq_info_get, 198 .txq_info_get = iavf_dev_txq_info_get, 199 .mtu_set = iavf_dev_mtu_set, 200 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 201 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 202 .flow_ops_get = iavf_dev_flow_ops_get, 203 .tx_done_cleanup = iavf_dev_tx_done_cleanup, 204 .get_monitor_addr = iavf_get_monitor_addr, 205 .tm_ops_get = iavf_tm_ops_get, 206 }; 207 208 static int 209 iavf_tm_ops_get(struct rte_eth_dev *dev __rte_unused, 210 void *arg) 211 { 212 if (!arg) 213 return -EINVAL; 214 215 *(const void **)arg = &iavf_tm_ops; 216 217 return 0; 218 } 219 220 static int 221 iavf_set_mc_addr_list(struct rte_eth_dev *dev, 222 struct rte_ether_addr *mc_addrs, 223 uint32_t mc_addrs_num) 224 { 225 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 226 struct iavf_adapter *adapter = 227 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 228 int err, ret; 229 230 if (mc_addrs_num > IAVF_NUM_MACADDR_MAX) { 231 PMD_DRV_LOG(ERR, 232 "can't add more than a limited number (%u) of addresses.", 233 (uint32_t)IAVF_NUM_MACADDR_MAX); 234 return -EINVAL; 235 } 236 237 /* flush previous addresses */ 238 err = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 239 false); 240 if (err) 241 return err; 242 243 /* add new ones */ 244 err = iavf_add_del_mc_addr_list(adapter, mc_addrs, mc_addrs_num, true); 245 246 if (err) { 247 /* if adding mac address list fails, should add the previous 248 * addresses back. 249 */ 250 ret = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, 251 vf->mc_addrs_num, true); 252 if (ret) 253 return ret; 254 } else { 255 vf->mc_addrs_num = mc_addrs_num; 256 memcpy(vf->mc_addrs, 257 mc_addrs, mc_addrs_num * sizeof(*mc_addrs)); 258 } 259 260 return err; 261 } 262 263 static void 264 iavf_config_rss_hf(struct iavf_adapter *adapter, uint64_t rss_hf) 265 { 266 static const uint64_t map_hena_rss[] = { 267 /* IPv4 */ 268 [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] = 269 ETH_RSS_NONFRAG_IPV4_UDP, 270 [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP] = 271 ETH_RSS_NONFRAG_IPV4_UDP, 272 [IAVF_FILTER_PCTYPE_NONF_IPV4_UDP] = 273 ETH_RSS_NONFRAG_IPV4_UDP, 274 [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] = 275 ETH_RSS_NONFRAG_IPV4_TCP, 276 [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP] = 277 ETH_RSS_NONFRAG_IPV4_TCP, 278 [IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP] = 279 ETH_RSS_NONFRAG_IPV4_SCTP, 280 [IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER] = 281 ETH_RSS_NONFRAG_IPV4_OTHER, 282 [IAVF_FILTER_PCTYPE_FRAG_IPV4] = ETH_RSS_FRAG_IPV4, 283 284 /* IPv6 */ 285 [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] = 286 ETH_RSS_NONFRAG_IPV6_UDP, 287 [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP] = 288 ETH_RSS_NONFRAG_IPV6_UDP, 289 [IAVF_FILTER_PCTYPE_NONF_IPV6_UDP] = 290 ETH_RSS_NONFRAG_IPV6_UDP, 291 [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] = 292 ETH_RSS_NONFRAG_IPV6_TCP, 293 [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP] = 294 ETH_RSS_NONFRAG_IPV6_TCP, 295 [IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP] = 296 ETH_RSS_NONFRAG_IPV6_SCTP, 297 [IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER] = 298 ETH_RSS_NONFRAG_IPV6_OTHER, 299 [IAVF_FILTER_PCTYPE_FRAG_IPV6] = ETH_RSS_FRAG_IPV6, 300 301 /* L2 Payload */ 302 [IAVF_FILTER_PCTYPE_L2_PAYLOAD] = ETH_RSS_L2_PAYLOAD 303 }; 304 305 const uint64_t ipv4_rss = ETH_RSS_NONFRAG_IPV4_UDP | 306 ETH_RSS_NONFRAG_IPV4_TCP | 307 ETH_RSS_NONFRAG_IPV4_SCTP | 308 ETH_RSS_NONFRAG_IPV4_OTHER | 309 ETH_RSS_FRAG_IPV4; 310 311 const uint64_t ipv6_rss = ETH_RSS_NONFRAG_IPV6_UDP | 312 ETH_RSS_NONFRAG_IPV6_TCP | 313 ETH_RSS_NONFRAG_IPV6_SCTP | 314 ETH_RSS_NONFRAG_IPV6_OTHER | 315 ETH_RSS_FRAG_IPV6; 316 317 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 318 uint64_t caps = 0, hena = 0, valid_rss_hf = 0; 319 uint32_t i; 320 int ret; 321 322 ret = iavf_get_hena_caps(adapter, &caps); 323 if (ret) { 324 /** 325 * RSS offload type configuration is not a necessary feature 326 * for VF, so here just print a warning and return. 327 */ 328 PMD_DRV_LOG(WARNING, 329 "fail to get RSS offload type caps, ret: %d", ret); 330 return; 331 } 332 333 /** 334 * ETH_RSS_IPV4 and ETH_RSS_IPV6 can be considered as 2 335 * generalizations of all other IPv4 and IPv6 RSS types. 336 */ 337 if (rss_hf & ETH_RSS_IPV4) 338 rss_hf |= ipv4_rss; 339 340 if (rss_hf & ETH_RSS_IPV6) 341 rss_hf |= ipv6_rss; 342 343 RTE_BUILD_BUG_ON(RTE_DIM(map_hena_rss) > sizeof(uint64_t) * CHAR_BIT); 344 345 for (i = 0; i < RTE_DIM(map_hena_rss); i++) { 346 uint64_t bit = BIT_ULL(i); 347 348 if ((caps & bit) && (map_hena_rss[i] & rss_hf)) { 349 valid_rss_hf |= map_hena_rss[i]; 350 hena |= bit; 351 } 352 } 353 354 ret = iavf_set_hena(adapter, hena); 355 if (ret) { 356 /** 357 * RSS offload type configuration is not a necessary feature 358 * for VF, so here just print a warning and return. 359 */ 360 PMD_DRV_LOG(WARNING, 361 "fail to set RSS offload types, ret: %d", ret); 362 return; 363 } 364 365 if (valid_rss_hf & ipv4_rss) 366 valid_rss_hf |= rss_hf & ETH_RSS_IPV4; 367 368 if (valid_rss_hf & ipv6_rss) 369 valid_rss_hf |= rss_hf & ETH_RSS_IPV6; 370 371 if (rss_hf & ~valid_rss_hf) 372 PMD_DRV_LOG(WARNING, "Unsupported rss_hf 0x%" PRIx64, 373 rss_hf & ~valid_rss_hf); 374 375 vf->rss_hf = valid_rss_hf; 376 } 377 378 static int 379 iavf_init_rss(struct iavf_adapter *adapter) 380 { 381 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 382 struct rte_eth_rss_conf *rss_conf; 383 uint16_t i, j, nb_q; 384 int ret; 385 386 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 387 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 388 vf->max_rss_qregion); 389 390 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 391 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 392 return -ENOTSUP; 393 } 394 395 /* configure RSS key */ 396 if (!rss_conf->rss_key) { 397 /* Calculate the default hash key */ 398 for (i = 0; i < vf->vf_res->rss_key_size; i++) 399 vf->rss_key[i] = (uint8_t)rte_rand(); 400 } else 401 rte_memcpy(vf->rss_key, rss_conf->rss_key, 402 RTE_MIN(rss_conf->rss_key_len, 403 vf->vf_res->rss_key_size)); 404 405 /* init RSS LUT table */ 406 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 407 if (j >= nb_q) 408 j = 0; 409 vf->rss_lut[i] = j; 410 } 411 /* send virtchnnl ops to configure rss*/ 412 ret = iavf_configure_rss_lut(adapter); 413 if (ret) 414 return ret; 415 ret = iavf_configure_rss_key(adapter); 416 if (ret) 417 return ret; 418 419 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) { 420 /* Set RSS hash configuration based on rss_conf->rss_hf. */ 421 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 422 if (ret) { 423 PMD_DRV_LOG(ERR, "fail to set default RSS"); 424 return ret; 425 } 426 } else { 427 iavf_config_rss_hf(adapter, rss_conf->rss_hf); 428 } 429 430 return 0; 431 } 432 433 static int 434 iavf_queues_req_reset(struct rte_eth_dev *dev, uint16_t num) 435 { 436 struct iavf_adapter *ad = 437 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 438 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 439 int ret; 440 441 ret = iavf_request_queues(ad, num); 442 if (ret) { 443 PMD_DRV_LOG(ERR, "request queues from PF failed"); 444 return ret; 445 } 446 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u", 447 vf->vsi_res->num_queue_pairs, num); 448 449 ret = iavf_dev_reset(dev); 450 if (ret) { 451 PMD_DRV_LOG(ERR, "vf reset failed"); 452 return ret; 453 } 454 455 return 0; 456 } 457 458 static int 459 iavf_dev_vlan_insert_set(struct rte_eth_dev *dev) 460 { 461 struct iavf_adapter *adapter = 462 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 463 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 464 bool enable; 465 466 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2)) 467 return 0; 468 469 enable = !!(dev->data->dev_conf.txmode.offloads & 470 DEV_TX_OFFLOAD_VLAN_INSERT); 471 iavf_config_vlan_insert_v2(adapter, enable); 472 473 return 0; 474 } 475 476 static int 477 iavf_dev_init_vlan(struct rte_eth_dev *dev) 478 { 479 int err; 480 481 err = iavf_dev_vlan_offload_set(dev, 482 ETH_VLAN_STRIP_MASK | 483 ETH_QINQ_STRIP_MASK | 484 ETH_VLAN_FILTER_MASK | 485 ETH_VLAN_EXTEND_MASK); 486 if (err) { 487 PMD_DRV_LOG(ERR, "Failed to update vlan offload"); 488 return err; 489 } 490 491 err = iavf_dev_vlan_insert_set(dev); 492 if (err) 493 PMD_DRV_LOG(ERR, "Failed to update vlan insertion"); 494 495 return err; 496 } 497 498 static int 499 iavf_dev_configure(struct rte_eth_dev *dev) 500 { 501 struct iavf_adapter *ad = 502 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 503 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 504 uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 505 dev->data->nb_tx_queues); 506 int ret; 507 508 ad->rx_bulk_alloc_allowed = true; 509 /* Initialize to TRUE. If any of Rx queues doesn't meet the 510 * vector Rx/Tx preconditions, it will be reset. 511 */ 512 ad->rx_vec_allowed = true; 513 ad->tx_vec_allowed = true; 514 515 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 516 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 517 518 /* Large VF setting */ 519 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_DFLT) { 520 if (!(vf->vf_res->vf_cap_flags & 521 VIRTCHNL_VF_LARGE_NUM_QPAIRS)) { 522 PMD_DRV_LOG(ERR, "large VF is not supported"); 523 return -1; 524 } 525 526 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_LV) { 527 PMD_DRV_LOG(ERR, "queue pairs number cannot be larger than %u", 528 IAVF_MAX_NUM_QUEUES_LV); 529 return -1; 530 } 531 532 ret = iavf_queues_req_reset(dev, num_queue_pairs); 533 if (ret) 534 return ret; 535 536 ret = iavf_get_max_rss_queue_region(ad); 537 if (ret) { 538 PMD_INIT_LOG(ERR, "get max rss queue region failed"); 539 return ret; 540 } 541 542 vf->lv_enabled = true; 543 } else { 544 /* Check if large VF is already enabled. If so, disable and 545 * release redundant queue resource. 546 * Or check if enough queue pairs. If not, request them from PF. 547 */ 548 if (vf->lv_enabled || 549 num_queue_pairs > vf->vsi_res->num_queue_pairs) { 550 ret = iavf_queues_req_reset(dev, num_queue_pairs); 551 if (ret) 552 return ret; 553 554 vf->lv_enabled = false; 555 } 556 /* if large VF is not required, use default rss queue region */ 557 vf->max_rss_qregion = IAVF_MAX_NUM_QUEUES_DFLT; 558 } 559 560 ret = iavf_dev_init_vlan(dev); 561 if (ret) 562 PMD_DRV_LOG(ERR, "configure VLAN failed: %d", ret); 563 564 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 565 if (iavf_init_rss(ad) != 0) { 566 PMD_DRV_LOG(ERR, "configure rss failed"); 567 return -1; 568 } 569 } 570 return 0; 571 } 572 573 static int 574 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 575 { 576 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 577 struct rte_eth_dev_data *dev_data = dev->data; 578 uint16_t buf_size, max_pkt_len; 579 580 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 581 582 /* Calculate the maximum packet length allowed */ 583 max_pkt_len = RTE_MIN((uint32_t) 584 rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS, 585 dev->data->dev_conf.rxmode.max_rx_pkt_len); 586 587 /* Check if the jumbo frame and maximum packet length are set 588 * correctly. 589 */ 590 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 591 if (max_pkt_len <= IAVF_ETH_MAX_LEN || 592 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 593 PMD_DRV_LOG(ERR, "maximum packet length must be " 594 "larger than %u and smaller than %u, " 595 "as jumbo frame is enabled", 596 (uint32_t)IAVF_ETH_MAX_LEN, 597 (uint32_t)IAVF_FRAME_SIZE_MAX); 598 return -EINVAL; 599 } 600 } else { 601 if (max_pkt_len < RTE_ETHER_MIN_LEN || 602 max_pkt_len > IAVF_ETH_MAX_LEN) { 603 PMD_DRV_LOG(ERR, "maximum packet length must be " 604 "larger than %u and smaller than %u, " 605 "as jumbo frame is disabled", 606 (uint32_t)RTE_ETHER_MIN_LEN, 607 (uint32_t)IAVF_ETH_MAX_LEN); 608 return -EINVAL; 609 } 610 } 611 612 rxq->max_pkt_len = max_pkt_len; 613 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 614 rxq->max_pkt_len > buf_size) { 615 dev_data->scattered_rx = 1; 616 } 617 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 618 IAVF_WRITE_FLUSH(hw); 619 620 return 0; 621 } 622 623 static int 624 iavf_init_queues(struct rte_eth_dev *dev) 625 { 626 struct iavf_rx_queue **rxq = 627 (struct iavf_rx_queue **)dev->data->rx_queues; 628 int i, ret = IAVF_SUCCESS; 629 630 for (i = 0; i < dev->data->nb_rx_queues; i++) { 631 if (!rxq[i] || !rxq[i]->q_set) 632 continue; 633 ret = iavf_init_rxq(dev, rxq[i]); 634 if (ret != IAVF_SUCCESS) 635 break; 636 } 637 /* set rx/tx function to vector/scatter/single-segment 638 * according to parameters 639 */ 640 iavf_set_rx_function(dev); 641 iavf_set_tx_function(dev); 642 643 return ret; 644 } 645 646 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 647 struct rte_intr_handle *intr_handle) 648 { 649 struct iavf_adapter *adapter = 650 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 651 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 652 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 653 struct iavf_qv_map *qv_map; 654 uint16_t interval, i; 655 int vec; 656 657 if (rte_intr_cap_multiple(intr_handle) && 658 dev->data->dev_conf.intr_conf.rxq) { 659 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 660 return -1; 661 } 662 663 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 664 intr_handle->intr_vec = 665 rte_zmalloc("intr_vec", 666 dev->data->nb_rx_queues * sizeof(int), 0); 667 if (!intr_handle->intr_vec) { 668 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 669 dev->data->nb_rx_queues); 670 return -1; 671 } 672 } 673 674 qv_map = rte_zmalloc("qv_map", 675 dev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0); 676 if (!qv_map) { 677 PMD_DRV_LOG(ERR, "Failed to allocate %d queue-vector map", 678 dev->data->nb_rx_queues); 679 return -1; 680 } 681 682 if (!dev->data->dev_conf.intr_conf.rxq || 683 !rte_intr_dp_is_en(intr_handle)) { 684 /* Rx interrupt disabled, Map interrupt only for writeback */ 685 vf->nb_msix = 1; 686 if (vf->vf_res->vf_cap_flags & 687 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 688 /* If WB_ON_ITR supports, enable it */ 689 vf->msix_base = IAVF_RX_VEC_START; 690 /* Set the ITR for index zero, to 2us to make sure that 691 * we leave time for aggregation to occur, but don't 692 * increase latency dramatically. 693 */ 694 IAVF_WRITE_REG(hw, 695 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 696 (0 << IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) | 697 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK | 698 (2UL << IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT)); 699 /* debug - check for success! the return value 700 * should be 2, offset is 0x2800 701 */ 702 /* IAVF_READ_REG(hw, IAVF_VFINT_ITRN1(0, 0)); */ 703 } else { 704 /* If no WB_ON_ITR offload flags, need to set 705 * interrupt for descriptor write back. 706 */ 707 vf->msix_base = IAVF_MISC_VEC_ID; 708 709 /* set ITR to default */ 710 interval = iavf_calc_itr_interval( 711 IAVF_QUEUE_ITR_INTERVAL_DEFAULT); 712 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 713 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 714 (IAVF_ITR_INDEX_DEFAULT << 715 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 716 (interval << 717 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 718 } 719 IAVF_WRITE_FLUSH(hw); 720 /* map all queues to the same interrupt */ 721 for (i = 0; i < dev->data->nb_rx_queues; i++) { 722 qv_map[i].queue_id = i; 723 qv_map[i].vector_id = vf->msix_base; 724 } 725 vf->qv_map = qv_map; 726 } else { 727 if (!rte_intr_allow_others(intr_handle)) { 728 vf->nb_msix = 1; 729 vf->msix_base = IAVF_MISC_VEC_ID; 730 for (i = 0; i < dev->data->nb_rx_queues; i++) { 731 qv_map[i].queue_id = i; 732 qv_map[i].vector_id = vf->msix_base; 733 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 734 } 735 vf->qv_map = qv_map; 736 PMD_DRV_LOG(DEBUG, 737 "vector %u are mapping to all Rx queues", 738 vf->msix_base); 739 } else { 740 /* If Rx interrupt is reuquired, and we can use 741 * multi interrupts, then the vec is from 1 742 */ 743 vf->nb_msix = RTE_MIN(intr_handle->nb_efd, 744 (uint16_t)(vf->vf_res->max_vectors - 1)); 745 vf->msix_base = IAVF_RX_VEC_START; 746 vec = IAVF_RX_VEC_START; 747 for (i = 0; i < dev->data->nb_rx_queues; i++) { 748 qv_map[i].queue_id = i; 749 qv_map[i].vector_id = vec; 750 intr_handle->intr_vec[i] = vec++; 751 if (vec >= vf->nb_msix + IAVF_RX_VEC_START) 752 vec = IAVF_RX_VEC_START; 753 } 754 vf->qv_map = qv_map; 755 PMD_DRV_LOG(DEBUG, 756 "%u vectors are mapping to %u Rx queues", 757 vf->nb_msix, dev->data->nb_rx_queues); 758 } 759 } 760 761 if (!vf->lv_enabled) { 762 if (iavf_config_irq_map(adapter)) { 763 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 764 return -1; 765 } 766 } else { 767 uint16_t num_qv_maps = dev->data->nb_rx_queues; 768 uint16_t index = 0; 769 770 while (num_qv_maps > IAVF_IRQ_MAP_NUM_PER_BUF) { 771 if (iavf_config_irq_map_lv(adapter, 772 IAVF_IRQ_MAP_NUM_PER_BUF, index)) { 773 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 774 return -1; 775 } 776 num_qv_maps -= IAVF_IRQ_MAP_NUM_PER_BUF; 777 index += IAVF_IRQ_MAP_NUM_PER_BUF; 778 } 779 780 if (iavf_config_irq_map_lv(adapter, num_qv_maps, index)) { 781 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 782 return -1; 783 } 784 } 785 return 0; 786 } 787 788 static int 789 iavf_start_queues(struct rte_eth_dev *dev) 790 { 791 struct iavf_rx_queue *rxq; 792 struct iavf_tx_queue *txq; 793 int i; 794 795 for (i = 0; i < dev->data->nb_tx_queues; i++) { 796 txq = dev->data->tx_queues[i]; 797 if (txq->tx_deferred_start) 798 continue; 799 if (iavf_dev_tx_queue_start(dev, i) != 0) { 800 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 801 return -1; 802 } 803 } 804 805 for (i = 0; i < dev->data->nb_rx_queues; i++) { 806 rxq = dev->data->rx_queues[i]; 807 if (rxq->rx_deferred_start) 808 continue; 809 if (iavf_dev_rx_queue_start(dev, i) != 0) { 810 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 811 return -1; 812 } 813 } 814 815 return 0; 816 } 817 818 static int 819 iavf_dev_start(struct rte_eth_dev *dev) 820 { 821 struct iavf_adapter *adapter = 822 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 823 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 824 struct rte_intr_handle *intr_handle = dev->intr_handle; 825 uint16_t num_queue_pairs; 826 uint16_t index = 0; 827 828 PMD_INIT_FUNC_TRACE(); 829 830 adapter->stopped = 0; 831 832 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 833 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 834 dev->data->nb_tx_queues); 835 num_queue_pairs = vf->num_queue_pairs; 836 837 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) 838 if (iavf_get_qos_cap(adapter)) { 839 PMD_INIT_LOG(ERR, "Failed to get qos capability"); 840 return -1; 841 } 842 843 if (iavf_init_queues(dev) != 0) { 844 PMD_DRV_LOG(ERR, "failed to do Queue init"); 845 return -1; 846 } 847 848 /* If needed, send configure queues msg multiple times to make the 849 * adminq buffer length smaller than the 4K limitation. 850 */ 851 while (num_queue_pairs > IAVF_CFG_Q_NUM_PER_BUF) { 852 if (iavf_configure_queues(adapter, 853 IAVF_CFG_Q_NUM_PER_BUF, index) != 0) { 854 PMD_DRV_LOG(ERR, "configure queues failed"); 855 goto err_queue; 856 } 857 num_queue_pairs -= IAVF_CFG_Q_NUM_PER_BUF; 858 index += IAVF_CFG_Q_NUM_PER_BUF; 859 } 860 861 if (iavf_configure_queues(adapter, num_queue_pairs, index) != 0) { 862 PMD_DRV_LOG(ERR, "configure queues failed"); 863 goto err_queue; 864 } 865 866 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 867 PMD_DRV_LOG(ERR, "configure irq failed"); 868 goto err_queue; 869 } 870 /* re-enable intr again, because efd assign may change */ 871 if (dev->data->dev_conf.intr_conf.rxq != 0) { 872 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) 873 rte_intr_disable(intr_handle); 874 rte_intr_enable(intr_handle); 875 } 876 877 /* Set all mac addrs */ 878 iavf_add_del_all_mac_addr(adapter, true); 879 880 /* Set all multicast addresses */ 881 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 882 true); 883 884 if (iavf_start_queues(dev) != 0) { 885 PMD_DRV_LOG(ERR, "enable queues failed"); 886 goto err_mac; 887 } 888 889 return 0; 890 891 err_mac: 892 iavf_add_del_all_mac_addr(adapter, false); 893 err_queue: 894 return -1; 895 } 896 897 static int 898 iavf_dev_stop(struct rte_eth_dev *dev) 899 { 900 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 901 struct iavf_adapter *adapter = 902 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 903 struct rte_intr_handle *intr_handle = dev->intr_handle; 904 905 PMD_INIT_FUNC_TRACE(); 906 907 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) && 908 dev->data->dev_conf.intr_conf.rxq != 0) 909 rte_intr_disable(intr_handle); 910 911 if (adapter->stopped == 1) 912 return 0; 913 914 iavf_stop_queues(dev); 915 916 /* Disable the interrupt for Rx */ 917 rte_intr_efd_disable(intr_handle); 918 /* Rx interrupt vector mapping free */ 919 if (intr_handle->intr_vec) { 920 rte_free(intr_handle->intr_vec); 921 intr_handle->intr_vec = NULL; 922 } 923 924 /* remove all mac addrs */ 925 iavf_add_del_all_mac_addr(adapter, false); 926 927 /* remove all multicast addresses */ 928 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 929 false); 930 931 adapter->stopped = 1; 932 dev->data->dev_started = 0; 933 934 return 0; 935 } 936 937 static int 938 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 939 { 940 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 941 942 dev_info->max_rx_queues = IAVF_MAX_NUM_QUEUES_LV; 943 dev_info->max_tx_queues = IAVF_MAX_NUM_QUEUES_LV; 944 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 945 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 946 dev_info->max_mtu = dev_info->max_rx_pktlen - IAVF_ETH_OVERHEAD; 947 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 948 dev_info->hash_key_size = vf->vf_res->rss_key_size; 949 dev_info->reta_size = vf->vf_res->rss_lut_size; 950 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 951 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 952 dev_info->rx_offload_capa = 953 DEV_RX_OFFLOAD_VLAN_STRIP | 954 DEV_RX_OFFLOAD_QINQ_STRIP | 955 DEV_RX_OFFLOAD_IPV4_CKSUM | 956 DEV_RX_OFFLOAD_UDP_CKSUM | 957 DEV_RX_OFFLOAD_TCP_CKSUM | 958 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 959 DEV_RX_OFFLOAD_SCATTER | 960 DEV_RX_OFFLOAD_JUMBO_FRAME | 961 DEV_RX_OFFLOAD_VLAN_FILTER | 962 DEV_RX_OFFLOAD_RSS_HASH; 963 964 dev_info->tx_offload_capa = 965 DEV_TX_OFFLOAD_VLAN_INSERT | 966 DEV_TX_OFFLOAD_QINQ_INSERT | 967 DEV_TX_OFFLOAD_IPV4_CKSUM | 968 DEV_TX_OFFLOAD_UDP_CKSUM | 969 DEV_TX_OFFLOAD_TCP_CKSUM | 970 DEV_TX_OFFLOAD_SCTP_CKSUM | 971 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 972 DEV_TX_OFFLOAD_TCP_TSO | 973 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 974 DEV_TX_OFFLOAD_GRE_TNL_TSO | 975 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 976 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 977 DEV_TX_OFFLOAD_MULTI_SEGS | 978 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 979 980 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_CRC) 981 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_KEEP_CRC; 982 983 dev_info->default_rxconf = (struct rte_eth_rxconf) { 984 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 985 .rx_drop_en = 0, 986 .offloads = 0, 987 }; 988 989 dev_info->default_txconf = (struct rte_eth_txconf) { 990 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 991 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 992 .offloads = 0, 993 }; 994 995 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 996 .nb_max = IAVF_MAX_RING_DESC, 997 .nb_min = IAVF_MIN_RING_DESC, 998 .nb_align = IAVF_ALIGN_RING_DESC, 999 }; 1000 1001 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 1002 .nb_max = IAVF_MAX_RING_DESC, 1003 .nb_min = IAVF_MIN_RING_DESC, 1004 .nb_align = IAVF_ALIGN_RING_DESC, 1005 }; 1006 1007 return 0; 1008 } 1009 1010 static const uint32_t * 1011 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 1012 { 1013 static const uint32_t ptypes[] = { 1014 RTE_PTYPE_L2_ETHER, 1015 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 1016 RTE_PTYPE_L4_FRAG, 1017 RTE_PTYPE_L4_ICMP, 1018 RTE_PTYPE_L4_NONFRAG, 1019 RTE_PTYPE_L4_SCTP, 1020 RTE_PTYPE_L4_TCP, 1021 RTE_PTYPE_L4_UDP, 1022 RTE_PTYPE_UNKNOWN 1023 }; 1024 return ptypes; 1025 } 1026 1027 int 1028 iavf_dev_link_update(struct rte_eth_dev *dev, 1029 __rte_unused int wait_to_complete) 1030 { 1031 struct rte_eth_link new_link; 1032 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1033 1034 memset(&new_link, 0, sizeof(new_link)); 1035 1036 /* Only read status info stored in VF, and the info is updated 1037 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 1038 */ 1039 switch (vf->link_speed) { 1040 case 10: 1041 new_link.link_speed = ETH_SPEED_NUM_10M; 1042 break; 1043 case 100: 1044 new_link.link_speed = ETH_SPEED_NUM_100M; 1045 break; 1046 case 1000: 1047 new_link.link_speed = ETH_SPEED_NUM_1G; 1048 break; 1049 case 10000: 1050 new_link.link_speed = ETH_SPEED_NUM_10G; 1051 break; 1052 case 20000: 1053 new_link.link_speed = ETH_SPEED_NUM_20G; 1054 break; 1055 case 25000: 1056 new_link.link_speed = ETH_SPEED_NUM_25G; 1057 break; 1058 case 40000: 1059 new_link.link_speed = ETH_SPEED_NUM_40G; 1060 break; 1061 case 50000: 1062 new_link.link_speed = ETH_SPEED_NUM_50G; 1063 break; 1064 case 100000: 1065 new_link.link_speed = ETH_SPEED_NUM_100G; 1066 break; 1067 default: 1068 new_link.link_speed = ETH_SPEED_NUM_NONE; 1069 break; 1070 } 1071 1072 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 1073 new_link.link_status = vf->link_up ? ETH_LINK_UP : 1074 ETH_LINK_DOWN; 1075 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 1076 ETH_LINK_SPEED_FIXED); 1077 1078 return rte_eth_linkstatus_set(dev, &new_link); 1079 } 1080 1081 static int 1082 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 1083 { 1084 struct iavf_adapter *adapter = 1085 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1086 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1087 1088 return iavf_config_promisc(adapter, 1089 true, vf->promisc_multicast_enabled); 1090 } 1091 1092 static int 1093 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 1094 { 1095 struct iavf_adapter *adapter = 1096 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1097 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1098 1099 return iavf_config_promisc(adapter, 1100 false, vf->promisc_multicast_enabled); 1101 } 1102 1103 static int 1104 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 1105 { 1106 struct iavf_adapter *adapter = 1107 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1108 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1109 1110 return iavf_config_promisc(adapter, 1111 vf->promisc_unicast_enabled, true); 1112 } 1113 1114 static int 1115 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 1116 { 1117 struct iavf_adapter *adapter = 1118 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1119 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1120 1121 return iavf_config_promisc(adapter, 1122 vf->promisc_unicast_enabled, false); 1123 } 1124 1125 static int 1126 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 1127 __rte_unused uint32_t index, 1128 __rte_unused uint32_t pool) 1129 { 1130 struct iavf_adapter *adapter = 1131 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1132 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1133 int err; 1134 1135 if (rte_is_zero_ether_addr(addr)) { 1136 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 1137 return -EINVAL; 1138 } 1139 1140 err = iavf_add_del_eth_addr(adapter, addr, true, VIRTCHNL_ETHER_ADDR_EXTRA); 1141 if (err) { 1142 PMD_DRV_LOG(ERR, "fail to add MAC address"); 1143 return -EIO; 1144 } 1145 1146 vf->mac_num++; 1147 1148 return 0; 1149 } 1150 1151 static void 1152 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 1153 { 1154 struct iavf_adapter *adapter = 1155 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1156 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1157 struct rte_ether_addr *addr; 1158 int err; 1159 1160 addr = &dev->data->mac_addrs[index]; 1161 1162 err = iavf_add_del_eth_addr(adapter, addr, false, VIRTCHNL_ETHER_ADDR_EXTRA); 1163 if (err) 1164 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 1165 1166 vf->mac_num--; 1167 } 1168 1169 static int 1170 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 1171 { 1172 struct iavf_adapter *adapter = 1173 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1174 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1175 int err; 1176 1177 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 1178 err = iavf_add_del_vlan_v2(adapter, vlan_id, on); 1179 if (err) 1180 return -EIO; 1181 return 0; 1182 } 1183 1184 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1185 return -ENOTSUP; 1186 1187 err = iavf_add_del_vlan(adapter, vlan_id, on); 1188 if (err) 1189 return -EIO; 1190 return 0; 1191 } 1192 1193 static void 1194 iavf_iterate_vlan_filters_v2(struct rte_eth_dev *dev, bool enable) 1195 { 1196 struct rte_vlan_filter_conf *vfc = &dev->data->vlan_filter_conf; 1197 struct iavf_adapter *adapter = 1198 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1199 uint32_t i, j; 1200 uint64_t ids; 1201 1202 for (i = 0; i < RTE_DIM(vfc->ids); i++) { 1203 if (vfc->ids[i] == 0) 1204 continue; 1205 1206 ids = vfc->ids[i]; 1207 for (j = 0; ids != 0 && j < 64; j++, ids >>= 1) { 1208 if (ids & 1) 1209 iavf_add_del_vlan_v2(adapter, 1210 64 * i + j, enable); 1211 } 1212 } 1213 } 1214 1215 static int 1216 iavf_dev_vlan_offload_set_v2(struct rte_eth_dev *dev, int mask) 1217 { 1218 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1219 struct iavf_adapter *adapter = 1220 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1221 bool enable; 1222 int err; 1223 1224 if (mask & ETH_VLAN_FILTER_MASK) { 1225 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER); 1226 1227 iavf_iterate_vlan_filters_v2(dev, enable); 1228 } 1229 1230 if (mask & ETH_VLAN_STRIP_MASK) { 1231 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 1232 1233 err = iavf_config_vlan_strip_v2(adapter, enable); 1234 /* If not support, the stripping is already disabled by PF */ 1235 if (err == -ENOTSUP && !enable) 1236 err = 0; 1237 if (err) 1238 return -EIO; 1239 } 1240 1241 return 0; 1242 } 1243 1244 static int 1245 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 1246 { 1247 struct iavf_adapter *adapter = 1248 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1249 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1250 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 1251 int err; 1252 1253 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) 1254 return iavf_dev_vlan_offload_set_v2(dev, mask); 1255 1256 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1257 return -ENOTSUP; 1258 1259 /* Vlan stripping setting */ 1260 if (mask & ETH_VLAN_STRIP_MASK) { 1261 /* Enable or disable VLAN stripping */ 1262 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 1263 err = iavf_enable_vlan_strip(adapter); 1264 else 1265 err = iavf_disable_vlan_strip(adapter); 1266 1267 if (err) 1268 return -EIO; 1269 } 1270 return 0; 1271 } 1272 1273 static int 1274 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 1275 struct rte_eth_rss_reta_entry64 *reta_conf, 1276 uint16_t reta_size) 1277 { 1278 struct iavf_adapter *adapter = 1279 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1280 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1281 uint8_t *lut; 1282 uint16_t i, idx, shift; 1283 int ret; 1284 1285 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1286 return -ENOTSUP; 1287 1288 if (reta_size != vf->vf_res->rss_lut_size) { 1289 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1290 "(%d) doesn't match the number of hardware can " 1291 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1292 return -EINVAL; 1293 } 1294 1295 lut = rte_zmalloc("rss_lut", reta_size, 0); 1296 if (!lut) { 1297 PMD_DRV_LOG(ERR, "No memory can be allocated"); 1298 return -ENOMEM; 1299 } 1300 /* store the old lut table temporarily */ 1301 rte_memcpy(lut, vf->rss_lut, reta_size); 1302 1303 for (i = 0; i < reta_size; i++) { 1304 idx = i / RTE_RETA_GROUP_SIZE; 1305 shift = i % RTE_RETA_GROUP_SIZE; 1306 if (reta_conf[idx].mask & (1ULL << shift)) 1307 lut[i] = reta_conf[idx].reta[shift]; 1308 } 1309 1310 rte_memcpy(vf->rss_lut, lut, reta_size); 1311 /* send virtchnnl ops to configure rss*/ 1312 ret = iavf_configure_rss_lut(adapter); 1313 if (ret) /* revert back */ 1314 rte_memcpy(vf->rss_lut, lut, reta_size); 1315 rte_free(lut); 1316 1317 return ret; 1318 } 1319 1320 static int 1321 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 1322 struct rte_eth_rss_reta_entry64 *reta_conf, 1323 uint16_t reta_size) 1324 { 1325 struct iavf_adapter *adapter = 1326 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1327 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1328 uint16_t i, idx, shift; 1329 1330 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1331 return -ENOTSUP; 1332 1333 if (reta_size != vf->vf_res->rss_lut_size) { 1334 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1335 "(%d) doesn't match the number of hardware can " 1336 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1337 return -EINVAL; 1338 } 1339 1340 for (i = 0; i < reta_size; i++) { 1341 idx = i / RTE_RETA_GROUP_SIZE; 1342 shift = i % RTE_RETA_GROUP_SIZE; 1343 if (reta_conf[idx].mask & (1ULL << shift)) 1344 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 1345 } 1346 1347 return 0; 1348 } 1349 1350 static int 1351 iavf_set_rss_key(struct iavf_adapter *adapter, uint8_t *key, uint8_t key_len) 1352 { 1353 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1354 1355 /* HENA setting, it is enabled by default, no change */ 1356 if (!key || key_len == 0) { 1357 PMD_DRV_LOG(DEBUG, "No key to be configured"); 1358 return 0; 1359 } else if (key_len != vf->vf_res->rss_key_size) { 1360 PMD_DRV_LOG(ERR, "The size of hash key configured " 1361 "(%d) doesn't match the size of hardware can " 1362 "support (%d)", key_len, 1363 vf->vf_res->rss_key_size); 1364 return -EINVAL; 1365 } 1366 1367 rte_memcpy(vf->rss_key, key, key_len); 1368 1369 return iavf_configure_rss_key(adapter); 1370 } 1371 1372 static int 1373 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 1374 struct rte_eth_rss_conf *rss_conf) 1375 { 1376 struct iavf_adapter *adapter = 1377 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1378 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1379 int ret; 1380 1381 adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf = *rss_conf; 1382 1383 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1384 return -ENOTSUP; 1385 1386 /* Set hash key. */ 1387 ret = iavf_set_rss_key(adapter, rss_conf->rss_key, 1388 rss_conf->rss_key_len); 1389 if (ret) 1390 return ret; 1391 1392 if (rss_conf->rss_hf == 0) { 1393 vf->rss_hf = 0; 1394 ret = iavf_set_hena(adapter, 0); 1395 1396 /* It is a workaround, temporarily allow error to be returned 1397 * due to possible lack of PF handling for hena = 0. 1398 */ 1399 if (ret) 1400 PMD_DRV_LOG(WARNING, "fail to clean existing RSS, lack PF support"); 1401 return 0; 1402 } 1403 1404 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) { 1405 /* Clear existing RSS. */ 1406 ret = iavf_set_hena(adapter, 0); 1407 1408 /* It is a workaround, temporarily allow error to be returned 1409 * due to possible lack of PF handling for hena = 0. 1410 */ 1411 if (ret) 1412 PMD_DRV_LOG(WARNING, "fail to clean existing RSS," 1413 "lack PF support"); 1414 1415 /* Set new RSS configuration. */ 1416 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 1417 if (ret) { 1418 PMD_DRV_LOG(ERR, "fail to set new RSS"); 1419 return ret; 1420 } 1421 } else { 1422 iavf_config_rss_hf(adapter, rss_conf->rss_hf); 1423 } 1424 1425 return 0; 1426 } 1427 1428 static int 1429 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1430 struct rte_eth_rss_conf *rss_conf) 1431 { 1432 struct iavf_adapter *adapter = 1433 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1434 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1435 1436 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1437 return -ENOTSUP; 1438 1439 rss_conf->rss_hf = vf->rss_hf; 1440 1441 if (!rss_conf->rss_key) 1442 return 0; 1443 1444 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 1445 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 1446 1447 return 0; 1448 } 1449 1450 static int 1451 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1452 { 1453 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 1454 int ret = 0; 1455 1456 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 1457 return -EINVAL; 1458 1459 /* mtu setting is forbidden if port is start */ 1460 if (dev->data->dev_started) { 1461 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 1462 return -EBUSY; 1463 } 1464 1465 if (frame_size > IAVF_ETH_MAX_LEN) 1466 dev->data->dev_conf.rxmode.offloads |= 1467 DEV_RX_OFFLOAD_JUMBO_FRAME; 1468 else 1469 dev->data->dev_conf.rxmode.offloads &= 1470 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1471 1472 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1473 1474 return ret; 1475 } 1476 1477 static int 1478 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 1479 struct rte_ether_addr *mac_addr) 1480 { 1481 struct iavf_adapter *adapter = 1482 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1483 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1484 struct rte_ether_addr *old_addr; 1485 int ret; 1486 1487 old_addr = (struct rte_ether_addr *)hw->mac.addr; 1488 1489 if (rte_is_same_ether_addr(old_addr, mac_addr)) 1490 return 0; 1491 1492 ret = iavf_add_del_eth_addr(adapter, old_addr, false, VIRTCHNL_ETHER_ADDR_PRIMARY); 1493 if (ret) 1494 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 1495 RTE_ETHER_ADDR_PRT_FMT, 1496 RTE_ETHER_ADDR_BYTES(old_addr)); 1497 1498 ret = iavf_add_del_eth_addr(adapter, mac_addr, true, VIRTCHNL_ETHER_ADDR_PRIMARY); 1499 if (ret) 1500 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 1501 RTE_ETHER_ADDR_PRT_FMT, 1502 RTE_ETHER_ADDR_BYTES(mac_addr)); 1503 1504 if (ret) 1505 return -EIO; 1506 1507 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1508 return 0; 1509 } 1510 1511 static void 1512 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1513 { 1514 if (*stat >= *offset) 1515 *stat = *stat - *offset; 1516 else 1517 *stat = (uint64_t)((*stat + 1518 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1519 1520 *stat &= IAVF_48_BIT_MASK; 1521 } 1522 1523 static void 1524 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1525 { 1526 if (*stat >= *offset) 1527 *stat = (uint64_t)(*stat - *offset); 1528 else 1529 *stat = (uint64_t)((*stat + 1530 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1531 } 1532 1533 static void 1534 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1535 { 1536 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1537 1538 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1539 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1540 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1541 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1542 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1543 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1544 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1545 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1546 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1547 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1548 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1549 } 1550 1551 static int 1552 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1553 { 1554 struct iavf_adapter *adapter = 1555 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1556 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1557 struct iavf_vsi *vsi = &vf->vsi; 1558 struct virtchnl_eth_stats *pstats = NULL; 1559 int ret; 1560 1561 ret = iavf_query_stats(adapter, &pstats); 1562 if (ret == 0) { 1563 uint8_t crc_stats_len = (dev->data->dev_conf.rxmode.offloads & 1564 DEV_RX_OFFLOAD_KEEP_CRC) ? 0 : 1565 RTE_ETHER_CRC_LEN; 1566 iavf_update_stats(vsi, pstats); 1567 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1568 pstats->rx_broadcast - pstats->rx_discards; 1569 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1570 pstats->tx_unicast; 1571 stats->imissed = pstats->rx_discards; 1572 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1573 stats->ibytes = pstats->rx_bytes; 1574 stats->ibytes -= stats->ipackets * crc_stats_len; 1575 stats->obytes = pstats->tx_bytes; 1576 } else { 1577 PMD_DRV_LOG(ERR, "Get statistics failed"); 1578 } 1579 return ret; 1580 } 1581 1582 static int 1583 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1584 { 1585 int ret; 1586 struct iavf_adapter *adapter = 1587 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1588 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1589 struct iavf_vsi *vsi = &vf->vsi; 1590 struct virtchnl_eth_stats *pstats = NULL; 1591 1592 /* read stat values to clear hardware registers */ 1593 ret = iavf_query_stats(adapter, &pstats); 1594 if (ret != 0) 1595 return ret; 1596 1597 /* set stats offset base on current values */ 1598 vsi->eth_stats_offset = *pstats; 1599 1600 return 0; 1601 } 1602 1603 static int iavf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1604 struct rte_eth_xstat_name *xstats_names, 1605 __rte_unused unsigned int limit) 1606 { 1607 unsigned int i; 1608 1609 if (xstats_names != NULL) 1610 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1611 snprintf(xstats_names[i].name, 1612 sizeof(xstats_names[i].name), 1613 "%s", rte_iavf_stats_strings[i].name); 1614 } 1615 return IAVF_NB_XSTATS; 1616 } 1617 1618 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 1619 struct rte_eth_xstat *xstats, unsigned int n) 1620 { 1621 int ret; 1622 unsigned int i; 1623 struct iavf_adapter *adapter = 1624 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1625 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1626 struct iavf_vsi *vsi = &vf->vsi; 1627 struct virtchnl_eth_stats *pstats = NULL; 1628 1629 if (n < IAVF_NB_XSTATS) 1630 return IAVF_NB_XSTATS; 1631 1632 ret = iavf_query_stats(adapter, &pstats); 1633 if (ret != 0) 1634 return 0; 1635 1636 if (!xstats) 1637 return 0; 1638 1639 iavf_update_stats(vsi, pstats); 1640 1641 /* loop over xstats array and values from pstats */ 1642 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1643 xstats[i].id = i; 1644 xstats[i].value = *(uint64_t *)(((char *)pstats) + 1645 rte_iavf_stats_strings[i].offset); 1646 } 1647 1648 return IAVF_NB_XSTATS; 1649 } 1650 1651 1652 static int 1653 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1654 { 1655 struct iavf_adapter *adapter = 1656 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1657 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1658 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1659 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1660 uint16_t msix_intr; 1661 1662 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1663 if (msix_intr == IAVF_MISC_VEC_ID) { 1664 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1665 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1666 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1667 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1668 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1669 } else { 1670 IAVF_WRITE_REG(hw, 1671 IAVF_VFINT_DYN_CTLN1 1672 (msix_intr - IAVF_RX_VEC_START), 1673 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1674 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1675 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1676 } 1677 1678 IAVF_WRITE_FLUSH(hw); 1679 1680 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) 1681 rte_intr_ack(&pci_dev->intr_handle); 1682 1683 return 0; 1684 } 1685 1686 static int 1687 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1688 { 1689 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1690 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1691 uint16_t msix_intr; 1692 1693 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1694 if (msix_intr == IAVF_MISC_VEC_ID) { 1695 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1696 return -EIO; 1697 } 1698 1699 IAVF_WRITE_REG(hw, 1700 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1701 0); 1702 1703 IAVF_WRITE_FLUSH(hw); 1704 return 0; 1705 } 1706 1707 static int 1708 iavf_check_vf_reset_done(struct iavf_hw *hw) 1709 { 1710 int i, reset; 1711 1712 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1713 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1714 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1715 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1716 if (reset == VIRTCHNL_VFR_VFACTIVE || 1717 reset == VIRTCHNL_VFR_COMPLETED) 1718 break; 1719 rte_delay_ms(20); 1720 } 1721 1722 if (i >= IAVF_RESET_WAIT_CNT) 1723 return -1; 1724 1725 return 0; 1726 } 1727 1728 static int 1729 iavf_lookup_proto_xtr_type(const char *flex_name) 1730 { 1731 static struct { 1732 const char *name; 1733 enum iavf_proto_xtr_type type; 1734 } xtr_type_map[] = { 1735 { "vlan", IAVF_PROTO_XTR_VLAN }, 1736 { "ipv4", IAVF_PROTO_XTR_IPV4 }, 1737 { "ipv6", IAVF_PROTO_XTR_IPV6 }, 1738 { "ipv6_flow", IAVF_PROTO_XTR_IPV6_FLOW }, 1739 { "tcp", IAVF_PROTO_XTR_TCP }, 1740 { "ip_offset", IAVF_PROTO_XTR_IP_OFFSET }, 1741 }; 1742 uint32_t i; 1743 1744 for (i = 0; i < RTE_DIM(xtr_type_map); i++) { 1745 if (strcmp(flex_name, xtr_type_map[i].name) == 0) 1746 return xtr_type_map[i].type; 1747 } 1748 1749 PMD_DRV_LOG(ERR, "wrong proto_xtr type, " 1750 "it should be: vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset"); 1751 1752 return -1; 1753 } 1754 1755 /** 1756 * Parse elem, the elem could be single number/range or '(' ')' group 1757 * 1) A single number elem, it's just a simple digit. e.g. 9 1758 * 2) A single range elem, two digits with a '-' between. e.g. 2-6 1759 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6) 1760 * Within group elem, '-' used for a range separator; 1761 * ',' used for a single number. 1762 */ 1763 static int 1764 iavf_parse_queue_set(const char *input, int xtr_type, 1765 struct iavf_devargs *devargs) 1766 { 1767 const char *str = input; 1768 char *end = NULL; 1769 uint32_t min, max; 1770 uint32_t idx; 1771 1772 while (isblank(*str)) 1773 str++; 1774 1775 if (!isdigit(*str) && *str != '(') 1776 return -1; 1777 1778 /* process single number or single range of number */ 1779 if (*str != '(') { 1780 errno = 0; 1781 idx = strtoul(str, &end, 10); 1782 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1783 return -1; 1784 1785 while (isblank(*end)) 1786 end++; 1787 1788 min = idx; 1789 max = idx; 1790 1791 /* process single <number>-<number> */ 1792 if (*end == '-') { 1793 end++; 1794 while (isblank(*end)) 1795 end++; 1796 if (!isdigit(*end)) 1797 return -1; 1798 1799 errno = 0; 1800 idx = strtoul(end, &end, 10); 1801 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1802 return -1; 1803 1804 max = idx; 1805 while (isblank(*end)) 1806 end++; 1807 } 1808 1809 if (*end != ':') 1810 return -1; 1811 1812 for (idx = RTE_MIN(min, max); 1813 idx <= RTE_MAX(min, max); idx++) 1814 devargs->proto_xtr[idx] = xtr_type; 1815 1816 return 0; 1817 } 1818 1819 /* process set within bracket */ 1820 str++; 1821 while (isblank(*str)) 1822 str++; 1823 if (*str == '\0') 1824 return -1; 1825 1826 min = IAVF_MAX_QUEUE_NUM; 1827 do { 1828 /* go ahead to the first digit */ 1829 while (isblank(*str)) 1830 str++; 1831 if (!isdigit(*str)) 1832 return -1; 1833 1834 /* get the digit value */ 1835 errno = 0; 1836 idx = strtoul(str, &end, 10); 1837 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1838 return -1; 1839 1840 /* go ahead to separator '-',',' and ')' */ 1841 while (isblank(*end)) 1842 end++; 1843 if (*end == '-') { 1844 if (min == IAVF_MAX_QUEUE_NUM) 1845 min = idx; 1846 else /* avoid continuous '-' */ 1847 return -1; 1848 } else if (*end == ',' || *end == ')') { 1849 max = idx; 1850 if (min == IAVF_MAX_QUEUE_NUM) 1851 min = idx; 1852 1853 for (idx = RTE_MIN(min, max); 1854 idx <= RTE_MAX(min, max); idx++) 1855 devargs->proto_xtr[idx] = xtr_type; 1856 1857 min = IAVF_MAX_QUEUE_NUM; 1858 } else { 1859 return -1; 1860 } 1861 1862 str = end + 1; 1863 } while (*end != ')' && *end != '\0'); 1864 1865 return 0; 1866 } 1867 1868 static int 1869 iavf_parse_queue_proto_xtr(const char *queues, struct iavf_devargs *devargs) 1870 { 1871 const char *queue_start; 1872 uint32_t idx; 1873 int xtr_type; 1874 char flex_name[32]; 1875 1876 while (isblank(*queues)) 1877 queues++; 1878 1879 if (*queues != '[') { 1880 xtr_type = iavf_lookup_proto_xtr_type(queues); 1881 if (xtr_type < 0) 1882 return -1; 1883 1884 devargs->proto_xtr_dflt = xtr_type; 1885 1886 return 0; 1887 } 1888 1889 queues++; 1890 do { 1891 while (isblank(*queues)) 1892 queues++; 1893 if (*queues == '\0') 1894 return -1; 1895 1896 queue_start = queues; 1897 1898 /* go across a complete bracket */ 1899 if (*queue_start == '(') { 1900 queues += strcspn(queues, ")"); 1901 if (*queues != ')') 1902 return -1; 1903 } 1904 1905 /* scan the separator ':' */ 1906 queues += strcspn(queues, ":"); 1907 if (*queues++ != ':') 1908 return -1; 1909 while (isblank(*queues)) 1910 queues++; 1911 1912 for (idx = 0; ; idx++) { 1913 if (isblank(queues[idx]) || 1914 queues[idx] == ',' || 1915 queues[idx] == ']' || 1916 queues[idx] == '\0') 1917 break; 1918 1919 if (idx > sizeof(flex_name) - 2) 1920 return -1; 1921 1922 flex_name[idx] = queues[idx]; 1923 } 1924 flex_name[idx] = '\0'; 1925 xtr_type = iavf_lookup_proto_xtr_type(flex_name); 1926 if (xtr_type < 0) 1927 return -1; 1928 1929 queues += idx; 1930 1931 while (isblank(*queues) || *queues == ',' || *queues == ']') 1932 queues++; 1933 1934 if (iavf_parse_queue_set(queue_start, xtr_type, devargs) < 0) 1935 return -1; 1936 } while (*queues != '\0'); 1937 1938 return 0; 1939 } 1940 1941 static int 1942 iavf_handle_proto_xtr_arg(__rte_unused const char *key, const char *value, 1943 void *extra_args) 1944 { 1945 struct iavf_devargs *devargs = extra_args; 1946 1947 if (!value || !extra_args) 1948 return -EINVAL; 1949 1950 if (iavf_parse_queue_proto_xtr(value, devargs) < 0) { 1951 PMD_DRV_LOG(ERR, "the proto_xtr's parameter is wrong : '%s'", 1952 value); 1953 return -1; 1954 } 1955 1956 return 0; 1957 } 1958 1959 static int iavf_parse_devargs(struct rte_eth_dev *dev) 1960 { 1961 struct iavf_adapter *ad = 1962 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1963 struct rte_devargs *devargs = dev->device->devargs; 1964 struct rte_kvargs *kvlist; 1965 int ret; 1966 1967 if (!devargs) 1968 return 0; 1969 1970 kvlist = rte_kvargs_parse(devargs->args, iavf_valid_args); 1971 if (!kvlist) { 1972 PMD_INIT_LOG(ERR, "invalid kvargs key\n"); 1973 return -EINVAL; 1974 } 1975 1976 ad->devargs.proto_xtr_dflt = IAVF_PROTO_XTR_NONE; 1977 memset(ad->devargs.proto_xtr, IAVF_PROTO_XTR_NONE, 1978 sizeof(ad->devargs.proto_xtr)); 1979 1980 ret = rte_kvargs_process(kvlist, IAVF_PROTO_XTR_ARG, 1981 &iavf_handle_proto_xtr_arg, &ad->devargs); 1982 if (ret) 1983 goto bail; 1984 1985 bail: 1986 rte_kvargs_free(kvlist); 1987 return ret; 1988 } 1989 1990 static void 1991 iavf_init_proto_xtr(struct rte_eth_dev *dev) 1992 { 1993 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1994 struct iavf_adapter *ad = 1995 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1996 const struct iavf_proto_xtr_ol *xtr_ol; 1997 bool proto_xtr_enable = false; 1998 int offset; 1999 uint16_t i; 2000 2001 vf->proto_xtr = rte_zmalloc("vf proto xtr", 2002 vf->vsi_res->num_queue_pairs, 0); 2003 if (unlikely(!(vf->proto_xtr))) { 2004 PMD_DRV_LOG(ERR, "no memory for setting up proto_xtr's table"); 2005 return; 2006 } 2007 2008 for (i = 0; i < vf->vsi_res->num_queue_pairs; i++) { 2009 vf->proto_xtr[i] = ad->devargs.proto_xtr[i] != 2010 IAVF_PROTO_XTR_NONE ? 2011 ad->devargs.proto_xtr[i] : 2012 ad->devargs.proto_xtr_dflt; 2013 2014 if (vf->proto_xtr[i] != IAVF_PROTO_XTR_NONE) { 2015 uint8_t type = vf->proto_xtr[i]; 2016 2017 iavf_proto_xtr_params[type].required = true; 2018 proto_xtr_enable = true; 2019 } 2020 } 2021 2022 if (likely(!proto_xtr_enable)) 2023 return; 2024 2025 offset = rte_mbuf_dynfield_register(&iavf_proto_xtr_metadata_param); 2026 if (unlikely(offset == -1)) { 2027 PMD_DRV_LOG(ERR, 2028 "failed to extract protocol metadata, error %d", 2029 -rte_errno); 2030 return; 2031 } 2032 2033 PMD_DRV_LOG(DEBUG, 2034 "proto_xtr metadata offset in mbuf is : %d", 2035 offset); 2036 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = offset; 2037 2038 for (i = 0; i < RTE_DIM(iavf_proto_xtr_params); i++) { 2039 xtr_ol = &iavf_proto_xtr_params[i]; 2040 2041 uint8_t rxdid = iavf_proto_xtr_type_to_rxdid((uint8_t)i); 2042 2043 if (!xtr_ol->required) 2044 continue; 2045 2046 if (!(vf->supported_rxdid & BIT(rxdid))) { 2047 PMD_DRV_LOG(ERR, 2048 "rxdid[%u] is not supported in hardware", 2049 rxdid); 2050 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 2051 break; 2052 } 2053 2054 offset = rte_mbuf_dynflag_register(&xtr_ol->param); 2055 if (unlikely(offset == -1)) { 2056 PMD_DRV_LOG(ERR, 2057 "failed to register proto_xtr offload '%s', error %d", 2058 xtr_ol->param.name, -rte_errno); 2059 2060 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 2061 break; 2062 } 2063 2064 PMD_DRV_LOG(DEBUG, 2065 "proto_xtr offload '%s' offset in mbuf is : %d", 2066 xtr_ol->param.name, offset); 2067 *xtr_ol->ol_flag = 1ULL << offset; 2068 } 2069 } 2070 2071 static int 2072 iavf_init_vf(struct rte_eth_dev *dev) 2073 { 2074 int err, bufsz; 2075 struct iavf_adapter *adapter = 2076 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2077 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2078 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2079 2080 err = iavf_parse_devargs(dev); 2081 if (err) { 2082 PMD_INIT_LOG(ERR, "Failed to parse devargs"); 2083 goto err; 2084 } 2085 2086 err = iavf_set_mac_type(hw); 2087 if (err) { 2088 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 2089 goto err; 2090 } 2091 2092 err = iavf_check_vf_reset_done(hw); 2093 if (err) { 2094 PMD_INIT_LOG(ERR, "VF is still resetting"); 2095 goto err; 2096 } 2097 2098 iavf_init_adminq_parameter(hw); 2099 err = iavf_init_adminq(hw); 2100 if (err) { 2101 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 2102 goto err; 2103 } 2104 2105 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 2106 if (!vf->aq_resp) { 2107 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 2108 goto err_aq; 2109 } 2110 if (iavf_check_api_version(adapter) != 0) { 2111 PMD_INIT_LOG(ERR, "check_api version failed"); 2112 goto err_api; 2113 } 2114 2115 bufsz = sizeof(struct virtchnl_vf_resource) + 2116 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 2117 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 2118 if (!vf->vf_res) { 2119 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 2120 goto err_api; 2121 } 2122 2123 if (iavf_get_vf_resource(adapter) != 0) { 2124 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 2125 goto err_alloc; 2126 } 2127 /* Allocate memort for RSS info */ 2128 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2129 vf->rss_key = rte_zmalloc("rss_key", 2130 vf->vf_res->rss_key_size, 0); 2131 if (!vf->rss_key) { 2132 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 2133 goto err_rss; 2134 } 2135 vf->rss_lut = rte_zmalloc("rss_lut", 2136 vf->vf_res->rss_lut_size, 0); 2137 if (!vf->rss_lut) { 2138 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 2139 goto err_rss; 2140 } 2141 } 2142 2143 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 2144 if (iavf_get_supported_rxdid(adapter) != 0) { 2145 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 2146 goto err_rss; 2147 } 2148 } 2149 2150 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 2151 if (iavf_get_vlan_offload_caps_v2(adapter) != 0) { 2152 PMD_INIT_LOG(ERR, "failed to do get VLAN offload v2 capabilities"); 2153 goto err_rss; 2154 } 2155 } 2156 2157 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) { 2158 bufsz = sizeof(struct virtchnl_qos_cap_list) + 2159 IAVF_MAX_TRAFFIC_CLASS * 2160 sizeof(struct virtchnl_qos_cap_elem); 2161 vf->qos_cap = rte_zmalloc("qos_cap", bufsz, 0); 2162 if (!vf->qos_cap) { 2163 PMD_INIT_LOG(ERR, "unable to allocate qos_cap memory"); 2164 goto err_rss; 2165 } 2166 iavf_tm_conf_init(dev); 2167 } 2168 2169 iavf_init_proto_xtr(dev); 2170 2171 return 0; 2172 err_rss: 2173 rte_free(vf->rss_key); 2174 rte_free(vf->rss_lut); 2175 err_alloc: 2176 rte_free(vf->qos_cap); 2177 rte_free(vf->vf_res); 2178 vf->vsi_res = NULL; 2179 err_api: 2180 rte_free(vf->aq_resp); 2181 err_aq: 2182 iavf_shutdown_adminq(hw); 2183 err: 2184 return -1; 2185 } 2186 2187 static void 2188 iavf_uninit_vf(struct rte_eth_dev *dev) 2189 { 2190 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2191 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2192 2193 iavf_shutdown_adminq(hw); 2194 2195 rte_free(vf->vf_res); 2196 vf->vsi_res = NULL; 2197 vf->vf_res = NULL; 2198 2199 rte_free(vf->aq_resp); 2200 vf->aq_resp = NULL; 2201 2202 rte_free(vf->qos_cap); 2203 vf->qos_cap = NULL; 2204 2205 rte_free(vf->rss_lut); 2206 vf->rss_lut = NULL; 2207 rte_free(vf->rss_key); 2208 vf->rss_key = NULL; 2209 } 2210 2211 /* Enable default admin queue interrupt setting */ 2212 static inline void 2213 iavf_enable_irq0(struct iavf_hw *hw) 2214 { 2215 /* Enable admin queue interrupt trigger */ 2216 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 2217 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 2218 2219 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2220 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 2221 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 2222 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2223 2224 IAVF_WRITE_FLUSH(hw); 2225 } 2226 2227 static inline void 2228 iavf_disable_irq0(struct iavf_hw *hw) 2229 { 2230 /* Disable all interrupt types */ 2231 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 2232 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2233 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2234 IAVF_WRITE_FLUSH(hw); 2235 } 2236 2237 static void 2238 iavf_dev_interrupt_handler(void *param) 2239 { 2240 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 2241 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2242 2243 iavf_disable_irq0(hw); 2244 2245 iavf_handle_virtchnl_msg(dev); 2246 2247 iavf_enable_irq0(hw); 2248 } 2249 2250 void 2251 iavf_dev_alarm_handler(void *param) 2252 { 2253 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 2254 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2255 uint32_t icr0; 2256 2257 iavf_disable_irq0(hw); 2258 2259 /* read out interrupt causes */ 2260 icr0 = IAVF_READ_REG(hw, IAVF_VFINT_ICR01); 2261 2262 if (icr0 & IAVF_VFINT_ICR01_ADMINQ_MASK) { 2263 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported"); 2264 iavf_handle_virtchnl_msg(dev); 2265 } 2266 2267 iavf_enable_irq0(hw); 2268 2269 rte_eal_alarm_set(IAVF_ALARM_INTERVAL, 2270 iavf_dev_alarm_handler, dev); 2271 } 2272 2273 static int 2274 iavf_dev_flow_ops_get(struct rte_eth_dev *dev, 2275 const struct rte_flow_ops **ops) 2276 { 2277 if (!dev) 2278 return -EINVAL; 2279 2280 *ops = &iavf_flow_ops; 2281 return 0; 2282 } 2283 2284 static void 2285 iavf_default_rss_disable(struct iavf_adapter *adapter) 2286 { 2287 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 2288 int ret = 0; 2289 2290 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2291 /* Set hena = 0 to ask PF to cleanup all existing RSS. */ 2292 ret = iavf_set_hena(adapter, 0); 2293 if (ret) 2294 /* It is a workaround, temporarily allow error to be 2295 * returned due to possible lack of PF handling for 2296 * hena = 0. 2297 */ 2298 PMD_INIT_LOG(WARNING, "fail to disable default RSS," 2299 "lack PF support"); 2300 } 2301 } 2302 2303 static int 2304 iavf_dev_init(struct rte_eth_dev *eth_dev) 2305 { 2306 struct iavf_adapter *adapter = 2307 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2308 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 2309 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 2310 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 2311 int ret = 0; 2312 2313 PMD_INIT_FUNC_TRACE(); 2314 2315 /* assign ops func pointer */ 2316 eth_dev->dev_ops = &iavf_eth_dev_ops; 2317 eth_dev->rx_queue_count = iavf_dev_rxq_count; 2318 eth_dev->rx_descriptor_status = iavf_dev_rx_desc_status; 2319 eth_dev->tx_descriptor_status = iavf_dev_tx_desc_status; 2320 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 2321 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 2322 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 2323 2324 /* For secondary processes, we don't initialise any further as primary 2325 * has already done this work. Only check if we need a different RX 2326 * and TX function. 2327 */ 2328 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2329 iavf_set_rx_function(eth_dev); 2330 iavf_set_tx_function(eth_dev); 2331 return 0; 2332 } 2333 rte_eth_copy_pci_info(eth_dev, pci_dev); 2334 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2335 2336 hw->vendor_id = pci_dev->id.vendor_id; 2337 hw->device_id = pci_dev->id.device_id; 2338 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 2339 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 2340 hw->bus.bus_id = pci_dev->addr.bus; 2341 hw->bus.device = pci_dev->addr.devid; 2342 hw->bus.func = pci_dev->addr.function; 2343 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 2344 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2345 adapter->eth_dev = eth_dev; 2346 adapter->stopped = 1; 2347 2348 if (iavf_init_vf(eth_dev) != 0) { 2349 PMD_INIT_LOG(ERR, "Init vf failed"); 2350 return -1; 2351 } 2352 2353 /* set default ptype table */ 2354 adapter->ptype_tbl = iavf_get_default_ptype_table(); 2355 2356 /* copy mac addr */ 2357 eth_dev->data->mac_addrs = rte_zmalloc( 2358 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 2359 if (!eth_dev->data->mac_addrs) { 2360 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 2361 " store MAC addresses", 2362 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 2363 ret = -ENOMEM; 2364 goto init_vf_err; 2365 } 2366 /* If the MAC address is not configured by host, 2367 * generate a random one. 2368 */ 2369 if (!rte_is_valid_assigned_ether_addr( 2370 (struct rte_ether_addr *)hw->mac.addr)) 2371 rte_eth_random_addr(hw->mac.addr); 2372 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 2373 ð_dev->data->mac_addrs[0]); 2374 2375 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 2376 /* register callback func to eal lib */ 2377 rte_intr_callback_register(&pci_dev->intr_handle, 2378 iavf_dev_interrupt_handler, 2379 (void *)eth_dev); 2380 2381 /* enable uio intr after callback register */ 2382 rte_intr_enable(&pci_dev->intr_handle); 2383 } else { 2384 rte_eal_alarm_set(IAVF_ALARM_INTERVAL, 2385 iavf_dev_alarm_handler, eth_dev); 2386 } 2387 2388 /* configure and enable device interrupt */ 2389 iavf_enable_irq0(hw); 2390 2391 ret = iavf_flow_init(adapter); 2392 if (ret) { 2393 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 2394 goto flow_init_err; 2395 } 2396 2397 iavf_default_rss_disable(adapter); 2398 2399 return 0; 2400 2401 flow_init_err: 2402 rte_free(eth_dev->data->mac_addrs); 2403 eth_dev->data->mac_addrs = NULL; 2404 2405 init_vf_err: 2406 iavf_uninit_vf(eth_dev); 2407 2408 return ret; 2409 } 2410 2411 static int 2412 iavf_dev_close(struct rte_eth_dev *dev) 2413 { 2414 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2415 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2416 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 2417 struct iavf_adapter *adapter = 2418 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2419 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2420 int ret; 2421 2422 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2423 return 0; 2424 2425 ret = iavf_dev_stop(dev); 2426 2427 iavf_flow_flush(dev, NULL); 2428 iavf_flow_uninit(adapter); 2429 2430 /* 2431 * disable promiscuous mode before reset vf 2432 * it is a workaround solution when work with kernel driver 2433 * and it is not the normal way 2434 */ 2435 if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled) 2436 iavf_config_promisc(adapter, false, false); 2437 2438 iavf_shutdown_adminq(hw); 2439 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 2440 /* disable uio intr before callback unregister */ 2441 rte_intr_disable(intr_handle); 2442 2443 /* unregister callback func from eal lib */ 2444 rte_intr_callback_unregister(intr_handle, 2445 iavf_dev_interrupt_handler, dev); 2446 } else { 2447 rte_eal_alarm_cancel(iavf_dev_alarm_handler, dev); 2448 } 2449 iavf_disable_irq0(hw); 2450 2451 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) 2452 iavf_tm_conf_uninit(dev); 2453 2454 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2455 if (vf->rss_lut) { 2456 rte_free(vf->rss_lut); 2457 vf->rss_lut = NULL; 2458 } 2459 if (vf->rss_key) { 2460 rte_free(vf->rss_key); 2461 vf->rss_key = NULL; 2462 } 2463 } 2464 2465 rte_free(vf->vf_res); 2466 vf->vsi_res = NULL; 2467 vf->vf_res = NULL; 2468 2469 rte_free(vf->aq_resp); 2470 vf->aq_resp = NULL; 2471 2472 /* 2473 * If the VF is reset via VFLR, the device will be knocked out of bus 2474 * master mode, and the driver will fail to recover from the reset. Fix 2475 * this by enabling bus mastering after every reset. In a non-VFLR case, 2476 * the bus master bit will not be disabled, and this call will have no 2477 * effect. 2478 */ 2479 if (vf->vf_reset && !rte_pci_set_bus_master(pci_dev, true)) 2480 vf->vf_reset = false; 2481 2482 return ret; 2483 } 2484 2485 static int 2486 iavf_dev_uninit(struct rte_eth_dev *dev) 2487 { 2488 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2489 return -EPERM; 2490 2491 iavf_dev_close(dev); 2492 2493 return 0; 2494 } 2495 2496 /* 2497 * Reset VF device only to re-initialize resources in PMD layer 2498 */ 2499 static int 2500 iavf_dev_reset(struct rte_eth_dev *dev) 2501 { 2502 int ret; 2503 2504 ret = iavf_dev_uninit(dev); 2505 if (ret) 2506 return ret; 2507 2508 return iavf_dev_init(dev); 2509 } 2510 2511 static int 2512 iavf_dcf_cap_check_handler(__rte_unused const char *key, 2513 const char *value, __rte_unused void *opaque) 2514 { 2515 if (strcmp(value, "dcf")) 2516 return -1; 2517 2518 return 0; 2519 } 2520 2521 static int 2522 iavf_dcf_cap_selected(struct rte_devargs *devargs) 2523 { 2524 struct rte_kvargs *kvlist; 2525 const char *key = "cap"; 2526 int ret = 0; 2527 2528 if (devargs == NULL) 2529 return 0; 2530 2531 kvlist = rte_kvargs_parse(devargs->args, NULL); 2532 if (kvlist == NULL) 2533 return 0; 2534 2535 if (!rte_kvargs_count(kvlist, key)) 2536 goto exit; 2537 2538 /* dcf capability selected when there's a key-value pair: cap=dcf */ 2539 if (rte_kvargs_process(kvlist, key, 2540 iavf_dcf_cap_check_handler, NULL) < 0) 2541 goto exit; 2542 2543 ret = 1; 2544 2545 exit: 2546 rte_kvargs_free(kvlist); 2547 return ret; 2548 } 2549 2550 static int 2551 iavf_drv_i40evf_check_handler(__rte_unused const char *key, 2552 const char *value, __rte_unused void *opaque) 2553 { 2554 if (strcmp(value, "i40evf")) 2555 return -1; 2556 2557 return 0; 2558 } 2559 2560 static int 2561 iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id) 2562 { 2563 struct rte_kvargs *kvlist; 2564 int ret = 0; 2565 2566 if (device_id != IAVF_DEV_ID_VF && 2567 device_id != IAVF_DEV_ID_VF_HV && 2568 device_id != IAVF_DEV_ID_X722_VF && 2569 device_id != IAVF_DEV_ID_X722_A0_VF) 2570 return 0; 2571 2572 if (devargs == NULL) 2573 return 0; 2574 2575 kvlist = rte_kvargs_parse(devargs->args, NULL); 2576 if (kvlist == NULL) 2577 return 0; 2578 2579 if (!rte_kvargs_count(kvlist, RTE_DEVARGS_KEY_DRIVER)) 2580 goto exit; 2581 2582 /* i40evf driver selected when there's a key-value pair: 2583 * driver=i40evf 2584 */ 2585 if (rte_kvargs_process(kvlist, RTE_DEVARGS_KEY_DRIVER, 2586 iavf_drv_i40evf_check_handler, NULL) < 0) 2587 goto exit; 2588 2589 ret = 1; 2590 2591 exit: 2592 rte_kvargs_free(kvlist); 2593 return ret; 2594 } 2595 2596 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2597 struct rte_pci_device *pci_dev) 2598 { 2599 if (iavf_dcf_cap_selected(pci_dev->device.devargs) || 2600 iavf_drv_i40evf_selected(pci_dev->device.devargs, 2601 pci_dev->id.device_id)) 2602 return 1; 2603 2604 return rte_eth_dev_pci_generic_probe(pci_dev, 2605 sizeof(struct iavf_adapter), iavf_dev_init); 2606 } 2607 2608 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 2609 { 2610 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 2611 } 2612 2613 /* Adaptive virtual function driver struct */ 2614 static struct rte_pci_driver rte_iavf_pmd = { 2615 .id_table = pci_id_iavf_map, 2616 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 2617 .probe = eth_iavf_pci_probe, 2618 .remove = eth_iavf_pci_remove, 2619 }; 2620 2621 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 2622 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 2623 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 2624 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf driver=i40evf"); 2625 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_init, init, NOTICE); 2626 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_driver, driver, NOTICE); 2627 #ifdef RTE_ETHDEV_DEBUG_RX 2628 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_rx, rx, DEBUG); 2629 #endif 2630 #ifdef RTE_ETHDEV_DEBUG_TX 2631 RTE_LOG_REGISTER_SUFFIX(iavf_logtype_tx, tx, DEBUG); 2632 #endif 2633