1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <sys/queue.h> 6 #include <stdio.h> 7 #include <errno.h> 8 #include <stdint.h> 9 #include <string.h> 10 #include <unistd.h> 11 #include <stdarg.h> 12 #include <inttypes.h> 13 #include <rte_byteorder.h> 14 #include <rte_common.h> 15 16 #include <rte_interrupts.h> 17 #include <rte_debug.h> 18 #include <rte_pci.h> 19 #include <rte_atomic.h> 20 #include <rte_eal.h> 21 #include <rte_ether.h> 22 #include <ethdev_driver.h> 23 #include <ethdev_pci.h> 24 #include <rte_malloc.h> 25 #include <rte_memzone.h> 26 #include <rte_dev.h> 27 28 #include "iavf.h" 29 #include "iavf_rxtx.h" 30 #include "iavf_generic_flow.h" 31 #include "rte_pmd_iavf.h" 32 33 /* devargs */ 34 #define IAVF_PROTO_XTR_ARG "proto_xtr" 35 36 static const char * const iavf_valid_args[] = { 37 IAVF_PROTO_XTR_ARG, 38 NULL 39 }; 40 41 static const struct rte_mbuf_dynfield iavf_proto_xtr_metadata_param = { 42 .name = "intel_pmd_dynfield_proto_xtr_metadata", 43 .size = sizeof(uint32_t), 44 .align = __alignof__(uint32_t), 45 .flags = 0, 46 }; 47 48 struct iavf_proto_xtr_ol { 49 const struct rte_mbuf_dynflag param; 50 uint64_t *ol_flag; 51 bool required; 52 }; 53 54 static struct iavf_proto_xtr_ol iavf_proto_xtr_params[] = { 55 [IAVF_PROTO_XTR_VLAN] = { 56 .param = { .name = "intel_pmd_dynflag_proto_xtr_vlan" }, 57 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_vlan_mask }, 58 [IAVF_PROTO_XTR_IPV4] = { 59 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv4" }, 60 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv4_mask }, 61 [IAVF_PROTO_XTR_IPV6] = { 62 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6" }, 63 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_mask }, 64 [IAVF_PROTO_XTR_IPV6_FLOW] = { 65 .param = { .name = "intel_pmd_dynflag_proto_xtr_ipv6_flow" }, 66 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ipv6_flow_mask }, 67 [IAVF_PROTO_XTR_TCP] = { 68 .param = { .name = "intel_pmd_dynflag_proto_xtr_tcp" }, 69 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_tcp_mask }, 70 [IAVF_PROTO_XTR_IP_OFFSET] = { 71 .param = { .name = "intel_pmd_dynflag_proto_xtr_ip_offset" }, 72 .ol_flag = &rte_pmd_ifd_dynflag_proto_xtr_ip_offset_mask }, 73 }; 74 75 static int iavf_dev_configure(struct rte_eth_dev *dev); 76 static int iavf_dev_start(struct rte_eth_dev *dev); 77 static int iavf_dev_stop(struct rte_eth_dev *dev); 78 static int iavf_dev_close(struct rte_eth_dev *dev); 79 static int iavf_dev_reset(struct rte_eth_dev *dev); 80 static int iavf_dev_info_get(struct rte_eth_dev *dev, 81 struct rte_eth_dev_info *dev_info); 82 static const uint32_t *iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev); 83 static int iavf_dev_stats_get(struct rte_eth_dev *dev, 84 struct rte_eth_stats *stats); 85 static int iavf_dev_stats_reset(struct rte_eth_dev *dev); 86 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 87 struct rte_eth_xstat *xstats, unsigned int n); 88 static int iavf_dev_xstats_get_names(struct rte_eth_dev *dev, 89 struct rte_eth_xstat_name *xstats_names, 90 unsigned int limit); 91 static int iavf_dev_promiscuous_enable(struct rte_eth_dev *dev); 92 static int iavf_dev_promiscuous_disable(struct rte_eth_dev *dev); 93 static int iavf_dev_allmulticast_enable(struct rte_eth_dev *dev); 94 static int iavf_dev_allmulticast_disable(struct rte_eth_dev *dev); 95 static int iavf_dev_add_mac_addr(struct rte_eth_dev *dev, 96 struct rte_ether_addr *addr, 97 uint32_t index, 98 uint32_t pool); 99 static void iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index); 100 static int iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 101 uint16_t vlan_id, int on); 102 static int iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask); 103 static int iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 104 struct rte_eth_rss_reta_entry64 *reta_conf, 105 uint16_t reta_size); 106 static int iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 107 struct rte_eth_rss_reta_entry64 *reta_conf, 108 uint16_t reta_size); 109 static int iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 110 struct rte_eth_rss_conf *rss_conf); 111 static int iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 112 struct rte_eth_rss_conf *rss_conf); 113 static int iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); 114 static int iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 115 struct rte_ether_addr *mac_addr); 116 static int iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, 117 uint16_t queue_id); 118 static int iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, 119 uint16_t queue_id); 120 static int iavf_dev_flow_ops_get(struct rte_eth_dev *dev, 121 const struct rte_flow_ops **ops); 122 static int iavf_set_mc_addr_list(struct rte_eth_dev *dev, 123 struct rte_ether_addr *mc_addrs, 124 uint32_t mc_addrs_num); 125 126 static const struct rte_pci_id pci_id_iavf_map[] = { 127 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_ADAPTIVE_VF) }, 128 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF) }, 129 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_VF_HV) }, 130 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_VF) }, 131 { RTE_PCI_DEVICE(IAVF_INTEL_VENDOR_ID, IAVF_DEV_ID_X722_A0_VF) }, 132 { .vendor_id = 0, /* sentinel */ }, 133 }; 134 135 struct rte_iavf_xstats_name_off { 136 char name[RTE_ETH_XSTATS_NAME_SIZE]; 137 unsigned int offset; 138 }; 139 140 static const struct rte_iavf_xstats_name_off rte_iavf_stats_strings[] = { 141 {"rx_bytes", offsetof(struct iavf_eth_stats, rx_bytes)}, 142 {"rx_unicast_packets", offsetof(struct iavf_eth_stats, rx_unicast)}, 143 {"rx_multicast_packets", offsetof(struct iavf_eth_stats, rx_multicast)}, 144 {"rx_broadcast_packets", offsetof(struct iavf_eth_stats, rx_broadcast)}, 145 {"rx_dropped_packets", offsetof(struct iavf_eth_stats, rx_discards)}, 146 {"rx_unknown_protocol_packets", offsetof(struct iavf_eth_stats, 147 rx_unknown_protocol)}, 148 {"tx_bytes", offsetof(struct iavf_eth_stats, tx_bytes)}, 149 {"tx_unicast_packets", offsetof(struct iavf_eth_stats, tx_unicast)}, 150 {"tx_multicast_packets", offsetof(struct iavf_eth_stats, tx_multicast)}, 151 {"tx_broadcast_packets", offsetof(struct iavf_eth_stats, tx_broadcast)}, 152 {"tx_dropped_packets", offsetof(struct iavf_eth_stats, tx_discards)}, 153 {"tx_error_packets", offsetof(struct iavf_eth_stats, tx_errors)}, 154 }; 155 156 #define IAVF_NB_XSTATS (sizeof(rte_iavf_stats_strings) / \ 157 sizeof(rte_iavf_stats_strings[0])) 158 159 static const struct eth_dev_ops iavf_eth_dev_ops = { 160 .dev_configure = iavf_dev_configure, 161 .dev_start = iavf_dev_start, 162 .dev_stop = iavf_dev_stop, 163 .dev_close = iavf_dev_close, 164 .dev_reset = iavf_dev_reset, 165 .dev_infos_get = iavf_dev_info_get, 166 .dev_supported_ptypes_get = iavf_dev_supported_ptypes_get, 167 .link_update = iavf_dev_link_update, 168 .stats_get = iavf_dev_stats_get, 169 .stats_reset = iavf_dev_stats_reset, 170 .xstats_get = iavf_dev_xstats_get, 171 .xstats_get_names = iavf_dev_xstats_get_names, 172 .xstats_reset = iavf_dev_stats_reset, 173 .promiscuous_enable = iavf_dev_promiscuous_enable, 174 .promiscuous_disable = iavf_dev_promiscuous_disable, 175 .allmulticast_enable = iavf_dev_allmulticast_enable, 176 .allmulticast_disable = iavf_dev_allmulticast_disable, 177 .mac_addr_add = iavf_dev_add_mac_addr, 178 .mac_addr_remove = iavf_dev_del_mac_addr, 179 .set_mc_addr_list = iavf_set_mc_addr_list, 180 .vlan_filter_set = iavf_dev_vlan_filter_set, 181 .vlan_offload_set = iavf_dev_vlan_offload_set, 182 .rx_queue_start = iavf_dev_rx_queue_start, 183 .rx_queue_stop = iavf_dev_rx_queue_stop, 184 .tx_queue_start = iavf_dev_tx_queue_start, 185 .tx_queue_stop = iavf_dev_tx_queue_stop, 186 .rx_queue_setup = iavf_dev_rx_queue_setup, 187 .rx_queue_release = iavf_dev_rx_queue_release, 188 .tx_queue_setup = iavf_dev_tx_queue_setup, 189 .tx_queue_release = iavf_dev_tx_queue_release, 190 .mac_addr_set = iavf_dev_set_default_mac_addr, 191 .reta_update = iavf_dev_rss_reta_update, 192 .reta_query = iavf_dev_rss_reta_query, 193 .rss_hash_update = iavf_dev_rss_hash_update, 194 .rss_hash_conf_get = iavf_dev_rss_hash_conf_get, 195 .rxq_info_get = iavf_dev_rxq_info_get, 196 .txq_info_get = iavf_dev_txq_info_get, 197 .mtu_set = iavf_dev_mtu_set, 198 .rx_queue_intr_enable = iavf_dev_rx_queue_intr_enable, 199 .rx_queue_intr_disable = iavf_dev_rx_queue_intr_disable, 200 .flow_ops_get = iavf_dev_flow_ops_get, 201 .tx_done_cleanup = iavf_dev_tx_done_cleanup, 202 .get_monitor_addr = iavf_get_monitor_addr, 203 }; 204 205 static int 206 iavf_set_mc_addr_list(struct rte_eth_dev *dev, 207 struct rte_ether_addr *mc_addrs, 208 uint32_t mc_addrs_num) 209 { 210 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 211 struct iavf_adapter *adapter = 212 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 213 int err, ret; 214 215 if (mc_addrs_num > IAVF_NUM_MACADDR_MAX) { 216 PMD_DRV_LOG(ERR, 217 "can't add more than a limited number (%u) of addresses.", 218 (uint32_t)IAVF_NUM_MACADDR_MAX); 219 return -EINVAL; 220 } 221 222 /* flush previous addresses */ 223 err = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 224 false); 225 if (err) 226 return err; 227 228 /* add new ones */ 229 err = iavf_add_del_mc_addr_list(adapter, mc_addrs, mc_addrs_num, true); 230 231 if (err) { 232 /* if adding mac address list fails, should add the previous 233 * addresses back. 234 */ 235 ret = iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, 236 vf->mc_addrs_num, true); 237 if (ret) 238 return ret; 239 } else { 240 vf->mc_addrs_num = mc_addrs_num; 241 memcpy(vf->mc_addrs, 242 mc_addrs, mc_addrs_num * sizeof(*mc_addrs)); 243 } 244 245 return err; 246 } 247 248 static int 249 iavf_config_rss_hf(struct iavf_adapter *adapter, uint64_t rss_hf) 250 { 251 static const uint64_t map_hena_rss[] = { 252 /* IPv4 */ 253 [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP] = 254 ETH_RSS_NONFRAG_IPV4_UDP, 255 [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP] = 256 ETH_RSS_NONFRAG_IPV4_UDP, 257 [IAVF_FILTER_PCTYPE_NONF_IPV4_UDP] = 258 ETH_RSS_NONFRAG_IPV4_UDP, 259 [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK] = 260 ETH_RSS_NONFRAG_IPV4_TCP, 261 [IAVF_FILTER_PCTYPE_NONF_IPV4_TCP] = 262 ETH_RSS_NONFRAG_IPV4_TCP, 263 [IAVF_FILTER_PCTYPE_NONF_IPV4_SCTP] = 264 ETH_RSS_NONFRAG_IPV4_SCTP, 265 [IAVF_FILTER_PCTYPE_NONF_IPV4_OTHER] = 266 ETH_RSS_NONFRAG_IPV4_OTHER, 267 [IAVF_FILTER_PCTYPE_FRAG_IPV4] = ETH_RSS_FRAG_IPV4, 268 269 /* IPv6 */ 270 [IAVF_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP] = 271 ETH_RSS_NONFRAG_IPV6_UDP, 272 [IAVF_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP] = 273 ETH_RSS_NONFRAG_IPV6_UDP, 274 [IAVF_FILTER_PCTYPE_NONF_IPV6_UDP] = 275 ETH_RSS_NONFRAG_IPV6_UDP, 276 [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK] = 277 ETH_RSS_NONFRAG_IPV6_TCP, 278 [IAVF_FILTER_PCTYPE_NONF_IPV6_TCP] = 279 ETH_RSS_NONFRAG_IPV6_TCP, 280 [IAVF_FILTER_PCTYPE_NONF_IPV6_SCTP] = 281 ETH_RSS_NONFRAG_IPV6_SCTP, 282 [IAVF_FILTER_PCTYPE_NONF_IPV6_OTHER] = 283 ETH_RSS_NONFRAG_IPV6_OTHER, 284 [IAVF_FILTER_PCTYPE_FRAG_IPV6] = ETH_RSS_FRAG_IPV6, 285 286 /* L2 Payload */ 287 [IAVF_FILTER_PCTYPE_L2_PAYLOAD] = ETH_RSS_L2_PAYLOAD 288 }; 289 290 const uint64_t ipv4_rss = ETH_RSS_NONFRAG_IPV4_UDP | 291 ETH_RSS_NONFRAG_IPV4_TCP | 292 ETH_RSS_NONFRAG_IPV4_SCTP | 293 ETH_RSS_NONFRAG_IPV4_OTHER | 294 ETH_RSS_FRAG_IPV4; 295 296 const uint64_t ipv6_rss = ETH_RSS_NONFRAG_IPV6_UDP | 297 ETH_RSS_NONFRAG_IPV6_TCP | 298 ETH_RSS_NONFRAG_IPV6_SCTP | 299 ETH_RSS_NONFRAG_IPV6_OTHER | 300 ETH_RSS_FRAG_IPV6; 301 302 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 303 uint64_t caps = 0, hena = 0, valid_rss_hf = 0; 304 uint32_t i; 305 int ret; 306 307 ret = iavf_get_hena_caps(adapter, &caps); 308 if (ret) 309 return ret; 310 /** 311 * ETH_RSS_IPV4 and ETH_RSS_IPV6 can be considered as 2 312 * generalizations of all other IPv4 and IPv6 RSS types. 313 */ 314 if (rss_hf & ETH_RSS_IPV4) 315 rss_hf |= ipv4_rss; 316 317 if (rss_hf & ETH_RSS_IPV6) 318 rss_hf |= ipv6_rss; 319 320 RTE_BUILD_BUG_ON(RTE_DIM(map_hena_rss) > sizeof(uint64_t) * CHAR_BIT); 321 322 for (i = 0; i < RTE_DIM(map_hena_rss); i++) { 323 uint64_t bit = BIT_ULL(i); 324 325 if ((caps & bit) && (map_hena_rss[i] & rss_hf)) { 326 valid_rss_hf |= map_hena_rss[i]; 327 hena |= bit; 328 } 329 } 330 331 ret = iavf_set_hena(adapter, hena); 332 if (ret) 333 return ret; 334 335 if (valid_rss_hf & ipv4_rss) 336 valid_rss_hf |= rss_hf & ETH_RSS_IPV4; 337 338 if (valid_rss_hf & ipv6_rss) 339 valid_rss_hf |= rss_hf & ETH_RSS_IPV6; 340 341 if (rss_hf & ~valid_rss_hf) 342 PMD_DRV_LOG(WARNING, "Unsupported rss_hf 0x%" PRIx64, 343 rss_hf & ~valid_rss_hf); 344 345 vf->rss_hf = valid_rss_hf; 346 return 0; 347 } 348 349 static int 350 iavf_init_rss(struct iavf_adapter *adapter) 351 { 352 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 353 struct rte_eth_rss_conf *rss_conf; 354 uint16_t i, j, nb_q; 355 int ret; 356 357 rss_conf = &adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf; 358 nb_q = RTE_MIN(adapter->eth_dev->data->nb_rx_queues, 359 vf->max_rss_qregion); 360 361 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) { 362 PMD_DRV_LOG(DEBUG, "RSS is not supported"); 363 return -ENOTSUP; 364 } 365 366 /* configure RSS key */ 367 if (!rss_conf->rss_key) { 368 /* Calculate the default hash key */ 369 for (i = 0; i <= vf->vf_res->rss_key_size; i++) 370 vf->rss_key[i] = (uint8_t)rte_rand(); 371 } else 372 rte_memcpy(vf->rss_key, rss_conf->rss_key, 373 RTE_MIN(rss_conf->rss_key_len, 374 vf->vf_res->rss_key_size)); 375 376 /* init RSS LUT table */ 377 for (i = 0, j = 0; i < vf->vf_res->rss_lut_size; i++, j++) { 378 if (j >= nb_q) 379 j = 0; 380 vf->rss_lut[i] = j; 381 } 382 /* send virtchnnl ops to configure rss*/ 383 ret = iavf_configure_rss_lut(adapter); 384 if (ret) 385 return ret; 386 ret = iavf_configure_rss_key(adapter); 387 if (ret) 388 return ret; 389 390 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) { 391 /* Set RSS hash configuration based on rss_conf->rss_hf. */ 392 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 393 if (ret) { 394 PMD_DRV_LOG(ERR, "fail to set default RSS"); 395 return ret; 396 } 397 } else { 398 ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf); 399 if (ret != -ENOTSUP) 400 return ret; 401 } 402 403 return 0; 404 } 405 406 static int 407 iavf_queues_req_reset(struct rte_eth_dev *dev, uint16_t num) 408 { 409 struct iavf_adapter *ad = 410 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 411 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 412 int ret; 413 414 ret = iavf_request_queues(ad, num); 415 if (ret) { 416 PMD_DRV_LOG(ERR, "request queues from PF failed"); 417 return ret; 418 } 419 PMD_DRV_LOG(INFO, "change queue pairs from %u to %u", 420 vf->vsi_res->num_queue_pairs, num); 421 422 ret = iavf_dev_reset(dev); 423 if (ret) { 424 PMD_DRV_LOG(ERR, "vf reset failed"); 425 return ret; 426 } 427 428 return 0; 429 } 430 431 static int 432 iavf_dev_vlan_insert_set(struct rte_eth_dev *dev) 433 { 434 struct iavf_adapter *adapter = 435 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 436 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 437 bool enable; 438 439 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2)) 440 return 0; 441 442 enable = !!(dev->data->dev_conf.txmode.offloads & 443 DEV_TX_OFFLOAD_VLAN_INSERT); 444 iavf_config_vlan_insert_v2(adapter, enable); 445 446 return 0; 447 } 448 449 static int 450 iavf_dev_init_vlan(struct rte_eth_dev *dev) 451 { 452 int err; 453 454 err = iavf_dev_vlan_offload_set(dev, 455 ETH_VLAN_STRIP_MASK | 456 ETH_QINQ_STRIP_MASK | 457 ETH_VLAN_FILTER_MASK | 458 ETH_VLAN_EXTEND_MASK); 459 if (err) { 460 PMD_DRV_LOG(ERR, "Failed to update vlan offload"); 461 return err; 462 } 463 464 err = iavf_dev_vlan_insert_set(dev); 465 if (err) 466 PMD_DRV_LOG(ERR, "Failed to update vlan insertion"); 467 468 return err; 469 } 470 471 static int 472 iavf_dev_configure(struct rte_eth_dev *dev) 473 { 474 struct iavf_adapter *ad = 475 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 476 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad); 477 uint16_t num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 478 dev->data->nb_tx_queues); 479 int ret; 480 481 ad->rx_bulk_alloc_allowed = true; 482 /* Initialize to TRUE. If any of Rx queues doesn't meet the 483 * vector Rx/Tx preconditions, it will be reset. 484 */ 485 ad->rx_vec_allowed = true; 486 ad->tx_vec_allowed = true; 487 488 if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) 489 dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; 490 491 /* Large VF setting */ 492 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_DFLT) { 493 if (!(vf->vf_res->vf_cap_flags & 494 VIRTCHNL_VF_LARGE_NUM_QPAIRS)) { 495 PMD_DRV_LOG(ERR, "large VF is not supported"); 496 return -1; 497 } 498 499 if (num_queue_pairs > IAVF_MAX_NUM_QUEUES_LV) { 500 PMD_DRV_LOG(ERR, "queue pairs number cannot be larger than %u", 501 IAVF_MAX_NUM_QUEUES_LV); 502 return -1; 503 } 504 505 ret = iavf_queues_req_reset(dev, num_queue_pairs); 506 if (ret) 507 return ret; 508 509 ret = iavf_get_max_rss_queue_region(ad); 510 if (ret) { 511 PMD_INIT_LOG(ERR, "get max rss queue region failed"); 512 return ret; 513 } 514 515 vf->lv_enabled = true; 516 } else { 517 /* Check if large VF is already enabled. If so, disable and 518 * release redundant queue resource. 519 * Or check if enough queue pairs. If not, request them from PF. 520 */ 521 if (vf->lv_enabled || 522 num_queue_pairs > vf->vsi_res->num_queue_pairs) { 523 ret = iavf_queues_req_reset(dev, num_queue_pairs); 524 if (ret) 525 return ret; 526 527 vf->lv_enabled = false; 528 } 529 /* if large VF is not required, use default rss queue region */ 530 vf->max_rss_qregion = IAVF_MAX_NUM_QUEUES_DFLT; 531 } 532 533 ret = iavf_dev_init_vlan(dev); 534 if (ret) 535 PMD_DRV_LOG(ERR, "configure VLAN failed: %d", ret); 536 537 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 538 if (iavf_init_rss(ad) != 0) { 539 PMD_DRV_LOG(ERR, "configure rss failed"); 540 return -1; 541 } 542 } 543 return 0; 544 } 545 546 static int 547 iavf_init_rxq(struct rte_eth_dev *dev, struct iavf_rx_queue *rxq) 548 { 549 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 550 struct rte_eth_dev_data *dev_data = dev->data; 551 uint16_t buf_size, max_pkt_len, len; 552 553 buf_size = rte_pktmbuf_data_room_size(rxq->mp) - RTE_PKTMBUF_HEADROOM; 554 555 /* Calculate the maximum packet length allowed */ 556 len = rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS; 557 max_pkt_len = RTE_MIN(len, dev->data->dev_conf.rxmode.max_rx_pkt_len); 558 559 /* Check if the jumbo frame and maximum packet length are set 560 * correctly. 561 */ 562 if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { 563 if (max_pkt_len <= IAVF_ETH_MAX_LEN || 564 max_pkt_len > IAVF_FRAME_SIZE_MAX) { 565 PMD_DRV_LOG(ERR, "maximum packet length must be " 566 "larger than %u and smaller than %u, " 567 "as jumbo frame is enabled", 568 (uint32_t)IAVF_ETH_MAX_LEN, 569 (uint32_t)IAVF_FRAME_SIZE_MAX); 570 return -EINVAL; 571 } 572 } else { 573 if (max_pkt_len < RTE_ETHER_MIN_LEN || 574 max_pkt_len > IAVF_ETH_MAX_LEN) { 575 PMD_DRV_LOG(ERR, "maximum packet length must be " 576 "larger than %u and smaller than %u, " 577 "as jumbo frame is disabled", 578 (uint32_t)RTE_ETHER_MIN_LEN, 579 (uint32_t)IAVF_ETH_MAX_LEN); 580 return -EINVAL; 581 } 582 } 583 584 rxq->max_pkt_len = max_pkt_len; 585 if ((dev_data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_SCATTER) || 586 rxq->max_pkt_len > buf_size) { 587 dev_data->scattered_rx = 1; 588 } 589 IAVF_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1); 590 IAVF_WRITE_FLUSH(hw); 591 592 return 0; 593 } 594 595 static int 596 iavf_init_queues(struct rte_eth_dev *dev) 597 { 598 struct iavf_rx_queue **rxq = 599 (struct iavf_rx_queue **)dev->data->rx_queues; 600 int i, ret = IAVF_SUCCESS; 601 602 for (i = 0; i < dev->data->nb_rx_queues; i++) { 603 if (!rxq[i] || !rxq[i]->q_set) 604 continue; 605 ret = iavf_init_rxq(dev, rxq[i]); 606 if (ret != IAVF_SUCCESS) 607 break; 608 } 609 /* set rx/tx function to vector/scatter/single-segment 610 * according to parameters 611 */ 612 iavf_set_rx_function(dev); 613 iavf_set_tx_function(dev); 614 615 return ret; 616 } 617 618 static int iavf_config_rx_queues_irqs(struct rte_eth_dev *dev, 619 struct rte_intr_handle *intr_handle) 620 { 621 struct iavf_adapter *adapter = 622 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 623 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 624 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 625 struct iavf_qv_map *qv_map; 626 uint16_t interval, i; 627 int vec; 628 629 if (rte_intr_cap_multiple(intr_handle) && 630 dev->data->dev_conf.intr_conf.rxq) { 631 if (rte_intr_efd_enable(intr_handle, dev->data->nb_rx_queues)) 632 return -1; 633 } 634 635 if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { 636 intr_handle->intr_vec = 637 rte_zmalloc("intr_vec", 638 dev->data->nb_rx_queues * sizeof(int), 0); 639 if (!intr_handle->intr_vec) { 640 PMD_DRV_LOG(ERR, "Failed to allocate %d rx intr_vec", 641 dev->data->nb_rx_queues); 642 return -1; 643 } 644 } 645 646 qv_map = rte_zmalloc("qv_map", 647 dev->data->nb_rx_queues * sizeof(struct iavf_qv_map), 0); 648 if (!qv_map) { 649 PMD_DRV_LOG(ERR, "Failed to allocate %d queue-vector map", 650 dev->data->nb_rx_queues); 651 return -1; 652 } 653 654 if (!dev->data->dev_conf.intr_conf.rxq || 655 !rte_intr_dp_is_en(intr_handle)) { 656 /* Rx interrupt disabled, Map interrupt only for writeback */ 657 vf->nb_msix = 1; 658 if (vf->vf_res->vf_cap_flags & 659 VIRTCHNL_VF_OFFLOAD_WB_ON_ITR) { 660 /* If WB_ON_ITR supports, enable it */ 661 vf->msix_base = IAVF_RX_VEC_START; 662 /* Set the ITR for index zero, to 2us to make sure that 663 * we leave time for aggregation to occur, but don't 664 * increase latency dramatically. 665 */ 666 IAVF_WRITE_REG(hw, 667 IAVF_VFINT_DYN_CTLN1(vf->msix_base - 1), 668 (0 << IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) | 669 IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK | 670 (2UL << IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT)); 671 /* debug - check for success! the return value 672 * should be 2, offset is 0x2800 673 */ 674 /* IAVF_READ_REG(hw, IAVF_VFINT_ITRN1(0, 0)); */ 675 } else { 676 /* If no WB_ON_ITR offload flags, need to set 677 * interrupt for descriptor write back. 678 */ 679 vf->msix_base = IAVF_MISC_VEC_ID; 680 681 /* set ITR to max */ 682 interval = iavf_calc_itr_interval( 683 IAVF_QUEUE_ITR_INTERVAL_MAX); 684 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 685 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 686 (IAVF_ITR_INDEX_DEFAULT << 687 IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT) | 688 (interval << 689 IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)); 690 } 691 IAVF_WRITE_FLUSH(hw); 692 /* map all queues to the same interrupt */ 693 for (i = 0; i < dev->data->nb_rx_queues; i++) { 694 qv_map[i].queue_id = i; 695 qv_map[i].vector_id = vf->msix_base; 696 } 697 vf->qv_map = qv_map; 698 } else { 699 if (!rte_intr_allow_others(intr_handle)) { 700 vf->nb_msix = 1; 701 vf->msix_base = IAVF_MISC_VEC_ID; 702 for (i = 0; i < dev->data->nb_rx_queues; i++) { 703 qv_map[i].queue_id = i; 704 qv_map[i].vector_id = vf->msix_base; 705 intr_handle->intr_vec[i] = IAVF_MISC_VEC_ID; 706 } 707 vf->qv_map = qv_map; 708 PMD_DRV_LOG(DEBUG, 709 "vector %u are mapping to all Rx queues", 710 vf->msix_base); 711 } else { 712 /* If Rx interrupt is reuquired, and we can use 713 * multi interrupts, then the vec is from 1 714 */ 715 vf->nb_msix = RTE_MIN(intr_handle->nb_efd, 716 (uint16_t)(vf->vf_res->max_vectors - 1)); 717 vf->msix_base = IAVF_RX_VEC_START; 718 vec = IAVF_RX_VEC_START; 719 for (i = 0; i < dev->data->nb_rx_queues; i++) { 720 qv_map[i].queue_id = i; 721 qv_map[i].vector_id = vec; 722 intr_handle->intr_vec[i] = vec++; 723 if (vec >= vf->nb_msix + IAVF_RX_VEC_START) 724 vec = IAVF_RX_VEC_START; 725 } 726 vf->qv_map = qv_map; 727 PMD_DRV_LOG(DEBUG, 728 "%u vectors are mapping to %u Rx queues", 729 vf->nb_msix, dev->data->nb_rx_queues); 730 } 731 } 732 733 if (!vf->lv_enabled) { 734 if (iavf_config_irq_map(adapter)) { 735 PMD_DRV_LOG(ERR, "config interrupt mapping failed"); 736 return -1; 737 } 738 } else { 739 uint16_t num_qv_maps = dev->data->nb_rx_queues; 740 uint16_t index = 0; 741 742 while (num_qv_maps > IAVF_IRQ_MAP_NUM_PER_BUF) { 743 if (iavf_config_irq_map_lv(adapter, 744 IAVF_IRQ_MAP_NUM_PER_BUF, index)) { 745 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 746 return -1; 747 } 748 num_qv_maps -= IAVF_IRQ_MAP_NUM_PER_BUF; 749 index += IAVF_IRQ_MAP_NUM_PER_BUF; 750 } 751 752 if (iavf_config_irq_map_lv(adapter, num_qv_maps, index)) { 753 PMD_DRV_LOG(ERR, "config interrupt mapping for large VF failed"); 754 return -1; 755 } 756 } 757 return 0; 758 } 759 760 static int 761 iavf_start_queues(struct rte_eth_dev *dev) 762 { 763 struct iavf_rx_queue *rxq; 764 struct iavf_tx_queue *txq; 765 int i; 766 767 for (i = 0; i < dev->data->nb_tx_queues; i++) { 768 txq = dev->data->tx_queues[i]; 769 if (txq->tx_deferred_start) 770 continue; 771 if (iavf_dev_tx_queue_start(dev, i) != 0) { 772 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 773 return -1; 774 } 775 } 776 777 for (i = 0; i < dev->data->nb_rx_queues; i++) { 778 rxq = dev->data->rx_queues[i]; 779 if (rxq->rx_deferred_start) 780 continue; 781 if (iavf_dev_rx_queue_start(dev, i) != 0) { 782 PMD_DRV_LOG(ERR, "Fail to start queue %u", i); 783 return -1; 784 } 785 } 786 787 return 0; 788 } 789 790 static int 791 iavf_dev_start(struct rte_eth_dev *dev) 792 { 793 struct iavf_adapter *adapter = 794 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 795 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 796 struct rte_intr_handle *intr_handle = dev->intr_handle; 797 uint16_t num_queue_pairs; 798 uint16_t index = 0; 799 800 PMD_INIT_FUNC_TRACE(); 801 802 adapter->stopped = 0; 803 804 vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; 805 vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues, 806 dev->data->nb_tx_queues); 807 num_queue_pairs = vf->num_queue_pairs; 808 809 if (iavf_init_queues(dev) != 0) { 810 PMD_DRV_LOG(ERR, "failed to do Queue init"); 811 return -1; 812 } 813 814 /* If needed, send configure queues msg multiple times to make the 815 * adminq buffer length smaller than the 4K limitation. 816 */ 817 while (num_queue_pairs > IAVF_CFG_Q_NUM_PER_BUF) { 818 if (iavf_configure_queues(adapter, 819 IAVF_CFG_Q_NUM_PER_BUF, index) != 0) { 820 PMD_DRV_LOG(ERR, "configure queues failed"); 821 goto err_queue; 822 } 823 num_queue_pairs -= IAVF_CFG_Q_NUM_PER_BUF; 824 index += IAVF_CFG_Q_NUM_PER_BUF; 825 } 826 827 if (iavf_configure_queues(adapter, num_queue_pairs, index) != 0) { 828 PMD_DRV_LOG(ERR, "configure queues failed"); 829 goto err_queue; 830 } 831 832 if (iavf_config_rx_queues_irqs(dev, intr_handle) != 0) { 833 PMD_DRV_LOG(ERR, "configure irq failed"); 834 goto err_queue; 835 } 836 /* re-enable intr again, because efd assign may change */ 837 if (dev->data->dev_conf.intr_conf.rxq != 0) { 838 rte_intr_disable(intr_handle); 839 rte_intr_enable(intr_handle); 840 } 841 842 /* Set all mac addrs */ 843 iavf_add_del_all_mac_addr(adapter, true); 844 845 /* Set all multicast addresses */ 846 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 847 true); 848 849 if (iavf_start_queues(dev) != 0) { 850 PMD_DRV_LOG(ERR, "enable queues failed"); 851 goto err_mac; 852 } 853 854 return 0; 855 856 err_mac: 857 iavf_add_del_all_mac_addr(adapter, false); 858 err_queue: 859 return -1; 860 } 861 862 static int 863 iavf_dev_stop(struct rte_eth_dev *dev) 864 { 865 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 866 struct iavf_adapter *adapter = 867 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 868 struct rte_intr_handle *intr_handle = dev->intr_handle; 869 870 PMD_INIT_FUNC_TRACE(); 871 872 if (adapter->stopped == 1) 873 return 0; 874 875 iavf_stop_queues(dev); 876 877 /* Disable the interrupt for Rx */ 878 rte_intr_efd_disable(intr_handle); 879 /* Rx interrupt vector mapping free */ 880 if (intr_handle->intr_vec) { 881 rte_free(intr_handle->intr_vec); 882 intr_handle->intr_vec = NULL; 883 } 884 885 /* remove all mac addrs */ 886 iavf_add_del_all_mac_addr(adapter, false); 887 888 /* remove all multicast addresses */ 889 iavf_add_del_mc_addr_list(adapter, vf->mc_addrs, vf->mc_addrs_num, 890 false); 891 892 adapter->stopped = 1; 893 dev->data->dev_started = 0; 894 895 return 0; 896 } 897 898 static int 899 iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) 900 { 901 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 902 903 dev_info->max_rx_queues = IAVF_MAX_NUM_QUEUES_LV; 904 dev_info->max_tx_queues = IAVF_MAX_NUM_QUEUES_LV; 905 dev_info->min_rx_bufsize = IAVF_BUF_SIZE_MIN; 906 dev_info->max_rx_pktlen = IAVF_FRAME_SIZE_MAX; 907 dev_info->max_mtu = dev_info->max_rx_pktlen - IAVF_ETH_OVERHEAD; 908 dev_info->min_mtu = RTE_ETHER_MIN_MTU; 909 dev_info->hash_key_size = vf->vf_res->rss_key_size; 910 dev_info->reta_size = vf->vf_res->rss_lut_size; 911 dev_info->flow_type_rss_offloads = IAVF_RSS_OFFLOAD_ALL; 912 dev_info->max_mac_addrs = IAVF_NUM_MACADDR_MAX; 913 dev_info->rx_offload_capa = 914 DEV_RX_OFFLOAD_VLAN_STRIP | 915 DEV_RX_OFFLOAD_QINQ_STRIP | 916 DEV_RX_OFFLOAD_IPV4_CKSUM | 917 DEV_RX_OFFLOAD_UDP_CKSUM | 918 DEV_RX_OFFLOAD_TCP_CKSUM | 919 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | 920 DEV_RX_OFFLOAD_SCATTER | 921 DEV_RX_OFFLOAD_JUMBO_FRAME | 922 DEV_RX_OFFLOAD_VLAN_FILTER | 923 DEV_RX_OFFLOAD_RSS_HASH; 924 925 dev_info->tx_offload_capa = 926 DEV_TX_OFFLOAD_VLAN_INSERT | 927 DEV_TX_OFFLOAD_QINQ_INSERT | 928 DEV_TX_OFFLOAD_IPV4_CKSUM | 929 DEV_TX_OFFLOAD_UDP_CKSUM | 930 DEV_TX_OFFLOAD_TCP_CKSUM | 931 DEV_TX_OFFLOAD_SCTP_CKSUM | 932 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | 933 DEV_TX_OFFLOAD_TCP_TSO | 934 DEV_TX_OFFLOAD_VXLAN_TNL_TSO | 935 DEV_TX_OFFLOAD_GRE_TNL_TSO | 936 DEV_TX_OFFLOAD_IPIP_TNL_TSO | 937 DEV_TX_OFFLOAD_GENEVE_TNL_TSO | 938 DEV_TX_OFFLOAD_MULTI_SEGS | 939 DEV_TX_OFFLOAD_MBUF_FAST_FREE; 940 941 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_CRC) 942 dev_info->rx_offload_capa |= DEV_RX_OFFLOAD_KEEP_CRC; 943 944 dev_info->default_rxconf = (struct rte_eth_rxconf) { 945 .rx_free_thresh = IAVF_DEFAULT_RX_FREE_THRESH, 946 .rx_drop_en = 0, 947 .offloads = 0, 948 }; 949 950 dev_info->default_txconf = (struct rte_eth_txconf) { 951 .tx_free_thresh = IAVF_DEFAULT_TX_FREE_THRESH, 952 .tx_rs_thresh = IAVF_DEFAULT_TX_RS_THRESH, 953 .offloads = 0, 954 }; 955 956 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { 957 .nb_max = IAVF_MAX_RING_DESC, 958 .nb_min = IAVF_MIN_RING_DESC, 959 .nb_align = IAVF_ALIGN_RING_DESC, 960 }; 961 962 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { 963 .nb_max = IAVF_MAX_RING_DESC, 964 .nb_min = IAVF_MIN_RING_DESC, 965 .nb_align = IAVF_ALIGN_RING_DESC, 966 }; 967 968 return 0; 969 } 970 971 static const uint32_t * 972 iavf_dev_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused) 973 { 974 static const uint32_t ptypes[] = { 975 RTE_PTYPE_L2_ETHER, 976 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, 977 RTE_PTYPE_L4_FRAG, 978 RTE_PTYPE_L4_ICMP, 979 RTE_PTYPE_L4_NONFRAG, 980 RTE_PTYPE_L4_SCTP, 981 RTE_PTYPE_L4_TCP, 982 RTE_PTYPE_L4_UDP, 983 RTE_PTYPE_UNKNOWN 984 }; 985 return ptypes; 986 } 987 988 int 989 iavf_dev_link_update(struct rte_eth_dev *dev, 990 __rte_unused int wait_to_complete) 991 { 992 struct rte_eth_link new_link; 993 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 994 995 memset(&new_link, 0, sizeof(new_link)); 996 997 /* Only read status info stored in VF, and the info is updated 998 * when receive LINK_CHANGE evnet from PF by Virtchnnl. 999 */ 1000 switch (vf->link_speed) { 1001 case 10: 1002 new_link.link_speed = ETH_SPEED_NUM_10M; 1003 break; 1004 case 100: 1005 new_link.link_speed = ETH_SPEED_NUM_100M; 1006 break; 1007 case 1000: 1008 new_link.link_speed = ETH_SPEED_NUM_1G; 1009 break; 1010 case 10000: 1011 new_link.link_speed = ETH_SPEED_NUM_10G; 1012 break; 1013 case 20000: 1014 new_link.link_speed = ETH_SPEED_NUM_20G; 1015 break; 1016 case 25000: 1017 new_link.link_speed = ETH_SPEED_NUM_25G; 1018 break; 1019 case 40000: 1020 new_link.link_speed = ETH_SPEED_NUM_40G; 1021 break; 1022 case 50000: 1023 new_link.link_speed = ETH_SPEED_NUM_50G; 1024 break; 1025 case 100000: 1026 new_link.link_speed = ETH_SPEED_NUM_100G; 1027 break; 1028 default: 1029 new_link.link_speed = ETH_SPEED_NUM_NONE; 1030 break; 1031 } 1032 1033 new_link.link_duplex = ETH_LINK_FULL_DUPLEX; 1034 new_link.link_status = vf->link_up ? ETH_LINK_UP : 1035 ETH_LINK_DOWN; 1036 new_link.link_autoneg = !(dev->data->dev_conf.link_speeds & 1037 ETH_LINK_SPEED_FIXED); 1038 1039 return rte_eth_linkstatus_set(dev, &new_link); 1040 } 1041 1042 static int 1043 iavf_dev_promiscuous_enable(struct rte_eth_dev *dev) 1044 { 1045 struct iavf_adapter *adapter = 1046 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1047 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1048 1049 return iavf_config_promisc(adapter, 1050 true, vf->promisc_multicast_enabled); 1051 } 1052 1053 static int 1054 iavf_dev_promiscuous_disable(struct rte_eth_dev *dev) 1055 { 1056 struct iavf_adapter *adapter = 1057 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1058 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1059 1060 return iavf_config_promisc(adapter, 1061 false, vf->promisc_multicast_enabled); 1062 } 1063 1064 static int 1065 iavf_dev_allmulticast_enable(struct rte_eth_dev *dev) 1066 { 1067 struct iavf_adapter *adapter = 1068 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1069 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1070 1071 return iavf_config_promisc(adapter, 1072 vf->promisc_unicast_enabled, true); 1073 } 1074 1075 static int 1076 iavf_dev_allmulticast_disable(struct rte_eth_dev *dev) 1077 { 1078 struct iavf_adapter *adapter = 1079 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1080 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1081 1082 return iavf_config_promisc(adapter, 1083 vf->promisc_unicast_enabled, false); 1084 } 1085 1086 static int 1087 iavf_dev_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *addr, 1088 __rte_unused uint32_t index, 1089 __rte_unused uint32_t pool) 1090 { 1091 struct iavf_adapter *adapter = 1092 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1093 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1094 int err; 1095 1096 if (rte_is_zero_ether_addr(addr)) { 1097 PMD_DRV_LOG(ERR, "Invalid Ethernet Address"); 1098 return -EINVAL; 1099 } 1100 1101 err = iavf_add_del_eth_addr(adapter, addr, true, VIRTCHNL_ETHER_ADDR_EXTRA); 1102 if (err) { 1103 PMD_DRV_LOG(ERR, "fail to add MAC address"); 1104 return -EIO; 1105 } 1106 1107 vf->mac_num++; 1108 1109 return 0; 1110 } 1111 1112 static void 1113 iavf_dev_del_mac_addr(struct rte_eth_dev *dev, uint32_t index) 1114 { 1115 struct iavf_adapter *adapter = 1116 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1117 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1118 struct rte_ether_addr *addr; 1119 int err; 1120 1121 addr = &dev->data->mac_addrs[index]; 1122 1123 err = iavf_add_del_eth_addr(adapter, addr, false, VIRTCHNL_ETHER_ADDR_EXTRA); 1124 if (err) 1125 PMD_DRV_LOG(ERR, "fail to delete MAC address"); 1126 1127 vf->mac_num--; 1128 } 1129 1130 static int 1131 iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) 1132 { 1133 struct iavf_adapter *adapter = 1134 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1135 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1136 int err; 1137 1138 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 1139 err = iavf_add_del_vlan_v2(adapter, vlan_id, on); 1140 if (err) 1141 return -EIO; 1142 return 0; 1143 } 1144 1145 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1146 return -ENOTSUP; 1147 1148 err = iavf_add_del_vlan(adapter, vlan_id, on); 1149 if (err) 1150 return -EIO; 1151 return 0; 1152 } 1153 1154 static void 1155 iavf_iterate_vlan_filters_v2(struct rte_eth_dev *dev, bool enable) 1156 { 1157 struct rte_vlan_filter_conf *vfc = &dev->data->vlan_filter_conf; 1158 struct iavf_adapter *adapter = 1159 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1160 uint32_t i, j; 1161 uint64_t ids; 1162 1163 for (i = 0; i < RTE_DIM(vfc->ids); i++) { 1164 if (vfc->ids[i] == 0) 1165 continue; 1166 1167 ids = vfc->ids[i]; 1168 for (j = 0; ids != 0 && j < 64; j++, ids >>= 1) { 1169 if (ids & 1) 1170 iavf_add_del_vlan_v2(adapter, 1171 64 * i + j, enable); 1172 } 1173 } 1174 } 1175 1176 static int 1177 iavf_dev_vlan_offload_set_v2(struct rte_eth_dev *dev, int mask) 1178 { 1179 struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode; 1180 struct iavf_adapter *adapter = 1181 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1182 bool enable; 1183 int err; 1184 1185 if (mask & ETH_VLAN_FILTER_MASK) { 1186 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER); 1187 1188 iavf_iterate_vlan_filters_v2(dev, enable); 1189 } 1190 1191 if (mask & ETH_VLAN_STRIP_MASK) { 1192 enable = !!(rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP); 1193 1194 err = iavf_config_vlan_strip_v2(adapter, enable); 1195 /* If not support, the stripping is already disabled by PF */ 1196 if (err == -ENOTSUP && !enable) 1197 err = 0; 1198 if (err) 1199 return -EIO; 1200 } 1201 1202 return 0; 1203 } 1204 1205 static int 1206 iavf_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask) 1207 { 1208 struct iavf_adapter *adapter = 1209 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1210 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1211 struct rte_eth_conf *dev_conf = &dev->data->dev_conf; 1212 int err; 1213 1214 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) 1215 return iavf_dev_vlan_offload_set_v2(dev, mask); 1216 1217 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN)) 1218 return -ENOTSUP; 1219 1220 /* Vlan stripping setting */ 1221 if (mask & ETH_VLAN_STRIP_MASK) { 1222 /* Enable or disable VLAN stripping */ 1223 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP) 1224 err = iavf_enable_vlan_strip(adapter); 1225 else 1226 err = iavf_disable_vlan_strip(adapter); 1227 1228 if (err) 1229 return -EIO; 1230 } 1231 return 0; 1232 } 1233 1234 static int 1235 iavf_dev_rss_reta_update(struct rte_eth_dev *dev, 1236 struct rte_eth_rss_reta_entry64 *reta_conf, 1237 uint16_t reta_size) 1238 { 1239 struct iavf_adapter *adapter = 1240 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1241 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1242 uint8_t *lut; 1243 uint16_t i, idx, shift; 1244 int ret; 1245 1246 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1247 return -ENOTSUP; 1248 1249 if (reta_size != vf->vf_res->rss_lut_size) { 1250 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1251 "(%d) doesn't match the number of hardware can " 1252 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1253 return -EINVAL; 1254 } 1255 1256 lut = rte_zmalloc("rss_lut", reta_size, 0); 1257 if (!lut) { 1258 PMD_DRV_LOG(ERR, "No memory can be allocated"); 1259 return -ENOMEM; 1260 } 1261 /* store the old lut table temporarily */ 1262 rte_memcpy(lut, vf->rss_lut, reta_size); 1263 1264 for (i = 0; i < reta_size; i++) { 1265 idx = i / RTE_RETA_GROUP_SIZE; 1266 shift = i % RTE_RETA_GROUP_SIZE; 1267 if (reta_conf[idx].mask & (1ULL << shift)) 1268 lut[i] = reta_conf[idx].reta[shift]; 1269 } 1270 1271 rte_memcpy(vf->rss_lut, lut, reta_size); 1272 /* send virtchnnl ops to configure rss*/ 1273 ret = iavf_configure_rss_lut(adapter); 1274 if (ret) /* revert back */ 1275 rte_memcpy(vf->rss_lut, lut, reta_size); 1276 rte_free(lut); 1277 1278 return ret; 1279 } 1280 1281 static int 1282 iavf_dev_rss_reta_query(struct rte_eth_dev *dev, 1283 struct rte_eth_rss_reta_entry64 *reta_conf, 1284 uint16_t reta_size) 1285 { 1286 struct iavf_adapter *adapter = 1287 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1288 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1289 uint16_t i, idx, shift; 1290 1291 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1292 return -ENOTSUP; 1293 1294 if (reta_size != vf->vf_res->rss_lut_size) { 1295 PMD_DRV_LOG(ERR, "The size of hash lookup table configured " 1296 "(%d) doesn't match the number of hardware can " 1297 "support (%d)", reta_size, vf->vf_res->rss_lut_size); 1298 return -EINVAL; 1299 } 1300 1301 for (i = 0; i < reta_size; i++) { 1302 idx = i / RTE_RETA_GROUP_SIZE; 1303 shift = i % RTE_RETA_GROUP_SIZE; 1304 if (reta_conf[idx].mask & (1ULL << shift)) 1305 reta_conf[idx].reta[shift] = vf->rss_lut[i]; 1306 } 1307 1308 return 0; 1309 } 1310 1311 static int 1312 iavf_set_rss_key(struct iavf_adapter *adapter, uint8_t *key, uint8_t key_len) 1313 { 1314 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1315 1316 /* HENA setting, it is enabled by default, no change */ 1317 if (!key || key_len == 0) { 1318 PMD_DRV_LOG(DEBUG, "No key to be configured"); 1319 return 0; 1320 } else if (key_len != vf->vf_res->rss_key_size) { 1321 PMD_DRV_LOG(ERR, "The size of hash key configured " 1322 "(%d) doesn't match the size of hardware can " 1323 "support (%d)", key_len, 1324 vf->vf_res->rss_key_size); 1325 return -EINVAL; 1326 } 1327 1328 rte_memcpy(vf->rss_key, key, key_len); 1329 1330 return iavf_configure_rss_key(adapter); 1331 } 1332 1333 static int 1334 iavf_dev_rss_hash_update(struct rte_eth_dev *dev, 1335 struct rte_eth_rss_conf *rss_conf) 1336 { 1337 struct iavf_adapter *adapter = 1338 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1339 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1340 int ret; 1341 1342 adapter->eth_dev->data->dev_conf.rx_adv_conf.rss_conf = *rss_conf; 1343 1344 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1345 return -ENOTSUP; 1346 1347 /* Set hash key. */ 1348 ret = iavf_set_rss_key(adapter, rss_conf->rss_key, 1349 rss_conf->rss_key_len); 1350 if (ret) 1351 return ret; 1352 1353 if (rss_conf->rss_hf == 0) { 1354 vf->rss_hf = 0; 1355 ret = iavf_set_hena(adapter, 0); 1356 1357 /* It is a workaround, temporarily allow error to be returned 1358 * due to possible lack of PF handling for hena = 0. 1359 */ 1360 if (ret) 1361 PMD_DRV_LOG(WARNING, "fail to clean existing RSS, lack PF support"); 1362 return 0; 1363 } 1364 1365 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF) { 1366 /* Clear existing RSS. */ 1367 ret = iavf_set_hena(adapter, 0); 1368 1369 /* It is a workaround, temporarily allow error to be returned 1370 * due to possible lack of PF handling for hena = 0. 1371 */ 1372 if (ret) 1373 PMD_DRV_LOG(WARNING, "fail to clean existing RSS," 1374 "lack PF support"); 1375 1376 /* Set new RSS configuration. */ 1377 ret = iavf_rss_hash_set(adapter, rss_conf->rss_hf, true); 1378 if (ret) { 1379 PMD_DRV_LOG(ERR, "fail to set new RSS"); 1380 return ret; 1381 } 1382 } else { 1383 ret = iavf_config_rss_hf(adapter, rss_conf->rss_hf); 1384 if (ret != -ENOTSUP) 1385 return ret; 1386 } 1387 1388 return 0; 1389 } 1390 1391 static int 1392 iavf_dev_rss_hash_conf_get(struct rte_eth_dev *dev, 1393 struct rte_eth_rss_conf *rss_conf) 1394 { 1395 struct iavf_adapter *adapter = 1396 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1397 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 1398 1399 if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF)) 1400 return -ENOTSUP; 1401 1402 rss_conf->rss_hf = vf->rss_hf; 1403 1404 if (!rss_conf->rss_key) 1405 return 0; 1406 1407 rss_conf->rss_key_len = vf->vf_res->rss_key_size; 1408 rte_memcpy(rss_conf->rss_key, vf->rss_key, rss_conf->rss_key_len); 1409 1410 return 0; 1411 } 1412 1413 static int 1414 iavf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) 1415 { 1416 uint32_t frame_size = mtu + IAVF_ETH_OVERHEAD; 1417 int ret = 0; 1418 1419 if (mtu < RTE_ETHER_MIN_MTU || frame_size > IAVF_FRAME_SIZE_MAX) 1420 return -EINVAL; 1421 1422 /* mtu setting is forbidden if port is start */ 1423 if (dev->data->dev_started) { 1424 PMD_DRV_LOG(ERR, "port must be stopped before configuration"); 1425 return -EBUSY; 1426 } 1427 1428 if (frame_size > IAVF_ETH_MAX_LEN) 1429 dev->data->dev_conf.rxmode.offloads |= 1430 DEV_RX_OFFLOAD_JUMBO_FRAME; 1431 else 1432 dev->data->dev_conf.rxmode.offloads &= 1433 ~DEV_RX_OFFLOAD_JUMBO_FRAME; 1434 1435 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size; 1436 1437 return ret; 1438 } 1439 1440 static int 1441 iavf_dev_set_default_mac_addr(struct rte_eth_dev *dev, 1442 struct rte_ether_addr *mac_addr) 1443 { 1444 struct iavf_adapter *adapter = 1445 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1446 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1447 struct rte_ether_addr *old_addr; 1448 int ret; 1449 1450 old_addr = (struct rte_ether_addr *)hw->mac.addr; 1451 1452 if (rte_is_same_ether_addr(old_addr, mac_addr)) 1453 return 0; 1454 1455 ret = iavf_add_del_eth_addr(adapter, old_addr, false, VIRTCHNL_ETHER_ADDR_PRIMARY); 1456 if (ret) 1457 PMD_DRV_LOG(ERR, "Fail to delete old MAC:" 1458 " %02X:%02X:%02X:%02X:%02X:%02X", 1459 old_addr->addr_bytes[0], 1460 old_addr->addr_bytes[1], 1461 old_addr->addr_bytes[2], 1462 old_addr->addr_bytes[3], 1463 old_addr->addr_bytes[4], 1464 old_addr->addr_bytes[5]); 1465 1466 ret = iavf_add_del_eth_addr(adapter, mac_addr, true, VIRTCHNL_ETHER_ADDR_PRIMARY); 1467 if (ret) 1468 PMD_DRV_LOG(ERR, "Fail to add new MAC:" 1469 " %02X:%02X:%02X:%02X:%02X:%02X", 1470 mac_addr->addr_bytes[0], 1471 mac_addr->addr_bytes[1], 1472 mac_addr->addr_bytes[2], 1473 mac_addr->addr_bytes[3], 1474 mac_addr->addr_bytes[4], 1475 mac_addr->addr_bytes[5]); 1476 1477 if (ret) 1478 return -EIO; 1479 1480 rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)hw->mac.addr); 1481 return 0; 1482 } 1483 1484 static void 1485 iavf_stat_update_48(uint64_t *offset, uint64_t *stat) 1486 { 1487 if (*stat >= *offset) 1488 *stat = *stat - *offset; 1489 else 1490 *stat = (uint64_t)((*stat + 1491 ((uint64_t)1 << IAVF_48_BIT_WIDTH)) - *offset); 1492 1493 *stat &= IAVF_48_BIT_MASK; 1494 } 1495 1496 static void 1497 iavf_stat_update_32(uint64_t *offset, uint64_t *stat) 1498 { 1499 if (*stat >= *offset) 1500 *stat = (uint64_t)(*stat - *offset); 1501 else 1502 *stat = (uint64_t)((*stat + 1503 ((uint64_t)1 << IAVF_32_BIT_WIDTH)) - *offset); 1504 } 1505 1506 static void 1507 iavf_update_stats(struct iavf_vsi *vsi, struct virtchnl_eth_stats *nes) 1508 { 1509 struct virtchnl_eth_stats *oes = &vsi->eth_stats_offset; 1510 1511 iavf_stat_update_48(&oes->rx_bytes, &nes->rx_bytes); 1512 iavf_stat_update_48(&oes->rx_unicast, &nes->rx_unicast); 1513 iavf_stat_update_48(&oes->rx_multicast, &nes->rx_multicast); 1514 iavf_stat_update_48(&oes->rx_broadcast, &nes->rx_broadcast); 1515 iavf_stat_update_32(&oes->rx_discards, &nes->rx_discards); 1516 iavf_stat_update_48(&oes->tx_bytes, &nes->tx_bytes); 1517 iavf_stat_update_48(&oes->tx_unicast, &nes->tx_unicast); 1518 iavf_stat_update_48(&oes->tx_multicast, &nes->tx_multicast); 1519 iavf_stat_update_48(&oes->tx_broadcast, &nes->tx_broadcast); 1520 iavf_stat_update_32(&oes->tx_errors, &nes->tx_errors); 1521 iavf_stat_update_32(&oes->tx_discards, &nes->tx_discards); 1522 } 1523 1524 static int 1525 iavf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) 1526 { 1527 struct iavf_adapter *adapter = 1528 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1529 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1530 struct iavf_vsi *vsi = &vf->vsi; 1531 struct virtchnl_eth_stats *pstats = NULL; 1532 int ret; 1533 1534 ret = iavf_query_stats(adapter, &pstats); 1535 if (ret == 0) { 1536 uint8_t crc_stats_len = (dev->data->dev_conf.rxmode.offloads & 1537 DEV_RX_OFFLOAD_KEEP_CRC) ? 0 : 1538 RTE_ETHER_CRC_LEN; 1539 iavf_update_stats(vsi, pstats); 1540 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast + 1541 pstats->rx_broadcast - pstats->rx_discards; 1542 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast + 1543 pstats->tx_unicast; 1544 stats->imissed = pstats->rx_discards; 1545 stats->oerrors = pstats->tx_errors + pstats->tx_discards; 1546 stats->ibytes = pstats->rx_bytes; 1547 stats->ibytes -= stats->ipackets * crc_stats_len; 1548 stats->obytes = pstats->tx_bytes; 1549 } else { 1550 PMD_DRV_LOG(ERR, "Get statistics failed"); 1551 } 1552 return ret; 1553 } 1554 1555 static int 1556 iavf_dev_stats_reset(struct rte_eth_dev *dev) 1557 { 1558 int ret; 1559 struct iavf_adapter *adapter = 1560 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1561 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1562 struct iavf_vsi *vsi = &vf->vsi; 1563 struct virtchnl_eth_stats *pstats = NULL; 1564 1565 /* read stat values to clear hardware registers */ 1566 ret = iavf_query_stats(adapter, &pstats); 1567 if (ret != 0) 1568 return ret; 1569 1570 /* set stats offset base on current values */ 1571 vsi->eth_stats_offset = *pstats; 1572 1573 return 0; 1574 } 1575 1576 static int iavf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, 1577 struct rte_eth_xstat_name *xstats_names, 1578 __rte_unused unsigned int limit) 1579 { 1580 unsigned int i; 1581 1582 if (xstats_names != NULL) 1583 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1584 snprintf(xstats_names[i].name, 1585 sizeof(xstats_names[i].name), 1586 "%s", rte_iavf_stats_strings[i].name); 1587 } 1588 return IAVF_NB_XSTATS; 1589 } 1590 1591 static int iavf_dev_xstats_get(struct rte_eth_dev *dev, 1592 struct rte_eth_xstat *xstats, unsigned int n) 1593 { 1594 int ret; 1595 unsigned int i; 1596 struct iavf_adapter *adapter = 1597 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1598 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1599 struct iavf_vsi *vsi = &vf->vsi; 1600 struct virtchnl_eth_stats *pstats = NULL; 1601 1602 if (n < IAVF_NB_XSTATS) 1603 return IAVF_NB_XSTATS; 1604 1605 ret = iavf_query_stats(adapter, &pstats); 1606 if (ret != 0) 1607 return 0; 1608 1609 if (!xstats) 1610 return 0; 1611 1612 iavf_update_stats(vsi, pstats); 1613 1614 /* loop over xstats array and values from pstats */ 1615 for (i = 0; i < IAVF_NB_XSTATS; i++) { 1616 xstats[i].id = i; 1617 xstats[i].value = *(uint64_t *)(((char *)pstats) + 1618 rte_iavf_stats_strings[i].offset); 1619 } 1620 1621 return IAVF_NB_XSTATS; 1622 } 1623 1624 1625 static int 1626 iavf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) 1627 { 1628 struct iavf_adapter *adapter = 1629 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1630 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1631 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 1632 uint16_t msix_intr; 1633 1634 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1635 if (msix_intr == IAVF_MISC_VEC_ID) { 1636 PMD_DRV_LOG(INFO, "MISC is also enabled for control"); 1637 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 1638 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 1639 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1640 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 1641 } else { 1642 IAVF_WRITE_REG(hw, 1643 IAVF_VFINT_DYN_CTLN1 1644 (msix_intr - IAVF_RX_VEC_START), 1645 IAVF_VFINT_DYN_CTLN1_INTENA_MASK | 1646 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 1647 IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK); 1648 } 1649 1650 IAVF_WRITE_FLUSH(hw); 1651 1652 rte_intr_ack(&pci_dev->intr_handle); 1653 1654 return 0; 1655 } 1656 1657 static int 1658 iavf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) 1659 { 1660 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 1661 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 1662 uint16_t msix_intr; 1663 1664 msix_intr = pci_dev->intr_handle.intr_vec[queue_id]; 1665 if (msix_intr == IAVF_MISC_VEC_ID) { 1666 PMD_DRV_LOG(ERR, "MISC is used for control, cannot disable it"); 1667 return -EIO; 1668 } 1669 1670 IAVF_WRITE_REG(hw, 1671 IAVF_VFINT_DYN_CTLN1(msix_intr - IAVF_RX_VEC_START), 1672 0); 1673 1674 IAVF_WRITE_FLUSH(hw); 1675 return 0; 1676 } 1677 1678 static int 1679 iavf_check_vf_reset_done(struct iavf_hw *hw) 1680 { 1681 int i, reset; 1682 1683 for (i = 0; i < IAVF_RESET_WAIT_CNT; i++) { 1684 reset = IAVF_READ_REG(hw, IAVF_VFGEN_RSTAT) & 1685 IAVF_VFGEN_RSTAT_VFR_STATE_MASK; 1686 reset = reset >> IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT; 1687 if (reset == VIRTCHNL_VFR_VFACTIVE || 1688 reset == VIRTCHNL_VFR_COMPLETED) 1689 break; 1690 rte_delay_ms(20); 1691 } 1692 1693 if (i >= IAVF_RESET_WAIT_CNT) 1694 return -1; 1695 1696 return 0; 1697 } 1698 1699 static int 1700 iavf_lookup_proto_xtr_type(const char *flex_name) 1701 { 1702 static struct { 1703 const char *name; 1704 enum iavf_proto_xtr_type type; 1705 } xtr_type_map[] = { 1706 { "vlan", IAVF_PROTO_XTR_VLAN }, 1707 { "ipv4", IAVF_PROTO_XTR_IPV4 }, 1708 { "ipv6", IAVF_PROTO_XTR_IPV6 }, 1709 { "ipv6_flow", IAVF_PROTO_XTR_IPV6_FLOW }, 1710 { "tcp", IAVF_PROTO_XTR_TCP }, 1711 { "ip_offset", IAVF_PROTO_XTR_IP_OFFSET }, 1712 }; 1713 uint32_t i; 1714 1715 for (i = 0; i < RTE_DIM(xtr_type_map); i++) { 1716 if (strcmp(flex_name, xtr_type_map[i].name) == 0) 1717 return xtr_type_map[i].type; 1718 } 1719 1720 PMD_DRV_LOG(ERR, "wrong proto_xtr type, " 1721 "it should be: vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset"); 1722 1723 return -1; 1724 } 1725 1726 /** 1727 * Parse elem, the elem could be single number/range or '(' ')' group 1728 * 1) A single number elem, it's just a simple digit. e.g. 9 1729 * 2) A single range elem, two digits with a '-' between. e.g. 2-6 1730 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6) 1731 * Within group elem, '-' used for a range separator; 1732 * ',' used for a single number. 1733 */ 1734 static int 1735 iavf_parse_queue_set(const char *input, int xtr_type, 1736 struct iavf_devargs *devargs) 1737 { 1738 const char *str = input; 1739 char *end = NULL; 1740 uint32_t min, max; 1741 uint32_t idx; 1742 1743 while (isblank(*str)) 1744 str++; 1745 1746 if (!isdigit(*str) && *str != '(') 1747 return -1; 1748 1749 /* process single number or single range of number */ 1750 if (*str != '(') { 1751 errno = 0; 1752 idx = strtoul(str, &end, 10); 1753 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1754 return -1; 1755 1756 while (isblank(*end)) 1757 end++; 1758 1759 min = idx; 1760 max = idx; 1761 1762 /* process single <number>-<number> */ 1763 if (*end == '-') { 1764 end++; 1765 while (isblank(*end)) 1766 end++; 1767 if (!isdigit(*end)) 1768 return -1; 1769 1770 errno = 0; 1771 idx = strtoul(end, &end, 10); 1772 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1773 return -1; 1774 1775 max = idx; 1776 while (isblank(*end)) 1777 end++; 1778 } 1779 1780 if (*end != ':') 1781 return -1; 1782 1783 for (idx = RTE_MIN(min, max); 1784 idx <= RTE_MAX(min, max); idx++) 1785 devargs->proto_xtr[idx] = xtr_type; 1786 1787 return 0; 1788 } 1789 1790 /* process set within bracket */ 1791 str++; 1792 while (isblank(*str)) 1793 str++; 1794 if (*str == '\0') 1795 return -1; 1796 1797 min = IAVF_MAX_QUEUE_NUM; 1798 do { 1799 /* go ahead to the first digit */ 1800 while (isblank(*str)) 1801 str++; 1802 if (!isdigit(*str)) 1803 return -1; 1804 1805 /* get the digit value */ 1806 errno = 0; 1807 idx = strtoul(str, &end, 10); 1808 if (errno || !end || idx >= IAVF_MAX_QUEUE_NUM) 1809 return -1; 1810 1811 /* go ahead to separator '-',',' and ')' */ 1812 while (isblank(*end)) 1813 end++; 1814 if (*end == '-') { 1815 if (min == IAVF_MAX_QUEUE_NUM) 1816 min = idx; 1817 else /* avoid continuous '-' */ 1818 return -1; 1819 } else if (*end == ',' || *end == ')') { 1820 max = idx; 1821 if (min == IAVF_MAX_QUEUE_NUM) 1822 min = idx; 1823 1824 for (idx = RTE_MIN(min, max); 1825 idx <= RTE_MAX(min, max); idx++) 1826 devargs->proto_xtr[idx] = xtr_type; 1827 1828 min = IAVF_MAX_QUEUE_NUM; 1829 } else { 1830 return -1; 1831 } 1832 1833 str = end + 1; 1834 } while (*end != ')' && *end != '\0'); 1835 1836 return 0; 1837 } 1838 1839 static int 1840 iavf_parse_queue_proto_xtr(const char *queues, struct iavf_devargs *devargs) 1841 { 1842 const char *queue_start; 1843 uint32_t idx; 1844 int xtr_type; 1845 char flex_name[32]; 1846 1847 while (isblank(*queues)) 1848 queues++; 1849 1850 if (*queues != '[') { 1851 xtr_type = iavf_lookup_proto_xtr_type(queues); 1852 if (xtr_type < 0) 1853 return -1; 1854 1855 devargs->proto_xtr_dflt = xtr_type; 1856 1857 return 0; 1858 } 1859 1860 queues++; 1861 do { 1862 while (isblank(*queues)) 1863 queues++; 1864 if (*queues == '\0') 1865 return -1; 1866 1867 queue_start = queues; 1868 1869 /* go across a complete bracket */ 1870 if (*queue_start == '(') { 1871 queues += strcspn(queues, ")"); 1872 if (*queues != ')') 1873 return -1; 1874 } 1875 1876 /* scan the separator ':' */ 1877 queues += strcspn(queues, ":"); 1878 if (*queues++ != ':') 1879 return -1; 1880 while (isblank(*queues)) 1881 queues++; 1882 1883 for (idx = 0; ; idx++) { 1884 if (isblank(queues[idx]) || 1885 queues[idx] == ',' || 1886 queues[idx] == ']' || 1887 queues[idx] == '\0') 1888 break; 1889 1890 if (idx > sizeof(flex_name) - 2) 1891 return -1; 1892 1893 flex_name[idx] = queues[idx]; 1894 } 1895 flex_name[idx] = '\0'; 1896 xtr_type = iavf_lookup_proto_xtr_type(flex_name); 1897 if (xtr_type < 0) 1898 return -1; 1899 1900 queues += idx; 1901 1902 while (isblank(*queues) || *queues == ',' || *queues == ']') 1903 queues++; 1904 1905 if (iavf_parse_queue_set(queue_start, xtr_type, devargs) < 0) 1906 return -1; 1907 } while (*queues != '\0'); 1908 1909 return 0; 1910 } 1911 1912 static int 1913 iavf_handle_proto_xtr_arg(__rte_unused const char *key, const char *value, 1914 void *extra_args) 1915 { 1916 struct iavf_devargs *devargs = extra_args; 1917 1918 if (!value || !extra_args) 1919 return -EINVAL; 1920 1921 if (iavf_parse_queue_proto_xtr(value, devargs) < 0) { 1922 PMD_DRV_LOG(ERR, "the proto_xtr's parameter is wrong : '%s'", 1923 value); 1924 return -1; 1925 } 1926 1927 return 0; 1928 } 1929 1930 static int iavf_parse_devargs(struct rte_eth_dev *dev) 1931 { 1932 struct iavf_adapter *ad = 1933 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1934 struct rte_devargs *devargs = dev->device->devargs; 1935 struct rte_kvargs *kvlist; 1936 int ret; 1937 1938 if (!devargs) 1939 return 0; 1940 1941 kvlist = rte_kvargs_parse(devargs->args, iavf_valid_args); 1942 if (!kvlist) { 1943 PMD_INIT_LOG(ERR, "invalid kvargs key\n"); 1944 return -EINVAL; 1945 } 1946 1947 ad->devargs.proto_xtr_dflt = IAVF_PROTO_XTR_NONE; 1948 memset(ad->devargs.proto_xtr, IAVF_PROTO_XTR_NONE, 1949 sizeof(ad->devargs.proto_xtr)); 1950 1951 ret = rte_kvargs_process(kvlist, IAVF_PROTO_XTR_ARG, 1952 &iavf_handle_proto_xtr_arg, &ad->devargs); 1953 if (ret) 1954 goto bail; 1955 1956 bail: 1957 rte_kvargs_free(kvlist); 1958 return ret; 1959 } 1960 1961 static void 1962 iavf_init_proto_xtr(struct rte_eth_dev *dev) 1963 { 1964 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 1965 struct iavf_adapter *ad = 1966 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 1967 const struct iavf_proto_xtr_ol *xtr_ol; 1968 bool proto_xtr_enable = false; 1969 int offset; 1970 uint16_t i; 1971 1972 vf->proto_xtr = rte_zmalloc("vf proto xtr", 1973 vf->vsi_res->num_queue_pairs, 0); 1974 if (unlikely(!(vf->proto_xtr))) { 1975 PMD_DRV_LOG(ERR, "no memory for setting up proto_xtr's table"); 1976 return; 1977 } 1978 1979 for (i = 0; i < vf->vsi_res->num_queue_pairs; i++) { 1980 vf->proto_xtr[i] = ad->devargs.proto_xtr[i] != 1981 IAVF_PROTO_XTR_NONE ? 1982 ad->devargs.proto_xtr[i] : 1983 ad->devargs.proto_xtr_dflt; 1984 1985 if (vf->proto_xtr[i] != IAVF_PROTO_XTR_NONE) { 1986 uint8_t type = vf->proto_xtr[i]; 1987 1988 iavf_proto_xtr_params[type].required = true; 1989 proto_xtr_enable = true; 1990 } 1991 } 1992 1993 if (likely(!proto_xtr_enable)) 1994 return; 1995 1996 offset = rte_mbuf_dynfield_register(&iavf_proto_xtr_metadata_param); 1997 if (unlikely(offset == -1)) { 1998 PMD_DRV_LOG(ERR, 1999 "failed to extract protocol metadata, error %d", 2000 -rte_errno); 2001 return; 2002 } 2003 2004 PMD_DRV_LOG(DEBUG, 2005 "proto_xtr metadata offset in mbuf is : %d", 2006 offset); 2007 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = offset; 2008 2009 for (i = 0; i < RTE_DIM(iavf_proto_xtr_params); i++) { 2010 xtr_ol = &iavf_proto_xtr_params[i]; 2011 2012 uint8_t rxdid = iavf_proto_xtr_type_to_rxdid((uint8_t)i); 2013 2014 if (!xtr_ol->required) 2015 continue; 2016 2017 if (!(vf->supported_rxdid & BIT(rxdid))) { 2018 PMD_DRV_LOG(ERR, 2019 "rxdid[%u] is not supported in hardware", 2020 rxdid); 2021 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 2022 break; 2023 } 2024 2025 offset = rte_mbuf_dynflag_register(&xtr_ol->param); 2026 if (unlikely(offset == -1)) { 2027 PMD_DRV_LOG(ERR, 2028 "failed to register proto_xtr offload '%s', error %d", 2029 xtr_ol->param.name, -rte_errno); 2030 2031 rte_pmd_ifd_dynfield_proto_xtr_metadata_offs = -1; 2032 break; 2033 } 2034 2035 PMD_DRV_LOG(DEBUG, 2036 "proto_xtr offload '%s' offset in mbuf is : %d", 2037 xtr_ol->param.name, offset); 2038 *xtr_ol->ol_flag = 1ULL << offset; 2039 } 2040 } 2041 2042 static int 2043 iavf_init_vf(struct rte_eth_dev *dev) 2044 { 2045 int err, bufsz; 2046 struct iavf_adapter *adapter = 2047 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2048 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2049 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2050 2051 err = iavf_parse_devargs(dev); 2052 if (err) { 2053 PMD_INIT_LOG(ERR, "Failed to parse devargs"); 2054 goto err; 2055 } 2056 2057 err = iavf_set_mac_type(hw); 2058 if (err) { 2059 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err); 2060 goto err; 2061 } 2062 2063 err = iavf_check_vf_reset_done(hw); 2064 if (err) { 2065 PMD_INIT_LOG(ERR, "VF is still resetting"); 2066 goto err; 2067 } 2068 2069 iavf_init_adminq_parameter(hw); 2070 err = iavf_init_adminq(hw); 2071 if (err) { 2072 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err); 2073 goto err; 2074 } 2075 2076 vf->aq_resp = rte_zmalloc("vf_aq_resp", IAVF_AQ_BUF_SZ, 0); 2077 if (!vf->aq_resp) { 2078 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory"); 2079 goto err_aq; 2080 } 2081 if (iavf_check_api_version(adapter) != 0) { 2082 PMD_INIT_LOG(ERR, "check_api version failed"); 2083 goto err_api; 2084 } 2085 2086 bufsz = sizeof(struct virtchnl_vf_resource) + 2087 (IAVF_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource)); 2088 vf->vf_res = rte_zmalloc("vf_res", bufsz, 0); 2089 if (!vf->vf_res) { 2090 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory"); 2091 goto err_api; 2092 } 2093 if (iavf_get_vf_resource(adapter) != 0) { 2094 PMD_INIT_LOG(ERR, "iavf_get_vf_config failed"); 2095 goto err_alloc; 2096 } 2097 /* Allocate memort for RSS info */ 2098 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2099 vf->rss_key = rte_zmalloc("rss_key", 2100 vf->vf_res->rss_key_size, 0); 2101 if (!vf->rss_key) { 2102 PMD_INIT_LOG(ERR, "unable to allocate rss_key memory"); 2103 goto err_rss; 2104 } 2105 vf->rss_lut = rte_zmalloc("rss_lut", 2106 vf->vf_res->rss_lut_size, 0); 2107 if (!vf->rss_lut) { 2108 PMD_INIT_LOG(ERR, "unable to allocate rss_lut memory"); 2109 goto err_rss; 2110 } 2111 } 2112 2113 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC) { 2114 if (iavf_get_supported_rxdid(adapter) != 0) { 2115 PMD_INIT_LOG(ERR, "failed to do get supported rxdid"); 2116 goto err_rss; 2117 } 2118 } 2119 2120 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN_V2) { 2121 if (iavf_get_vlan_offload_caps_v2(adapter) != 0) { 2122 PMD_INIT_LOG(ERR, "failed to do get VLAN offload v2 capabilities"); 2123 goto err_rss; 2124 } 2125 } 2126 2127 iavf_init_proto_xtr(dev); 2128 2129 return 0; 2130 err_rss: 2131 rte_free(vf->rss_key); 2132 rte_free(vf->rss_lut); 2133 err_alloc: 2134 rte_free(vf->vf_res); 2135 vf->vsi_res = NULL; 2136 err_api: 2137 rte_free(vf->aq_resp); 2138 err_aq: 2139 iavf_shutdown_adminq(hw); 2140 err: 2141 return -1; 2142 } 2143 2144 /* Enable default admin queue interrupt setting */ 2145 static inline void 2146 iavf_enable_irq0(struct iavf_hw *hw) 2147 { 2148 /* Enable admin queue interrupt trigger */ 2149 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 2150 IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK); 2151 2152 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2153 IAVF_VFINT_DYN_CTL01_INTENA_MASK | 2154 IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK | 2155 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2156 2157 IAVF_WRITE_FLUSH(hw); 2158 } 2159 2160 static inline void 2161 iavf_disable_irq0(struct iavf_hw *hw) 2162 { 2163 /* Disable all interrupt types */ 2164 IAVF_WRITE_REG(hw, IAVF_VFINT_ICR0_ENA1, 0); 2165 IAVF_WRITE_REG(hw, IAVF_VFINT_DYN_CTL01, 2166 IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK); 2167 IAVF_WRITE_FLUSH(hw); 2168 } 2169 2170 static void 2171 iavf_dev_interrupt_handler(void *param) 2172 { 2173 struct rte_eth_dev *dev = (struct rte_eth_dev *)param; 2174 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2175 2176 iavf_disable_irq0(hw); 2177 2178 iavf_handle_virtchnl_msg(dev); 2179 2180 iavf_enable_irq0(hw); 2181 } 2182 2183 static int 2184 iavf_dev_flow_ops_get(struct rte_eth_dev *dev, 2185 const struct rte_flow_ops **ops) 2186 { 2187 if (!dev) 2188 return -EINVAL; 2189 2190 *ops = &iavf_flow_ops; 2191 return 0; 2192 } 2193 2194 static void 2195 iavf_default_rss_disable(struct iavf_adapter *adapter) 2196 { 2197 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter); 2198 int ret = 0; 2199 2200 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2201 /* Set hena = 0 to ask PF to cleanup all existing RSS. */ 2202 ret = iavf_set_hena(adapter, 0); 2203 if (ret) 2204 /* It is a workaround, temporarily allow error to be 2205 * returned due to possible lack of PF handling for 2206 * hena = 0. 2207 */ 2208 PMD_INIT_LOG(WARNING, "fail to disable default RSS," 2209 "lack PF support"); 2210 } 2211 } 2212 2213 static int 2214 iavf_dev_init(struct rte_eth_dev *eth_dev) 2215 { 2216 struct iavf_adapter *adapter = 2217 IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2218 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(adapter); 2219 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); 2220 int ret = 0; 2221 2222 PMD_INIT_FUNC_TRACE(); 2223 2224 /* assign ops func pointer */ 2225 eth_dev->dev_ops = &iavf_eth_dev_ops; 2226 eth_dev->rx_queue_count = iavf_dev_rxq_count; 2227 eth_dev->rx_descriptor_status = iavf_dev_rx_desc_status; 2228 eth_dev->tx_descriptor_status = iavf_dev_tx_desc_status; 2229 eth_dev->rx_pkt_burst = &iavf_recv_pkts; 2230 eth_dev->tx_pkt_burst = &iavf_xmit_pkts; 2231 eth_dev->tx_pkt_prepare = &iavf_prep_pkts; 2232 2233 /* For secondary processes, we don't initialise any further as primary 2234 * has already done this work. Only check if we need a different RX 2235 * and TX function. 2236 */ 2237 if (rte_eal_process_type() != RTE_PROC_PRIMARY) { 2238 iavf_set_rx_function(eth_dev); 2239 iavf_set_tx_function(eth_dev); 2240 return 0; 2241 } 2242 rte_eth_copy_pci_info(eth_dev, pci_dev); 2243 eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS; 2244 2245 hw->vendor_id = pci_dev->id.vendor_id; 2246 hw->device_id = pci_dev->id.device_id; 2247 hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id; 2248 hw->subsystem_device_id = pci_dev->id.subsystem_device_id; 2249 hw->bus.bus_id = pci_dev->addr.bus; 2250 hw->bus.device = pci_dev->addr.devid; 2251 hw->bus.func = pci_dev->addr.function; 2252 hw->hw_addr = (void *)pci_dev->mem_resource[0].addr; 2253 hw->back = IAVF_DEV_PRIVATE_TO_ADAPTER(eth_dev->data->dev_private); 2254 adapter->eth_dev = eth_dev; 2255 adapter->stopped = 1; 2256 2257 if (iavf_init_vf(eth_dev) != 0) { 2258 PMD_INIT_LOG(ERR, "Init vf failed"); 2259 return -1; 2260 } 2261 2262 /* set default ptype table */ 2263 adapter->ptype_tbl = iavf_get_default_ptype_table(); 2264 2265 /* copy mac addr */ 2266 eth_dev->data->mac_addrs = rte_zmalloc( 2267 "iavf_mac", RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX, 0); 2268 if (!eth_dev->data->mac_addrs) { 2269 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to" 2270 " store MAC addresses", 2271 RTE_ETHER_ADDR_LEN * IAVF_NUM_MACADDR_MAX); 2272 return -ENOMEM; 2273 } 2274 /* If the MAC address is not configured by host, 2275 * generate a random one. 2276 */ 2277 if (!rte_is_valid_assigned_ether_addr( 2278 (struct rte_ether_addr *)hw->mac.addr)) 2279 rte_eth_random_addr(hw->mac.addr); 2280 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr, 2281 ð_dev->data->mac_addrs[0]); 2282 2283 /* register callback func to eal lib */ 2284 rte_intr_callback_register(&pci_dev->intr_handle, 2285 iavf_dev_interrupt_handler, 2286 (void *)eth_dev); 2287 2288 /* enable uio intr after callback register */ 2289 rte_intr_enable(&pci_dev->intr_handle); 2290 2291 /* configure and enable device interrupt */ 2292 iavf_enable_irq0(hw); 2293 2294 ret = iavf_flow_init(adapter); 2295 if (ret) { 2296 PMD_INIT_LOG(ERR, "Failed to initialize flow"); 2297 return ret; 2298 } 2299 2300 iavf_default_rss_disable(adapter); 2301 2302 return 0; 2303 } 2304 2305 static int 2306 iavf_dev_close(struct rte_eth_dev *dev) 2307 { 2308 struct iavf_hw *hw = IAVF_DEV_PRIVATE_TO_HW(dev->data->dev_private); 2309 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); 2310 struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; 2311 struct iavf_adapter *adapter = 2312 IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); 2313 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(dev->data->dev_private); 2314 int ret; 2315 2316 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2317 return 0; 2318 2319 ret = iavf_dev_stop(dev); 2320 2321 iavf_flow_flush(dev, NULL); 2322 iavf_flow_uninit(adapter); 2323 2324 /* 2325 * disable promiscuous mode before reset vf 2326 * it is a workaround solution when work with kernel driver 2327 * and it is not the normal way 2328 */ 2329 if (vf->promisc_unicast_enabled || vf->promisc_multicast_enabled) 2330 iavf_config_promisc(adapter, false, false); 2331 2332 iavf_shutdown_adminq(hw); 2333 /* disable uio intr before callback unregister */ 2334 rte_intr_disable(intr_handle); 2335 2336 /* unregister callback func from eal lib */ 2337 rte_intr_callback_unregister(intr_handle, 2338 iavf_dev_interrupt_handler, dev); 2339 iavf_disable_irq0(hw); 2340 2341 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_RSS_PF) { 2342 if (vf->rss_lut) { 2343 rte_free(vf->rss_lut); 2344 vf->rss_lut = NULL; 2345 } 2346 if (vf->rss_key) { 2347 rte_free(vf->rss_key); 2348 vf->rss_key = NULL; 2349 } 2350 } 2351 2352 rte_free(vf->vf_res); 2353 vf->vsi_res = NULL; 2354 vf->vf_res = NULL; 2355 2356 rte_free(vf->aq_resp); 2357 vf->aq_resp = NULL; 2358 2359 vf->vf_reset = false; 2360 2361 return ret; 2362 } 2363 2364 static int 2365 iavf_dev_uninit(struct rte_eth_dev *dev) 2366 { 2367 if (rte_eal_process_type() != RTE_PROC_PRIMARY) 2368 return -EPERM; 2369 2370 iavf_dev_close(dev); 2371 2372 return 0; 2373 } 2374 2375 /* 2376 * Reset VF device only to re-initialize resources in PMD layer 2377 */ 2378 static int 2379 iavf_dev_reset(struct rte_eth_dev *dev) 2380 { 2381 int ret; 2382 2383 ret = iavf_dev_uninit(dev); 2384 if (ret) 2385 return ret; 2386 2387 return iavf_dev_init(dev); 2388 } 2389 2390 static int 2391 iavf_dcf_cap_check_handler(__rte_unused const char *key, 2392 const char *value, __rte_unused void *opaque) 2393 { 2394 if (strcmp(value, "dcf")) 2395 return -1; 2396 2397 return 0; 2398 } 2399 2400 static int 2401 iavf_dcf_cap_selected(struct rte_devargs *devargs) 2402 { 2403 struct rte_kvargs *kvlist; 2404 const char *key = "cap"; 2405 int ret = 0; 2406 2407 if (devargs == NULL) 2408 return 0; 2409 2410 kvlist = rte_kvargs_parse(devargs->args, NULL); 2411 if (kvlist == NULL) 2412 return 0; 2413 2414 if (!rte_kvargs_count(kvlist, key)) 2415 goto exit; 2416 2417 /* dcf capability selected when there's a key-value pair: cap=dcf */ 2418 if (rte_kvargs_process(kvlist, key, 2419 iavf_dcf_cap_check_handler, NULL) < 0) 2420 goto exit; 2421 2422 ret = 1; 2423 2424 exit: 2425 rte_kvargs_free(kvlist); 2426 return ret; 2427 } 2428 2429 static int 2430 iavf_drv_i40evf_check_handler(__rte_unused const char *key, 2431 const char *value, __rte_unused void *opaque) 2432 { 2433 if (strcmp(value, "i40evf")) 2434 return -1; 2435 2436 return 0; 2437 } 2438 2439 static int 2440 iavf_drv_i40evf_selected(struct rte_devargs *devargs, uint16_t device_id) 2441 { 2442 struct rte_kvargs *kvlist; 2443 const char *key = "driver"; 2444 int ret = 0; 2445 2446 if (device_id != IAVF_DEV_ID_VF && 2447 device_id != IAVF_DEV_ID_VF_HV && 2448 device_id != IAVF_DEV_ID_X722_VF && 2449 device_id != IAVF_DEV_ID_X722_A0_VF) 2450 return 0; 2451 2452 if (devargs == NULL) 2453 return 0; 2454 2455 kvlist = rte_kvargs_parse(devargs->args, NULL); 2456 if (kvlist == NULL) 2457 return 0; 2458 2459 if (!rte_kvargs_count(kvlist, key)) 2460 goto exit; 2461 2462 /* i40evf driver selected when there's a key-value pair: 2463 * driver=i40evf 2464 */ 2465 if (rte_kvargs_process(kvlist, key, 2466 iavf_drv_i40evf_check_handler, NULL) < 0) 2467 goto exit; 2468 2469 ret = 1; 2470 2471 exit: 2472 rte_kvargs_free(kvlist); 2473 return ret; 2474 } 2475 2476 static int eth_iavf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, 2477 struct rte_pci_device *pci_dev) 2478 { 2479 if (iavf_dcf_cap_selected(pci_dev->device.devargs) || 2480 iavf_drv_i40evf_selected(pci_dev->device.devargs, 2481 pci_dev->id.device_id)) 2482 return 1; 2483 2484 return rte_eth_dev_pci_generic_probe(pci_dev, 2485 sizeof(struct iavf_adapter), iavf_dev_init); 2486 } 2487 2488 static int eth_iavf_pci_remove(struct rte_pci_device *pci_dev) 2489 { 2490 return rte_eth_dev_pci_generic_remove(pci_dev, iavf_dev_uninit); 2491 } 2492 2493 /* Adaptive virtual function driver struct */ 2494 static struct rte_pci_driver rte_iavf_pmd = { 2495 .id_table = pci_id_iavf_map, 2496 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC, 2497 .probe = eth_iavf_pci_probe, 2498 .remove = eth_iavf_pci_remove, 2499 }; 2500 2501 RTE_PMD_REGISTER_PCI(net_iavf, rte_iavf_pmd); 2502 RTE_PMD_REGISTER_PCI_TABLE(net_iavf, pci_id_iavf_map); 2503 RTE_PMD_REGISTER_KMOD_DEP(net_iavf, "* igb_uio | vfio-pci"); 2504 RTE_PMD_REGISTER_PARAM_STRING(net_iavf, "cap=dcf driver=i40evf"); 2505 RTE_LOG_REGISTER(iavf_logtype_init, pmd.net.iavf.init, NOTICE); 2506 RTE_LOG_REGISTER(iavf_logtype_driver, pmd.net.iavf.driver, NOTICE); 2507 #ifdef RTE_ETHDEV_DEBUG_RX 2508 RTE_LOG_REGISTER(iavf_logtype_rx, pmd.net.iavf.rx, DEBUG); 2509 #endif 2510 #ifdef RTE_ETHDEV_DEBUG_TX 2511 RTE_LOG_REGISTER(iavf_logtype_tx, pmd.net.iavf.tx, DEBUG); 2512 #endif 2513